40th week of 2013 patent applcation highlights part 18 |
Patent application number | Title | Published |
20130256664 | MOS Device for Making the Source/Drain Region Closer to the Channel Region and Method of Manufacturing the Same - This invention relates to a MOS device for making the source/drain region closer to the channel region and a method of manufacturing the same, comprising: providing an initial structure, which includes a substrate, an active region, and a gate stack; performing ion implantation in the active region on both sides of the gate stack, such that part of the substrate material undergoes pre-amorphization to form an amorphous material layer; forming a first spacer; with the first spacer as a mask, performing dry etching, thereby forming a recess, with the amorphous material layer below the first spacer kept; performing wet etching using an etchant solution that is isotropic to the amorphous material layer and whose etch rate to the amorphous material layer is greater than or substantially equal to the etch rate to the {100} and {110} surfaces of the substrate material but is far greater than the etch rate to the {111} surface of the substrate material, thus removing the amorphous material layer below the first spacer, such that the substrate material below the amorphous material layer is exposed to the solution and is etched thereby, and in the end, forming a Sigma shaped recess that extends to the nearby region below the gate stack; and epitaxially forming SiGe in the Sigma shaped recess. | 2013-10-03 |
20130256665 | SEMICONDUCTOR ELEMENT, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF SEMICONDUCTOR ELEMENT - To provide a semiconductor element in which generation of oxygen vacancies in an oxide semiconductor thin film can be suppressed. The semiconductor element has a structure in which, in a gate insulating film, the nitrogen content of regions which do not overlap with a gate electrode is higher than the nitrogen content of a region which overlaps with the gate electrode. A nitride film has an excellent property of preventing impurity diffusion; thus, with the structure, release of oxygen in the oxide semiconductor film, in particular, in the channel formation region, to the outside of the semiconductor element can be effectively suppressed. | 2013-10-03 |
20130256666 | THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF - A thin film transistor and a manufacturing method thereof are provided. The thin film transistor includes a gate, an oxide channel layer, a gate insulating layer, a source, a drain and a dielectric layer. The gate is disposed on a substrate. The oxide channel layer, disposed on the substrate, is stacked with the gate. A material of the oxide channel layer includes a metal element. The metal element content shows a gradient distribution along a thickness direction of the oxide channel layer. The gate insulation layer is disposed between the gate and the oxide channel layer. The source and the drain are disposed in parallel to each other, and connected to the oxide channel layer. Sides of the source and the drain, facing away from the substrate, are covered by the dielectric layer. | 2013-10-03 |
20130256667 | METHOD OF FORMING A CONDUCTIVE PATTERN, METHOD OF MANUFACTURING A DISPLAY SUBSTRATE USING THE METHOD, AND DISPLAY SUBSTRATE - A method of forming a conductive pattern includes forming a trench on a substrate, and providing a conductive ink to the trench while an electric field is generated between the substrate and a nozzle which ejects the conductive ink. | 2013-10-03 |
20130256668 | ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME - Provided is an array substrate including a base substrate, a thin film transistor having a semiconductor layer disposed on a first part of the base substrate. The semiconductor layer includes a source electrode and a drain electrode, a gate electrode disposed on the semiconductor layer and insulated from the semiconductor layer. A light-blocking layer disposed between the base substrate and the thin film transistor. The light-blocking layer comprises a first layer continuously disposed on and around the first part of the base substrate, and a second layer formed on the first part of the base substrate without extending outside of the first part, the second layer being disposed on the first layer. | 2013-10-03 |
20130256669 | ARRAY SUBSTRATE FOR FRINGE FIELD SWITCHING MODE LIQUID CRYSTAL DISPLAY DEVICE - An array substrate for a fringe field switching mode LCD device includes a pixel electrode having a plate shape in a pixel region; and a common electrode including a plurality of bar-type openings that correspond to the pixel electrode and long axes of which are inclined at a first angle in a clockwise direction or counterclockwise direction with respect to a normal line perpendicular to the gate line, wherein a data line is formed in a zigzag shape, wherein two adjacent data lines among three adjacent data lines are disposed in parallel with each other and the other data line is linearly symmetrical with respect to the two adjacent data lines, and wherein the long axis of each of the plurality of bar-type openings is disposed in parallel with one of data lines that define the pixel region and are located at both sides of the pixel region. | 2013-10-03 |
20130256670 | THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THIN FILM TRANSISTOR - A thin film transistor is disclosed. The drain and source electrode layer of the thin film transistor is disposed on the substrate, in which the drain and source electrode layer is divided into a drain region and a source region. The semiconductor layer and the first insulating layer are disposed on the drain and source electrode layer, in which the first insulating layer has an upper limit of thickness. The second insulating layer is disposed on the semiconductor layer and the first insulating layer, in which the second insulating layer has a lower limit of thickness. The gate electrode layer is disposed on the second insulating layer. The passivation layer is disposed on the gate electrode layer, and the pixel electrode layer is disposed on the passivation layer. | 2013-10-03 |
20130256671 | DISPLAY APPARATUS - A display apparatus includes a backlight module, a panel module, and a plurality of double-sided adhesive tapes. The backlight module includes a bezel. The frame has a supporting surface. The panel module includes a glass substrate and a plurality of chips. The glass substrate is disposed on the supporting surface. An edge of the glass substrate has a bonding region. The chips are disposed at the bonding region. The chips and the supporting surface are respectively located at two opposite sides of the glass substrate. The double-sided adhesive tapes are disposed between the supporting surface and the bonding region. Each of the double-sided adhesive tapes is aligned with a gap between two adjacent chips. | 2013-10-03 |
20130256672 | LIQUID CRYSTAL DISPLAY DEVICE - It is an object to provide a liquid crystal display device which has excellent viewing angle characteristics and higher quality. The present invention has a pixel including a first switch, a second switch, a third switch, a first resistor, a second resistor, a first liquid crystal element, and a second liquid crystal element. A pixel electrode of the first liquid crystal element is electrically connected to a signal line through the first switch. The pixel electrode of the first liquid crystal element is electrically connected to a pixel electrode of the second liquid crystal element through the second switch and the first resistor. The pixel electrode of the second liquid crystal element is electrically connected to a Cs line through the third switch and the second resistor. A common electrode of the first liquid crystal element is electrically connected to a common electrode of the second liquid crystal element. | 2013-10-03 |
20130256673 | SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS - A semiconductor device includes: a transistor including an oxide semiconductor film; a first insulating film covering the oxide semiconductor film and including a first resin material; and a second insulating film including a second resin material that has polarity different from polarity of the first resin material, the second insulating film being laminated on the first insulating film. | 2013-10-03 |
20130256674 | PIXEL STRUCTURE - A pixel structure including a semiconductor layer having at least one source region and at least one drain region; a first insulating layer covering the semiconductor layer; a first conductive layer on the first insulating layer and including at least one gate; a second insulating layer covering the first conductive layer; a second conductive layer on the second insulating layer and including at least one source electrode, at least one drain electrode and at least one bottom electrode, the source region, the source electrode, the drain region, the drain electrode and the gate forming at least one thin film transistor; a third insulating layer covering the second conductive layer; a third conductive layer on the third insulating layer and including at least one top electrode, the top electrode and the bottom electrode forming at least one capacitor; and a pixel electrode electrically connected to the thin film transistor. | 2013-10-03 |
20130256675 | Method for Consuming Silicon Nanoparticle Film Oxidation - A method is provided for consuming oxides in a silicon (Si) nanoparticle film. The method forms a colloidal solution film of Si nanoparticles overlying a substrate. The Si nanoparticle colloidal solution film is annealed at a high temperature in the presence of titanium (Ti). In response to the annealing, Si oxide is consumed in a resultant Si nanoparticle film. In one aspect, the consuming the Si oxide in the Si nanoparticle film includes forming Ti oxide in the Si nanoparticle film. Also in response to a low temperature annealing, solvents are evaporated in the colloidal solution film of Si nanoparticles. Si and Ti oxide molecules are sintered in the Si nanoparticle film in response to the high temperature annealing. | 2013-10-03 |
20130256676 | ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD FOR REPAIRING ORGANIC LIGHT EMITTING DIODE DISPLAY - An organic light emitting diode (OLED) display includes a first electrode, an organic emission layer positioned on the first electrode, and a second electrode positioned on the organic emission layer. The OLED display includes a substrate, a thin film transistor including an active layer positioned on the substrate, a gate electrode positioned on the active layer and formed with the same layer as the first electrode, and a source electrode and a drain electrode positioned on the gate electrode and connected to the active layer, a pixel defining layer positioned between the source electrode and the drain electrode, and the second electrode, the pixel defining layer including a pixel opening exposing the first electrode and a pin hole opening exposing at least one of the source electrode and the drain electrode; and a coated portion filling the pin hole opening. | 2013-10-03 |
20130256677 | DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF - A display device is provided, which includes a transparent substrate, an active device array, a solar cell structure and an electrophoretic display film. The transparent substrate has an upper surface and a lower surface opposite to each other. The active device array has a plurality of pixel structures, in which the pixel structures are disposed on the upper surface of the transparent substrate. The solar cell structure is directly disposed on the lower surface of the transparent substrate. The electrophoretic display film is disposed over the transparent substrate and includes a transparent protection film, an electrode layer and a plurality of display media, in which the electrode layer is disposed between the transparent protection film and the display media and the display media are located between the electrode layer and the active device array. | 2013-10-03 |
20130256678 | THIN FILM TRANSISTOR ARRAY SUBSTRATE - The present invention provides a thin film transistor array substrate that can eliminate short-circuiting between a source electrode and a drain electrode, while ensuring electrical connection between the drain electrode and a pixel electrode. The thin film transistor array substrate has a thin film transistor, a first interlayer insulating film, a lower layer electrode, a second interlayer insulating film, and an upper layer electrode laminated therein in this order. The first interlayer insulating film has a first through hole in a region where the drain electrode of the thin film transistor is disposed, the second interlayer insulating film has a second through hole in a region where the first through hole is disposed, the lower layer electrode has a portion on the first interlayer insulating film and a portion in the first through hole separated from each other, the drain electrode has a portion covered with the first interlayer insulating film, and a portion in contact with a portion of the lower layer electrode in the first through hole, and the portion of the lower layer electrode in the first through hole is in contact with a portion of an upper layer electrode disposed in the second through hole. | 2013-10-03 |
20130256679 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF FORMING THE SAME - A high electron mobility transistor (HEMT) includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A carrier channel is located between the first III-V compound layer and the second III-V compound layer. A salicide source feature and a salicide drain feature are in contact with the first III-V compound layer through the second III-V compound layer. A gate electrode is disposed over a portion of the second III-V compound layer between the salicide source feature and the salicide drain feature. | 2013-10-03 |
20130256680 | Vertical Semiconductor Device and Manufacturing Method Thereof - The present invention discloses a vertical semiconductor device and a manufacturing method thereof. The vertical semiconductor device includes: a substrate having a first surface and a second surface, the substrate including a conductive array formed by multiple conductive plugs through the substrate; a semiconductor layer formed on the first surface, the semiconductor layer having a third surface and a fourth surface, wherein the fourth surface faces the first surface; a first electrode formed on the third surface; and a second electrode formed on the second surface for electrically connecting to the conductive array. | 2013-10-03 |
20130256681 | GROUP III NITRIDE-BASED HIGH ELECTRON MOBILITY TRANSISTOR - A group III nitride-based high electron mobility transistor (HEMT) is disclosed. The group III nitride-based high electron mobility transistor (HEMT) comprises sequentially a substrate, a GaN buffer layer, a GaN channel layer, a AlN spacer layer, a barrier layer, a GaN cap layer, and a delta doped layer inserted between the AlN spacer layer and the barrier layer. The HEMT structure of the present invention can improve the electron mobility and concentration of the two-dimensional electron gas, while keeping a low contact resistance. | 2013-10-03 |
20130256682 | COMPOUND SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - An embodiment of a method of manufacturing a compound semiconductor device includes: forming an initial layer over a substrate; forming a buffer layer over the initial layer; forming an electron transport layer and an electron supply layer over the buffer layer; and forming a gate electrode, a source electrode and a gate electrode over the electron supply layer. The forming an initial layer includes: forming a first compound semiconductor film with a flow rate ratio being a first value, the flow rate ratio being a ratio of a flow rate of a V-group element source gas to a flow rate of a III-group element source gas; and forming a second compound semiconductor film with the flow rate ratio being a second value different from the first value over the first compound semiconductor film. The method further includes forming an Fe-doped region between the buffer layer and the electron transport layer. | 2013-10-03 |
20130256683 | COMPOUND SEMICONDUCTOR AND METHOD OF MANUFACTURING THE SAME - An embodiment of a compound semiconductor device includes: a substrate; an electron transport layer and an electron supply layer formed over the substrate; a gate electrode, a source electrode and a drain electrode formed over the electron supply layer; a p-type semiconductor layer formed between the electron supply layer and the gate electrode; and a hole canceling layer formed between the electron supply layer and the p-type semiconductor layer, the hole canceling layer containing a donor or a recombination center and canceling a hole. | 2013-10-03 |
20130256684 | COMPOUND SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - An embodiment of a compound semiconductor device includes: a substrate; an electron transport layer formed over the substrate; an electron supply layer formed over the electron transport layer; a source electrode and a drain electrode formed over the electron supply layer; a gate electrode formed over the electron supply layer between the source electrode and the drain electrode; a p-type compound semiconductor layer formed between the electron supply layer and the gate electrode; and a compound semiconductor layer containing an n-type impurity formed between the electron supply layer and the p-type compound semiconductor layer. | 2013-10-03 |
20130256685 | COMPOUND SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A compound semiconductor device includes a compound semiconductor composite structure in which two-dimensional electron gas is generated; and an electrode that is formed on the compound semiconductor composite structure, wherein the compound semiconductor composite structure includes a p-type semiconductor layer below a portion where the two-dimensional electron gas is generated, and the p-type semiconductor layer includes a portion containing a larger amount of an ionized acceptor than other portions of the p-type semiconductor layer, the portion being located below the electrode. | 2013-10-03 |
20130256686 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device includes: a first semiconductor layer formed over a substrate; a second semiconductor layer formed over the first semiconductor layer; an insulating film including a first insulating film formed over the second semiconductor layer, a second insulating film, and a third insulating film stacked sequentially over the first insulating film, and an electrode formed over the insulating film, wherein, in the first insulating film, a region containing halogen ions is formed under a region provided with the electrode, and the third insulating film contains a halogen. | 2013-10-03 |
20130256687 | GROUP III NITRIDE COMPOUND SEMICONDUCTOR LIGHT EMITTING ELEMENT AND METHOD FOR PRODUCING THE SAME - A group III nitride compound semiconductor light emitting device that inhibits occurrence of dislocation in a strain relaxation layer in forming a group III nitride compound semiconductor layer on a thin GaN substrate, and a method for producing the same are provided. A light emitting device | 2013-10-03 |
20130256688 | NITRIDE SEMICONDUCTOR SCHOTTKY DIODE AND METHOD FOR MANUFACTURING SAME - According to an embodiment, a nitride semiconductor Schottky diode includes a first layer including a first nitride semiconductor and a second layer provided on the first layer and including a second nitride semiconductor having a wider band gap than the first nitride semiconductor. The diode also includes an ohmic electrode provided on the second layer and a Schottky electrode provided on the second layer. The second layer includes a region containing an acceptor in the vicinity of the Schottky electrode between the Schottky electrode and the ohmic electrode. | 2013-10-03 |
20130256689 | NANOWIRE-BASED OPTOELECTRONIC SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE OF SUCH A STRUCTURE - The invention concerns an optoelectronic semiconductor structure ( | 2013-10-03 |
20130256690 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE - A semiconductor device may include a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer, a source electrode and a drain electrode in contact with the first semiconductor layer or the second semiconductor layer, an opening formed in the second semiconductor layer, an insulating film formed on an inner surface of the opening formed in the second semiconductor layer and above the second semiconductor layer, a gate electrode formed in the opening via the insulating film, and a protective film formed on the insulating film and including an amorphous film containing carbon as a major component. | 2013-10-03 |
20130256691 | METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE - A method for manufacturing a semiconductor light emitting device is provided. The device includes: an n-type semiconductor layer; a p-type semiconductor layer; and a light emitting unit provided between the n-type semiconductor layer and the p-type semiconductor layer. The method includes: forming a buffer layer made of a crystalline Al | 2013-10-03 |
20130256692 | EPITAXIAL DEVICES - Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride. | 2013-10-03 |
20130256693 | SEMICONDUCTOR DEVICE, POWER-SUPPLY UNIT, AMPLIFIER AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device, includes a semiconductor layer formed above a substrate; an insulating film formed on the semiconductor layer; and an electrode formed on the insulating film. The insulating film has a membrane stress at a side of the semiconductor layer lower than a membrane stress at a side of the electrode. | 2013-10-03 |
20130256694 | Programmable Gate III-Nitride Semiconductor Device - A III-nitride semiconductor device which includes a charged gate insulation body. | 2013-10-03 |
20130256695 | III-Nitride Heterojunction Device - A III-nitride heterojunction semiconductor device having a III-nitride heterojunction that includes a discontinuous two-dimensional electron gas under a gate thereof. | 2013-10-03 |
20130256696 | Prepared and Stored GaN Substrate - A GaN substrate is stored within an atmosphere in which the oxygen concentration is not greater than 15 vol. % and the water-vapor concentration is not greater than 20 g/m | 2013-10-03 |
20130256697 | GROUP-III-NITRIDE BASED LAYER STRUCTURE AND SEMICONDUCTOR DEVICE - A group-III-nitride based layer sequence fabricated by means of an epitaxial process on a silicon substrate, the layer sequence comprising at least one doped first group-III-nitride layer ( | 2013-10-03 |
20130256698 | LOW LOSS SIC MOSFET - A Vertical Multiple Implanted Silicon Carbide Power MOSFET (VMIMOSFET) includes a first conductivity semiconductor substrate, a first conductivity semiconductor drift layer on the top of the substrate, a multitude of second conductivity layers implanted in the drift layer. The body layer is where the channel is formed. A first conductivity source layer is interspaced appropriately inside of the second conductivity layers. A gate oxide of a certain thickness and another oxide of a different thickness, a greater thickness than the gate oxide, placed in between the body layers but in such way that its shape does not distort the gate oxide in the channel. A charge compensated body layer of the second conductivity formed outside of the channel region and only at specific high electric field locations in the structure. The device and the manufacturing method deliver a power SiC MOSFET with increased frequency of operation and reduced switching losses. | 2013-10-03 |
20130256699 | Gate Overvoltage Protection for Compound Semiconductor Transistors - A transistor device includes a compound semiconductor body, a drain disposed in the compound semiconductor body and a source disposed in the compound semiconductor body and spaced apart from the drain by a channel region. A gate is provided for controlling the channel region. The transistor device further includes a gate overvoltage protection device connected between the source and the gate, the gate overvoltage protection device including p-type and n-type silicon-containing semiconductor material. | 2013-10-03 |
20130256700 | SILICON CARBIDE SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHODS FOR MANUFACTURING THEM - A silicon carbide substrate has a first main surface, and a second main surface opposite to the first main surface. A region including at least one main surface of the first and second main surfaces is made of single-crystal silicon carbide. In the one main surface, sulfur atoms are present at not less than 60×10 | 2013-10-03 |
20130256701 | STRAINED SILICON CHANNEL SEMICONDUCTOR STRUCTURE - A strained silicon channel semiconductor structure comprises a substrate having an upper surface, a gate structure formed on the upper surface, at least one recess formed in the substrate at lateral sides of the gate structure, wherein the recess has at least one sidewall which has an upper sidewall and a lower sidewall concaved in the direction to the gate structure, and the included angle between the upper sidewall and horizontal plane ranges between 54.5°-90°, and an epitaxial layer filled into the two recesses. | 2013-10-03 |
20130256702 | LIGHT EMITTING DIODE WITH HIGH LIGHT EXTRACTION EFFICIENCY AND METHOD FOR MANUFACTURING THE SAME - A light emitting diode includes a light emitting structure, a transparent conductive layer and a transparent protecting layer formed in sequence. A plurality of holes are defined in the transparent protecting layer to expose the transparent conductive layer out of the transparent protecting layer. A plurality of micro-structures are formed on a top surface of the transparent conductive layer in the holes. The micro-structures refract light emitted from the light emitting structure and travelling through the transparent conductive layer. | 2013-10-03 |
20130256703 | AMOLED WITH N-TYPE TFT - A stratified organic light-emitting diode structure includes a thin-film transistor and an organic light-emitting diode (OLED). The OLED is fabricated on a planarization layer that has a top surface substantially parallel to the substrate, and the layers in the organic light-emitting diode (OLED) are substantially parallel to each other. The major part of each OLED layer has a uniform thickness so that the OLED produces a uniform brightness. The planarization layer covers the thin-film transistor entirely and the planarization layer on top of the thin-film transistor is also covered by an insulation layer. In order to electrically connect the top electrode of the OLED to the drain terminal of the thin-film transistor, an opening is made through both the top insulating layer and the planarization layer to expose part of the drain terminal. Spacers with uniform height are fabricated on the top insulating layer to protect the pixel structure. | 2013-10-03 |
20130256704 | LED, Backlight Module, and LCD Device - The invention provides a LED, a backlight module, and a LCD device. The LED includes an inner cavity. The bottom of the inner cavity is provided with a chip. Four side walls are arranged around the bottom of the inner cavity. Both ends of the chip are respectively connected with electrodes. Two opposite side walls of the bottom of the inner cavity are provided with at least one convex step surface, and the electrodes at the two ends of the chip are extended to the step surface from the bottom of the inner cavity; the other two side walls adjacent to the step surface are provided with at least one inclined surface which makes an obtuse angle with the bottom of the inner cavity. By selecting the inclination angle of different inclined surfaces, the invention can freely control the scattering range of the emitted light, has strong adaptability, and is suitable for being used as a backlight source of the LCD device. When light enters from the side, the large light emitting angle enables the light to be uniformly emitted into a light guide panel, thereby reducing the phenomenon of hot spots. | 2013-10-03 |
20130256705 | LIGHT EMITTING DIODE LIGHT BAR STRUCTURE - The present invention discloses a light emitting diode (LED) light bar structure, which is applied to a backlight module of edge lighting. The LED light bar structure comprises a circuit board, a first row light source and a second row light source. The first row light source comprises a plurality of first LEDs; the second row light source comprises a plurality of second LEDs; and the first LEDs of the first row light source alternately continue with the second LEDs of the second row light source along the longitude direction of the circuit board to keep the lights entering into the light guide plate continuously, so as to prevent the light guide plate from light shadow “Mura” phenomenon in the light guide plate near the LEDs, and it can suit the design trend of narrow frame of liquid crystal panel. | 2013-10-03 |
20130256706 | PIXEL ARRAY AND DISPLAY PANEL - A pixel array and a display panel are provided. The pixel array includes a plurality of pixel units. Each of the pixel units includes a first scan line, a second scan line, a data line, a first thin-film transistor, a second thin-film transistor, a first pixel electrode and a second pixel electrode. The first thin-film transistor is electrically connected to the first scan line and the data line. The first pixel electrode is electrically connected to the first thin-film transistor. The second thin-film transistor is electrically connected to the second scan line and the data line. The second pixel electrode is electrically connected to the second thin-film transistor. The orthogonal projection pattern of the first thin-film transistor on XY plane and the orthogonal projection pattern of the second thin-film transistor on XY plane are substantially the same. | 2013-10-03 |
20130256707 | ARRAY SUBSTRATE AND PIXEL UNIT OF DISPLAY PANEL - An array substrate and a pixel unit of a display panel include a plurality of subpixels arranged in a pixel array (N row*M column). Only one data line is disposed in a portion of two adjacent columns of subpixels in the pixel array, and two data lines are disposed in another portion of two adjacent columns of subpixels in the pixel array. | 2013-10-03 |
20130256708 | LIGHT EMITTING DIODES - An LED is provided. The LED includes at least two light emitting units located on a same plane. Each light emitting unit includes a first semiconductor layer, an active layer and a second semiconductor layer stacked in that order. Each light emitting unit further includes a first electrode and a second electrode electrically connected with the first semiconductor layer and the second semiconductor layer respectively. The active layer of each light emitting unit is spaced from the active layers of other light emitting units. A distance between adjacent active layer ranges from 1 micron to 1 millimeter. | 2013-10-03 |
20130256709 | METHOD OF MANUFACTURING SUBSTRATE FOR LED MODULE AND SUBSTRATE FOR LED MODULE MANUFACTURED BY THE SAME - Disclosed herein are a method of manufacturing a substrate for an LED module and a substrate for an LED module manufactured by the same, including: providing a base substrate having metal layers formed on both surfaces thereof; forming circuit patterns on the metal layers; applying a solder resist layer onto the circuit patterns; forming a through hole penetrating through the base substrate; separating the base substrate up and down; and bonding each of the separated base substrates to a parent substrate, thereby preventing light reflectivity of a parent substrate from being degraded due to a resist applying process and a surface treatment process. | 2013-10-03 |
20130256710 | MULTI-CHIP LIGHT EMITTER PACKAGES AND RELATED METHODS - Light emitter packages having multiple light emitter chips, such as light emitting diode (LED) chips, and related methods are provided. In one embodiment, a light emitter package can include a ceramic submount. An array of light emitter chips can be disposed over a portion of the submount, and each light emitter chip can include a horizontal chip structure having positive and negative electrical contacts disposed on a same side. The positive and negative electrical contacts can be adapted to electrically communicate to conductive portions of the submount. Light emitter packages can further include a lens overmolded on the submount and covering a portion of the array. | 2013-10-03 |
20130256711 | SUBSTRATE BASED LIGHT EMITTER DEVICES, COMPONENTS, AND RELATED METHODS - Substrate based light emitter devices, components, and related methods are disclosed. In some aspects, light emitter components can include a substrate and a plurality of light emitter devices provided over the substrate. Each device can include a surface mount device (SMD) adapted to mount over an external substrate or heat sink. In some aspects, each device of the plurality of devices can include at least one LED chip electrically connected to one or more traces and at least one pair of bottom contacts adapted to mount over a surface of external substrate. The component can further include a continuous layer of encapsulant disposed over each device of the plurality of devices. Multiple devices can be singulated from the component. | 2013-10-03 |
20130256712 | SEMICONDUCTOR LIGHT EMITTING DEVICE, LIGHT EMITTING MODULE AND ILLUMINATION APPARATUS - A semiconductor light emitting device includes a substrate, a semiconductor laminate disposed on the substrate and divided to a plurality of light emitting cells with an isolation region, and a wiring unit electrically connecting the plurality of light emitting cells. A region of lateral surfaces of each of the light emitting cells in which the wiring unit is disposed has a slope gentler than slopes of other regions of the lateral surfaces of each of the light emitting cells. | 2013-10-03 |
20130256713 | LED COMPONENT WITH LOW RTH WITH DISSOCIATED ELECTRICAL AND THERMAL PATHS - A component emitting light radiation comprising a vertical junction supported on a substrate, the face of the substrate opposite the face on which the junction is made is provided with at least one first conducting zone dedicated to electrical contact and a second conducting zone insulated from the substrate and from the first conducting zone, the second zone being dedicated to heat dissipation. | 2013-10-03 |
20130256714 | Light Emitting Device And Method of Manufacturing The Same - A light emitting device having a structure in which oxygen and moisture are prevented from reaching light emitting elements, and a method of manufacturing the same, are provided. Further, the light emitting elements are sealed by using a small number of process steps, without enclosing a drying agent. The present invention has a top surface emission structure. A substrate on which the light emitting elements are formed is bonded to a transparent sealing substrate. The structure is one in which a transparent second sealing material covers the entire surface of a pixel region when bonding the two substrates, and a first sealing material (having a higher viscosity than the second sealing material), which contains a gap material (filler, fine particles, or the like) for protecting a gap between the two substrates, surrounds the pixel region. The two substrates are sealed by the first sealing material and the second sealing material. Further, reaction between electrodes of the light emitting elements (cathodes or anodes) and the sealing materials can be prevented by covering the electrodes with a transparent protective layer, for example, CaF | 2013-10-03 |
20130256715 | Sulfur-Containing Phosphor Coated with ZnO Compound - Provided is a novel coated phosphor capable of effectively suppressing the adverse effects of hydrogen sulfide gas generated by the reaction between a sulfur-containing phosphor and moisture in the air. Provided is a sulfur-containing phosphor having a configuration in which ZnO compound containing Zn and O is present on the surface of a sulfur-containing phosphor having a host material which includes sulfur. | 2013-10-03 |
20130256716 | WHITE LIGHT EMITTING DIODES - A white LED includes a red light emitting unit, a green light emitting unit, a blue light emitting unit, and an optical grating located on a same plane. The red light emitting unit, the green light emitting unit and the blue light emitting unit are located around the optical grating. Each light emitting unit includes a first semiconductor layer, an active layer, a second semiconductor layer and a first reflector layer stacked in that order. The optical grating includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in that order. The first semiconductor layer of the optical grating and the first semiconductor layers of the light emitting units are a continuous integrated structure. | 2013-10-03 |
20130256717 | SEMICONDUCTOR BOARD, SEMICONDUCTOR DEVICE, AND PRODUCING METHOD OF SEMICONDUCTOR DEVICE - A semiconductor board includes a circuit board to which external electric power is supplied; a plurality of semiconductor elements which are supported on the circuit board; and a plurality of wires each of which is provided corresponding to each of a plurality of the semiconductor elements and each of which has one end electrically connected to the semiconductor element and the other end electrically connected to the circuit board. A plurality of the wires extend along a radial direction of a phantom circle having a center on the circuit board. | 2013-10-03 |
20130256718 | LIGHT EMITTING DEVICE AND MANUFACTURING METHOD THEREOF - The subject invention relates to a light emitting device, including a first semiconductor layer having a first conductive type; a second semiconductor layer having a second conductive type, wherein the second conductive type is different from the first conductive type; and a passivation layer covering the first and the second semiconductor layers, wherein the passivation layer has a rough surface made from a roughing treatment. The subject invention further discloses a manufacturing method for such light emitting device. The structure of the light emitting device of the subject invention can eliminate unnecessary elements, reduce process time, facilitate control of light emitting shape and further improve light emitting efficiency. | 2013-10-03 |
20130256719 | LIGHT EMITTING DEVICE - A light emitting device according to the present invention comprises: a light emitting element including a semiconductor layer, a first electrode, a dielectric layer sandwiched between the semiconductor layer and the first electrode, and a light emitter; and a power supply circuit for applying a voltage between the semiconductor layer and the first electrode, wherein the light emitter is formed in at least one region of regions in the semiconductor layer, in the dielectric layer, between the semiconductor layer and the dielectric layer, and between the first electrode and the dielectric layer, the light emitting element emits light in one of first and second cases, but does not substantially emit light in the other case, the first case using a current applied to the dielectric layer under a condition that the semiconductor layer serves as a positive electrode and the first electrode serves as a negative electrode, the second case using a current applied to the dielectric layer under a condition that the semiconductor layer serves as the negative electrode and the first electrode serves as the positive electrode, and the power supply circuit is electrically connected to each of the semiconductor layer and the first electrode so that a unidirectional current flows in the dielectric layer while the light emitting element emits the light. | 2013-10-03 |
20130256720 | BROADBAND DIELECTRIC REFLECTORS FOR LED - A broadband, omnidirectional, multi-layer, dielectric reflector for an LED in a white light emitting device provides both near 100% reflectivity across the visible spectrum of light, and electrical insulation between the substrate and the electrical circuitry used to power and control the LED. When a sealant material, having a higher index of refraction than air, is used to protect the LED and the accompanying electrical circuitry, an aluminum reflector layer or substrate is provided to make up for the loss of reflectivity at certain angles of incidence. | 2013-10-03 |
20130256721 | LED Light with Electrostatic Protection and Backlight Module Using the LED Light - The present invention provides an LED light with electrostatic protection and a backlight module using the LED light. The LED light includes a carrying frame, a light-emitting die mounted in the carrying frame, and an encapsulation resin encapsulating the light-emitting die in the carrying frame. The carrying frame includes a frame body, first and second copper foils mounted in the frame body, and a first conductive metal plate mounted in the frame body. The first and second copper foils are respectively and electrically connected by two gold wires to the light-emitting die. The first conductive metal plate is arranged to space from the first or second copper foil, whereby an electrical capacitor is formed between the first or second copper foil and the first conductive metal plate. The present invention effectively prevents burnout of gold wires caused by static electricity. | 2013-10-03 |
20130256722 | LIGHT EMITTED DIODE - The present invention relates to a light emitted diode (LED). The LED includes a metal mirror, a bonding substrate, a distributed bragg reflector (DBR), a buffer layer, and a LED epitaxial structure. The bonding substrate is arranged under the metal mirror. The DBR is arranged on the metal mirror. The buffer layer is arranged on the DBR. The LED epitaxial structure is arranged on the buffer layer. | 2013-10-03 |
20130256723 | ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE AND METHOD FOR REPAIRING ORGANIC LIGHT EMITTING DIODE DISPLAY - An organic light emitting diode (OLED) display includes a light-emitting region including an organic emission layer and a non-light-emitting region neighboring the light-emitting region. The OLED display includes a first electrode positioned at the light-emitting region and including a plurality of division regions divided according to a virtual cutting line crossing the light-emitting region, an organic emission layer positioned on the first electrode, a second electrode positioned on the organic emission layer, a driving thin film transistor connected to the first electrode, and a plurality of input terminals positioned at the non-light-emitting region and respectively connecting between each of division regions and the driving thin film transistor. | 2013-10-03 |
20130256724 | LIGHT EMITTING DIODES - An LED is provided. The LED includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode and a second electrode. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked in that order and located on a surface of the substrate. A number of first three-dimensional nano-structures are located on a surface of the substrate away from the first semiconductor layer. The first three-dimensional nano-structures are linear protruding structures, a cross-section of each linear protruding structure is an arc. | 2013-10-03 |
20130256725 | LIGHT EMITTING DIODES - An LED comprises a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode and a second electrode. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked in that order and located on a surface of the first electrode. The second electrode is electrically connected with the second semiconductor layer. A number of first three-dimensional nano-structures are located on a surface of the second semiconductor layer away from the active layer. The first three-dimensional nano-structures are linear protruding structures, a cross-section of each linear protruding structure is an arc. | 2013-10-03 |
20130256726 | LIGHT EMITTING DIODES AND OPTICAL ELEMENTS - An LED comprises a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode and a second electrode. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked in that order and located on a surface of the substrate. A number of first three-dimensional nano-structures are located on a surface of the second semiconductor layer away from the active layer. The first three-dimensional nano-structures are linear protruding structures, a cross-section of each linear protruding structure is an arc. The present disclosure also relates to an optical element. | 2013-10-03 |
20130256727 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device includes a light emitting unit, a first and second conductive pillar, a sealing unit, a translucent layer, and a wavelength conversion layer. The light emitting unit includes a first and second semiconductor layer and a light emitting layer. The first semiconductor layer has a first and second major surface. The first major surface has a first and second portion. The second major surface is opposed the first major surface and has a third and fourth portion. The light emitting layer is provided on the first portion. The second semiconductor layer is provided on the light emitting layer. The first conductive pillar is provided on the second portion. The second conductive pillar is provided on the second semiconductor layer. The translucent layer is provided on the fourth portion. The wavelength conversion layer is provided on the third portion and on the translucent layer. | 2013-10-03 |
20130256728 | LIGHT EMITTING DEVICE PACKAGE - A light emitting device package includes a light emitting device which emits light, and an encapsulating part provided on a path of the light emitted from the light emitting device and formed by mixing a transparent resin with metallic particles which reflect and scatter at least a portion of the light emitted from the light emitting device. | 2013-10-03 |
20130256729 | LIGHT-EMITTING DEVICE - Disclosed is a light-emitting device comprising: a light-emitting stack with a length and a width comprising: a first conductivity type semiconductor layer; an active layer on the first conductivity type semiconductor layer; and a second conductivity type semiconductor layer on the active layer; a conductive layer with a width greater than the width of the first conductivity type semiconductor layer and under the first conductivity type semiconductor layer, the conductive layer comprising a first overlapping portion which overlaps the first conductivity type semiconductor layer and a first extending portion which does not overlap the first conductivity type semiconductor layer; a transparent conductive layer with a width greater than the width of the second conductivity type semiconductor layer over the second conductivity type semiconductor layer, the transparent conductive layer comprising a second overlapping portion which overlaps the second conductivity type semiconductor layer and a second extending portion which does not overlap the second conductivity type semiconductor layer; a first electrode substantially joined with only the first extending portion or a part of the first extending part; and a second electrode substantially joined with only the second extending portion or a part of the second extending portion. | 2013-10-03 |
20130256730 | LIGHT-EMITTING DEVICE - [Problem] To provide a light-emitting device which does not undergo the deterioration in luminous efficiency associated with the long-term use. [Solution] A light-emitting device ( | 2013-10-03 |
20130256731 | LIGHT-EMITTING DEVICE - This disclosure discloses a light-emitting device. The light-emitting device comprises: a substrate; and a first light-emitting unit comprising a plurality of light-emitting diodes electrically connected to each other on the substrate. A first light-emitting diode in the first light-emitting unit comprises a first semiconductor layer with a first conductivity-type, a second semiconductor layer with a second conductivity-type, and a light-emitting stack formed between the first and second semiconductor layers. The first light-emitting diode in the first light-emitting unit further comprises a first connecting layer on the first semiconductor layer for electrically connecting to a second light-emitting diode in the first light-emitting unit; a second connecting layer, separated from the first connecting layer, formed on the first semiconductor layer; and a third connecting layer on the second semiconductor layer for electrically connecting to a third light-emitting diode in the first light-emitting unit. | 2013-10-03 |
20130256732 | NITRIDE GROUP SEMICONDUCTOR LIGHT EMITTING DEVICE - A nitride group semiconductor light emitting device includes a nitride group semiconductor layer, and an electrode structure. The electrode structure is arranged on or above the semiconductor layer, and includes a plurality of deposited metal layers. The plurality of deposited metal layers of the electrode structure includes first and second and metal layers. The first metal layer is arranged on the semiconductor layer side. The second metal layer is arranged on or above the first metal layer. The first metal layer contains Cr, and a first metal material. The first metal material has a reflectivity higher than Cr at the light emission peak wavelength of the light emitting device. According to this construction, the first metal layer can have a higher reflectivity as compared with the case where the first metal layer is only formed of Cr, but can keep tight contact with the semiconductor layer. | 2013-10-03 |
20130256733 | METALLIC FRAME STRUCTURE AND LED DEVICE HAVING THE SAME - The present invention relates to an LED device, which includes a metallic frame, an LED chip, and a packaging body. The metallic frame includes a first lead frame and a second lead frame. The first lead frame has a protruding portion extending toward the second lead frame, while the second lead frame has a notch formed correspondingly to the protruding portion. An electrically insulated region is cooperatively defined by the first and second lead frames. The metallic frame defines at least one blind hole in proximate to the electrically insulated region. The LED chip is electrically connected to the first and second lead frames. The packaging body has a base portion encapsulating the metallic frame and a light-permitting portion arranged above the LED chip. | 2013-10-03 |
20130256734 | LIGHT-EMITTING DIODE AND METHOD FOR MANUFACTURING THE SAME - An LED (light emitting diode) includes a base, two spaced electrodes and a thermal conductivity layer. The base has a top surface. The two electrodes and the thermal conductivity layer are located on the top surface of the base. The thermal conductivity layer is attached to the top surface and located beside and between the electrodes. The two electrodes are electrically insulated from each other, and electrically insulated from the thermal conductivity layer. A light emitting chip is electrically connected to the two electrodes. The electrodes and the thermal conductivity layer are on different levels. | 2013-10-03 |
20130256735 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND FABRICATION METHOD THEREOF - A semiconductor light emitting device includes a substrate having first and second electrode patterns on at least one surface thereof, a light emitting structure on a surface of the substrate, a first electrode structure, a second electrode structure, an insulating layer, a first connection portion connecting the first electrode structure and the first electrode pattern, and a second connection portion connecting the second electrode structure extending outwardly from the light emitting structure and the second electrode pattern. | 2013-10-03 |
20130256736 | Package for an Optoelectronic Semiconductor Component and Semiconductor Component - A package for an optoelectronic semiconductor component is disclosed. The package includes a package body, a first connecting lead and a second connecting lead. The first connecting lead and the second connecting lead each extend in a vertical direction through the package body. A semiconductor component with such a package and a semiconductor chip are also disclosed. | 2013-10-03 |
20130256737 | Electronic Component - An electronic component has a housing body which comprises a semiconductor chip in a recess. The semiconductor chip in the recess is embedded in a casting compound made of a first plastic material having a first glass transition temperature. A cover element made of a second plastic material having a second glass transition temperature is arranged above the recess. The second glass transition temperature is lower than the first glass transition temperature. | 2013-10-03 |
20130256738 | LIGHT EMITTING DIODE COMPONENT, LIGHT EMITTING DIODE PACKAGE AND MANUFACTURING METHOD THEREOF - A light emitting diode component, a light emitting diode package and the manufacturing method thereof are provided. The LED component includes a semiconductor epitaxial stack structure, a first electrode and a second electrode. The semiconductor epitaxial stack structure has a bottom surface, a top surface, a first lateral surface, and a second lateral surface. The first electrode is disposed on the first lateral surface. The second electrode is disposed on the bottom surface. | 2013-10-03 |
20130256739 | VERTICAL NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - Disclosed is a vertical nitride semiconductor device including a conductive substrate; a semiconductor layer bonded to the conductive substrate via a second electrode; a metal layer formed on the conductive substrate; a first electrode formed on the semiconductor layer; and a bonding layer formed between the conductive substrate and the second electrode. The conductive substrate has a flange part, which extends from a side surface of the conductive substrate, on a side of the other front surface thereof. The flange part is formed in a manner in which the conductive substrate and the semiconductor layer are bonded together and then a remaining part of the conductive substrate is divided, the remaining part being formed by cutting off the semiconductor layer and part of the conductive substrate in a thickness direction so as to expose a side surface of the semiconductor layer and the side surface of the conductive substrate. | 2013-10-03 |
20130256740 | OPTOELECTRONIC SEMICONDUCTOR DEVICE COMPRISING A SEMICONDUCTOR CHIP, A CARRIER SUBSTRATE AND A FILM, AND A METHOD FOR PRODUCING THE OPTOELECTRONIC SEMICONDUCTOR DEVICE - A semiconductor device includes a radiation-emitting semiconductor chip, a carrier substrate and a film. The carrier substrate has electrically conductive contact tracks on a top side. The film is arranged on a radiation exit side of the chip, the radiation exit side being remote from the carrier substrate, and on the top side of the carrier substrate and has electrically conductive first conductor tracks. The film has perforations arranged such that the semiconductor chip can be electrically contact-connected to the first contact track of the carrier substrate via the first conductor track of the film. | 2013-10-03 |
20130256741 | Siloxane Compositions Suitable For Forming Encapsulants - A composition of the present invention includes an organopolysiloxane component (A) comprising at least one of a disiloxane, a trisiloxane, and a tetrasiloxane, and has at least one of an alkyl group and an aryl group and has an average of at least two alkenyl groups per molecule. Component (A) has a number average molecular weight less than or equal to 1500 (g/mole). The composition further includes an organohydrogensiloxane component (B) having at least one of an alkyl group and an aryl group and having an average of at least two silicon-bonded hydrogen atoms per molecule. Component (B) has a number average molecular weight less than or equal to 1500 (g/mole). The composition yet further includes a catalytic amount of a hydrosilylation catalyst component (C). A product of the present invention is the reaction product of the composition, which may be used to make a light emitting diode. | 2013-10-03 |
20130256742 | Siloxane-Compositions Including Metal-Oxide Nanoparticles Suitable For Forming Encapsulants - A composition includes an organopolysiloxane component (A) having at least one aryl group and having an average of at least two alkenyl groups per molecule. The composition further includes an organohydrogensiloxane component (B) having at least one of an alkyl group and an aryl group and an average of at least two silicon-bonded hydrogen atoms per molecule. Components (A) and (B) each independently have a number average molecular weight less than or equal to 1500 (g/mole). The composition yet further includes a catalytic amount of a hydrosilylation catalyst component (C), and metal-oxide nanoparticles (D) other than titanium dioxide (TiO | 2013-10-03 |
20130256743 | PRODUCTION METHOD FOR GROUP III NITRIDE SEMICONDUCTOR AND GROUP III NITRIDE SEMICONDUCTOR - A method for producing a Group III nitride semiconductor comprising forming mesas on a main surface of a substrate, and growing Group III nitride semiconductor in a c-axis direction thereof, wherein the plane most parallel to the side surfaces of the mesas or the dents among the low-index planes of growing Group III nitride semiconductor is a m-plane (1-100), and when a projected vector obtained by orthogonally projecting a normal vector of the processed side surface to the main surface is defined as a lateral vector, an angle between the lateral vector and a projected vector obtained by orthogonally projecting a normal vector of the m-plane of the growing Group III nitride semiconductor to the main surface is 0.5° or more and 6° or less. | 2013-10-03 |
20130256744 | IGBT with Buried Emitter Electrode - There are disclosed herein various implementations of an insulated gate bipolar transistor (IGBT) with buried emitter electrodes. Such an IGBT may include a collector at a bottom surface of a semiconductor substrate, a drift region having a first conductivity type situated over the collector, and a base layer having a second conductivity type opposite the first conductivity type situated over the drift region. In addition, such an IGBT may include deep insulated trenches extending from a semiconductor surface above the base layer, into the drift region, each of the deep insulated trenches having a buried emitter electrode disposed therein. The IGBT may further include an active cell including an emitter, a gate trench with a gate electrode disposed therein, and an implant zone situated, between adjacent deep insulated trenches. The implant zone is formed below the base layer and has the first conductivity type. | 2013-10-03 |
20130256745 | Deep Gate Trench IGBT - There are disclosed herein various implementations of an insulated-gate bipolar transistor (IGBT) with buried depletion electrode. Such an IGBT may include a collector at a bottom surface of a semiconductor substrate, a drift region having a first conductivity type situated over the collector, and a base layer having a second conductivity type opposite the first conductivity type situated over the drift region. The IGBT also includes a plurality of deep insulated trenches with a buried depletion electrode and at least one gate electrode disposed therein. In addition, the IGBT includes an active cell including an emitter adjacent the gate electrode, and an implant zone, situated between adjacent deep insulated trenches. The implant zone is formed below the base layer and has the first conductivity type. In one implementation, the IGBT may also include a dummy cell neighboring the active cell. | 2013-10-03 |
20130256746 | SEMICONDUCTOR DEVICE - Aspects of the invention can include a semiconductor device that includes an output stage IGBT and a Zener diode on the same semiconductor substrate. The IGBT can include a first p well layer, an n emitter region on the surface region of the first p well layer, a gate electrode deposited on a gate insulating film, and an emitter electrode on the emitter region. The Zener diode can include a p | 2013-10-03 |
20130256747 | POWER SEMICONDUCTOR FIELD EFFECT TRANSISTOR STRUCTURE WITH CHARGE TRAPPING MATERIAL IN THE GATE DIELECTRIC - The subject disclosure presents power semiconductor devices, and methods for manufacture thereof, with improved ruggedness and. In an aspect, the power semiconductor devices are power field effect transistors (FETs) having enhanced suppression of the activation of the parasitic bipolar junction transistor (BJT) and a normal threshold value. The devices comprise a doped source ( | 2013-10-03 |
20130256748 | PASSIVE DEVICES FOR FINFET INTEGRATED CIRCUIT TECHNOLOGIES - Device structures, design structures, and fabrication methods for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A device region is formed in a trench and is coupled with a handle wafer of a semiconductor-on-insulator substrate. The device region extends through a buried insulator layer of the semiconductor-on-insulator substrate toward a top surface of a device layer of the semiconductor-on-insulator substrate. The device region is comprised of lightly-doped semiconductor material. The device structure further includes a doped region formed in the device region and that defines a junction. A portion of the device region is laterally positioned between the doped region and the buried insulator layer of the semiconductor-on-insulator substrate. Another region of the device layer may be patterned to form fins for fin-type field-effect transistors. | 2013-10-03 |
20130256749 | PASSIVE DEVICES FOR FINFET INTEGRATED CIRCUIT TECHNOLOGIES - Device structures, design structures, and fabrication methods for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A device structure is formed that includes a well of a first conductivity type in a device region and a doped region of a second conductivity in the well. The device region is comprised of a portion of a device layer of a semiconductor-on-insulator substrate. The doped region and a first portion of the well define a junction. A second portion of the well is positioned between the doped region and an exterior sidewall of the device region. Another portion of the device layer may be patterned to form fins for fin-type field-effect transistors. | 2013-10-03 |
20130256750 | TETRA-LATERAL POSITION SENSING DETECTOR - The present invention is directed to a position sensing detector made of a photodiode having a semi insulating substrate layer; a buffered layer that is formed directly atop the semi-insulating substrate layer, an absorption layer that is formed directly atop the buffered layer substrate layer, a cap layer that is formed directly atop the absorption layer, a plurality of cathode electrodes electrically coupled to the buffered layer or directly to the cap layer, and at least one anode electrode electrically coupled to a p-type region in the cap layer. The position sensing detector has a photo-response non-uniformity of less than 2% and a position detection error of less than 10 μm across the active area. | 2013-10-03 |
20130256751 | METHODS OF PRODUCING FREE-STANDING SEMICONDUCTORS USING SACRIFICIAL BUFFER LAYERS AND RECYCLABLE SUBSTRATES - A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a spinel substrate using a sacrificial buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The sacrificial buffer material and semiconductor materials may be deposited using lattice-matching epitaxy or coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The sacrificial buffer layer may be dissolved using an epitaxial liftoff technique in order to separate the semiconductor device from the spinel substrate, and the spinel substrate may be reused in the subsequent fabrication of other semiconductor devices. The low-defect density semiconductor materials produced using this method result in the enhanced performance of the semiconductor devices that incorporate the semiconductor materials. | 2013-10-03 |
20130256752 | SEMICONDUCTOR DEVICE - A semiconductor device includes: an operation layer that is provided on a substrate and is made of a GaAs-based semiconductor; a first AlGaAs layer provided on the operation layer; a gate electrode provided on the first AlGaAs layer; an second AlGaAs layer having n-type conductivity and provided on the first AlGaAs layer of both sides of the gate electrode, an Al composition ratio of the second AlGaAs layer being larger than that of the first AlGaAs layer and being equal to or more than 0.3 and equal to or less than 0.5; an n-type GaAs layer selectively provided on the second AlGaAs layer; and a source electrode and a drain electrode that contain Au and are provided on the n-type GaAs layer. | 2013-10-03 |
20130256753 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - According to an embodiment, a semiconductor device includes a first layer including a first nitride semiconductor, a second layer provided on the first layer and including a second nitride semiconductor having a wider bandgap than the first nitride semiconductor. The device also includes a source electrode and a drain electrode provided on the second layer; and a gate electrode provided on the second layer and located between the source electrode and the drain electrode. The second layer includes a first region between the gate electrode and the drain electrode, the first region being selectively provided in a surface of the second layer and contains fluorine. A concentration of fluorine in the first region is higher than a concentration of fluorine in a portion underneath the gate electrode in the second layer. | 2013-10-03 |
20130256754 | COMPOUND SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A compound semiconductor device includes: a substrate; an electron transit layer and electron supply layer formed over the substrate; a gate electrode, source electrode, and drain electrode formed over the electron supply layer; and a first Fe-doped layer provided between the substrate and the electron transit layer in a region corresponding to the position of the gate electrode in plan view, the first Fe-doped layer being doped with Fe to reduce two dimensional electron gas generated below the gate electrode. | 2013-10-03 |
20130256755 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device includes: a gate electrode that is provided on a semiconductor layer, and contains a Ni-containing layer; an insulating film that covers the gate electrode, and has a step; a covering layer that is provided between the gate electrode and the insulating film, and is arty one of a metal which has a melting point equal to or more than 1,600 degrees, and an oxide and a nitride of the metal; and a metal layer that is provided on the step. | 2013-10-03 |
20130256756 | INTEGRATED CIRCUIT HAVING A STAGGERED HETEROJUNCTION BIPOLAR TRANSISTOR ARRAY - An integrated circuit is provided. The integrated circuit may include, but is not limited to, a plurality of heterojunction bipolar transistors, wherein each heterojunction bipolar transistor is staggered with respect to any adjacent heterojunction bipolar transistor. The plurality of heterojunction bipolar transistors may be arranged in a column, wherein each heterojunction bipolar transistor is staggered in the column with respect to any adjacent heterojunction bipolar transistor in the column in a first direction and a second direction, wherein the second direction is substantially orthogonal to the first direction. | 2013-10-03 |
20130256757 | SOI LATERAL BIPOLAR JUNCTION TRANSISTOR HAVING A WIDE BAND GAP EMITTER CONTACT - A lateral heterojunction bipolar transistor is formed on a semiconductor-on-insulator substrate including a top semiconductor portion of a first semiconductor material having a first band gap and a doping of a first conductivity type. A stack of an extrinsic base and a base cap is formed such that the stack straddles over the top semiconductor portion. A dielectric spacer is formed around the stack. Ion implantation of dopants of a second conductivity type is performed to dope regions of the top semiconductor portion that are not masked by the stack and the dielectric spacer, thereby forming an emitter region and a collector region. A second semiconductor material having a second band gap greater than the first band gap and having a doping of the second conductivity type is selectively deposited on the emitter region and the collector region to form an emitter contact region and a collector contact region, respectively. | 2013-10-03 |
20130256758 | INTEGRATED CIRCUIT STRUCTURE HAVING AIR-GAP TRENCH ISOLATION AND RELATED DESIGN STRUCTURE - A method of forming an integrated circuit structure includes: forming a vent via extending through a shallow trench isolation (STI) and into a substrate; selectively removing an exposed portion of the substrate at a bottom of the vent via to form an opening within the substrate, wherein the opening within the substrate abuts at least one of a bottom surface or a sidewall of the STI; and sealing the vent via to form an air gap in the opening within the substrate. | 2013-10-03 |
20130256759 | Fin Structure for a FinFET Device - A fin structure for a fin field effect transistor (FinFET) device is provided. The device includes a substrate, a first semiconductor material disposed on the substrate, a shallow trench isolation (STI) region disposed over the substrate and formed on opposing sides of the first semiconductor material, and a second semiconductor material forming a first fin and a second fin disposed on the STI region, the first fin spaced apart from the second fin by a width of the first semiconductor material. The fin structure may be used to generate the FinFET device by forming a gate layer formed over the first fin, a top surface of the first semiconductor material disposed between the first and second fins, and the second fin. | 2013-10-03 |
20130256760 | METHOD FOR FORMING GROUP III/V CONFORMAL LAYERS ON SILICON SUBSTRATES - A method for forming a conformal group III/V layer on a silicon substrate and the resulting substrate with the group III/V layers formed thereon. The method includes removing the native oxide from the substrate, positioning a substrate within a processing chamber, heating the substrate to a first temperature, cooling the substrate to a second temperature, flowing a group III precursor into the processing chamber, maintaining the second temperature while flowing a group III precursor and a group V precursor into the processing chamber until a conformal layer is formed, heating the processing chamber to an annealing temperature, while stopping the flow of the group III precursor, and cooling the processing chamber to the second temperature. Deposition of the III/V layer may be made selective through the use of halide gas etching which preferentially etches dielectric regions. | 2013-10-03 |
20130256761 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device, and a method of fabrication the same, include selection gate patterns extending in a first direction on a substrate, cell gate patterns extending in parallel in the first direction between the selection gate patterns adjacent to each other, and contact pads connected to first end parts of the cell gate patterns, respectively. An insulating layer covers the selection gate patterns, the cell gate patterns, and the contact pads. The insulating layer includes a void or seam between the contact pads. A filling insulating layer fills the void or seam in the insulating layer. | 2013-10-03 |
20130256762 | PROGRAMMABLE LOGIC DEVICE - An object of the present invention is to provide a programmable logic device which has short start-up time after supply of power is stopped, is highly integrated, and operates with low power. In a programmable logic device including an input/output block, a plurality of logic blocks each including a logic element, and a wiring connecting the plurality of logic blocks, the logic element has a configuration memory for holding configuration data and a look-up table including a selection circuit. The configuration memory includes a plurality of memory elements each of which includes a transistor whose channel region is in an oxide semiconductor film and an arithmetic circuit provided between the transistor and the selection circuit. Configuration data is selectively changed and output by the selection circuit in accordance with an input signal. | 2013-10-03 |
20130256763 | LOW EXTENSION DOSE IMPLANTS IN SRAM FABRICATION - A static random access memory fabrication array includes at least one p-type field effect transistor, including a gate stack and isolating spacers forming a gate having a gate length Lgate and an effective gate length, Leff and a source and drain region adjacent the gate stack, wherein the source and drain regions are formed from a low extension dose implant that decreases a difference between Lgate and Leff. | 2013-10-03 |