38th week of 2015 patent applcation highlights part 44 |
Patent application number | Title | Published |
20150261639 | Method and device for monitoring and analyzing signals - A method and system for monitoring and analyzing at least one signal are disclosed. An abstract of at least one reference signal is generated and stored in a reference database. An abstract of a query signal to be analyzed is then generated so that the abstract of the query signal can be compared to the abstracts stored in the reference database for a match. The method and system may optionally be used to record information about the query signals, the number of matches recorded, and other useful information about the query signals. Moreover, the method by which abstracts are generated can be programmable based upon selectable criteria. The system can also be programmed with error control software so as to avoid the re-occurrence of a query signal that matches more than one signal stored in the reference database. | 2015-09-17 |
20150261640 | ANALYZING DATA WITH COMPUTER VISION - Analyzing data with computer vision includes taking measurements with computer vision of symbols in pictographs that schematically represent metrics of the system and determining differences about the metrics based on the measurements. | 2015-09-17 |
20150261641 | ACCESSORY MANAGEMENT AND DATA COMMUNICATION USING AUDIO PORT - A method for accessory management and data communication between a portable electronic device and an accessory via audio port is disclosed. The method involves using a microphone line of the accessory in different communication modes including a MIC data mode and a power mode. In the MIC data mode, the MIC line disconnects from a microphone load to operate on a voltage above a predetermined threshold whenever the accessory needs to communicate with the host electronic device. In the MIC power mode, the MIC line connects with the microphone load for the normal operation of the microphone. | 2015-09-17 |
20150261642 | TECHNIQUES FOR COLLECTING AND ANALYZING NOTIFICATIONS RECEIVED FROM NEIGHBORING NODES ACROSS MULTIPLE CHANNELS - A node in network is configured to buffer data received from other nodes across multiple channels. The node process a portion of the buffered data associated with a subset of those channels. When the node receives data on that subset of channels that includes a notification, the node then processes a larger portion of the buffered data associated with a larger number of channels. In doing so, the node may identify additional notifications include within data that was buffered but not previously processed. The node may also coordinate with other nodes in order to process buffered data upon identification of a notification. | 2015-09-17 |
20150261643 | APPARATUS AND METHODS FOR MONITORING ONE OR MORE PORTABLE DATA TERMINALS - A portable data terminal generally includes a housing supporting: a data collection device: a keypad: and a touch screen. One or more PDTs are provided with a monitoring system that records occurrences experienced by the portable data terminal. The record of occurrences may be analyzed to identify errors and/or failure prone parts of the PDT along with behaviors likely to lead to errors or failures. Additionally, the record of events may be analyzed to predict errors and/or failures for any given PDT. | 2015-09-17 |
20150261644 | Energy Efficiency Application System and Method of its Use for Empowering Consumers to Perform Energy Usage Audit at Home via Energy Data Aggregation of Electronic Appliances and Devices - A method of enabling a user of a power consuming devices to acquire energy consumption knowledge includes the steps of identifying a user communicating with a database, associating a physical and virtual environment of power consuming devices with the identified user, retrieving power consumption data with existing product information from the database, displaying to the user data of power consumption of a plurality of physical and virtual devices in the associated physical and virtual environment based on the current status of each device, and providing closed-loop feedback from the user to promote energy efficient devices and usage behavior of the user in the associated physical and virtual environment. | 2015-09-17 |
20150261645 | METHOD AND DEVICE FOR DISPLAYING INCREMENTAL UPDATE PROGRESS - A method and device for displaying incremental update progress. The method includes: drawing representation parts corresponding to a file package increment and a file package non-increment in one and the same geometric graph using a first color and a second color, respectively; and in a process of loading the file package increment, updating the first color of the representation part corresponding to the file package increment, until the first color of the representation part corresponding to the file package increment is completely changed into the second color. | 2015-09-17 |
20150261646 | SELECTIVE PROFILING OF APPLICATIONS - A computer implemented method for selective profiling of an application is disclosed herein. The method includes selecting at least one filter type for selecting one or more categories of functional blocks in an application file to be profiled. Based on the selected filter type, a relational hierarchical structure of functional blocks of the application file in the selected category is determined. The determining can be further based on an archive file associated with the application file. Further, one or more functional blocks are selected from the relational hierarchical structure for profiling, the selected functional blocks being associated with a functionality of the application. The selected functional blocks are profiled to achieve selective profiling of the application file for the functionality. | 2015-09-17 |
20150261647 | INFORMATION SYSTEM CONSTRUCTION ASSISTANCE DEVICE, INFORMATION SYSTEM CONSTRUCTION ASSISTANCE METHOD, AND RECORDING MEDIUM - Disclosed are an information system construction assistance device and the like that simply implement construction assistance that meets user demands. | 2015-09-17 |
20150261648 | POWER MONITORING SYSTEM FOR VIRTUAL PLATFORM SIMULATION - This application is directed to a power monitoring system for virtual platform simulation. In one embodiment, a simulation system may comprise a virtual power monitor (VPMON) and a performance simulator. An example VPMON module may include at least a system agent (SA) module to receive virtual platform data from the performance simulator. The SA module may then be further to determine at least one component power model based on the virtual platform data, and may proceed to formulate a platform power model based on the at least one component power model. During simulation of the virtual platform, the SA module may be further to generate power data corresponding to the virtual platform based on the platform power model. For example, the SA module may obtain performance data from the performance simulator, and may provide the performance data to the platform power model to generate the power data. | 2015-09-17 |
20150261649 | METHOD FOR PERFORMANCE MONITORING AND OPTIMIZATION VIA TREND DETECTION AND FORECASTING - A method for identifying trends in system faults. During a generating stage, monitoring via a software based performance monitoring unit, a state of a server on a network and generating hardware or software performance information which indicate system faults of the server. During an analysis stage including, creating a dataset from the hardware or software performance information and isolating events from the dataset and categorizing each of the isolated events into a type, each type representing one application program call return. For each event in the dataset, assigning a trend score which decays with time such that recent events receive greater weight in the assigning than less recent events. Finally, performing one or more of: outputting a notification of the trend score, utilizing an optimization unit or triggering operation of a fault system handler for the event, when the trend score is above a threshold. | 2015-09-17 |
20150261650 | METHOD AND SYSTEM FOR IMPLEMENTING REMOTE DEBUGGING - The present disclosure discloses a method and a system for implementing remote debugging, and relates to the field of communications technologies. The disclosed methods and systems can implement remote debugging across different local area networks (LANs). A transit agent, a debugger agent, and a debuggee agent are configured in a remote debugging system. The transit agent may, according to a stored mapping table, forward information sent by the debugger agent and the debuggee agent, to transmit information between a remote debugging client and a remote debugging server that are in different LANs. | 2015-09-17 |
20150261651 | VALIDATION OF APPLICATIONS FOR GRAPHICS PROCESSING UNIT - The techniques described in this disclosure are directed to validating an application that is to be executed on a graphics processing unit (GPU). For example, a validation server device may receive code of the application. The validation server device may provide some level of assurance that the application satisfies one or more performance criteria. In this manner, the probability of a problematic application executing on the device that includes the GPU may be reduced. | 2015-09-17 |
20150261652 | FILTERED BRANCH ANALYSIS - In a method for providing information to resolve an abnormal termination of software, a processor receives a notification of an abnormal termination of software at a source line within a source code. A processor determines at least one variable from the source line. A processor causes information about the at least one variable to be displayed, wherein information about a variable comprises a variable declaration source line and a value of the variable. A processor receives a first selection of at least one variable from the source line. A processor causes a first branch analysis to be displayed, wherein the first branch analysis comprises a truncated version of the source code based on the received first selection. | 2015-09-17 |
20150261653 | COMPUTER-IMPLEMENTED METHODS AND SYSTEMS FOR DETERMINING APPLICATION MATCHING STATUS - Computer-implemented systems and methods are provided for determining application matching status. In one implementation, a method is implemented with one or more processors and includes accessing, at a server, a first dependency tree representing a first application and a second dependency tree, and acquiring one or more values for the first dependency tree and one or more values for the second dependency tree. The method also includes comparing the one or more values of the first dependency tree with the one or more values of the second dependency tree. The method further includes determining a matching status between the first application and an application represented by the second dependency tree based on the comparison, and providing, for display, an indication of the matching status. | 2015-09-17 |
20150261654 | DATA COLLISIONS IN CONCURRENT PROGRAMS - Described are techniques for detecting data collisions between a first portion and a second portion of an application executing on a computer, the first portion and the second portions executing concurrently with respect to each other. While the first portion and second portion are executing, before the first portion accesses a memory location shared by the first portion and the second portion, a value stored in the memory location is captured and the first portion is delayed. While the second portion continues to execute the first portion is delayed. After a period of the first portion having been paused or slowed, the current content of the memory location is compared with the captured content to determine if there is a data collision. The first and second portions may be threads, and the capturing, delaying, and determining may be performed by code inserted to the application after it has been compiled. | 2015-09-17 |
20150261655 | ENTROPY WEIGHTED MESSAGE MATCHING FOR OPAQUE SERVICE VIRTUALIZATION - In a service emulation method, a transaction library storing a plurality of messages communicated between a system under test and a target system upon which the system under test depends is accessed responsive to receiving a request from the system under test. One of the messages stored in the transaction library is identified as corresponding to the received request based on different weightings assigned to respective sections of the messages, and a response to the received request is generated using the one of the messages that was identified. Related systems and computer program products are also discussed. | 2015-09-17 |
20150261656 | SaaS PLATFORM FOR GEO-LOCATION SIMULATION - A Software as a Service (SaaS) platform for geo-location simulation to test a location based application is provided. The SaaS platform comprises a simulator and a client connected to a server through a network. The simulator receives location data corresponding to one or more geo-locations, and a user motion data corresponding to a user motion associated with one or more geo-locations. The simulator acquires a geo-simulation data corresponding to the geo-locations. The simulator processes the geo-simulation data, and the user motion data to simulate the geo-location for the user motion. Furthermore, the simulated geo-location is provided for testing the location based application. | 2015-09-17 |
20150261657 | METHODS FOR GENERATING TEST SUITES AND DEVICES THEREOF - The technique relates to methods and devices for generating minimized test suites using a genetic algorithm. The technology involves generating a plurality of test cases corresponding to a plurality of test paths associated with an activity diagram of a software requirement specification thereafter obtaining a plurality of test coverage criteria for test suite minimization and finally determining a subset of the plurality of test cases which satisfies the plurality of test coverage criteria by using a multi objective optimization technique. The technology also involves prioritizing the subset of the plurality of test cases based on node defect probability wherein the node defect probability is determined by using a bug prediction technique based on previous bug history of the node thereafter the priorities are dynamically re-ordered during test execution. | 2015-09-17 |
20150261658 | SCHEDULING TESTS OF SOFTWARE FOR A CLOUD COMPUTING ENVIRONMENT - A device receives, from a user device, a request to perform a test of software on a test device. The test device includes a device that simulates a device provided in a cloud computing environment, and the software includes software to be implemented in the cloud computing environment. The device determines whether the test device includes available resources to perform the test, and causes the request and the software to be provided to the test device when the test device includes the available resources to perform the test. The available resources are utilized to perform the test of the software and to generate results based on performance of the test. The device receives, from the test device, the results that include information indicating whether the software passed or failed the test. The device provides the results to the user device. | 2015-09-17 |
20150261659 | USABILITY TESTING OF APPLICATIONS BY ASSESSING GESTURE INPUTS - Various embodiments of systems and methods to assess gesture inputs for performing usability testing of an application are described herein. In one aspect, a GUI associated with an application to be tested is presented. Gesture inputs from test participants to invoke execution of a task of the application using the GUI are recorded. Further, 3D coordinates corresponding to each of the recorded gesture inputs are determined And, the determined 3D coordinates are assessed to determine at least one intuitive gesture input to invoke execution of the task of the application. | 2015-09-17 |
20150261660 | COMPUTER HAVING SELF-MONITORING FUNCTION AND MONITORING PROGRAM - A computer comprises an input unit configured to acquire an input operation; a first program execution unit configured to execute a computing program performing a computation based on the input operation acquired by the input unit; a test scenario storage unit configured to store a plurality of test scenarios for the computing program; and a second program execution unit configured to execute a monitoring program determining whether or not the input operation acquired by the input unit corresponds to any of the plurality of the stored test scenarios. | 2015-09-17 |
20150261661 | ARTIFACT SELECTION USING TEXTUAL REPORTS - A computerized apparatus, a computer implemented method and a computer program product for artifact selection using textual reports. The method comprising obtaining one or more textual reports indicating potential defects in a program product, wherein each textual report is associated with an artifact of the program product; automatically analyzing the textual reports and artifacts to estimate severity of potential errors in the artifacts of the program product; and determining a subset of the artifacts based on the estimated severity. | 2015-09-17 |
20150261662 | ADDRESS-PARTITIONED MULTI-CLASS PHYSICAL MEMORY SYSTEM - A multilevel memory system includes a plurality of memories and a processor having a memory controller. The memory controller classifies each memory in accordance with a plurality of memory classes based on its level, its type, or both. The memory controller partitions a unified memory address space into contiguous address blocks and allocates the address blocks among the memory classes. In some implementations, the memory controller then can partition the address blocks assigned to each given memory class into address subblocks and interleave the address subblocks among the memories of the memory class. | 2015-09-17 |
20150261663 | METHOD FOR MANAGING THE MEMORY RESOURCES OF A SECURITY DEVICE, SUCH AS A CHIP CARD, AND SECURITY DEVICE IMPLEMENTING SAID METHOD - Managing memory resources of a security device, such as a chip card, may include: formatting memory space allocated to a session for storing computer objects and, carried out whenever a computer object is created; allocating a memory block in the memory space for storing the computer object being created; and partitioning the memory space allocated to a session into in one side a first memory subspace, the first address of which is determined according to a random/pseudorandom number and the last address of which is the allocated memory space's last address, and in another side a second memory subspace the first address of which is the allocated memory space's first address and the last address of which precedes the first subspace's first address. The allocating a memory block may include seeking an allocatable memory block first performed in the first memory subspace and, if necessary, in the second memory subspace. | 2015-09-17 |
20150261664 | High-Capacity Storage of Digital Information in DNA - A method for storage of an item of information ( | 2015-09-17 |
20150261665 | CAPACITY FORECASTING FOR BACKUP STORAGE - A system for capacity forecasting for backup storage comprises a processor and a memory. The processor is configured to determine a selected statistical analysis from the set of statistical analyses for subsets of a set of capacities at points in time; forecast a full capacity time based at least in part on the selected statistical analysis; and determine that the full capacity time is qualified. The memory is coupled to the processor and configured to provide the processor with instructions. | 2015-09-17 |
20150261666 | UNIVERSAL PROTOCOL FOR POWER TOOLS - A system and method for communicating with power tools using a universal protocol. The universal protocol may be implemented using a universal core module that is installed across a variety of power tools and other devices to enable communications therewith. Communications to and from the power tools are translated to a universal protocol once received. The translated communications are handled by the universal core module of a particular tool according to a set of rules. In response, the universal core module outputs communications according to the universal protocol and the set of rules, which may be translated to another protocol for receipt by components of the tool or an external device. The communications may be used, for example, to obtain tool performance data from the tools and to provide firmware updates. | 2015-09-17 |
20150261667 | SOLID STATE MEMORY (SSM), COMPUTER SYSTEM INCLUDING AN SSM, AND METHOD OF OPERATING AN SSM - In one aspect, data is stored in a solid state memory which includes first and second memory layers. A first assessment is executed to determine whether received data is hot data or cold data. Received data which is assessed as hot data during the first assessment is stored in the first memory layer, and received data which is first assessed as cold data during the first assessment is stored in the second memory layer. Further, a second assessment is executed to determine whether the data stored in the first memory layer is hot data or cold data. Data which is then assessed as cold data during the second assessment is migrated from the first memory layer to the second memory layer. | 2015-09-17 |
20150261668 | Semiconductor Device and Method of Controlling Non-Volatile Memory Device - A control circuit of a semiconductor device (memory module) realizes long life and others by a mechanism that suppresses and smoothes variations in use of a memory by equalizing the sizes of data write and data erase with respect to a data write request and sequentially allocating and using addresses of the memory in data write to an overwritable non-volatile memory device without carrying out an overwriting operation even in the case of an overwrite request. The control circuit realizes data write by a set of two types of operations of (a) an operation of erasing data of a first address or an operation of setting a flag value to an invalid state and (b) an operation of writing data to a second address different from the first address or an operation of setting a flag value to a valid state. | 2015-09-17 |
20150261669 | DEVICES AND METHODS FOR OPERATING A SOLID STATE DRIVE - The present disclosure includes methods and devices for operating a solid state drive. One method embodiment includes receiving an indication of a desired number of write input/output operations (IOPs) per unit time performed by the solid state drive. The method can also include managing the number of write IOPs performed by the solid state drive at least partially based on the desired number of write IOPs per unit time, a number of spare blocks in the solid state drive, and a desired operational life for the solid state drive. | 2015-09-17 |
20150261670 | DEFERRED DESTRUCTION FOR EFFICIENT RESOURCE RECLAMATION - Memory reclamation includes executing a process that has a plurality of objects, the objects being accessible via a plurality of references, at least some of the plurality of references being transient references, at least some of the plurality of references being persistent references; reaching a reclamation point at which a process state has no transient references, or has transient references only at known locations; and at the reclamation point, destructing objects that have no persistent references and no transient references. | 2015-09-17 |
20150261671 | GARBAGE COLLECTION METHOD FOR FLASH MEMORY - A garbage collection method for a flash memory is provided. The flash memory includes a spare block pool and a data block pool, wherein the spare block pool includes spare blocks and the data block pool includes data blocks. The method includes the steps of: receiving target data from a host and writing the target data to a current data block of the data blocks; sorting an erase count of each data block when performing a wear-leveling process to write the target data; sorting a valid page number of each first block when it is determined that at least two first blocks in the data blocks have the smallest erase count; and selecting a second block having a smallest valid page number from the first blocks and writing valid pages of the second block to one of the spare blocks to perform a data cleaning process. | 2015-09-17 |
20150261672 | RUNTIME BACKUP OF DATA IN A MEMORY MODULE - During runtime of a system, a memory controller is caused to relinquish control of a memory module that includes a volatile memory and a non-volatile memory. After the triggering, an indication is activated to the memory module, the indication causing a backup operation in the memory module, the backup operation being controlled by an internal controller in the memory module, and the backup operation involving a transfer of data from the volatile memory to the non-volatile memory in the memory module. | 2015-09-17 |
20150261673 | DYNAMICALLY MODIFYING DURABILITY PROPERTIES FOR INDIVIDUAL DATA VOLUMES - A block-based storage system may implement dynamic durability adjustment for page cache write logging. A rate of incoming write requests for data volumes maintained at a storage node may be monitored. Based, at least in part, on the rate of incoming write requests, a dynamic modification to a durability property for a data volume may be made, such as enabling page cache write logging the data volume or disabling write logging for the data volume. When incoming write requests are received, a determination may be made as to whether page cache write logging for a particular data volume is enabled. For write requests with disabled page cache write logging, the page cache may be updated and the write request may be acknowledged without storing a log record describing the update in a page cache write log. | 2015-09-17 |
20150261674 | PAGE CACHE WRITE LOGGING AT BLOCK-BASED STORAGE - A block-based storage system may implement page cache write logging. Write requests for a data volume maintained at a storage node may be received at a storage node. A page cache for may be updated in accordance with the request. A log record describing the page cache update may be stored in a page cache write log maintained in a persistent storage device. Once the write request is performed in the page cache and recorded in a log record in the page cache write log, the write request may be acknowledged. Upon recovery from a system failure where data in the page cache is lost, log records in the page cache write log may be replayed to restore to the page cache a state of the page cache prior to the system failure. | 2015-09-17 |
20150261675 | INFORMATION PROCESSING DEVICE AND DATA STRUCTURE - An information processing device of an embodiment has an input unit, a storage unit, a read control unit, and a write control unit. A read request and a write request are input to the input unit. The storage unit stores management information. When the read request is input, the read control unit reads read data including the management information from the storage unit, references the management information, and outputs only non-zero data included in a predetermined range of a block row. The write control unit writes only non-zero data to the storage unit and updates the management information immediately before a start position of the continuous non-zero data started from a largest position in the continuous non-zero data started from a position smaller than the predetermined range, a last management information stored in the predetermined range, and the last management information in the predetermined range. | 2015-09-17 |
20150261676 | COHERENCE PROTOCOL AUGMENTATION TO INDICATE TRANSACTION STATUS - Embodiments relate to implementing a coherence protocol. An aspect includes sending a request for data to a remote processor and receiving by a processor a response from the remote processor. The response has a transaction status of a remote transaction on the remote processor. The processor adds the transaction status of the remote transaction on the remote processor in a local transaction interference tracking table. | 2015-09-17 |
20150261677 | Apparatus and Method of Resolving Protocol Conflicts in an Unordered Network - An apparatus and method of accessing data in a memory in a multi-node, high performance computing system has a requesting agent and a home agent. The requesting agent is a member of a first node of the high performance computing system, while the home agent is a member of a second node of the high performance computing system. The home agent forwards data in a specified memory toward the requesting agent across the unordered network, and determines that a snoop request is to be sent to the requesting agent. After determining that the requesting agent has received the requested data in the specified memory of the second node, the home agent forwards the snoop request to the requesting agent across the unordered network. | 2015-09-17 |
20150261678 | MANAGING SEQUENTIALITY OF TRACKS FOR ASYNCHRONOUS PPRC TRACKS ON SECONDARY - For performing efficient management of tracks in an asynchronous Peer-to-Peer Redundant Copy (PPRC) operation in a computing storage environment, a correct status of a sequential bit is determined by performing one of: (1) examining a primary cache, where if data being transferred pursuant to the PPRC operation in a primary track remains in the primary cache, the sequential bit setting found therein is used, and (2) an Out-Of-Sync (OOS) bitmap is examined to determine if the sequential bit is set. | 2015-09-17 |
20150261679 | HOST BRIDGE WITH CACHE HINTS - Embodiments relate to an implementation of system memory to which a peripheral component interface (PCI) adapter is coupled via a host bridge. Cache hint controls are defined in a packet header for a memory request. The cache hint controls are configured to issue an instruction to retain a copy of a memory element in a cache structure. | 2015-09-17 |
20150261680 | MANAGING A CACHE IN A MULTI-NODE VIRTUAL TAPE CONTROLLER - A method according to one embodiment includes outputting a first alert when a cache free space size is less than a first threshold and entering into a warning state, and outputting a second alert when the cache free space size is less than a second threshold and entering into a critical state. At least one scratch volume is deleted when in the critical state, the scratch volume chosen based on at least one of: a length of time the scratch volume has been designated scratch, a priority level of the information stored on the scratch volume, and a scratch delay value associated with the scratch volume. | 2015-09-17 |
20150261681 | HOST BRIDGE WITH CACHE HINTS - Embodiments relate to an implementation of system memory to which a peripheral component interface (PCI) adapter is coupled via a host bridge. Cache hint controls are defined in a packet header for a memory request. The cache hint controls are configured to issue an instruction to retain a copy of a memory element in a cache structure. | 2015-09-17 |
20150261682 | ACTIVE MEMORY PROCESSOR SYSTEM - In general, the present invention relates to data cache processing. Specifically, the present invention relates to a system that provides reconfigurable dynamic cache which varies the operation strategy of cache memory based on the demand from the applications originating from different external general processor cores, along with functions of a virtualized hybrid core system. The system includes receiving a data request, selecting an operational mode based on the data request and a predefined selection algorithm, and processing the data request based on the selected operational mode. | 2015-09-17 |
20150261683 | CACHE MEMORY CONTROL IN ELECTRONIC DEVICE - Disclosed are a method and apparatus for controlling a cache memory in an electronic device. The apparatus includes a cache memory having cache lines, each of which includes tag information and at least two sub-lines. Each of the at least two sub-lines including a valid bit and a dirty bit. A control unit may analyze a valid bit of a sub-line corresponding to an address tag of data when a request for writing the data is sensed, determine based on activation or deactivation of the valid bit whether a cache hit or a cache miss occurs, and perform a control operation for allocating a sub-line according to a size of the requested data and write the data when the cache hit occurs. | 2015-09-17 |
20150261684 | MEMORY MANAGEMENT WITH PRIORITY-BASED MEMORY RECLAMATION - A memory buffer with a set of one or more structures is created by a process of a first software program. The first memory buffer comprises a predetermined amount of memory. It is determined that a structure of the set of one or more structures has been or will be consumed by a second software program that supports the first software program. The consumption of the structure of the set of one or more structures indicates that memory associated with the structure of the set of one or more structures is being reclaimed. In response to the determination that the structure of the set of one or more structures has been or will be consumed, data is written from a first location to a second location. The first location is in memory allocated to the first software program and the second location is indicated for data storage. | 2015-09-17 |
20150261685 | SYSTEMS AND METHODS FOR BACKGROUND DESTAGING STORAGE TRACKS - Storage tracks from at least one host are destaged from the write cache rank when it is determined that the at least one host is idle with respect to a first set of ranks, and storage tracks are refrained from being destaged from each rank when it is determined that the at least one host is not idle with respect to a second set of ranks such that storage tracks in the first set of ranks may be destaged while storage tracks in the second set of ranks are not being destaged. | 2015-09-17 |
20150261686 | SYSTEMS AND METHODS FOR SUPPORTING DEMAND PAGING FOR SUBSYSTEMS IN A PORTABLE COMPUTING ENVIRONMENT WITH RESTRICTED MEMORY RESOURCES - A portable computing device is arranged with one or more subsystems that include a processor and a memory management unit arranged to execute threads under a subsystem level operating system. The processor is in communication with a primary memory. A first area of the primary memory is used for storing time critical code and data. A second area is available for demand pages required by a thread executing in the processor. A secondary memory is accessible to a hypervisor. The processor generates an interrupt when a page fault is detected. The hypervisor, in response to the interrupt, initiates a direct memory transfer of information in the secondary memory to the second area available for demand pages in the primary memory. Upon completion of the transfer, the hypervisor communicates a task complete acknowledgement to the processor. | 2015-09-17 |
20150261687 | EXTENDED PAGE TABLE FOR I/O ADDRESS TRANSLATION - Embodiments are directed to a method and a computer program product for extending a page table. In an embodiment, the method comprises receiving, by a host bridge, a request. The method further comprises determining, by the host bridge, that access to a memory address space referenced by the request is authorized based on a requester identifier associated with the request. Based on determining that access to the memory address space is authorized, the method comprises accessing, by the host bridge, a page included in the memory address space based on a combination of: a start of the page table and a single extended index. | 2015-09-17 |
20150261688 | EXTENDED PAGE TABLE FOR I/O ADDRESS TRANSLATION - An extension of a page table is provided. An aspect includes receiving, by a host bridge, a request. An aspect includes determining, by the host bridge, that access to a memory address space referenced by the request is authorized based on a requester identifier associated with the request. An aspect includes, based on determining that access to the memory address space is authorized, accessing, by the host bridge, a page included in the memory address space based on a combination of: a start of the page table and a single extended index. | 2015-09-17 |
20150261689 | SYSTEMS AND METHODS FOR BACKGROUND DESTAGING STORAGE TRACKS - Storage tracks from at least one server are destaged from the write cache rank when it is determined that the at least one server is idle with respect to a first set of ranks, and storage tracks are refrained from being destaged from each rank when it is determined that the at least one server is not idle with respect to a second set of ranks such that storage tracks in the first set of ranks may be destaged while storage tracks in the second set of ranks are not being destaged. | 2015-09-17 |
20150261690 | Security in Virtualized Computer Programs - In an embodiment, a data processing method comprises implementing a memory event interface to a hypercall interface of a hypervisor or virtual machine operating system to intercept page faults associated with writing pages of memory that contain a computer program; receiving a page fault resulting from a guest domain attempting to write a memory page that is marked as not executable in a memory page permissions system; determining a first set of memory page permissions for the memory page that are maintained by the hypervisor or virtual machine operating system; determining a second set of memory page permissions for the memory page that are maintained independent of the hypervisor or virtual machine operating system; determining a particular memory page permission for the memory page based on the first set and the second set; processing the page fault based on the particular memory page permission, including performing at least one security function associated with regulating access of the guest domain to the memory page. | 2015-09-17 |
20150261691 | DATA STORAGE DRIVE WITH TARGET OF OPPORTUNITY RECOGNITION - A method according to one embodiment includes receiving a request to store data on media, and generating a data key. An encryption encapsulated data key is generated using the data key. A session encrypted data key is generated using the data key. The encryption encapsulated data key and session encrypted data key are provided for use in writing encrypted data to the media. A method according to another embodiment includes receiving a request to read data from media, and receiving an encryption encapsulated data key. The encryption encapsulated data key is processed to obtain a data key. A session encrypted data key is generated using the data key. The encryption encapsulated data key and session encrypted data key are provided for use in reading the encrypted data from the media. | 2015-09-17 |
20150261692 | CHIP VERIFICATION - There is described a chip comprising a one-time programmable (OTP) memory programmable to store chip configuration data, and a verification module operable to access the OTP memory. The verification module is operable to receive a verification request relating to a specified portion of the OTP memory, the verification request comprising mask data defining the specified portion of the OTP memory. In response to the verification request, the verification module is operable to use the mask data and the OTP memory to generate verification data relating to the specified portion of the OTP memory, the verification data further being generated based on a secret key of the chip. | 2015-09-17 |
20150261693 | DYNAMIC STORAGE KEY ASSIGNMENT - A dynamic storage key assignment is provided. An aspect includes receiving, by a host bridge, a request. An aspect includes determining, by the host bridge, that a dynamic storage key assignment is supported and enabled in association with a memory address space referenced by the request based on a requester identifier or a portion of a peripheral component interconnect address associated with the request. An aspect includes, based on determining that the dynamic storage key assignment is supported and enabled, accessing, by the host bridge, a page included in the memory address space based on a storage key included in the request matching a storage key associated with the page being accessed or an entry in a listing of permitted storage keys for the memory address space. | 2015-09-17 |
20150261694 | MAPPING ATTRIBUTES OF KEYED ENTITIES - One or more mappings each define a correspondence between input attributes of an input entity and output attributes of an output entity, where the input out output entities each include one or more key attributes identified as part of a unique key. Computing result information, displayed in a user interface, includes: processing instances of a first input entity to generate instances of a first output entity; determining one or more mapped input attributes of the first input entity that correspond to each of the key attributes of the first output entity; generating the instances of the first output entity based on the determined one or more mapped input attributes; computing a total number of instances of the first input entity that were processed; and computing a total number of instances of the first output entity that were generated. | 2015-09-17 |
20150261695 | METHOD AND APPARATUS FOR MANAGING REGISTER PORT - Provided is a method of managing a register port, the method including performing scheduling on register ports that are used during a plurality of cycles to enable performing of a calculation; encoding data of the register ports according to results of the scheduling, the encoding of the data including, with respect to data of one of the register ports that does not have a schedule during one of the plurality of cycles, equally encoding the data of the one register port during the one cycle with data of an adjacent cycle of the one register port, the adjacent cycle being adjacent to the one cycle; and transmitting results of the encoding to a device that includes the register ports. | 2015-09-17 |
20150261696 | UNIVERSAL SERIAL BUS EMULATION OF PERIPHERAL DEVICES - A system and method for emulating a universal serial bus device is disclosed. An example embodiment may include an emulated USB (EUP) device that can emulate physical USB peripherals. This device may have a microcontroller that is programmable with software to emulate a plurality of physical USB peripheral devices by supporting multiple USB profiles. In order to emulate a specific physical USB peripheral device, the EUP device may receive specific descriptors including device identifiers related to the particular physical USB peripheral device being emulated. The EUP device may communicate with a test executor computing device that simulates the USB interactions of the physical USB peripheral device using a serial protocol. Communication between the EUP device and a computing device under test may occur via USB protocol. | 2015-09-17 |
20150261697 | UNIVERSAL SERIAL BUS EMULATION OF A HOST CONNECTION - A system and method for emulating a universal serial bus device is disclosed. An example embodiment may include an emulated USB (EUP) device that can emulate a host side of a USB connection. This device may have a microcontroller that is programmable with software to emulate a host connection of a physical USB device. In order to emulate a host connection of a USB device, the EUP device may configure USB host mode bus signals, initiate USB frames on the bus, indicate device status to an emulation process, and relay packets between a device and the emulation process. | 2015-09-17 |
20150261698 | MEMORY SYSTEM, MEMORY MODULE, MEMORY MODULE ACCESS METHOD, AND COMPUTER SYSTEM - A memory system and a memory module access method are provided. The memory system includes a memory controller and a plurality of memory modules. The memory modules are interconnected for forwarding access requests received from the memory controller. When a first memory module receives an access request, if it is not the destination of the access request, it forwards the access request to a second memory module. The second memory module processes the access request if it is the destination of the access request. | 2015-09-17 |
20150261699 | OUTPUT DEVICE AND OUTPUT SYSTEM - An output device includes an output unit configured to output a content that has been specified, based on content data; an interrupt control unit configured to cause the output unit to output a second content by interrupting a first content, when an instruction to output the second content is given while the output unit is outputting the first content; and a return control unit configured to cause the output unit to output the first content by a return mode determined based on the content data of the first content when output of the second content ends. | 2015-09-17 |
20150261700 | INTERRUPT SIGNAL ARBITRATION - An interrupt controller includes a priority level arbitrator ( | 2015-09-17 |
20150261701 | DEVICE TABLE IN SYSTEM MEMORY - Embodiments relate to an implementation of a device table in system memory to which a peripheral component interface (PCI) adapter is coupled via a host bridge. An aspect includes an access of the device table in the system memory by a switch coupled to the host bridge, management of a device table entry (DTE) cache in the host bridge for coherency for DTE configuration changes and maintenance of a usage count and an in-use count in the host bridge for each cached DTE. | 2015-09-17 |
20150261702 | COMPUTING ARCHITECTURE WITH CONCURRENT PROGRAMMABLE DATA CO-PROCESSOR - A coprocessor (PL) is disclosed. The PL includes a memory router, at least one collection block that is configured to transfer data to/from the memory router, each collection block includes a collection router that is configured to i) transfer data to/from the memory router, ii) transfer data to/from at least one collection router of a neighboring collection block, and iii) transfer data to/from blocks within the collection block, and at least one programmable operator that is configured to i) transfer data to/from the collection router, and ii) perform a programmable operation on data received from the collection router. | 2015-09-17 |
20150261703 | PICOBLAZE-BASED MVB CONTROLLER - The present invention relates to the field of communications on rail trains. A PicoBlaze-based MVB controller includes a pMVB controller, a traffic memory, an ARM adapter, and a bus arbiter. The pMVB controller, the traffic memory, ARM adapter, and the bus arbiter are connected to an external bus BUS1. The pMVB controller is connected to the traffic memory. The ARM adapter is connected to an external ARM processor and the bus arbiter. The traffic memory can store network communication data and input control information, and send them to the pMVB controller. The pMVB controller responds to the control information, and sends the communication data, and after it is encoded, to the MVB bus via the external bus BUS1. The pMVB controller also decodes data received from the pMVB bus and triggers an interrupt. The bus arbiter is responsible for bus arbitration in accordance with the instructions from the pMVB controller. | 2015-09-17 |
20150261704 | DEVICES WITH ARBITRATED INTERFACE BUSSES, AND METHODS OF THEIR OPERATION - A system having an arbitrated interface bus and a method of operating the same are provided. The system may include, but is not limited to, one or more registers configured to store data, a plurality of external interfaces configured to receive data access requests for the register(s), an arbitrator communicatively coupled to each of the plurality of external interfaces, and an interface bus communicatively coupled between the arbitrator and the register(s), wherein the arbitrator is configured to arbitrate control of the interface bus between the plurality of external interfaces. | 2015-09-17 |
20150261705 | DYNAMIC UNIVERSAL PORT MODE ASSIGNMENT - Embodiments include a system for dynamic universal port mode assignment for a general purpose computer system. A host bridge with a mixed mode request router receives requests over a universal peripheral component interconnect express (PCIe) port from PCIe adapters utilizing different operating modes. An aspect includes a general purpose host computer with one or more PCIe universal ports allowing the computer to connect to a wide range of external peripheral devices, such as a local area networks, storage area networks, printers, scanners, graphics controllers, game systems, and so forth. PCIe is a modern universal port protocol for parallel ports that allows peripherals utilizing different operating modes to connect to a standard PCIe parallel port. The mixed mode request router supports converged PCIe adapters, which support multiple functions utilizing different PCIe modes converged onto the same mixed mode adapter. | 2015-09-17 |
20150261706 | ASCERTAINING CONFIGURATION OF A VIRTUAL ADAPTER IN A COMPUTING ENVIRONMENT - A control component of a computing environment activates a virtual adapter hosted on a physical adapter of a host system of the computing environment. The virtual adapter is for use by a guest of the host system in performing data input and output. The activating activates the virtual adapter absent involvement of the guest. Based on activating the virtual adapter, the control component obtains configuration information of the activated virtual adapter from the physical adapter, the configuration information generated based on the activating. The control component ascertains a configuration of the activated virtual adapter based on the obtained configuration information. | 2015-09-17 |
20150261707 | DYNAMIC UNIVERSAL PORT MODE ASSIGNMENT - Embodiments include a method and computer program product for dynamic universal port mode assignment for a general purpose computer system. A host bridge with a mixed mode request router routes requests received over a universal peripheral component interconnect express (PCIe) port from PCIe adapters utilizing different operating modes. An aspect includes a general purpose host computer with one or more PCIe universal ports allowing the computer to connect to a wide range of external peripheral devices, such as a local area networks, storage area networks, printers, scanners, graphics controllers, game systems, and so forth. PCIe is a modern universal port protocol for parallel ports that allows peripherals utilizing different operating modes to connect to a standard PCIe parallel port. The mixed mode request router supports converged PCIe adapters, which support multiple functions utilizing different PCIe modes converged onto the same mixed mode adapter. | 2015-09-17 |
20150261708 | Connectivity of Slave Devices in Mobile Devices - In accordance with an embodiment of the present invention, a chip set for a mobile device includes a slave device chip and an interface circuit chip that includes a slave bus interface for controlling the slave device chip through an analog bus. The slave bus interface is coupled to a master bus interface via a digital bus of the mobile device. The slave bus interface is configured to be driven by the master bus interface. | 2015-09-17 |
20150261709 | PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) DISTRIBUTED NON- TRANSPARENT BRIDGING DESIGNED FOR SCALABILITY,NETWORKING AND IO SHARING ENABLING THE CREATION OF COMPLEX ARCHITECTURES. - A highly scalable distributed non-transparent memory bridging for Peripheral Component Interconnect (PCI) express (PCIe) switches based on a globally shared memory architecture with ID based routing that overcomes the limitations of traditional PCIe non-transparent bridging and more particularly is related to a PCI Express multiport switch architecture based on an implementation of the distributed non-transparent memory bridging that enables the creation of multi root PCIe architectures with scalability on the order of tens of thousands of nodes with networking capabilities, advanced flow controls, and Input/Output (IO) virtualization. | 2015-09-17 |
20150261710 | LOW-PROFILE HALF LENGTH PCI EXPRESS FORM FACTOR EMBEDDED PCI EXPRESS MULTI PORTS SWITCH AND RELATED ACCESSORIES - A low-profile half size PCI Express form factor PCI Express multiport switch assembly that can be internally hosted by standard servers and workstations having up to six board-mount connectors that allow for the right angle connection of cable connectors to a PCI Express (“PCIe”) device with PCIe network and cluster capabilities. This solution enables all the features supported by the PCIe switching technology comprising typical PCIe NTB applications. All these features enables the use of the PCI Express multiport switch in high density server environment eliminating the needing of additional external hardware, optimizing the space and the cabling among the servers if the on board switch chip is able to support this application. Specific add on cards complete the solution enabling different configurations and solutions. | 2015-09-17 |
20150261711 | MULTISLOT LINK LAYER FLIT - Transaction data is identified and a flit is generated to include three or more slots and a floating field to be used as an extension of any one of two or more of the slots. The flit is sent over a serial data link to a device for processing, based at least in part on the three or more slots. | 2015-09-17 |
20150261712 | CONTROLLER AND TRANSFER SPEED CONTROL METHOD - A USB 3 host controller according to the present invention includes a transfer speed switching unit besides a transfer data converting unit that mutually converts transfer data from a USB device and transfer data from a PCI Express bus. The transfer speed switching unit receives transfer information regarding data transfer from the USB device via a USB 3 interface when the USB device is connected, and identifies a transfer speed used by a PC side according to the transfer information or a result of analyzing the transfer information. Then, when a current transfer speed of the PC side is different from the identified transfer speed, the transfer speed switching unit transmits a speed switching signal indicating switch to the identified transfer speed to a PCI master via a PCI express interface. | 2015-09-17 |
20150261713 | ASCERTAINING CONFIGURATION OF A VIRTUAL ADAPTER IN A COMPUTING ENVIRONMENT - A control component of a computing environment activates a virtual adapter hosted on a physical adapter of a host system of the computing environment. The virtual adapter is for use by a guest of the host system in performing data input and output. The activating activates the virtual adapter absent involvement of the guest. Based on activating the virtual adapter, the control component obtains configuration information of the activated virtual adapter from the physical adapter, the configuration information generated based on the activating. The control component ascertains a configuration of the activated virtual adapter based on the obtained configuration information. | 2015-09-17 |
20150261714 | METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR ENTERING ACCESSORY DOCKING MODE IN USB TYPE C - Method, apparatus, and computer program product embodiments of the invention are disclosed for entering an accessory docking mode. In example embodiments of the invention, a method comprises: determining by a host, an orientation of a device or cable connector of a device, to a host connector of the host, based on whether a first configuration channel terminal or a second configuration channel terminal of the host connector is connected to a terminal of the device or cable connector that is connected through a resistance to a reference potential; causing by the host, a source voltage to be output on a source voltage output terminal of the host connector to a voltage input terminal of the device or cable connector, after the determination that a terminal of the device or cable connector is connected through a resistance to a reference potential; and determining by the host, whether the device is an audio headset, based on whether the terminal of the device or cable connector transitions to the reference potential in response to the source voltage output on the source voltage output terminal. | 2015-09-17 |
20150261715 | PCI FUNCTION MEASUREMENT BLOCK ENHANCEMENTS - Embodiments relate to an enhancement of a function measurement block. An aspect includes obtaining common statistics from a function table. An aspect includes obtaining adapter-specific statistics from an adapter. An aspect includes providing the common statistics and the adapter-specific statistics in the function measurement block. An aspect includes providing adapter-specific counters in the function measurement block. | 2015-09-17 |
20150261716 | PCI FUNCTION MEASUREMENT BLOCK ENHANCEMENTS - Embodiments relate to an enhancement of a function measurement block. An aspect includes obtaining common statistics from a function table. An aspect includes obtaining adapter-specific statistics from an adapter. An aspect includes providing the common statistics and the adapter-specific statistics in the function measurement block. An aspect includes providing adapter-specific counters in the function measurement block. | 2015-09-17 |
20150261717 | CASCADED FIELDBUS SYSTEM - For simplified projection of a cascaded fieldbus system which includes a first fieldbus with a plurality of first bus devices, a second fieldbus subordinate to the first fieldbus with a plurality of second bus devices and a third fieldbus subordinate to the second fieldbus with a plurality of third bus devices, an example embodiment of the invention provides that the second fieldbus is connected to the first fieldbus via a fieldbus access node device, and therefore bus devices of the second fieldbus are presented as virtual modules of the first fieldbus, and that a connection device, via which the third fieldbus is connected to the second fieldbus, is presented as a virtual fieldbus access node module of the first fieldbus, and therefore the remaining bus devices of the third fieldbus are presented as virtual modules of the first fieldbus. | 2015-09-17 |
20150261718 | Signal Conditioner Discovery and Control in a Multi-Segment Data Path - In a segmented data path, a source is able to “discover” whether any tunable repeater nodes are present. When one or more tunable repeaters are discovered, the source may adjust its link initialization sequence accordingly to train each “hop” individually and thereafter individually configure each intermediary repeater. | 2015-09-17 |
20150261719 | DEVICE MANAGEMENT USING VIRTUAL INTERFACES CROSS-REFERENCE TO RELATED APPLICATIONS - Methods managing data communication between a peripheral device and host computer system are provided. A physical interface for communicating data between a peripheral device and the plurality of applications executing on the host computer system is opened and controlled by a software module. A first virtual interface and a second virtual interface of the software module are exposed to an operating system of the host computer system, and the operating system exposes the first virtual interface and the second virtual interface to the first application and the second application. The first virtual interface is used for communicating data between the peripheral device and the first application through the physical interface, and the second virtual interface is used for communicating data between the peripheral device and the second application through the physical interface. | 2015-09-17 |
20150261720 | ACCESSING REMOTE STORAGE DEVICES USING A LOCAL BUS PROTOCOL - A method for data storage includes configuring a driver program on a host computer to receive commands in accordance with a protocol defined for accessing local storage devices connected to a peripheral component interface bus of the host computer. When the driver program receives, from an application program running on the host computer a storage access command in accordance with the protocol, specifying a storage transaction, a remote direct memory access (RDMA) operation is performed by a network interface controller (NIC) connected to the host computer so as to execute the storage transaction via a network on a remote storage device. | 2015-09-17 |
20150261721 | Flow control between processing devices - Various apparatuses and methods are described relating to forwarding data from an auxiliary processing device to a main processing device. Depending on a load of the main processing device and on priority of the data, data may be selectively discarded or forwarded to the main processing device. | 2015-09-17 |
20150261722 | Data processor chip with flexible bus system - A data processor chip having a two-dimensional array of arithmetic logic units and memory where the arithmetic logic units are in communication with memory units in one dimension and with other arithmetic units in a second. | 2015-09-17 |
20150261723 | METHOD AND SYSTEM FOR MANAGING HARDWARE RESOURCES TO IMPLEMENT SYSTEM FUNCTIONS USING AN ADAPTIVE COMPUTING ARCHITECTURE - An adaptable integrated circuit is disclosed having a plurality of heterogeneous computational elements coupled to an interconnection network. The interconnection network changes interconnections between the plurality of heterogeneous computational elements in response to configuration information. A first group of computational elements is allocated to form a first version of a functional unit to perform a first function by changing interconnections in the interconnection network between the first group of heterogeneous computational elements. A second group of computational elements is allocated to form a second version of a functional unit to perform the first function by changing interconnections in the interconnection network between the second group of heterogeneous computational elements. One or more of the first or second group of heterogeneous computational elements are reallocated to perform a second function by changing the interconnections between the one or more of the first or second group of heterogeneous computational elements. | 2015-09-17 |
20150261724 | MASSIVE PARALLEL EXASCALE STORAGE SYSTEM ARCHITECTURE - An high performance, linearly scalable, massive parallel architecture for storage systems comprises a plurality of simple individual storage nodes containing at least one CPU one storage element and, at least, one interconnection fabric link tightly connected together using a multidimensional high performance high scalable interconnection network fabric, preferably based on a PCIe dNTB architecture, organized, preferably, in an multidimensional hypercube topology or in a multidimensional Hypercubes derived topology. | 2015-09-17 |
20150261725 | USER ADJUSTABLE DATA SHARING BETWEEN MULTIPLE GRAPH ELEMENTS - First sample data is generated to render an instance of a first graph element type with a first axis. Second sample data is generated to render an instance of a second graph element type with a second axis parallel to the first axis. Data points used for the first axis are different from data points used for the second axis. A first axis selector is presented in association with the first axis. An indicator is received that indicates selection of the presented first axis selector. After receipt of the indicator, a second indicator is received that indicates selection of a shared role between the first axis and the second axis. After receipt of the second indicator, the instance of the second graph element type is rendered with the first axis. Third data points used for the second axis automatically have the same value as first data points used for the first axis. | 2015-09-17 |
20150261726 | SCREENSHOT METHOD AND DEVICE - After target software starts, whether a module with an image display function has been loaded by the target software may be determined. When determining that the module with the image display function has been loaded by the target software, a global hook may be injected into the module with the image display function. After receiving a screenshot instruction, screenshot may be executed with the global hook. | 2015-09-17 |
20150261727 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR PROCESSING A MARKUP DOCUMENT - A system, method, and computer program product are provided for identifying a first markup document including first numerical values and first tags reflecting first characteristics of the first numerical values associated with a first unit of measure, and a second markup document including second numerical values and second tags reflecting second characteristics of the second numerical values associated with a second unit of measure. The first characteristics of the first numerical values associated with the first unit of measure are different from the second characteristics of the second numerical values associated with the second unit of measure. At least a portion of the numerical values of at least one of the first markup document or the second markup document are automatically transformed, so that the at least some of the first numerical values of the first markup document and at least some of the second numerical values of the second markup document have a common unit of measure. Further, at least a part of the first markup document and at least a part of the second markup document are processed, resulting in a single markup document, for display. | 2015-09-17 |
20150261728 | MARKUP LANGUAGE SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT - A system, method, and computer program product are provided for use in connection with at least one computer-readable Extensible Markup Language (XML)-compliant data document capable of including: a plurality of line items with a plurality of data values, and a plurality of computer-readable semantic tags that describe a semantic meaning of the data values. | 2015-09-17 |
20150261729 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR OUTPUTTING MARKUP LANGUAGE DOCUMENTS - A system, method, and computer program product are provided for use in connection with at least one computer-readable Extensible Markup Language (XML)-compliant data document capable of including: a plurality of line items with a plurality of data values, and a plurality of computer-readable semantic tags that describe a semantic meaning of the data values. | 2015-09-17 |
20150261730 | Declarative Style Rules for Default Touch Behaviors - In at least some embodiments, a mechanism is provided for web developers to request specific default behaviors, such as touch behaviors, on their webpages. In at least some implementations, a Cascading Style Sheets (CSS) rule is utilized to enable or disable manipulations such as panning, pinch zoom, and double-tap-zoom manipulations. The mechanism can be extensible to accommodate additional default behaviors that are added in the future. In various embodiments, the behaviors are declared upfront and thus differ from solutions which employ an imperative model. The declarative nature of this approach allows achievement of full independence from the main thread and deciding the correct response using independent hit testing. | 2015-09-17 |
20150261731 | PROVIDING PRODUCT WITH INTEGRATED WIKI MODULE - Systems and methods include instantiating an application on first and second display devices. The application includes objects and an integrated wiki module. The integrated wiki module includes object wiki pages associated with the objects. The first display device is controlled to display a control module when an object is displayed thereon and to display an object wiki page in response to receiving a selection of the control module. The object wiki page includes content associated with the object. Instructions are received to change the content included in the object wiki page. The second display device is controlled to display the control module when the object is displayed on the second display device and to display the object wiki page including the changed content in response to receiving a selection of the control module after receiving the instructions to change the content. | 2015-09-17 |
20150261732 | METHOD AND APPARATUS FOR PROVIDING CALENDAR DISPLAYING WORK HISTORY OF DOCUMENT - Provided are a server for managing history information of a document work, a device for viewing the history information, and a system including the same. The server includes: a transceiver configured to receive, from at least one first device of a user, work history information of a document on the at least one first device; and a controller configured to arrange the received work history information in a calendar form by using time information included in the received work history information, wherein the transceiver provides the work history information in the calendar form to a second device. | 2015-09-17 |
20150261733 | ASSET COLLECTION SERVICE THROUGH CAPTURE OF CONTENT - An asset collection service is provided through a capture of content provided by an external source. A capture management application detects a user selection to create the capture of a portion of the content. The capture is created from the portion by inserting a reference to an asset into the capture, where the asset is located within the portion. The asset is fetched from the external resource using the reference. Additionally, the reference is replaced with the fetched asset within the capture. | 2015-09-17 |
20150261734 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD AND INFORMATION PROCESSING SYSTEM - An information processing apparatus displays a web page received from the outside based on one or more display elements included in the web page. The information processing apparatus converts, according to a predetermined conversion rule, a to-be-converted display element included in the one or more display elements of the web page, when receiving the web page from the outside; displays the web page based on the display elements of the web page when the display elements of the web page do not include the one or more to-be-converted display elements, and displays a web page after conversion based on the one or more converted display elements acquired from converting the one or more to-be-converted display elements when the web page includes the one or more to-be-converted display elements. | 2015-09-17 |
20150261735 | DOCUMENT PROCESSING SYSTEM, DOCUMENT PROCESSING APPARATUS, AND DOCUMENT PROCESSING METHOD - A document processing system includes a document storage unit storing document images which include a predetermined one or more character strings and one or more fill-in ranges which correspond to the one or more character strings; an association information storage unit storing the character strings of the document images in association with the fill-in ranges corresponding to the character strings; a searching for unit searching for a character string, which includes a requested searched-for character string, from among the stored character strings; and a display control unit displaying a list of images of the fill-in ranges corresponding to the searched for character string of the stored document images. | 2015-09-17 |
20150261736 | Enhanced Indicators for Identifying Affected Data - Technologies are described herein for displaying one or more visual indicators to assist users in identifying cells of a spreadsheet that are affected by an operation. In embodiments disclosed herein, an application is configured to receive a request to perform an operation on at least one cell of the spreadsheet. The application then identifies cells of the spreadsheet that are affected by the operation. The application then displays a visual indicator to emphasize the affected cells. By providing a timely displayed visual indicator that brings attention to affected cells, the user is able to gain a better perspective of the extent of the operation and how the operation applies to the cells of the spreadsheet. | 2015-09-17 |
20150261737 | OVERVIEW AXIS HAVING A DIFFERENT GRAPH ELEMENT TYPE - A method of rendering an overview axis is provided. A first indicator indicating a first graph element type to present in a canvas panel is received. First sample data is generated to render an instance of the first graph element type in the canvas panel. A second instance of the first graph element type is rendered in an overview axis using the generated first sample data. A second indicator indicating a second graph element type as a basis for presenting the overview axis is received, wherein the second graph element type is a different graph element type from the first graph element type. Second sample data is generated to render an instance of the second graph element type in the overview axis to replace the rendered second instance of the first graph element type. | 2015-09-17 |
20150261738 | INSPECTION SUPPORTING APPARATUS AND INSPECTION SUPPORTING METHOD - An inspection supporting apparatus includes a storage unit and a generating unit, for example. The storage unit stores therein different types of templates for each check item that is an inspection object for which it is determined whether a predetermined criterion for a site to handle agricultural crops or foods is satisfied, and stores a master in which the types of the templates and an order of arrangement of the templates are defined for each inspection object. The generating unit, upon receiving a selection of the inspection object, generates a frame in which the templates are arranged based on the selected inspection object and the master. | 2015-09-17 |