37th week of 2015 patent applcation highlights part 61 |
Patent application number | Title | Published |
20150256097 | SYSTEM FOR AMBIENT ENERGY HARVESTING - A method and apparatus is disclosed herein for harvesting ambient energy. In one embodiment, an energy harvester comprises: a first RF rectifier to output a first voltage determined by rectified RF energy in response to received RF energy; a first energy reservoir coupled to the first RF rectifier to store energy at the first voltage; a DC/DC converter coupled to the first energy reservoir to convert the first voltage to a second voltage; a second reservoir coupled to the DC/DC converter to store energy at the second voltage, the second voltage being greater than the first voltage; and a third reservoir coupled to the second reservoir to receive energy transferred from the second reservoir periodically. | 2015-09-10 |
20150256098 | MAINS POWER CONVERTER, AND METHODS OF OPERATING AND EQUIPMENT INCORPORATING THE SAME - A power converter is disclosed, which is configured to convert AC mains power to a DC voltage which is lower than an rms voltage of the AC mains, the power converter comprising a rectifier for rectifying an AC mains power; a capacitor; a switch configured to supply the rectified AC mains power to the capacitor during only a low-voltage part of any cycle of the AC mains; and a DC-DC power converter, typically a switched mode DC-DC power converter, configured to convert power from the capacitor to the DC voltage. Electronic equipment incorporating such a power converter is also disclosed, together with methods of operating such a power converter. | 2015-09-10 |
20150256099 | Six-Phase Supplied Transformer Rectifier Unit - A method and apparatus for forming a direct current power supply. An apparatus comprises a transformer and a rectifier. The transformer is figured to output a plurality of phase-shifted alternating currents in response to receiving a plurality of alternating currents. The plurality of alternating currents and the plurality of phase-shifted alternating currents form a plurality of input alternating currents that are offset relative to each other by one-twelfth of a cycle in phase. The rectifier is configured to form a direct current power supply having a common mode voltage reduced to zero within selected tolerances in response to receiving the plurality of input alternating currents. | 2015-09-10 |
20150256100 | CIRCUIT TO KEEP ELECTRONIC TRANSFORMERS WORKING WHILE UNDER-LOADED - O An LED light source includes a sub-circuit ( | 2015-09-10 |
20150256101 | POWER CIRCUIT - A power circuit includes: a rectifying circuit configured to rectify an AC voltage; a capacitor configured to integrate an output current of the rectifying circuit; a field effect transistor connected between the rectifying circuit and the capacitor; and a control circuit configured to supply a first gate voltage to a gate of the field effect transistor when a voltage of the capacitor is lower than a threshold value and supply a second gate voltage to the gate of the field effect transistor when the voltage of the capacitor is higher than the threshold value, wherein a resistance of the field effect transistor when the first gate voltage is supplied is higher than a resistance of the field effect transistor when the second gate voltage is supplied. | 2015-09-10 |
20150256102 | Apparatus for Controlling Conversion Between Alternating Current and Direct Current - Embodiments provide an apparatus for controlling conversion between an alternating current and a direct current, including a rectifier circuit, a detection circuit, and a logic circuit, where the detection circuit includes a voltage divider module, a first comparator module, and a second comparator module. | 2015-09-10 |
20150256103 | Inverter System for Energy-Storing Microgrid and Controlling Method Thereof - The present invention relates to an inverter system for energy-storing microgrid and a controlling method thereof, wherein the inverter system for energy-storing microgrid is integrated with a detecting module, a controlling and processing module, a visual resistor algorithmic processor, and a PWM signal generator. Moreover, the controlling and processing module is installed with a power-voltage reducing function and a reactive power-frequency reducing function for making the controlling and processing module be able to properly distribute the intensity and output ratio of all the output currents of the inverters according to the charge states of battery modules and load currents. Therefore, the current supply of each of the parallel connected inverters in the inverter system can be automatically distributed and modulated for effectively providing necessary electric power to each of connected loads, respectively. | 2015-09-10 |
20150256104 | Multilevel Hybrid Inverter and Operating Method - An inverter comprises a first boost apparatus, a second boost apparatus, a first half-cycle switching network coupled to the first boost apparatus, wherein the first half-cycle switching network is configured such that a first three-level conductive path is formed when a voltage at a dc source is greater than an instantaneous value of a voltage at an output of the inverter and a first five-level conductive path is formed when the instantaneous value of the voltage at the output of inverter is greater than the voltage at the dc source. | 2015-09-10 |
20150256105 | INVERTER CONTROLLER, POWER CONVERTER, AND CAR - According to one embodiment, an inverter controller includes a current controller which calculates and output PWM modulation ratio instructions of a first phase and a second phase, such that an inverter outputs a predetermined current; a switching timing arithmetic unit which calculates timings at which switches of the respective phases are opened and closed; a simultaneous switching avoiding unit which determines whether a first switching timing for changing over the switch of the first phase and a second switching timing for changing over the switch of the second phase coincide or not, and to generate, upon determining that the first switching timing and the second switching timing coincide, triangular-wave carriers of the first phase and the second phase by making different waveforms of the triangular-wave carriers; and a switch opening/closing timing generator which calculates a timing for opening/closing the switch. | 2015-09-10 |
20150256106 | BRIDGE CIRCUIT AND SHORT-CIRCUIT PROTECTION METHOD THEREOF - A bridge circuit and a short-circuit protection method thereof. The bridge circuit includes an input power unit, a converter unit, a first capacitor, a second capacitor, a detection unit and a bridge inverter unit. The input power unit includes a first electrode and a second electrode. The converter unit is coupled to the input power unit. The first capacitor includes a first terminal and a second terminal. The second capacitor includes a first terminal and a second terminal. The bridge inverter unit includes a plurality of switches and is coupled to the converter unit, the first capacitor, the second capacitor, the detection unit and the second electrode. The detection unit issues a short-circuit signal to a control unit when the detection unit detects a current variation on the second capacitor. | 2015-09-10 |
20150256107 | PIEZOELECTRIC ELEMENT FOR POWER GENERATION AND POWER GENERATION DEVICE USING SAME - A piezoelectric element for power generation and a power generation device using the same according to the present invention can maximize an electromotive force generated by the piezoelectric element by converting an external force (a natural force or a load force of a person/vehicle or the like) transferred from the outside into an instantaneous impact force and transferring the impact force to the piezoelectric element. | 2015-09-10 |
20150256108 | POWER-GENERATING SYSTEM - A power-generating system includes a heat source which is able to produce temporal temperature variation; a first device which is able to produce temporal temperature variation based on the temperature change of the heat source and in which polarization occurs; a second device for taking out a net generating power from the first device; a temperature sensor that detects the temperature of the first device; a voltage application device that applies a voltage to the first device; and a control unit for activating the voltage application device on detecting an increase in temperature of the first device and for stopping the voltage application device on detecting a decrease in temperature of the first device by the temperature sensor. | 2015-09-10 |
20150256109 | BRAKE CONTROL CIRCUIT AND MOTOR SYSTEM - The present invention relates to a brake control circuit and a motor system. The brake control circuit is used for controlling a motor brake connected to a motor, and comprises a brake control input module and a brake control main module, wherein the brake control input module includes a control signal input unit and N relays connected in parallel to an output end of the control signal input unit, the relays are electrically connected to the brake control main module, and N is an integer greater than or equal to 2. | 2015-09-10 |
20150256110 | MOTOR CONTROL DEVICE - A motor control device includes: a current detection portion provided to an inverter and detecting a current flowing to a motor due to a voltage generated across a current detection resistor, a timing measurement portion measuring a conduction pattern switching timing by the inverter and a current detection timing by the current detection portion, and a correction portion finding a correction current value using a current value detected by the current detection portion and the conduction pattern switching timing and the current detection timing measured by the timing measurement portion. The motor control device configured as above can enhance detection accuracy of a motor current. | 2015-09-10 |
20150256111 | CYCLE-BY-CYCLE CURRENT LIMIT FOR POWER TOOLS HAVING A BRUSHLESS MOTOR - A handheld AC power tool is provided. The power tool is comprised generally of: a brushless DC motor; a power cord connectable to an AC power socket; a converter circuit configured to receive input power from the power cord and operable to output a DC bus voltage, a switching arrangement interposed between the electric motor and the converter circuit; a motor drive circuit interfaced with the motor switches; and a power switch operable by a user to selectively energize the motor drive circuit and thereby power on the tool. The converter circuit includes a rectifier and a capacitor electrically coupled across the rectifier, such that the capacitor has capacitance sized to produce a DC bus voltage whose magnitude from an AC power source is substantially same as magnitude of voltage from a DC power source. | 2015-09-10 |
20150256112 | DC PRE-CHARGE CIRCUIT - Systems and methods are provided for pre-charging the DC bus on a motor drive. Pre-charging techniques involve pre-charge circuitry including a manual switch, an automatic switch, and pre-charge control circuitry to switch the automatic switch between pre-charge and pre-charge bypass modes in response to an initialized pre-charge operation, input voltage sags, and so forth. In some embodiments, the pre-charge operation may be initialized by switching the manual switch closed. In some embodiments, the pre-charge operation may also be initialized by a detected voltage sag on the DC bus. The pre-charge circuitry may also be configured to disconnect to isolate a motor drive from the common DC bus under certain fault conditions. | 2015-09-10 |
20150256113 | MOTOR DRIVE SYSTEM AND MOTOR CONTROL DEVICE - A motor drive system is provided with a motor, a torque sensor provided between the motor and a load, and a circuitry that controls driving of the motor. The circuitry is configured to execute estimating at least either of a speed or a position of the motor based on a torque detection signal detected by the torque sensor. | 2015-09-10 |
20150256114 | END OF MOTION DETECTION CIRCUIT FOR DIESEL ENGINES - A detection circuit for a diesel injection valve includes a first threshold, a first comparator for receiving a BEMF signal from the valve and compare the BEMF signal to the first threshold, a filter for filtering the BEMF signal thereby providing a filtered BEMF signal, a second threshold, and a second comparator for comparing a difference between the BEMF signal and the filtered BEMF signal to the second threshold, indicating an end of motion of the valve. An output of the first comparator and an output of the second comparator are joined to define an output signal. The output signal is activated only when the BEMF signal is above the first threshold and when the difference between the BEMF signal and the filtered BEMF signal is greater than the second threshold. | 2015-09-10 |
20150256115 | Wirelessly Powered Electric Motor - A method and apparatus for controlling an electric motor. Power is transmitted to windings of the electric motor by wireless magnetic coupling between transmission coils and the windings. | 2015-09-10 |
20150256116 | MOTOR DRIVE DEVICE HAVING INSULATION RESISTANCE DETECTING FUNCTION AND METHOD OF DETECTING INSULATION RESISTANCE OF MOTORS - A motor drive device includes: a converter; a power supply; a plurality of inverter units configured to convert DC to AC to drive a plurality of motors by upper arm switching elements connected between a capacitor and motor coils and lower arm switching elements connected between the capacitor and motor coils; a second switch configured to connect the capacitor to the earth; a current detector configured to measure current flowing between the capacitor and the earth; a voltage detector configured to measure the voltage across the capacitor; and, an insulation resistance detector configured to detect insulation resistance of the multiple motors based on the current and voltage measured in a condition that the switching element to which the motor coil to be measured is connected is turned on and the switching elements to which a motor coil other than the target for measurement is connected are turned off. | 2015-09-10 |
20150256117 | MOTOR CONTROL DEVICE AND AIR CONDITIONER - A motor control device includes a PWM signal generation unit configured to increase/decrease a duty in both directions of phase lag side and phase lead side regarding a first phase of three-phase PWM signal pattern. The PWM signal generation unit is configured to increase/decrease a duty in one of the directions of phase lag side and phase lead side regarding a second phase. The PWM signal generation unit is configured to increase/decrease a duty in a direction opposite to that of the second phase with reference to any phase of the carrier-wave period regarding a third phase. A timing point adjusting unit is configured to detect two-phase currents at timing points fixed in the carrier-wave period and to adjust a detection timing point so that the current is detectable at a variable timing point regarding at least one phase when the two-phase currents become undetectable at the fixed timing points. | 2015-09-10 |
20150256118 | PIEZOELECTRIC ENERGY HARVESTER - The invention is directed to a piezovoltaic energy harvesting laminate that includes a photovoltaic laminar wafer comprised of a plurality of photovoltaic cells and a dielectric wafer that converts mechanical energy to electrical energy. A boundary laminate interface is disposed between the photovoltaic laminar wafer and the dielectric wafer. The boundary laminate contains a metallization layer electrical terminal for the photovoltaic cells and a conduction layer of the dielectric wafer. | 2015-09-10 |
20150256119 | ELECTRIC ENERGY STORAGE SYSTEM - An energy storage system is provided. The energy storage system includes a vessel made of a refractory material and containing a phase change material, a thermally insulating cover at least partially surrounding the vessel, an emitter, made of a refractory material, having a first side arranged to be heated by the phase change material and a second side intended to radiate thermal power, at least one photovoltaic cell arranged to receive the thermal power emitted by the second side of the emitter, and electric means for heating the phase change material. | 2015-09-10 |
20150256120 | SOLAR PANEL MOUNTING SYSTEM WITH AERODYNAMIC BALLAST TRAYS - Systems and methods for mounting one or more solar panels are disclosed. A tubular component can be provided. The tubular component can include a first curved portion configured to rise to a first height above and extending along a length of the tubular component. The first curved portion can have a predetermined diameter, a predetermined thickness, and a predetermined bend radius selected to support a first solar panel module attached by a first end at a first attachment point positioned at the first height. The first curved portion can include an elongated leg configured to support a deflector element projecting outwardly at a predetermined angle to the mounting surface. The tubular component also can include a distal end having a second curved portion configured to rise to a second height above and extending along the length of the tubular component. The distal end can have a second attachment point at the second height. The second attachment point can be separated from the first attachment point by a predetermined distance and can be configured to support a second end of a second solar panel module at a predetermined tilt. | 2015-09-10 |
20150256121 | UNIVERSALLY MOUNTED SOLAR MODULE - A solar module has a plurality of solar panels framed within a frame member having side frame members connected to end frame members. Each side frame member and end frame member have a groove and a channel, and side frame members also have an elongated flange that raises up the solar panel a distance to allow cooling air to pass under the solar panel. Framed solar panels are connected to lengthwise support members having top, bottom and side channels, such as T-slots. These channels allow for easy adjustment and compensates for variability in the installation process. Each solar panel is connected to the lengthwise support members by way of legs. To connect adjacent solar panels to the lengthwise support members, a pair of legs, one long leg and one short leg, are stacked on top of one another and fastened to the lengthwise support member. | 2015-09-10 |
20150256122 | THREE-DIMENSIONAL PHOTOVOLTAIC CELL - A triangular prism that gathers sunlight is disclosed. This invention improves on the amount of electricity that can be produced over time per square foot using sunlight. | 2015-09-10 |
20150256123 | SOLAR PROPELLED AIRCRAFT STRUCTURE AND SOLAR PANELS CONTROL METHOD - A solar propelled aircraft which has a wing having solar cell modules mounted therein includes: first solar cell modules which are positioned in a wing or a tail wing of the aircraft and receive solar energy directly from the sun; second solar cell modules which are positioned in a main wing or a tail wing of the aircraft and supplied with directed energy from the earth; and rotating shafts which rotate the first solar cell modules and the second solar cell modules so that the first solar cell modules and the second solar cell modules correspond to each other in both directions. The first solar cell module at the upper surface obtains solar energy from the sun, and the second solar cell module at the lower surface obtains directed energy transferred from the earth. | 2015-09-10 |
20150256124 | Method and Apparatus for Calibrating a Micro-Concentrator Solar Array - A method and apparatus for calibrating a reflector in a solar array. A switch device is switched from a first state to a second state. A calibration voltage is applied to each of a set of actuation devices associated with the reflector in response to the switch device switching to the second state when the calibration circuit is electrically connected to the set of actuation devices. | 2015-09-10 |
20150256125 | SOLAR CELL MODULE - A solar cell module comprises a solar cell panel and a frame. A holding portion of a frame piece constituting the frame includes: a base extending upper than the panel upper surface of the solar cell panel from a main body portion | 2015-09-10 |
20150256126 | Luminous Sphere - Provided is a luminous sphere comprising a ball with a circular opening and a plug insertable into the ball. A battery container receiving one or more batteries is attached to the plug. A light source in electronic communication with the one or more batteries is enclosed with the inserted plug inside the ball and powered by the batteries to emit light from the ball. The plug can have a switch for activating the light source. The plug can also have one or more circuit boards attached to the plug for controlling power and timing to the light source. The light source can be a string of a plurality of light emitting diodes in series along a wire. A detachable solar panel can be in electronic communication with the one or more batteries. A sensor that turns on the light source when the sensor senses motion can also be provided. | 2015-09-10 |
20150256127 | ELECTRONIC DEVICE, ELECTRONIC APPARATUS AND MOVING OBJECT - An electronic device includes a base material provided with a concave portion and a support substrate provided with lateral sides. The support substrate is located so as to overlap the concave portion when seen in plan view, and is bonded to an upper surface of the base material through solders at a plurality of places except both ends of the lateral side and a plurality of places except both ends of the lateral side. | 2015-09-10 |
20150256128 | MULTI-PORT AMPLIFIER AND METHOD FOR CONTROLLING THEREOF - The present invention provides a multi-port amplifier which adopts a pair of SP4T switches and a pair of hybrid couplers in order to flexibly adjust an amplification mode. By using the proposed invention, the limited system flexibility and reconfigurability due to fixed input and output relations are overcome regardless of a component failure in a system. Moreover, signal amplification based on effective signal distribution and combination can be consistently performed according to various port configurations by different switching modes. Thus, the overall practicality of outputs comparing to the conventional multi-port amplifier can be effectively increased within an available lifespan of the system. | 2015-09-10 |
20150256129 | AMPLIFIER CIRCUIT - An amplifier circuit includes: plural transistors; plural first transmission lines respectively connected between input terminals of the plural transistors; plural second transmission lines respectively connected between output terminals of the plural transistors; an input node connected to the input terminal of a first stage transistor among the plural transistors; an output node connected to the output terminal of a final stage transistor among the plural transistors; and a capacitance connected to the output terminal of the first stage transistor via a third transmission line. | 2015-09-10 |
20150256130 | AMPLIFIER STRUCTURE - An amplifier structure comprising a transistor element having a plurality of sub-sections arranged adjacent to one another along a transistor element axis, a bias distribution element comprising a first part and a second part, the first part configured to receive a bias signal and the second part configured to supply the bias signal to each of the sub-sections of the transistor stage, wherein the first part is configured and arranged to deliver the bias signal to a distribution point and the second part is configured to diverge from the distribution point to provide the bias signal to each of the sub-sections of the transistor element, the distribution point arranged substantially facing a centre point of the transistor element axis. | 2015-09-10 |
20150256131 | CONSTANT TRANSCONDUCTANCE BIAS CIRCUIT - A bias circuit is adapted for biasing a to-be-biased transconductance cell such that the to-be-biased transconductance cell has a constant transconductance, and includes a converter and a controller. The converter receives first and second current signals, and generates, based on the first and second current signals, a first voltage signal, a second voltage signal and a bias voltage that is for biasing the to-be-biased transconductance cell. The controller receives the first and second voltage signals from the converter, generates the first and second current signals for the converter based on the first and second voltage signals so as to make a magnitude of the first voltage signal equal a magnitude of the second voltage signal. | 2015-09-10 |
20150256132 | DISTRIBUTED AMPLIFIER - A distributed amplifier includes a plurality of transistors, a first line connecting gate electrodes of the transistors to each other, and a second line connecting drain electrodes of the transistors to each other, wherein the first line and the second line are electromagnetically coupled to each other at a position situated between immediately adjacent transistors among the plurality of transistors. | 2015-09-10 |
20150256133 | Low Noise Amplifier for Multiple Channels - An amplifier system has an amplifier for amplifying a plurality of input signals from a plurality of different channels, and a plurality of demodulators each operatively coupled with the amplifier for receiving amplified input signals from the amplifier. Each demodulator is configured to demodulate a single amplified input channel signal from a single channel of the plurality of different channels. The system thus also has a plurality of filters, coupled with each of the demodulators, for mitigating the noise. | 2015-09-10 |
20150256134 | METHOD FOR DETECTING AN UNBALANCE AND FOR CALIBRATING A MULTI-PORT AMPLIFIER OF A TELECOMMUNICATIONS SATELLITE - A method for detecting an unbalance of a multi-port amplifier MPA intended to be on-board a satellite is presented. The MPA includes a plurality of paths, each path being configurable in gain and phase. The method includes transmitting a first test signal which is spread spectrum modulated from the first transmitting station to the first pathway, the first test signal being generated in at least the useful band of the first pathway; receiving by the second receiving station configured in frequency to receive signals transmitted by the second antenna connected to the second path of the MPA, the signals being likely to include a replica of the first test signal; detecting and measuring a power of received signals corresponding to a replica of the first test signal having leaked at the output of the second output port; computing at least one unbalance value of the MPA from the measurement of the power of the replica of the first test signal received in the second earth station. | 2015-09-10 |
20150256135 | RAIL-TO-RAIL FOLLOWER CIRCUITS - Rail-to-rail follower circuits. In some embodiments, a source follower circuit may include a first level shifter configured to receive an input voltage; an N-type Metal-Oxide-Semiconductor (NMOS) transistor having a gate terminal coupled to an output of the first level shifter; a second level shifter configured to receive the input voltage; a P-type Metal-Oxide-Semiconductor (PMOS) transistor having a gate terminal coupled to an output of the second level shifter and a source terminal coupled to a source terminal of the NMOS transistor; and an amplifier configured to receive the input voltage and to output a current at a node between the source terminal of the NMOS transistor and the source terminal of the PMOS transistor, wherein the current is determined based upon a difference between the input voltage and a reference voltage. | 2015-09-10 |
20150256136 | METHOD, APPARATUS AND SYSTEM FOR LEVEL SHIFTING OF COMMON MODE VOLTAGE FROM INPUT TO OUTPUT FOR CAPACITIVE FEEDBACK TRANSIMPEDANCE AMPLIFIER - A circuit for a level shifting of common mode voltage. The circuit includes a first amplifier, wherein the input of the first amplifier is coupled to a voltage source and another input of the first amplifier is coupled 2.5v, feedback resistor, R | 2015-09-10 |
20150256137 | FORMANT AMPLIFIER - A method can include receiving audio data within a band of frequencies; amplifying individualized formant frequencies within the band of frequencies; and outputting audio data that includes at least one of the amplified individualized formant frequencies. Various other apparatuses, systems, methods, etc., are also disclosed. | 2015-09-10 |
20150256138 | FULLY DIFFERENTIAL CLASS A/AB AMPLIFIER AND METHOD THEREOF - A differential amplifier and a method thereof are described. The method, adopted by a differential amplifier, includes: generating first stage differential output signals based on input differential signals; providing, by a current source, a bias current with a desired quiescent current; biasing first and second control transistors with the bias current to generate first and second currents, respectively, wherein the first and second control transistors form a differential pair which receives first stage differential input signals; mirroring the first and second currents to first and second push transistors which are connected to first and second pull transistors in series, respectively; and biasing the first and second pull transistors with the mirrored first and second currents, respectively; wherein each pair of serial connected push and pull transistors are complimentary and the two pairs of push and pull transistors output second stage differential output signals. | 2015-09-10 |
20150256139 | EPSILON NEGATIVE LOADED TRAVELING WAVE TUBE - A slow wave structure of a traveling wave tube is provided. The slow wave structure includes an input port, an output port, a first material, and a second material. The second material is mounted in the first material at periodic intervals in a direction of propagation of a radio frequency signal between the input port and the output port. The second material has a real part of permittivity that is negative and a real part of permeability that is positive at an operational frequency of the radio frequency signal. | 2015-09-10 |
20150256140 | VARIABLE SOUND SYSTEM FOR MEDICAL DEVICES - A system capable of self-adjusting both sound level and spectral content to improve audibility and intelligibility of medical device audible cues. Audible cues are stored as sound files. Ambient noise is detected, and the output of the audible cues is altered based on the ambient noise. Various embodiments include processed sound files that are more robust in noisy environments. | 2015-09-10 |
20150256141 | Method And System For Audio Adjustment - A monoscopic camera comprising one or more image sensors and a depth sensor may generate video based on two-dimensional image data captured via the one or more image sensors and corresponding depth information captured via the depth sensor. The camera may process corresponding audio for the generated video based on the captured depth information. The audio processing may comprise mitigating noise in the corresponding audio, enhancing voice quality in the corresponding audio, and/or enhancing audio quality of the corresponding audio. The camera may be operable to determine, based on the captured depth information, one or more sound paths between a source of the corresponding audio and a microphone utilized to capture the corresponding audio emanating from the source. The processing of the audio may comprise removing portions of the captured audio arriving at the microphone via one or more reflection paths. | 2015-09-10 |
20150256142 | EXPONENTIAL ROM TABLE TUNING USING TRIM FOR FREQUENCY AGILE ANALOG FILTERS - A tunable and trimmable analog filter may include a tunable analog filter and a trimming circuit. The tunable analog filter may set the frequency of a characteristic of the tunable analog filter based on a digital tuning signal that is indicative of a desired frequency of the characteristic. However, the tunable analog filter may contain components having values that deviate from specified values due to variations during manufacture of the tunable analog filter. The value deviations can cause the frequency of the characteristic not to precisely match the frequency indicated by the digital tuning signal. The trimming circuit may include a non-volatile memory that contains data. The trimming circuit may receive tuning information indicative of a desired frequency for the characteristic of the tunable analog filter. The trimming circuit may generate the digital tuning signal by trimming the tuning information to compensate for the deviations in component value and by using the data contained within the non-volatile digital memory. | 2015-09-10 |
20150256143 | RESONATOR WITH A STAGGERED ELECTRODE CONFIGURATION - An integrated circuit device includes a piezoelectric substrate having a first surface and a second surface opposite the first surface. The device also includes a first electrode and a second electrode on the first surface of the piezoelectric substrate, the first electrode having a first width and the second electrode having a second width. The device further includes a third electrode and a fourth electrode on the second surface of the piezoelectric substrate, the third electrode having a third width that is substantially the same as the second width, and the fourth electrode having a fourth width that is substantially the same as the first width. The first and third electrodes operate as part of a first portion of a microelectromechanical systems (MEMS) resonator, and the second and fourth electrodes operate as part of a second portion of the MEMS resonator. | 2015-09-10 |
20150256144 | SYMMETRIC DUAL PIEZOELECTRIC STACK MICROELECTROMECHANICAL PIEZOELECTRIC DEVICES - The present invention relates to a device comprising an elongate resonator beam extending between first and second ends. A base is connected to the resonator beam at the first end with the second end extending from the base as a structural layer. The elongate resonator beam comprises either: (1) a first oxide layer on a first piezoelectric stack layer over a structural layer on a second oxide layer over a second piezoelectric stack layer on a third oxide layer or (2) a first oxide layer on a first piezoelectric stack layer over a second oxide layer on a structural layer over a third oxide layer on a second piezoelectric stack over a fourth oxide layer. Also disclosed is a system comprising an apparatus and the device, as well as methods of making and using the device. | 2015-09-10 |
20150256145 | ACOUSTIC WAVE DEVICE AND METHOD FOR MANUFACTURING THE SAME - An acoustic wave device includes: a piezoelectric substrate; an interdigital electrode that is provided on the piezoelectric substrate and made of a laminated film, an electric resistivity of a material of an uppermost layer in the laminated film being larger than that of a material of a just-under layer located one layer lower than the uppermost layer; and a pad electrode that is provided on the piezoelectric substrate and electrically connected to the interdigital electrode, and has a same film structure as a film structure from a layer on the piezoelectric substrate to the just-under layer in the laminated film of the interdigital electrode, an upper surface of a layer corresponding to the just-under layer being exposed. | 2015-09-10 |
20150256146 | RESONATOR FILTER - A resonator filter includes a substrate, a bottom electrode formed on the substrate, a multi-layered coupling structure formed on the bottom electrode, a top electrode formed on the multi-layered coupling structure, a first piezoelectric layer sandwiched in between the bottom electrode and the multi-layered coupling structure, and a second piezoelectric layer sandwiched in between the multi-layered coupling structure and the top electrode. The multi-layered coupling structure includes at least an insulating material. | 2015-09-10 |
20150256147 | RADIO FREQUENCY SWITCH - A radio frequency switch may include a common port transmitting and receiving a radio frequency signal, a first switching unit including a plurality of first switch elements connected in series and opening or closing a signal transfer path between a first port inputting and outputting the radio frequency signal and the common port, and a second switching unit having a plurality of second switch elements connected in series and opening or closing a signal transfer path between a second port inputting and outputting the radio frequency signal and the common port. The second switching unit further includes a first filter circuit unit connected to a control terminal of at least one second switch element among the plurality of second switch elements to remove at least one preset frequency band signal. | 2015-09-10 |
20150256148 | RECONFIGURABLE NTH-ORDER FILTER - The reconfigurable Nth-order filter includes a CCII adopting active current division networks for implementing the proposed filter. This digitally programmable second generation current conveyor leads to wide control of filter coefficients for reconfiguration of the filter. Programmability characteristics are demonstrated through experimental results obtained from integrated circuit chips fabricated in a 0.18 μm CMOS process. | 2015-09-10 |
20150256149 | NOISE FILTER - A noise filter disclosed herein is configured to suppress a common mode voltage that is generated in cables connected to an electric power converter. The noise filter includes: detecting capacitors connected to the cables, respectively, and configured to detect the common mode voltage; an operational amplifier having a positive input terminal via which the common mode voltage detected by the detecting capacitors is inputted; an emitter follower circuit having an input terminal connected to an output terminal of the operational amplifier and having an output terminal connected to a negative input terminal of the operational amplifier; and a transformer configured to apply a compensating voltage to each of the cables by applying a voltage at the output terminal of the emitter follower circuit to each of the cables in opposite phase. | 2015-09-10 |
20150256150 | Optimally Factored Interpolated FIR Filter Design - A method and system for the design and implementation of an optimally factored interpolated finite impulse response (IFIR) filter is presented. Techniques used to increase the implementation efficiency of the filter include joint sequencing of the filter stages, use of an nested IFIR filter, taming of a stage by relocation of that stage, fusing two or more stages together to form a single stage, and manual manipulation of a post-stage multiplier. IFIR filters using this approach may be realized as low pass filters or high pass filters, and in either analog or digital form. | 2015-09-10 |
20150256151 | METHOD AND APPARATUS TO REDUCE NOISE IN CT DATA ACQUISITION SYSTEMS - The disclosure provides a circuit that includes an integrator that generates an integrated signal in response to a current signal. A comparator is coupled to the integrator and receives the integrated signal and a primary reference voltage signal. The comparator generates a feedback signal. A switched capacitor network is coupled across the integrator. The feedback signal activates the switched capacitor network. | 2015-09-10 |
20150256152 | System and Method for Driving Transistors - In accordance with an embodiment, a circuit includes a first transistor, a second transistor having a reference node coupled to an output node of the first transistor, and a control circuit. The control circuit is configured to couple a second reference node to a control terminal of the second transistor during a first mode of operation, couple a floating reference voltage between the control terminal of the second transistor and the reference terminal of the second transistor during a second mode of operation and during a third mode of operation, and couple a third reference node to the reference terminal of the second transistor during the third mode of operation. The second reference node is configured to have a voltage potential operable to turn-on the second transistor, and the floating reference voltage is operable to turn on the second transistor. | 2015-09-10 |
20150256153 | SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME - A semiconductor system includes a controller and a semiconductor device. The controller receives a temperature code signal and responsively generates a mode set signal operable to adjust a level variation and a voltage variation rate of a temperature voltage signal, wherein the temperature voltage signal level varies according to temperature when a logic level combination of the temperature code signal is different from a predefined logic level combination. The semiconductor device generates the temperature voltage signal from a drivability and a resistance value set by the mode set signal. The semiconductor device generates the temperature code signal based on a comparison of the temperature voltage signal and a reference voltage signal. | 2015-09-10 |
20150256154 | ELECTRIC AND ELECTRONIC APPARATUS, CIRCUIT, AND COMMUNICATION SYSTEM - An apparatus according to an embodiment of the present disclosure includes a plurality of target circuits, the number of the target circuits being more than a required number of the target circuits; a characteristic adjustment unit configured to adjust characteristics of the target circuits; and a control unit configured to control a state of the target circuits between a used state and an unused state. The control unit controls the required number of the target circuits to be in the used state and controls the rest of the target circuits to be in the unused state. The characteristic adjustment unit adjusts the characteristics with respect to the target circuits in the unused state. | 2015-09-10 |
20150256155 | Electronic Circuit and Method for Operating a Transistor Arrangement - An electronic circuit includes a transistor arrangement with a plurality of transistor devices, each including a control node and a load path between a first load node and a second load node, and having the load paths connected in parallel. The electronic circuit further includes a drive circuit coupled to the control node of each of the plurality of transistor devices, and configured to receive an input signal. Each of the plurality of transistor devices includes a two-dimensional electron gas (2DEG) in the load path, and a field plate adjacent the 2DEG. The drive circuit is configured to receive a load signal that represents at least one load parameter of the transistor arrangement and is configured to one of activate and deactivate at least one of the plurality of transistor devices based on the load signal. | 2015-09-10 |
20150256156 | VOLTAGE CONTROLLED OSCILLATOR, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE - A low-power voltage controlled oscillator is provided. The voltage controlled oscillator includes (2n+1) first circuit components (n is an integer of one or more). An output terminal of the first circuit component in a k-th stage (k is an integer of one or more and 2n or less) is connected to an input terminal of the first circuit component in a (k+1)-th stage. An output terminal of the first circuit component in a (2n+1)-th stage is connected to an input terminal of the first circuit component in a first stage. One of the first circuit components includes a second circuit component and a third circuit component whose input terminal is connected to an output terminal of the second circuit component. The third circuit component includes a first transistor and a second transistor whose source-drain resistance is controlled in accordance with a signal input to a gate through the first transistor. | 2015-09-10 |
20150256157 | Level Shifter Circuit - Leakage current in a standby mode of a level shifter capable of operating with low voltage is reduced. Provided is a level shifter circuit in which an n-channel silicon transistor and an oxide semiconductor transistor are provide in series between an output signal line and a low potential power supply line. The potential of a gate electrode of the oxide semiconductor transistor is raised to a potential higher than input signal voltage by capacitive coupling, so that on-state current of the oxide semiconductor transistor is increased. | 2015-09-10 |
20150256158 | SEMICONDUCTOR INTEGRATED DEVICE - According to one embodiment, a semiconductor integrated device includes a first node that receives a first voltage, a second node that receives a second voltage, and an electrode. A PMOS transistor is coupled between the first node and the electrode. An NMOS transistor is coupled between the second node and the electrode. A control signal at a voltage lower than the second voltage is supplied to a gate electrode of the PMOS transistor. A control signal at a voltage higher than the first voltage is supplied to a gate electrode of the NMOS transistor. | 2015-09-10 |
20150256159 | Load Transient Asynchronous Boost for Pulse Width Modulation Modulator - A pulse width modulation controller (PWM) is disclosed which has a MOSFET ( | 2015-09-10 |
20150256160 | CIRCUITS AND METHODS FOR DFE WITH REDUCED AREA AND POWER CONSUMPTION - A 1/n-rate decision feedback equalizer (DFE) and method include a plurality of branches. Each branch includes a summer circuit configured to add a feedback signal to a received input, and a latch configured to receive an output of the summer circuit in accordance with a clock signal. A feedback circuit includes a multiplexer configured to receive as input, an output of each branch, the multiplexer having a clocked select input and configured to multiplex the output of each branch to assemble a full rate bit sequence, and a filter configured to provide cancellation of intersymbol interference (ISI) from the received input to be provided to the summer circuit of each branch. | 2015-09-10 |
20150256161 | METHOD FOR DRIVING SEMICONDUCTOR DEVICE - A novel PLL is provided. An oscillator circuit includes first to n-th inverters, and first and second circuits. A first terminal of each of the first and second circuits is electrically connected to an output terminal of the i-th inverter. A second terminal of each of the first and second circuits is electrically connected to an input terminal of the (i+1)-th inverter. The first circuit has functions of storing first data, switching between electrically disconnecting the first terminal and the second terminal from each other and setting a resistance between the first terminal and the second terminal to a value based on the first data. The second circuit has functions of storing second data, switching between electrically disconnecting the first terminal and the second terminal from each other and setting a resistance between the first terminal and the second terminal to a value based on the second data. | 2015-09-10 |
20150256162 | FLEXIBLE CHIRP GENERATOR - A processing-efficient chirp generator that allows flexibility in controlling phase, frequency and slope, i.e., rate of change of frequency. In one embodiment, a fine phase propagation block generates phase values in increments of the fine time step, each phase value also offset from other phase values by multiples of a coarse time step. The phase samples are realigned in time after conversion to digital-to-analog converter (DAC) values. | 2015-09-10 |
20150256163 | Circuit Arrangement with a First Semiconductor Device and with a Plurality of Second Semiconductor Devices - A circuit arrangement includes a first semiconductor device having a load path and a number of second semiconductor devices. Each second semiconductor device has a control terminal and a load path between a first load terminal and a second load terminal. The second semiconductor devices have their load paths connected in series and connected in series with the load path of the first semiconductor device. Each of the second semiconductor devices has a load terminal of one of the first semiconductor device and of one of the second semiconductor devices associated thereto and a voltage limiting element coupled between the control terminal of one of the second semiconductor devices and the load terminal associated with that one of the second semiconductor devices. | 2015-09-10 |
20150256164 | TIMING MEASURING CIRCUIT - According to one embodiment, a timing measuring circuit is provided with N (N is an integer of 2 or more) delay circuits and a comparison circuit. The N delay circuits delay a reference signal by different delay times. The comparison circuit outputs N timing adjustment values based on results of comparison between the reference signal and N output signals from the delay circuits. | 2015-09-10 |
20150256165 | METHODS AND APPARATUS FOR GENERATING A MODULATED WAVEFORM - A system and method are present for generating a modulated waveform. A timer is configured to generate a first modulated waveform signal, and an adder module is configured to calculate a delay. The delay includes at least one of an edge fractional delay and a dead time fractional delay. A delay module is operably coupled to the timer and the adder module. The delay module is configured to delay at least one of a rising edge of the first modulated waveform signal and a falling edge of the first modulated waveform signal by the delay to generate a second modulated waveform signal that has a higher frequency resolution than a frequency resolution of the first modulated waveform signal. | 2015-09-10 |
20150256166 | VOLTAGE SELECTION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING THE SAME - The highest voltage of a power supply voltage, a ground potential, and a signal voltage is output as a selection voltage from a terminal on the output side. In this case, terminals on the input side and the terminal on the output side are connected to each other through MOS transistors in the ON state. Therefore, it is possible to suppress a voltage drop due to a parasitic diode of each MOS transistor. | 2015-09-10 |
20150256167 | Driving Module and Display Device thereof - A driving module, for a display device, includes a first transistor comprising a gate coupled to a first node, a drain coupled to an output end, and a source coupled to a first positive voltage source; a second transistor comprising a gate coupled to a second node, a drain coupled to the output end, and a source coupled to a first negative voltage source; and a voltage generating unit, coupled to an input end, a second positive voltage source and a second negative voltage source for generating a first voltage at the first node and a second voltage at the second node; wherein a difference between a first positive voltage of the first positive voltage source and the first voltage is smaller than a first threshold and a difference between a first negative voltage of the first negative voltage source and the second voltage is smaller than a second threshold. | 2015-09-10 |
20150256168 | SWITCHING DEVICE HAVING A GOOD ISOLATION CHARACTERISTIC, METHOD FOR IMPROVING THE ISOLATION CHARACTERISTIC OF A SWITCHING DEVICE - A switching device having a good isolation characteristic is disclosed. The switching device comprises a switch unit and a control unit, wherein the control unit is connected to a power supply terminal, and connected to the switch unit via a control line and a power line. The control unit comprises a voltage regulator unit that is electrically connected to the power supply terminal and the power line of the switch unit. When the switch unit enters standby mode, the control unit provides an isolation voltage to the switch unit to effectively enhance the isolation characteristic of the switching device in the standby mode. | 2015-09-10 |
20150256169 | APPARATUS AND METHODS FOR INPUT BIAS CURRENT REDUCTION - Apparatus and methods for reducing input bias current of electronic circuits are provided herein. In certain implementations, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal. | 2015-09-10 |
20150256170 | CIRCUITS WITH FLOATING BIAS - Apparatus and methods to increase the range of a signal processing circuit. A system uses floating bias circuits coupled to a signal processing circuit to increase the range of power supplies that can be used with the signal processing circuit, while maintaining the components of the signal processing circuit within a breakdown voltage threshold. As the voltage level of the data signal varies, the voltage level of the floating bias circuits varies as well. | 2015-09-10 |
20150256171 | HIGH VOLTAGE SWITCH WITH TWO OR MORE OUTPUTS - Embodiments relate to a single multi-output high-voltage (HV) switch configured to pass multiple HV signals in semiconductor integrated circuits, such as a memory device. By utilizing a single HV switch that shares multiple components, area is reduced and fewer numbers of transistor devices are used to reduce cost. The shared components are selected such that the HV switch configuration provides functionality similar to traditional multiple HV switch configurations. Specifically, common logic shared across different branches of the single HV switch enables the single HV switch to provide multiple HV signals. | 2015-09-10 |
20150256172 | BIAS CIRCUIT FOR A HIGH POWER RADIO FREQUENCY SWITCHING DEVICE - Embodiments provide a switching circuit including a transistor and a bias circuit. The transistor may transition between an off state and an on state responsive to a control signal received at a control terminal. The bias circuit may be coupled between the control terminal and a gate terminal of the transistor. The bias circuit may include a gate resistor coupled between the gate terminal and the control terminal. The bias circuit may further include one or more diodes coupled in parallel with the gate resistor between the gate terminal and the control terminal to allow leakage current to pass from the gate terminal through the one or more diodes. In some embodiments, the bias circuit may include a switch coupled with the one or more diodes to selectively couple the one or more diodes in parallel with the gate resistor when the transistor is off. | 2015-09-10 |
20150256173 | APPARATUS FOR PERFORMING SIGNAL DRIVING WITH AID OF METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR, AND ASSOCIATED INTEGRATED CIRCUIT - An apparatus for performing signal driving with aid of MOSFET and an associated IC are provided, where the apparatus includes a PMOSFET coupled between a predetermined voltage level and a terminal, and further includes an NMOSFET coupled between the predetermined voltage level and the terminal. The PMOSFET is arranged for selectively driving a signal that passes through the terminal. In addition, the NMOSFET is arranged for selectively driving the signal. Additionally, the apparatus further includes another NMOSFET coupled between another predetermined voltage level and the terminal, wherein the other NMOSFET is arranged for selectively driving the signal. More particularly, the PMOSFET, the NMOSFET, and the other NMOSFET does not drive the signal at the same time. For example, each of the PMOSFET, the NMOSFET, and the other NMOSFET selectively drives the signal to have one of a plurality of logical states. | 2015-09-10 |
20150256174 | CORE VOLTAGE RESET SYSTEMS AND METHODS WITH WIDE NOISE MARGIN - Presented systems and methods facilitate efficient reset operation. In one embodiment, a system comprises a core domain portion an I/O domain portion and a core reset I/O by-pass component. The core domain portion is configured to operate at a nominal core domain voltage level. The I/O domain portion configured to operate at a nominal I/O domain voltage level. The core reset I/O by-pass component configured to forward a reset indication to the core domain independent of the I/O domain. In one exemplary implementation the core reset I/O by-pass component is operable to receive an input reset indication at a high domain voltage level and to convert the input reset indication to a core reset signal that is less than or substantially equal to the nominal core domain voltage, wherein the high domain is voltage higher than the core domain voltage level. | 2015-09-10 |
20150256175 | SEMICONDUCTOR APPARATUS INCLUDING OUTPUT BUFFER - An output circuit includes first, second and third transistors. The first transistor includes first and second diffusion layers. The third transistor includes third and fourth diffusion layers. The first transistor shares the second diffusion layer with the second transistor and the third transistor shares the third diffusion layer with the second transistor. The second transistor is rendered conductive responsive to an activation of a first signal and non-conductive responsive to an inactivation of the first signal. The first and third transistors are rendered conductive responsive to an activation of a second signal that is different from the first signal and rendered non-conductive responsive to an in activation of the second signal. | 2015-09-10 |
20150256176 | Single-Ended Configurable Multi-Mode Driver - Embodiments of the invention are generally directed to a single-ended configurable multi-mode driver. An embodiment of an apparatus includes an input to receive an input signal, an output to transmit a driven signal generated from the input signal on a communication channel, a mechanism for independently configuring a termination resistance of the driver apparatus, and a mechanism for independently configuring a voltage swing of the driven signal without modifying a supply voltage for the apparatus. | 2015-09-10 |
20150256177 | SEMICONDUCTOR DEVICE, DRIVING METHOD THEREOF, AND ELECTRONIC APPLIANCE - A semiconductor device in which operation delay due to stop and restart of the supply of a power supply potential is suppressed is provided. Potentials corresponding to data held in first and second nodes while the supply of a power supply potential is continued are backed up in third and fourth nodes while the supply of the power supply potential is stopped. After the supply of the power supply potential is restarted, data are restored to the first and second nodes by utilizing a change in channel resistance of a transistor whose gate is electrically connected to the third or fourth node. Note that shoot-through current is suppressed at the time of data restoration by electrically disconnecting the power supply potential and the first or second node from each other. | 2015-09-10 |
20150256178 | PURE MEMRISTIVE LOGIC GATE - According to an embodiment of the invention there is provided a device and method. The device may include a pure memristive logic gate, wherein the pure memristive logic gate consists essentially of at least one input memristive device and an output memristive device that is coupled to and differs from the at least one memristive device; wherein the pure memristive device is controlled by a single control voltage. | 2015-09-10 |
20150256179 | SWITCHING CONTROL CIRCUIT AND WIRELESS COMMUNICATION DEVICE - A switching control circuit includes a level shifter that generates a switching control signal for a switching circuit, and a voltage generation circuit. The voltage generation circuit includes a first oscillator that generates a first oscillating signal, a frequency spectrum of which is controlled to be spread spectrum based on a second oscillating signal different from the first oscillating signal, and a power supply circuit that generates a power supply voltage based on the first oscillating signal and supplies a converted power supply voltage to the level shifter. | 2015-09-10 |
20150256180 | FIELD PROGRAMMABLE GATE ARRAY AND SWITCH STRUCTURE THEREOF - A field programmable gate array and a switch structure thereof are provided by the present disclosure. The field programmable gate array, including: a split gate memory; a programmable logic unit; and a wiring structure of the programmable logic unit; wherein the wiring structure includes interconnection nodes located on connection points thereof, and the split gate memory is adapted to provide an interconnection relation between the interconnect nodes. In the present disclosure, a switch structure of the field programmable gate array is able to be integrated with a memory thereof. Therefore, the field programmable gate array may have low cost and high reliability. | 2015-09-10 |
20150256181 | SEMICONDUCTOR DEVICE - To provide a semiconductor device in which signal-transmission speed between a first logic element and a second logic element is not lowered. The semiconductor device includes a first switch between the first logic element and the second logic element, and configuration to the first switch is repeatedly performed until configuration is performed on the first switch while a low-level voltage is input to the first switch from the first logic element. | 2015-09-10 |
20150256182 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device where a signal-transmission speed. The semiconductor device comprises a first logic element, a first switch electrically connected to the first logic element, and a second logic element electrically connected to the first switch. The first logic element includes at least a second switch, and the second switch has a function of setting an output potential from the first logic element to a L level. The first logic element may include a memory electrically connected to a register. The memory has a function of holding data of the register, and the register has a function of setting an output potential to a L level after holding the data in the memory. | 2015-09-10 |
20150256183 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM INCLUDING THE SAME - A semiconductor device includes a dock division block suitable for dividing a frequency of a source clock and generating first and second internal clocks; a strobe division block suitable for dividing a frequency of a strobe signal, and generating first and second internal strobe signals; and a phase difference detection block suitable for generating and alternately outputting first and second detection information as a detection result information. | 2015-09-10 |
20150256184 | SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM INCLUDING THE SAME, AND METHOD OF OPERATING THE SAME - A semiconductor apparatus includes a clock division block suitable for generating a first internal dock and a second internal clock having a first phase difference at which active sections of the first internal clock and the second internal clock overlap with each other by dividing a phase of a source clock at a predetermined rate, and a phase detection block suitable for outputting detection result information generated by combining a result obtained by detecting a phase of the first internal clock at a predetermined edge of a strobe signal and a result obtained by detecting a phase of the second internal clock at the predetermined edge of the strobe signal. | 2015-09-10 |
20150256185 | CIRCUIT, VOLTAGE CONTROL OSCILLATOR, AND OSCILLATION FREQUENCY CONTROL SYSTEM - A circuit includes first and second capacitances arranged on a first path that connects first and second terminals; a first switch arranged between the first capacitance and the second capacitance; a second switch arranged on a second path that connects a reference voltage section and a first node formed between the first capacitance and the first switch; a third switch arranged on a third path that connects the section and a second node formed between the second capacitance and the first switch; a first resistance arranged on a fourth path that connects the first node and a third node formed between the first terminal and the first capacitance; a second resistance arranged on a fifth path that connects the second node and a fourth node formed between the second terminal and the second capacitance; a fourth switch on the fourth path; and a fifth switch on the fifth path. | 2015-09-10 |
20150256186 | ELECTRONIC CIRCUIT, METHOD OF CONTROLLING ELECTRONIC CIRCUIT, AND ELECTRONIC APPARATUS - An electronic circuit includes a plurality of delay elements configured to delay a clock signal by a delay time and to supply the delayed clock signal as a delay signal, the delay time being shorter with a higher power source voltage; a delay time acquisition unit configured to acquire the delay time based on a value of the delay signal; and a voltage controller configured to perform a voltage control process in which the power source voltage is controlled to be high in a case where the acquired delay time is longer than a predetermined desired value and the power source voltage is controlled to be low in a case where the acquired delay time is shorter than the predetermined desired value. | 2015-09-10 |
20150256187 | DELAY LOCKED LOOP, METHOD OF OPERATING THE SAME, AND MEMORY SYSTEM INCLUDING THE SAME - A delay locked loop (DLL) is provided. The DLL includes a delay line, a phase detector, a delay line control unit, and a DLL controller. The delay line outputs an output clock by delaying an input clock by a first time on the basis of a select value. The phase detector detects a phase of the output clock. The delay line control unit determines a select value so that the first time corresponds to n periods of the input clock on the basis of the detected phase and an initial select value. The DLL controller provides the initial select value to the delay line control unit. The DLL controller updates the initial select value according to a change of a frequency of the input clock, and to provide the updated initial select value to the delay line control unit. | 2015-09-10 |
20150256188 | PHASE-LOCKED LOOP CIRCUIT INCLUDING VOLTAGE DOWN CONVERTER CONSISTING OF PASSIVE ELEMENT - A phase-locked loop circuit includes a first circuit, a second circuit, and a voltage down converter. The first circuit generates a first signal based on a reference signal and a feedback signal, and operates based on a first supply voltage. The second circuit generates an oscillation signal based on a second signal, generates the feedback signal by dividing the oscillation signal, and operates based on a second supply voltage lower than the first supply voltage. The voltage down converter generates the second signal by decreasing an activation voltage level of the first signal. The voltage down converter includes at least one passive element electrically connected between the first circuit and the second circuit. | 2015-09-10 |
20150256189 | DIGITAL EXTRACTION AND CORRECTION OF THE LINEARITY OF A RESIDUE AMPLIFIER IN A PIPELINE ADC - Embodiments of a pipeline analog-to-digital converter is provided. In accordance with some embodiments, a pipeline analog-to-digital converter includes a stage, the stage including a residue amplifier that amplifies a residual voltage generated by the stage to obtain an amplified residual voltage; a backend digitizer that digitizes the amplified residual voltage to generate a digitized residual; and a digital correction circuit that corrects the digitized residual according to which zone the digitized residual is found. | 2015-09-10 |
20150256190 | ANALOG-TO-DIGITAL CONVERSION CIRCUIT - An analog-to-digital conversion circuit includes capacitors coupled to a common line. Each capacitor has a capacitance less than or equal to a capacitance sum of lower order capacitors. Switches selectively supply an analog input signal, a first reference voltage, or a second reference voltage to the capacitors in response to a control signal. A reset switch supplies the common line with a first voltage between the first and second reference voltages. A comparator compares the first voltage with a second voltage at the common line to generate a determination signal. A conversion control circuit generates the control signal and a multiple-bit digital signal based on the determination signal. A measurement control circuit measures the capacitance of the capacitor corresponding to an upper order bit of the digital signal using lower order capacitors. A correction circuit corrects the digital signal based on the measured capacitance to generate a digital output signal. | 2015-09-10 |
20150256191 | CONTROL METHOD OF D/A CONVERTER, D/A CONVERTER, CONTROL METHOD OF A/D CONVERTER, AND A/D CONVERTER - The present invention relates to a control method of a D/A converter, a D/A converter, a control method of an A/D converter, and an A/D converter that can suppress an existing n-th harmonic without using a large-scale circuit, such as a bootstrap. A D/A converter ( | 2015-09-10 |
20150256192 | DIGITAL-TO-ANALOG CONVERTER WITH CORRECTION FOR PARASITIC ROUTING RESISTANCE - An embodiment of a digital-to-analog converter circuit includes a resistor network connected to an output node, a switch network having a first plurality of switches connecting the resistor network to a first circuit node and a second plurality of switches connecting the resistor network to a second circuit node, a voltage reference to supply a reference voltage to the first circuit node, and a current generator connected to the first circuit node and the second circuit node, to generate a compensation current, draw the compensation current from the first circuit node, and supply the compensation current to the second circuit node. The current generator can generate the compensation current as a function of a current or a voltage of a component of the voltage reference or as a function of an analog output voltage produced at the output node. | 2015-09-10 |
20150256193 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A digital-correction-type A/D converter which is a charge sharing type and performing successive approximation is realized in a small area. The A/D converter is configured with an A/D conversion unit which is a charge sharing type and performing successive approximation, a digital correction unit which receives a digital output of the A/D conversion unit and performs digital correction to the digital output, and a holding unit which holds a test signal. A test signal of a common value from the holding unit is inputted into the A/D conversion unit in the first period and the second period. The A/D conversion correction coefficient for the digital correction unit is calculated on the basis of the digital correction result of the digital correction unit in the first period, and the digital correction result of the digital correction unit in the second period. | 2015-09-10 |
20150256194 | ANALOG-TO-DIGITAL CONVERSION APPARATUS AND ANALOG-TO-DIGITAL CONVERSION METHOD - An analog-to-digital conversion apparatus according to the present disclosure includes: a second or higher order ΔΣ analog-to-digital converter which receives input of analog data and generates a digital modulated signal including more significant bits; a cyclic analog-to-digital convertor which receives input of an analog signal and generates a multi-bit digital value of less significant bits, the analog signal being included in the analog data and having not been subjected to ΔΣ processing by the ΔΣ analog-to-digital converter. | 2015-09-10 |
20150256195 | APPARATUS AND METHOD TO ACCELERATE COMPRESSION AND DECOMPRESSION OPERATIONS - Methods and apparatuses relating to an instruction to decode encoded information of a compression scheme are described. In one embodiment, a processor includes a decode unit to decode an instruction, and an execution unit to execute the instruction, the execution unit including a state machine and content addressable memory (CAM) circuitry, the state machine to receive a pointer to a stream of encoded information of a compression scheme, fetch a section of the encoded information, and apply the section of the encoded information to the CAM circuitry to obtain decoded information. | 2015-09-10 |
20150256196 | SOFT DECODING OF POLAR CODES - An apparatus having a circuit and an interface to a nonvolatile memory is disclosed. The circuit is configured to (i) read a plurality of bits in a read channel of the nonvolatile memory. The bits are encoded with a polar code. The circuit is also configured to (ii) generate a plurality of probabilities based on a plurality of log likelihood ratio values of the read channel and (iii) decode the bits based on the probabilities. | 2015-09-10 |