36th week of 2012 patent applcation highlights part 13 |
Patent application number | Title | Published |
20120223390 | TUNNELING FIELD EFFECT TRANSISTOR AND METHOD FOR FORMING THE SAME - The present disclosure provides a TFET, which comprises: a substrate; a channel region formed in the substrate, and a source region and a drain region formed on two sides of the channel region; a gate stack formed on the channel region, wherein the gate stack comprises: a gate dielectric layer, and at least a first gate electrode and a second gate electrode distributed in a direction from the source region to the drain region and formed on the gate dielectric layer, and the first gate electrode and the second gate electrode have different work functions; and a first side wall and a second side wall formed on a side of the first gate electrode and on a side of the second gate electrode respectively. | 2012-09-06 |
20120223391 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - The semiconductor device includes a first transistor including a first impurity layer of a first conductivity type formed in a first region of a semiconductor substrate, a first epitaxial semiconductor layer formed above the first impurity layer, a first gate insulating film formed above the first epitaxial semiconductor layer, and a first gate electrode formed above the first gate insulating film, and a second transistor including a second impurity layer of the second conductivity type formed in a second region of the semiconductor substrate, a second epitaxial semiconductor layer formed above the second impurity layer and having a thickness different from that of the first epitaxial semiconductor layer, a second gate insulating film formed above the second epitaxial semiconductor layer and having a film thickness equal to that of the first gate insulating film and a second gate electrode formed above the second gate insulating film. | 2012-09-06 |
20120223392 | SEMICONDUCTOR DEVICE - A semiconductor device includes a first device region formed over a semiconductor substrate and defined by a device isolation region, a first transistor including a first gate electrode formed over the first device region, a first source region formed in the first device region on a first side of the gate electrode, and a first drain region formed in the first device region on a second side of the first gate electrode, a first pattern formed over the device isolation region on the first side of the first gate electrode in parallel with the first gate electrode, and a first conductor plug connected to the first source region. The first conductor plug is electrically connected to one of a ground line and a power source line, and the first pattern is electrically connected to the other of the ground line and the power source line. | 2012-09-06 |
20120223393 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate having a semiconductor layer, a gate electrode, a source region, a drain region, an element separation insulating film layer and a wiring. The gate electrode include a laminated structure having a gate insulating film formed on the semiconductor layer, a metal or a metallic compound formed on the gate insulating film and a polycrystalline silicon layer formed on the metal or metallic compound. The source region and drain region are formed on a surface portion of the semiconductor substrate and sandwich the gate electrode therebetween. The element separation insulating film layer surrounds the semiconductor layer. The wiring is in contact with the metal or metallic compound of the gate electrode. | 2012-09-06 |
20120223394 | SELF-ALIGNED CONTACT FOR REPLACEMENT METAL GATE AND SILICIDE LAST PROCESSES - A high-K/metal gate semiconductor device is provided with larger self-aligned contacts having reduced resistance. Embodiments include forming a first high-k metal gate stack on a substrate between source/drain regions, a second high-k metal gate stack on an STI region, and a first ILD between the metal gate stacks, forming an etch stop layer and a second ILD sequentially over the substrate, with openings in the second ILD over the metal gate stacks, forming spacers on the edges of the openings, forming a third ILD over the second ILD and the spacers, removing the first ILD over the source/drain regions, removing the etch stop layer, the second ILD, and the third ILD over the source/drain regions, adjacent the spacers, and over a portion of the spacers, forming first trenches, removing the third ILD over the second high-k metal gate stack and over a portion of the spacers, forming second trenches, and forming contacts in the first and second trenches. | 2012-09-06 |
20120223395 | ROM CELL CIRCUIT FOR FINFET DEVICES - The present disclosure provides a read only memory (ROM) cell array. The ROM cell array includes a plurality of fin active regions oriented in a first direction and formed on a semiconductor substrate; a plurality of gates formed on the plurality of fin active regions and oriented in a second direction perpendicular to the first direction; and a plurality of ROM cells formed by the plurality of fin active regions and the plurality of gates, the plurality of ROM cells being coded such that each cell of a first subset of ROM cells has a source electrically connected to a power line, and each cell of a second subset of ROM cells has a source electrically isolated. | 2012-09-06 |
20120223396 | TRANSISTOR WITH REDUCED CHARGE CARRIER MOBILITY AND ASSOCIATED METHODS - One or more embodiments relate to an apparatus comprising: a first transistor including a fin; and a second transistor including a fin, the fin of the first transistor having a lower charge carrier mobility than the fin of the second transistor. | 2012-09-06 |
20120223397 | METAL GATE STRUCTURE AND MANUFACTURING METHOD THEREOF - A method for manufacturing a metal gate structure includes providing a substrate having a high-K gate dielectric layer and a bottom barrier layer sequentially formed thereon, forming a work function metal layer on the substrate, and performing an anneal treatment to the work function metal layer in-situ. | 2012-09-06 |
20120223398 | METHOD FOR MANUFACTURING CONTACT AND SEMICONDUCTOR DEVICE HAVING SAID CONTACT - The present invention relates to a method for manufacturing a contact and a semiconductor device having said contact. The present invention proposes to form first a trench contract of relatively large size, then to form one or more dielectric layer(s) within the trench contact, and then to remove the upper part of the dielectric layer(s) and to fill the same with a conductive material. The use of such a method makes it easy to form a trench contact of relatively large size which is easy for manufacturing; besides, since dielectric layer(s) is/are formed in the trench contact, thence capacitance between a source/drain trench contact and a gate electrode is reduced accordingly. | 2012-09-06 |
20120223399 | SEMICONDUCTOR DEVICE WITH ISOLATION TRENCH LINER - A semiconductor device includes a layer of semiconductor material having an active transistor region defined therein, an isolation trench formed in the semiconductor material adjacent the active transistor region, and a trench liner lining the isolation trench, wherein the trench liner is formed from a material that substantially inhibits formation of high-k material thereon, and wherein the isolation trench and the trench liner together form a lined trench. The device has an insulating material in the lined trench, and high-k gate material overlying at least a portion of the insulating material and overlying at least a portion of the active transistor region, such that the trench liner divides and separates the high-k gate material overlying the at least a portion of the insulating material from the high-k gate material overlying the at least a portion of the active transistor region. | 2012-09-06 |
20120223400 | INFRARED SENSOR DESIGN USING AN EPOXY FILM AS AN INFRARED ABSORPTION LAYER - A MEMS IR sensor, with a cavity in a substrate underlapping an overlying layer and a temperature sensing component disposed in the overlying layer over the cavity, may be formed by forming an IR-absorbing sealing layer on the overlying layer so as to cover access holes to the cavity. The sealing layer is may include a photosensitive material, and the sealing layer may be patterned using a photolithographic process to form an IR-absorbing seal. Alternately, the sealing layer may be patterned using a mask and etch process to form the IR-absorbing seal. | 2012-09-06 |
20120223401 | CAVITY PROCESS ETCH UNDERCUT MONITOR - A MEMS device having a device cavity in a substrate has a cavity etch monitor proximate to the device cavity. An overlying layer including dielectric material is formed over the substrate. A monitor scale is formed in or on the overlying layer. Access holes are etched through the overlying layer and a cavity etch process forms the device cavity and a monitor cavity. The monitor scale is located over a lateral edge of the monitor cavity. The cavity etch monitor includes the monitor scale and monitor cavity, which allows visual measurement of a lateral width of the monitor cavity; the lateral dimensions of the monitor cavity being related to lateral dimensions of the device cavity. | 2012-09-06 |
20120223402 | CAPACITIVE SEMICONDUCTOR PRESSURE SENSOR - A capacitive semiconductor pressure sensor, comprising: a bulk region of semiconductor material; a buried cavity overlying a first part of the bulk region; and a membrane suspended above said buried cavity, wherein, said bulk region and said membrane are formed in a monolithic substrate, and in that said monolithic substrate carries structures for transducing the deflection of said membrane into electrical signals, wherein said bulk region and said membrane form electrodes of a capacitive sensing element, and said transducer structures comprise contact structures in electrical contact with said membrane and with said bulk region. | 2012-09-06 |
20120223403 | INTEGRATED CIRCUIT WITH ELECTROMAGNETIC ENERGY ANOMALY DETECTION AND PROCESSING - An integrated circuit includes an antenna, a die manufactured from a semiconducting material, an RF energy collection and processing means disposed on or within said die and including at least a receiver and a processing means, an input configured to supply power to said RF energy collection and processing means and an output for operative communication by said RF energy collection and processing means. The integrated circuit is configurable and operable to provide at least one of electromagnetic emission anomaly detection, tamper detection, anti-tamper monitoring, degradation monitoring, health monitoring, counterfeit detection, software changes monitoring, firmware changes monitoring and monitoring of other RF energy anomalies. | 2012-09-06 |
20120223404 | DETECTION MATRIX WITH IMPROVED BIASING CONDITIONS AND FABRICATION METHOD - The detection device includes a semiconductor substrate of a first conductivity type. A matrix of photodiodes organized along a first organization axis is formed on the substrate. Each photodiode is at least partially formed in the substrate. A peripheral biasing ring is formed around the photodiode matrix. The biasing ring is connected to a bias voltage generator. An electrically conducting contact is connected to the substrate and arranged between two photodiodes on the first organization axis. The distance separating the contact from each of the two photodiodes is equal to the distance separating two adjacent photodiodes along the first organization axis. The contact is connected to the bias voltage generator. | 2012-09-06 |
20120223405 | SOLID-STATE IMAGING DEVICE - A solid-state imaging device includes a substrate, a photoelectric conversion section, a first impurity layer having a carrier polarity of a second conductivity type, a charge-to-voltage converting section, an amplifying section, and a second impurity layer having a carrier polarity of the second conductivity type. The second impurity layer is disposed in a region between the photoelectric conversion section and the amplifying section. The second impurity concentration of the second P-type impurity layer is made higher than the first impurity concentration of the first impurity layer. | 2012-09-06 |
20120223406 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a semiconductor substrate, an insulating film, a heat conductive member, and an element. A cavity and a connecting hole are formed in the semiconductor substrate. The connecting hole spatially connects the cavity to an upper face of the semiconductor substrate. The insulating film is provided on inner faces of the cavity and the connecting hole. The heat conductive member is embedded in the cavity and the connecting hole. Heat conductivity of the heat conductive member is higher than heat conductivity of the insulating film. And, the element is formed in a region immediately above the cavity in the semiconductor substrate. | 2012-09-06 |
20120223407 | Superior Integrity of High-K Metal Gate Stacks by Capping STI Regions - When forming high-k metal gate electrode structures in an early manufacturing stage, integrity of an encapsulation and, thus, integrity of sensitive gate materials may be improved by reducing the surface topography of the isolation regions. To this end, a dielectric cap layer of superior etch resistivity is provided in combination with the conventional silicon dioxide material. | 2012-09-06 |
20120223408 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - A method for fabricating a semiconductor device includes: providing a substrate; forming a plurality of trenches by etching the substrate; forming a first isolation layer by filling the plurality of the trenches with a first insulation layer; recessing the first insulation layer filling a first group of the plurality of the trenches to a predetermined depth; forming a liner layer over the first group of the trenches with the first insulation layer recessed to the predetermined depth; and forming a second isolation layer by filling the first group of the trenches, where the liner layer is formed, with a second insulation layer. | 2012-09-06 |
20120223409 | Integrated circuit structures, semiconductor structures, and semiconductor die - Methods for fabricating integrated circuit devices on an acceptor substrate devoid of circuitry are disclosed. Integrated circuit devices are formed by sequentially disposing one or more levels of semiconductor material on an acceptor substrate, and fabricating circuitry on each level of semiconductor material before disposition of a next-higher level. After encapsulation of the circuitry, the acceptor substrate is removed and semiconductor dice are singulated. Integrated circuit devices formed by the methods are also disclosed. | 2012-09-06 |
20120223410 | REGION-DIVIDED SUBSTRATE, SEMICONDUCTOR DEVICE HAVING REGION-DIVIDED SUBSTRATE, AND METHOD FOR MANUFACTURING THE SAME - A region-divided substrate includes: a substrate having a first surface and a second surface opposite to the first surface and having a plurality of partial regions, which are divided by a plurality of trenches, wherein each trench penetrates the substrate from the first surface to the second surface; a conductive layer having an electrical conductivity higher than the substrate and disposed on a sidewall of one of the plurality of partial regions from the first surface to the second surface; and an insulator embedded in each trench. | 2012-09-06 |
20120223411 | STRIPED ON-CHIP INDUCTOR - Sub-100 nanometer semiconductor devices and methods and program products for manufacturing devices are provided, in particular inductors comprising a plurality of spaced parallel metal lines disposed on a dielectric surface and each having width, heights, spacing and cross-sectional areas determined as a function of Design Rule Check rules. For one planarization process rule a metal density ratio of 80% metal to 20% dielectric surface is determined and produced. In one example a sum of metal line spacing gaps is less than a sum of metal line interior sidewall heights. In one aspect at least one of line height, width and line spacing dimensions is selected to optimize one or more chip yield, chip performance, chip manufacturability and inductor Q factor parameters. | 2012-09-06 |
20120223412 | Semiconductor Device Comprising a Capacitor Formed in the Metallization System Based on Dummy Metal Features - When forming capacitive structures in a metallization system, such as in a dynamic RAM area, placeholder metal regions may be formed together with “regular” metal features, thereby achieving a very efficient overall process flow. At a certain manufacturing stage, the metal of the placeholder metal region may be removed on the basis of a wet chemical etch recipe followed by the deposition of the electrode materials and the dielectric materials for the capacitive structure without unduly affecting other portions of the metallization system. In this manner, very high capacitance values may be realized on the basis of a very efficient overall manufacturing flow. | 2012-09-06 |
20120223413 | SEMICONDUCTOR STRUCTURE HAVING A CAPACITOR AND METAL WIRING INTEGRATED IN A SAME DIELECTRIC LAYER - Semiconductor structures having capacitors and metal wiring integrated in a same dielectric layer are described. For example, a semiconductor structure includes a plurality of semiconductor devices disposed in or above a substrate. One or more dielectric layers are disposed above the plurality of semiconductor devices. Metal wiring is disposed in each of the dielectric layers. The metal wiring is electrically coupled to one or more of the semiconductor devices. A metal-insulator-metal (MIM) capacitor is disposed in one of the dielectric layers, adjacent to the metal wiring of the at least one of the dielectric layers. The MIM capacitor is electrically coupled to one or more of the semiconductor devices. | 2012-09-06 |
20120223414 | METHODS FOR INCREASING BOTTOM ELECTRODE PERFORMANCE IN CARBON-BASED MEMORY DEVICES - In some aspects, a method of forming a reversible resistance-switching metal-insulator-metal (“MIM”) stack is provided, the method including: forming a first conducting layer comprising a titanium nitride material having between about 50% Ti and about 95% Ti, forming a carbon nano-tube (CNT) material above the first conducting layer, forming a second conducting layer above the CNT material, and etching the first conducting layer, CNT material and second conducting layer to form the MIM stack. Numerous other aspects are provided. | 2012-09-06 |
20120223415 | IGBT Power Semiconductor Package Having a Conductive Clip - According to one disclosed embodiment, a power semiconductor package includes an insulated-gate bipolar transistor (IGBT) residing on a package substrate, where the IGBT includes a plurality of solderable front metal (SFM) coated emitter segments situated atop the IGBT and connected to an emitter of the IGBT. The power semiconductor package also includes a conductive clip coupling the plurality of SFM coated emitter segments to an emitter pad on the package substrate. Additionally, the power semiconductor package includes a gate pad on the package substrate coupled to a gate of the IGBT, a collector pad on the package substrate situated under the IGBT and coupled to a collector of the IGBT, and an emitter terminal, a collector terminal and a gate terminal of the package substrate that are routed to the emitter pad, collector pad, and gate pad, respectively. | 2012-09-06 |
20120223416 | THIN-FILM SEMICONDUCTOR COMPONENT WITH PROTECTION DIODE STRUCTURE AND METHOD FOR PRODUCING A THIN-FILM SEMICONDUCTOR COMPONENT - A thin-film semiconductor component includes a carrier and a semiconductor body with a semiconductor layer sequence including an active region provided to generate radiation. The semiconductor body is externally electrically contactable by a first contact and a second contact. The carrier includes a protection diode structure connected electrically in parallel to the semiconductor body. The protection diode structure includes a first diode and a second diode. The first diode and the second diode are electrically connected in series in mutually opposing directions with regard to their forward direction. | 2012-09-06 |
20120223417 | GROUP III NITRIDE CRYSTAL SUBSTRATE, EPILAYER-CONTAINING GROUP III NITRIDE CRYSTAL SUBSTRATE, SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A group III nitride crystal substrate is provided wherein, a uniform distortion at a surface layer of the crystal substrate is equal to or lower than 1.9×10 | 2012-09-06 |
20120223418 | SOLUTION PROCESSIBLE HARDMASKS FOR HIGH RESOLUTION LITHOGRAPHY - Solution processible hardmasks are described that can be formed from aqueous precursor solutions comprising polyoxometal clusters and anions, such as polyatomic anions. The solution processible metal oxide layers are generally placed under relatively thin etch resist layers to provide desired etch contrast with underlying substrates and/or antireflective properties. In some embodiments, the metal oxide hardmasks can be used along with an additional hardmask and/or antireflective layers. The metal oxide hardmasks can be etched with wet or dry etching. Desirable processing improvements can be obtained with the solution processible hardmasks. | 2012-09-06 |
20120223419 | METHOD FOR CONTROLLING THE DISTRIBUTION OF STRESSES IN A SEMICONDUCTOR-ON-INSULATOR TYPE STRUCTURE AND CORRESPONDING STRUCTURE - A method for controlling the distribution of the stresses in a structure of the semiconductor-on-insulator type during its manufacturing, which includes a thin layer of semiconducting material on a supporting substrate and an insulating layer present on each of the front and rear faces of the supporting substrate, with the insulating layer on the front face forming at least one portion of a thick buried insulator (BOX) layer. The method includes the adhesive bonding of the thin layer onto the supporting substrate. Prior to this adhesive bonding, the insulating layer on the rear face of the supporting substrate is covered with a distinct material that is capable of withstanding deoxidation. The covering material, in combination with this insulating layer on the rear face of the supporting substrate, at least partly compensates for the stress exerted by the buried insulator (BOX) on the supporting substrate. | 2012-09-06 |
20120223420 | SEMICONDUCTOR BODY WITH A BURIED MATERIAL LAYER - One aspect includes a semiconductor arrangement with a semiconductor body having a first surface. A buried material layer is in the semiconductor body, the buried material layer being arranged distant to the first surface. A monocrystalline semiconductor material is arranged between the material layer and the first surface, and a monocrystalline semiconductor material adjoins the material layer in a lateral direction of the semiconductor body. | 2012-09-06 |
20120223421 | DOUBLE TRENCH RECTIFIER - A high power density or low forward voltage rectifier which utilizes at least one trench in both the anode and cathode. The trenches are formed in opposing surfaces of the substrate, to increase the junction surface area per unit surface area of the semiconductor die. This structure allows for increased current loads without increased horizontal die space. The increased current handling capability allows for the rectifier to operate at lower forward voltages. Furthermore, the present structure provides for increased substrate usage by up to 30 percent. | 2012-09-06 |
20120223422 | APPARATUS AND METHODS FOR REDUCING IMPACT OF HIGH RF LOSS PLATING - To reduce the radio frequency (RF) losses associated with high RF loss plating, such as, for example, Nickel/Palladium/Gold (Ni/Pd/Au) plating, an on-die passive device, such as a capacitor, resistor, or inductor, associated with a radio frequency integrated circuit (RFIC) is placed in an RF upper signal path with respect to the RF signal output of the RFIC. By placing the on-die passive device in the RF upper signal path, the RF current does not directly pass through the high RF loss plating material of the passive device bonding pad. | 2012-09-06 |
20120223423 | Lead Frame Strip with Rails Having Bow Reducing Ribs - A lead frame strip includes an array of sites connected to two side rails which traverse the lead frame strip on two opposite sides. Each site includes a die pad for affixing a semiconductor die and leads for enabling electrical communication between the semiconductor die and a workpiece. Each site is further connected to the two side rails by a sub-rail, which extends between the two side rails. The sub-rail includes a flat portion and a raised or indented rib protruding from the flat portion. The rib has a long dimension parallel to the sub-rail. | 2012-09-06 |
20120223424 | SEMICONDUCTOR COMPONENT AND PRODUCTION METHOD - Semiconductor component and method for production of a semiconductor component. The invention relates to a semiconductor component having a semiconductor chip, which is arranged on a substrate, in one embodiment on a chip carrier, and an encapsulation material, which at least partially surrounds the semiconductor chip. The chip carrier is at least partly provided with a layer of polymer foam. | 2012-09-06 |
20120223425 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - A semiconductor structure includes a chip, a plurality of metal posts disposed in the chip and a buffer layer disposed on the chip. The chip includes a silicon-based layer having opposite first and second surfaces, and a build-up structure formed on the first surface of the silicon-based layer consisting of at least a metal layer and a low-k dielectric layer alternatively stacked on one another. Each of the metal posts is disposed in the silicon-based layer with one end thereof electrically connected with the metal layer while the other end is exposed from the second surface of the silicon-based layer. The buffer layer is disposed on the build-up structure. By positioning the low-k dielectric layer far from the second surface that is used for connecting to an external electronic component, the present invention reduces the overall thermal stress. | 2012-09-06 |
20120223426 | Semiconductor Device and Method of Forming Stress Relief Layer Between Die and Interconnect Structure - A semiconductor device is made by forming a first conductive layer over a sacrificial carrier. A conductive pillar is formed over the first conductive layer. An active surface of a semiconductor die is mounted to the carrier. An encapsulant is deposited over the semiconductor die and around the conductive pillar. The carrier and adhesive layer are removed. A stress relief insulating layer is formed over the active surface of the semiconductor die and a first surface of the encapsulant. The stress relief insulating layer has a first thickness over the semiconductor die and a second thickness less than the first thickness over the encapsulant. A first interconnect structure is formed over the stress relief insulating layer. A second interconnect structure is formed over a second surface of encapsulant opposite the first interconnect structure. The first and second interconnect structures are electrically connected through the conductive pillar. | 2012-09-06 |
20120223427 | FLIP CHIP PACKAGE - A flip chip package may include a substrate, a semiconductor chip, main bump structures and auxiliary bump structures. The substrate has a circuit pattern. The semiconductor chip is arranged over the substrate. The semiconductor chip includes a body having semiconductor structures, main pads electrically connected to the semiconductor structures to mainly control the semiconductor structures, and auxiliary pads electrically connected to the semiconductor structures to provide auxiliary control of the semiconductor structures. The main bump structures are interposed between the semiconductor chip and the substrate to electrically connect the circuit pattern with the main pads. The auxiliary bump structures can be interposed between the semiconductor chip and the substrate to electrically connect the circuit pattern with the auxiliary pads. | 2012-09-06 |
20120223428 | Semiconductor Device and Method of Forming Vertical Interconnect Structure Between Semiconductor Die and Substrate - A semiconductor device has a semiconductor die and substrate with a plurality of stud bumps formed over the semiconductor die or substrate. The stud bumps include a base portion and stem portion extending from the base portion. The stud bumps include a non-fusible material or fusible material. The semiconductor die is mounted to the substrate with the stud bumps electrically connecting the semiconductor die to the substrate. A width of the base portion is greater than a mating conductive trace formed on the substrate. Alternatively, a vertical interconnect structure, such as a conductive column, is formed over the semiconductor die or substrate. The conductive column can have a tapered sidewall or oval cross sectional area. An underfill material is deposited between the semiconductor die and substrate. The semiconductor die includes a flexible property. The vertical interconnect structure includes a flexible property. The substrate includes a flexible property. | 2012-09-06 |
20120223429 | Package 3D Interconnection and Method of Making Same - An integrated circuit (IC) package has a package member having a first surface and a second surface opposite the first surface. A first plurality of contact members is physically and electrically fixed to the second surface. An interposer substrate having a second plurality of contact members on one surface thereof which make physical and electrical contact with respective ones of the first plurality of contact members. The interposer substrate is configured to have at least one circuit member mounted to a second surface thereof opposite the one surface thereof. | 2012-09-06 |
20120223430 | SOLDER BALL FOR SEMICONDUCTOR PACKAGING AND ELECTRONIC MEMBER USING THE SAME - The present invention relates to a solder ball for semiconductor packaging and an electronic member having such solder ball. Specifically there are provided: a solder ball capable of ensuring a sufficient thermal fatigue property even when a diameter thereof is not larger than 250 μm as observed in recent years; and an electronic member having such solder ball. More specifically, there are provided: a solder ball for semiconductor packaging that is made of a solder alloy containing Sn as a main element, 0.1-2.5% Ag by mass, 0.1-1.5% Cu by mass and at least one of Mg, Al and Zn in a total amount of 0.0001-0.005% by mass, such solder ball having a surface including a noncrystalline phase that has a thickness of 1-50 nm and contains at least one of Mg, Al and Zn, O and Sn, and an electronic member having such solder ball. | 2012-09-06 |
20120223431 | THROUGH-SILICON VIA AND METHOD FOR FORMING THE SAME - A through-silicon via and a method for forming the same are provided. The method includes: providing a semiconductor substrate, the semiconductor substrate including an upper surface and an opposite lower surface; etching the upper surface of the semiconductor substrate to form an opening; filling the opening with a conductive material to form a first nail; etching the lower surface of the semiconductor substrate to form a recess, such that the first nail is exposed at a bottom of the recess; filling the recess with a conductive material that can be etched, and etching the conductive material that can be etched to form a second nail, such that the second nail is vertically connected with the first nail; and filling a gap between the second nail and the semiconductor substrate and a gap between the second nail and an adjacent second nail with a dielectric layer. Then invention can improve the reliability of through-silicon vias and avoid voids. | 2012-09-06 |
20120223432 | MOISTURE BARRIER FOR A WIRE BOND - An electronic device comprising a bond pad on a substrate and a wire bonded to the bond pad. The device further comprises an intermetallic compound interface located between the bond pad and the wire and a silicon nitride or silicon carbonyl layer covering the intermetallic compound interface | 2012-09-06 |
20120223433 | SEMICONDUCTOR PACKAGE INCLUDING CONNECTING MEMBER HAVING CONTROLLED CONTENT RATIO OF GOLD - A semiconductor package including connecting members having a controlled content ratio of gold capable of increasing durability and reliability by preventing an intermetallic compound having high brittleness from being formed. The semiconductor package includes a base substrate; a first semiconductor chip disposed on the base substrate; and a first connecting member for electrically connecting the base substrate and the first semiconductor chip, and comprising a first bonding portion that includes gold and has a first content ratio of gold that is controlled to prevent an intermetallic compound of AuSn | 2012-09-06 |
20120223434 | CO-AXIAL RESTRAINT FOR CONNECTORS WITHIN FLIP-CHIP PACKAGES - An assembly can include a microelectronic element such as, for example, a semiconductor element having circuits and semiconductor devices fabricated therein, and a plurality of electrical connectors, e.g., solder balls attached to contacts of the microelectronic element. The connectors can be surrounded by first, inner regions | 2012-09-06 |
20120223435 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: forming a base package having a base integrated circuit over a base substrate; stacking a mountable device over the base package with a flow channel between the mountable device and the base package; and forming an external lead having a lead platform and a lead leg, the lead platform extending from the mountable device and the lead leg parallel to the base package. | 2012-09-06 |
20120223436 | SEMICONDUCTOR DEVICE AND STRUCTURE FOR HEAT REMOVAL - A semiconductor device comprising power distribution wires wherein; a portion of said wires have thermal connection to the semiconductor layer and said thermal connection designed to conduct heat but to not conduct electricity. | 2012-09-06 |
20120223437 | Semiconductor Device Comprising Metallization Layers of Reduced Interlayer Capacitance by Reducing the Amount of Etch Stop Materials - Upon forming a complex metallization system, the parasitic capacitance between metal lines of adjacent metallization layers may be reduced by providing a patterned etch stop material. In this manner, the patterning process for forming the via openings may be controlled in a highly reliable manner, while, on the other hand, the resulting overall dielectric constant of the metallization system may be reduced, thereby also significantly reducing the parasitic capacitance between stacked metal lines. | 2012-09-06 |
20120223438 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device according to an embodiment includes: a semiconductor substrate; a plurality of interconnect layers disposed at different heights from the semiconductor substrate, each interconnect layer including an interconnection formed therein; and a via formed in a columnar shape extending in the stack direction of the interconnect layers, the via electrically connecting the interconnections of the different interconnect layers, the interconnections including an intermediate interconnection in contact with the via in the intermediate portion thereof, and the intermediate interconnection including a first type intermediate interconnection passing through the via in a direction perpendicular to the stack direction and in contact with the via on the top surface, bottom surface, and both side surfaces thereof. | 2012-09-06 |
20120223439 | TWO-TRACK CROSS-CONNECT IN DOUBLE-PATTERNED STRUCTURE USING RECTANGULAR VIA - An integrated circuit may be formed by forming a first interconnect pattern in a first plurality of parallel route tracks, and forming a second interconnect pattern in a second plurality of parallel route tracks, in which the second plurality of route tracks are alternated with the first plurality of route tracks. The first interconnect pattern includes a first lead pattern and the second interconnect pattern includes a second lead pattern, such that the route track containing the first lead pattern is immediately adjacent to the route track containing the second lead pattern. Metal interconnect lines are formed in the first interconnect pattern and the second interconnect pattern. A stretch crossconnect is formed in a vertical connecting level, such as a via or contact level, which electrically connects only the first lead and the second lead. The stretch crossconnect is formed concurrently with other vertical interconnect elements. | 2012-09-06 |
20120223440 | METHOD OF MANUFACTURING THREE-DIMENSIONAL INTEGRATED CIRCUIT AND THREE-DIMENSIONAL INTEGRATED CIRCUIT APPARATUS - In a three-dimensional integrated circuit apparatus | 2012-09-06 |
20120223441 | STACKED SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - In an embodiment, a first semiconductor wafer having plural first chip areas sectioned by first dicing grooves, and first photosensitive surface protection and adhesive layers provided at each of circuit surfaces of the plural first chip areas is prepared. A second semiconductor wafer having plural second chip areas sectioned by second dicing grooves, and second photosensitive surface protection and adhesive layers provided at each of circuit surfaces of the plural second chip areas is stacked with the first semiconductor wafer via the second photosensitive surface protection and adhesive layers to form plural chip stacked bodies of the first chip areas and the second chip areas. | 2012-09-06 |
20120223442 | Method for Manufacturing an Electronic Device - During manufacture of an electronic device, an aerogel coating is applied to a first side of an IC substrate of a first IC. A bonding procedure is initiated, during which IC interconnects are either placed on the coated side of the substrate or on the opposite side of the substrate. The first IC is connected on a carrier to a second IC with the coated side of the first IC facing the second IC to reduce heat transmission to the second IC during operation of the first IC. The aerogel coating reduces thermal stress to the circuit board and surrounding components, reduces the risk of overheating of critical circuit components, provides chemical and mechanical insulation from contamination during subsequent wafer handling operations, and provides a thermal isolator between IC regions of dissimilar power dissipation, which isolator facilitates efficient thermal extraction from localized hotspots. | 2012-09-06 |
20120223443 | ACTIVE MATRIX SUBSTRATE - An active matrix substrate includes a substrate and an insulating unit arranged on the substrate. The substrate includes a display region and a periphery circuit region beside the display region. The periphery circuit region has at least a chip connecting unit. Each chip connecting unit includes a number of connecting elements. Each of the connecting elements includes a conducting pad and a wire electrically connected to the conducting pad. The conducting pads of the connecting elements are arranged in at least two rows. The insulating unit has a number of contact holes corresponding to the conducting pads so that each of the conducting pads is entirely exposed by the corresponding contact hole. The active matrix substrate is applied to a display device to increase reliability of the display device and improve the quality of the display device. | 2012-09-06 |
20120223444 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An electronic device includes: a substrate having first and second surfaces, wherein the first surface is opposite to the second surface; a first electronic element mounted on the first surface of the substrate; a second electronic element mounted on the second surface of the substrate; and a resin mold sealing the first electronic element and the first surface of the substrate. The resin mold further seals the second electronic element on the second surface of the substrate. The second surface of the substrate has a portion, which is exposed from the resin mold. The second electronic element is not disposed on the portion of the second surface. | 2012-09-06 |
20120223445 | SEMICONDUCTOR DEVICE COMPRISING A DIE SEAL HAVING AN INTEGRATED ALIGNMENT MARK - In semiconductor devices, the alignment mark for performing alignment processes of measurement tools and the like may be positioned within the die seal area on the basis of a geometric configuration, which still preserves mechanical integrity of the die seal without compromising the spatial information encoded into the alignment marks. For example, L-shaped alignment marks may be provided at one or more corners of the die seal area. | 2012-09-06 |
20120223446 | WATER-CARRYING LINE SECTION HAVING AN AERATING DUCT - A water-carrying line section having at least one aerating duct ( | 2012-09-06 |
20120223447 | CONTACT REACTION TOWER - A contact reaction tower, including: a central cylinder; and an outer cylinder. Lift pipes and a water inlet pipe(s) are installed in the central cylinder, reflux windows are formed on the wall of the central cylinder, and the water flow circulation between the central cylinder and the outer cylinder is realized through the lift pipes, the water inlet pipe(s), and the reflux windows, such that the water flow internal circulation of the whole contact reaction tower is realized. The contact reaction tower is sealed in its entirety from the outside environment, and a gas guide pipe is installed at the top of the contact reaction tower. | 2012-09-06 |
20120223448 | Method for producing beta-sialon phosphor - Provided is a production method of a β-sialon phosphor that europium ions are solid-solved in β-sialon, including a mixing process for mixing raw materials of the β-sialon phosphor; a burning process for burning the raw materials after the mixing process to form the β-sialon phosphor; a HIP treatment process in which the β-sialon phosphor after the burning process is subjected to a HIP treatment; an annealing process in which the β-sialon phosphor after the HIP treatment process is subjected to an annealing treatment; and an acid treatment process in which the β-sialon phosphor after the annealing process is subjected to an acid treatment. According to the production method of a β-sialon phosphor, a β-sialon phosphor excellent in luminescence intensity is obtained. | 2012-09-06 |
20120223449 | TRANSPARENT ALUMINA CERAMICS WITH ORIENTED GRAINS AND PREPARATION METHOD THEREOF - A kind or transparent alumina ceramics is disclosed herein, the optical axes of all or part or the crystal grains of the transparent alumina ceramics are arranged in a direction, which makes the transparent alumina ceramics have orientation. | 2012-09-06 |
20120223450 | Systems and Methods For Forming High Performance Compressible Objects - The present systems and methods utilize a polyamic acid solution as a precursor to form a polyimide bead having desired properties. The polyamic acid solution may be formed into a polyamic acid droplet. The polyamic acid droplet is then processed to form a polyamic acid bead, such as by extraction of solvent to concentrate the polyamic acid or by partial chemical imidization of the polyamic acid. The polyamic acid bead is then better able to retain its shape during subsequent processing steps, such as drying and pressurizing, before final thermal imidization. | 2012-09-06 |
20120223451 | SYSTEM AND METHOD FOR EXTRUDING PARTS HAVING MICROSTRUCTURES - A manufacturing apparatus for manufacturing extruded parts having microstructures comprising: a support structure; a hopper carried by the support structure for receiving feedstock; an extrusion chamber operatively associated with the hopper for receiving the feedstock from the hopper and melting the feedstock above a feedstock melting temperature; a die carried by the support structure having die microstructures disposed on an inner surface of the die, the die microstructures having a plurality of microfeatures each having an upper surface and a lower surface, the melted feedstock being forced through the die to produce an extrudate having extrudate microstructures; and, a cooling assembly wherein the extrudate microstructures of the pre-cooled extrudate have larger physical dimensions than that of the extrudate microstructures of the cooled extrudate. | 2012-09-06 |
20120223452 | METHOD OF FILLING A CASING - Foam filling a cavity in a joint between insulated pipe lengths by wrapping a fibre reinforced plastic mold sheet around the cavity or applying a casing around the cavity, with a securing element supplied on the mold sheet to resist separating movements of the ends of the mold sheet or one or more flexible tensile members wrapped around the casing, to resist ballooning of the casing on expansion of a foam filling introduced into the mold or into the casing. | 2012-09-06 |
20120223453 | TRANSPARENT OR TRANSLUCENT EXTRUDED POLYAMIDE - The invention relates to a process for forming an extruded transparent or translucent polyamide article including melt calendering to improve the physical properties and optical clarity. The polyamide article is a sheet, film, or profile. | 2012-09-06 |
20120223454 | MOLD AND MANUFACTURING METHOD THEREOF - The object of the invention is to provide a mold that is capable of high-precision, stable patterning, and improved in terms of handleability as well, and a manufacturing method thereof. The mold of the invention has a pattern-formation surface defined by one surface, wherein the pattern-formation layer has a projection-and-depression structure area for patterning, and a base surface defined by another surface. At least the pattern-formation layer and the base surface each comprise a polydimethylsiloxane layer. Given a low-molecular-weight siloxane of a cyclic structure represented by [—Si(CH | 2012-09-06 |
20120223455 | METHOD FOR MANUFACTURING THIN-FILM SUBSTRATE - The present invention provides a manufacturing method for efficiently and stably forming a pattern on a thin-film substrate. The method for manufacturing the thin-film substrate includes: stacking the thin-film substrate, a tackiness/adhesive agent for temporary fixing and a hard substrate in this order; fixing the thin-film substrate on the hard substrate through the tackiness/adhesive agent; then forming the pattern; and subsequently peeling the thin-film substrate at an interface between the thin-film substrate and the tackiness/adhesive agent. | 2012-09-06 |
20120223456 | MOLDING DEVICE FOR RECEIVING FIBERS AND A RESIN BY INJECTION - The invention relates to a molding device ( | 2012-09-06 |
20120223457 | METHOD TO MANUFACTURE A SENSOR - A method to manufacture a sensor is provided and includes forming a foamed core of a first material with a hole defined therein, inserting a rod into the hole, filling the core with a slurry of a second material and curing the second material. | 2012-09-06 |
20120223458 | METHOD OF MAKING MULTILAYER CONTAINER - This invention relates to a method of making a multilayer container which comprises:
| 2012-09-06 |
20120223459 | Process for Preparing a Heat Resistant Polylactic Acid Foamed Article - Some embodiments of the present invention provides a method of preparing a thermoformed article composed of polylactic acid that includes the steps of providing a foam sheet comprising polylactic acid having a D-lactic acid stereo-isomer content that is about 3 mole % or less, exposing the sheet to a temperature of at least about 190° C., and forming the heated sheet in a mold at a mold temperature that is at least about 50° C. and for a length of time to form a thermoformed article having a PLA crystalline content of at least about 10%. Surprisingly, it has been discovered that heat resistant thermoformed articles can be prepared in accordance with embodiments of the invention wherein the time required for forming the foam sheet into a molded article is less than about 10 seconds. | 2012-09-06 |
20120223460 | IMPRINT LITHOGRAPHY APPARATUS AND METHOD - A lithographic apparatus is disclosed that includes an imprint template holder configured to hold an imprint template, and a dispensing mechanism of polar molecules, wherein the dispensing mechanism of polar molecules is configured to provide polar molecules into a local environment in the vicinity of the imprint template, such that the concentration of polar molecules in the local environment in the vicinity of the imprint template is greater than the concentration of polar molecules in other parts of the lithographic apparatus. | 2012-09-06 |
20120223461 | IMPRINTING DEVICE AND IMPRINTING METHOD - The present invention provides an imprinting device and an imprinting method which can uniformly apply pressure between a mold and a molding object and which can increase and decrease a temperature at a fast speed. An imprinting device is for transferring a pattern on a mold to a film molding object, and comprises a stage for holding the mold, a pressurizing-chamber casing which configures a pressurizing-chamber together with the molding object, sealing means which airtightly seals a space between the pressurizing-chamber casing and the molding object, opening and closing means which opens and closes the space between the pressurizing-chamber casing and the molding object, pressurizing means which adjusts atmospheric pressure in the pressurizing-chamber, heating means which heats either one of or both of the mold and the molding object, and degassing means which eliminates any gas present between the mold and the molding object. | 2012-09-06 |
20120223462 | Laser build up method using vibration and apparatus - A laser built up method on an object with different surfaces is provided. The object can be coated locally, which is not possible by the conventional rapid prototyping processes. The object is put into a powder bed, powder is provided on or near the object and the powder is only locally provided on the upper outer surface of the object and then densified. | 2012-09-06 |
20120223463 | METHOD FOR VULCANIZING VEHICLE TIRES USING A HEATING PRESS - Method and device for vulcanizing vehicle tires using a heating press and a heating bladder. The method includes positioning a tire blank in the heating press, feeding steam into the heating bladder, stopping the supply of steam into the heating bladder, raising an internal pressure in the heating bladder to a predetermined setpoint value by feeding nitrogen into the heating bladder, and consistently maintaining the internal pressure of the heating bladder at the predetermined setpoint value through a pulsating input of nitrogen into the heating bladder occurring at least temporarily over a specific time. | 2012-09-06 |
20120223464 | Blow molding machine with clean room and sterilizably connected components - A device for transforming parisons into containers with a plurality of transforming stations which are disposed on a movable carrier, wherein the transforming stations each have blow molds, within which the parisons can be transformed into containers by a supply of a flowable medium, and blow mold supports for holding these blow molds, wherein the blow mold supports have at least two blow mold support parts which are movable relative to one another for opening and closing the blow molds, with a clean room which is demarcated with respect to the surroundings by means of at least one wall and which at least partially surrounds the individual transforming stations, so that the transforming stations are movable within this clean room, and with at least one supply unit in order to supply flowable sterilising medium to at least one region of the transforming stations which are movable within the clean room. | 2012-09-06 |
20120223465 | STERILE BLOW MOULDING MACHINE WITH NON-STERILE MEDIA SUPPLY - An apparatus for the shaping of plastics material pre-forms into plastics material containers, with a plurality of shaping stations which are arranged on a movable carrier, wherein the shaping stations have blow moulds which are used for receiving the plastic pre-forms and inside which the plastic pre-forms are shaped into the plastic containers, and wherein the shaping stations have stressing devices which are movable relative to the plastic pre-forms and which act upon the pre-forms arranged in the blow moulds with a sterile flowable medium to expand them, with a clean room, inside which the shaping stations are conveyed, wherein this clean room is arranged or demarcated from the environment by means of at least one wall. At least one supply device is provided for supplying a flowable control medium to at least one shaping station), wherein this supply device ( | 2012-09-06 |
20120223466 | DEVICE FOR HEAT-TREATING SHEET METAL STRIPS - A device is described for heat-treating sheet metal strips ( | 2012-09-06 |
20120223467 | WORKPIECE SUPPORT - A workpiece support, including: first and second arms pivotably connected to first and second support members respectively, the first and second support members being spaced apart, each arm including first and second receiving members for receiving the workpiece, the first and second receiving members being provided at first and second ends of each arm respectively, wherein each arm is pivotably connected to the respective first and second support members at a point between the first and second ends of each arm, such that a workpiece may be supported by the first and second receiving members of the first arm and the first and second receiving members of the second arm. | 2012-09-06 |
20120223468 | DEVICE FOR HANDLING WORKPIECES - The device is used to retain workpieces, has a tong-like design, and is provided with two tong arms. The tong arms are retained by a tong base and can be arranged at least in an open position and in a closed position. The tong base is retained by a main element. When a specified actuating force is applied, the tong base is released and can be pivoted relative to the main element within a certain range. Respectively one movable counter-element is arranged adjacent to two lateral surfaces of the tong base. The counter-elements are retained in a starting position by means of at least one spring. | 2012-09-06 |
20120223469 | MACHINE TOOL HAVING A WORKPIECE TABLE - A machine tool having a machine frame and a workpiece table. It is provided that the workpiece table ( | 2012-09-06 |
20120223470 | SHEET PROCESSING DEVICE, IMAGE FORMING SYSTEM, AND SHEET PROCESSING METHOD - A sheet processing device provided with a stacking unit configured to stack thereon one or more conveyed sheets, a staple unit configured to staple a bundle of sheets stacked on the stacking unit, a moving unit configured to move the staple unit to a staple position, and a projecting and retrieving unit configured to project and retrieve the stacking unit in a space overlapped with a motion space for the staple unit to move therein. | 2012-09-06 |
20120223471 | IMAGE FORMING APPARATUS - An image forming apparatus includes a main body. The main body includes an image forming unit configured to form an image on a medium, and a media conveyance mechanism configured to convey the medium to the image forming unit. A media conveyance unit is attached to the main body and is configured to convey the medium to the media conveyance mechanism. A media retreat path is defined by opposed surfaces of the media conveyance unit and the main body which are opposed to each other. The media retreat path is configured to receive at least a part of the medium being retreated. The media retreat path inclines in a way that a height level of the media retreat path gradually becomes lower from its entrance side to its back-end side. | 2012-09-06 |
20120223472 | SYSTEMS AND METHODS FOR FEEDING SINGLE SHEETS - A sheet feeder for feeding a single sheet of sheet material is disclosed. The sheet feeder can utilize a specially designed cutout and a suction cup to feed difficult, thin, or flimsy material one sheet at the time. The cutout can be located on a shuttle table, endless belt, or carousel, for example, and can be used in conjunction with one or more suctions cups. The cutout can be angled with respect to the sheet so that the leading edge of the sheet is substantially supported. A slot in the cutout can enable the suction cup to pull down the corner of the sheet. The slot can then continue to slice, or peel, the sheet of the bottom of a stack of sheets. The ability to pull only the corner of the sheet down initially prevents stiction from a variety of sources and enables a single sheet to be pulled from the stack. | 2012-09-06 |
20120223473 | SHEET LOADING UNIT AND SHEET HANDLING APPARATUS INCLUDING THE SAME - A sheet loading and handling apparatus that suppress anomalies in sheet supply operation and feed sheets in a stable manner is disclosed. The sheet loading unit includes a supply mechanism that moves a plurality of stacked sheets in a direction toward a feeding position located at an end of the loading unit, a feeding mechanism that individually feeds sheets to the feeding position, and a control unit controlling a plurality of sensors, which detect whether there is a sheet at the feeding position. The supply mechanism operates based on detection information of the sensors. The control unit monitors a relationship between signal information of the optical sensor and that of another sensor, and if a signal relationship that is not normal as compared to that of normal feeding occurs, the unit retracts the signal information of the optical sensor and uses only the signal information of the other sensor. | 2012-09-06 |
20120223474 | IMAGE FORMING APPARATUS HAVING FIRST AND SECOND GROUND CONDUCTING ROUTES - An image forming apparatus including an image forming apparatus body, a cassette attaching section, a media cassette, a release portion, a first ground conducting route and a second ground conducting route is provided. The cassette attaching section includes a media supplying roller. The media cassette is removably installed in the cassette attaching section. The media cassette includes a loading plate, a pushing up member and a plate holding portion. The release portion engages the plate holding portion. The first ground conducting route conducts static electricity charged on the media and includes a conducting portion. The second ground conducting route conducts static electricity charged on the media when the media is conveyed by the media supplying roller. | 2012-09-06 |
20120223475 | Recording Apparatus - A recording apparatus includes a supply holding section that holds paper, which is supplied to a printing section, in an overlapping manner; a paper discharging roller that discharges the paper from the printing section; a discharge holding section that holds the paper, which are discharged from the paper discharging roller, in an overlapping manner, and is installed movably to the supply holding section, in an overlapping manner; and a moving unit that is moved to move the discharge holding section to the supply holding section so as to widen a difference of a height between the discharge holding section and the paper discharging roller according to a decrease of a holding amount of the paper in the supply holding section. | 2012-09-06 |
20120223476 | IMAGE PROCESSING DEVICE AND SHEET FEEDER MECHANISM - A drop in performance can be easily resolved when the retard roller becomes worn. A hopper disposed to a main unit stores sheets in a stack. A conveyance path conveys sheets from the hopper. A feed roller is disposed facing the conveyance path. A retard unit has a retard roller is disposed opposite the feed roller with the conveyance path therebetween, and a torque limiter connected coaxially to the retard roller. An urging means urges the retard unit so that the retard roller presses against the feed roller. The retard unit is removably installed to the main unit. | 2012-09-06 |
20120223477 | DIE FOR USE IN GAME PLAY - A die having at least two variable qualities that convey information for use in game play, wherein the variable qualities randomly change independently of one another upon rolling the die. Therefore, multiple independent random outcomes are produced each roll of the die. Preferably, at least one of the variable qualities is the color of the die such that the die changes color in response to sensor-detected movement of the die. | 2012-09-06 |
20120223478 | Pendulum Pointer and Spiritual Talking Board - Disclosed is a spiritual talking board having a half-moon design and a plurality of indicia thereon for providing guidance on specific questions or issues. The board is adapted to be utilized in conjunction with a suspended pendulum, which is positioned over a compass rose origin of the half-moon shape. Moving radially outward from the origin is a plurality of numbers, month indicators, and finally letters of the alphabet. On a first half of the board there are shown symbols for positive, female and the sun, while a second half shows negative, male and the moon. Positioned orthogonally from one another are the answers no/yes/no and finally a symbol showing prosperity is provided. A pendulum is suspended over the compass rose by a user, whereafter a question is posed. Movement of the pendulum over the board surface is provides insight into the question and a possible answer thereto. | 2012-09-06 |
20120223479 | Strategy Game - A game set and method for playing a strategy game on a playing surface by one or more persons including a plurality of playing pieces, each playing piece having a predetermined number of edges, wherein each edge is at least one of a exterior edge and a connecting edge; a plurality of playing cards, each playing card containing an indicia corresponding to the shape of one of the plurality of playing pieces; and a playing surface. Each player randomly selects a plurality of playing cards; exchanges each of the playing cards for a corresponding one of a plurality of playing pieces, and places each playing piece obtained by the exchange on a playing surface by (i) orienting an exterior edge according to the exterior of the playing surface and (ii) orienting a connecting edge according to a corresponding connecting edge of an adjacent playing piece. The strategy game may be played in various configurations, including without playing cards, without a playing pieces, without a game board, or with a timer. | 2012-09-06 |
20120223480 | Exercise game - An exercise board game for promoting exercise and fitness is disclosed which has a game board, movable playing pieces for each of one or more players, a plurality of exercise technique cards having instructions on performing exercises, and equipment for use following selection of an exercise. The game board has a playing surface with a path to advance said playing pieces. The player will roll a colored die and pull a card from a corresponding colored deck. The player will attempt to perform the exercise challenge on the card and, after successful completion, move the playing piece along the game board path. The board piece is marked to follow a path with the movable pieces based on the roll of a die and the level of the exercise challenge. | 2012-09-06 |
20120223481 | COLLECTIBLE CARD WITH CORRELATED VIRTUAL COLLECTION AND AUTHENTICATION - Generally, the present disclosure provides a system and method for distributing subjective images on paper or other material containing symbols, serial alphanumeric strings and cryptograms indelibly connecting the card object and content to computer systems. and real objects marked with the same code or serial ASCII character string. Further areas of applicability of the present teachings will become apparent from the description provided herein. It should be understood that the description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the present teachings. | 2012-09-06 |
20120223482 | BLACKJACK VARIATION WITH AUTOMATICALLY BURNED CARDS - A method to implement a blackjack variation. The dealer is dealt an up-card and a hole-card. If the up-card is a 10-valued card, then the dealer peeks at the hole-card, and if the hole-card is also a 10-valued card, then the dealer will burn both the up-card and the hole-card (which are both 10-valued cards), and deal two additional cards to the dealer which become the dealer's hand. The game then proceeds normally. | 2012-09-06 |
20120223483 | Aerodynamic Seal Assemblies for Turbo-Machinery - The present application provides an aerodynamic seal assembly for use with a turbo-machine. The aerodynamic seal assembly may include a number of springs, a shoe connected to the springs, and a secondary seal positioned about the springs and the shoe. | 2012-09-06 |
20120223484 | Sealing Device - A sealing device which comprises a slinger fixedly fitted to the rotary side member, a core member fixedly fitted to the stationary side member, and an elastic sealing member fixed to the core member and having a seal lip which elastically and slidably contacts the slinger. The slinger comprises a fitting cylindrical portion to be fitted into the rotary side member, a brim portion extending its radial direction at one end of its outside relative to a sealed portion of the fitting cylindrical portion, and a rotary side fixing member fixed to the brim portion. Further, the slinger is made in such a manner that an adhesive layer is formed on its whole surface including a contacting side surface where the seal lip contacts by applying adhesive agent thereon, then the fixing member is integrally fixed thereto, thereafter the adhesive layer is partially removed only in the contacting side surface. | 2012-09-06 |
20120223485 | LINK SEAL FOR TRACK OF TRACKED VEHICLES - The present invention relates to a link seal for a track of a tracked vehicle, in which fine protrusions of an indefinite pattern are formed on the adhesive surface of the seating groove of the main body made of a high-strength resin and the adhesive surface of the seating part of the sub-body made of an urethane resin and then the adhesive surfaces of the seating groove and the seating part are treated roughly into surfaces of a fine concavo-convex shape to increase the adhesion between the main body and sub-body. The link seal includes: an annular main body including a seating groove, a circumferential flange portion, and an annular sleeve; an annular sub-body including a seating part; and an annular rubber ring made of a cushion material and having a through-hole | 2012-09-06 |
20120223486 | CYLINDER HEAD GASKET - A multilayer gasket assembly includes a functional layer having a plurality of openings bounded by an annular free edge. The functional layer has a seal bead bounding the openings. The assembly further includes a stopper layer having a free outer periphery and openings configured to register with the openings of the functional layer. The stopper layer has at least one nonsymmetrical, irregularly shaped ear extending radially outwardly from at least one the openings to form a portion of the free outer periphery. | 2012-09-06 |
20120223487 | ENGINE WITH FLUID PASSAGE SEAL ASSEMBLY - This disclosure relates to an interface between an engine block and a cylinder head. The interface includes a ferrule that accommodates relative movement between the cylinder head and the engine block while maintaining sealing of fluid passages that extend between the cylinder head and the engine block. The interface thus forms a fluid passage seal assembly. | 2012-09-06 |
20120223488 | Sealing material on hydraulic flange - The present invention relates to a sealing material for hydraulic fitting flanges, in more particular, a sealing material which is configured in a specific shape, departing from the shape of traditional O-rings, to prevent it from being separated from fitting flange, improve assembly work efficiency, eliminating the necessity of extra work step(s) for maintaining it at the intended position, and provide it with excellent sealing and retaining performance. To achieve the above mentioned objects, the sealing material, in compliance with the invention in a torus shape, placed in the sealing material groove of fitting is characterized by its inner diameter side or outer diameter side being formed in the shape to match with, or to be in contact with the corresponding face of the sealing material groove, and the lateral sides connecting the inner and outer diameter surfaces are formed with protruded areas. | 2012-09-06 |
20120223489 | AIR SEAL DEVICE - An air seal device having a housing with a passageway, a core body that is configured to fit tightly within the passageway to restrict air flow through the passageway and to seal the interface between the core body and the housing, and a top ring that locks to the housing and engages and compresses the core body within the housing. The core body has a slit extending vertically therethrough that allows an elongated member or members to pass through the core body while providing an airtight interface between the member or members and the slit of the core body. | 2012-09-06 |