| 36th week of 2013 patent applcation highlights part 46 |
| Patent application number | Title | Published |
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| 20130232261 | QUALITY OF SERVICE POLICY SETS - Disclosed are systems, computer-readable mediums, and methods for receiving client quality of service values associated with a first client. Client metrics of a volume in a storage system are determined for the first client. The client metrics reflect usage of the storage system by the first client. A client load value based is determined upon the client metrics. A quality of service management policy for the first client is determined from a plurality of quality of service management policies based upon the client load value. Each quality of service management policy comprises a formula based on a quality of service parameter. A client target performance value is determined based upon the formula of the quality of service management policy and the received client quality of service values. Performance of the storage system is adjusted for the first client based upon the client target performance value. | 2013-09-05 |
| 20130232262 | FLOW CONTROL FOR RELIABLE MESSAGE PASSING - A message flow controller limits a process from passing a new message in a reliable message passing layer from a source node to at least one destination node while a total number of in-flight messages for the process meets a first level limit. The message flow controller limits the new message from passing from the source node to a particular destination node from among a plurality of destination nodes while a total number of in-flight messages to the particular destination node meets a second level limit. Responsive to the total number of in-flight messages to the particular destination node not meeting the second level limit, the message flow controller only sends a new packet from among at least one packet for the new message to the particular destination node while a total number of in-flight packets for the new message is less than a third level limit. | 2013-09-05 |
| 20130232263 | SYSTEM AND METHOD FOR CLASSIFYING A CONTAGIOUS PHENOMENON PROPAGATING ON A NETWORK - This disclosure concerns systems and methods for classifying at least one contagious phenomenon propagating on a network. Classifying may be based on one or more of a peakedness, a commitment, a commitment by subsequent uses, a commitment by time range, and a dispersion related to engagement with the contagious phenomenon. | 2013-09-05 |
| 20130232264 | NETWORK FAULT MANAGER - A computer-implemented method for detecting alarm conditions, the method involving receiving at a first time a trigger notification describing a monitored occurrence on a network; setting a redundancy window to begin at the first time and to end at an expiration time; designating a first alarm condition to represent the trigger notification; receiving a second notification at a second time after the first time, the second notification describing the monitored occurrence; and determining whether a second alarm condition exists by testing whether the second time is within the redundancy window. | 2013-09-05 |
| 20130232265 | PROCESSING OF DATA FOR THE MANAGEMENT OF PLACEMENT ON STANDBY - A processing of data for the management of the placement on standby of a client terminal connected to an operator terminal of an access network, the method comprising, in said client terminal, the following steps: a) determining a policy for placing the client terminal on standby, b) monitoring a client interface of said client terminal, disposed between said client terminal and a part of a local network situated downstream of said client terminal, c) monitoring an access network interface of said client terminal, disposed between said client terminal and said operator terminal. | 2013-09-05 |
| 20130232266 | TECHNIQUES FOR GENERICALLY ACCESSING DATA - Techniques for generic data access are provided. A middle-tier server agent uses data providers that can communicate with backend resources. A request received in a first format is used to identify a specific data provider by the middle-tier server agent; the data provider uses the first format to communicate with a specific backend resource in a second format. Results from the specific backend resource are returned from the data provider in the first format and passed to a client that initially made the request. | 2013-09-05 |
| 20130232267 | SYSTEM AND METHOD FOR RESOURCE-BASED NETWORK POLICY CONTROL IN A NETWORK ENVIRONMENT - A method is provided in one example embodiment that includes aggregating resource availability from a plurality of network elements operating in a network; receiving a request to apply a policy to a network flow propagating in the network; and orchestrating resources to apply the policy to the network flow based on the aggregated resource availability. In more particular embodiments, the policy includes a quality of service for the network flow. In addition, the policy can include relocating subscribers accessing common content from a first gateway to a second gateway. In other instances, the policy includes relocating resources for the network flow. | 2013-09-05 |
| 20130232268 | PERFORMING MAINTENANCE OPERATIONS ON CLOUD COMPUTING NODE WITHOUT REQUIRING TO STOP ALL VIRTUAL MACHINES IN THE NODE - A method, system and computer program product for performing maintenance operations on a cloud computing node. An administrative server receives an indication that a maintenance operation is to be performed on a cloud computing node. The administrative server identifies which virtual machine(s) on the cloud computing node will be affected by the maintenance operation. The administrative server relocates the virtual machine(s) to be affected by the maintenance operation to other suitable cloud computing node(s) prior to the maintenance operation being performed. The administrative server then performs the maintenance operation on the cloud computing node. The virtual machine(s) may be relocated back to the cloud computing node after the maintenance operation is completed in response to a need to rebalance resources in such a manner. In this manner, maintenance operations may be performed on a cloud computing node without requiring to stop all the virtual machines in the node. | 2013-09-05 |
| 20130232269 | DIRECT RETURN TO SOURCE (DRS) ROUTING OF CUSTOMER INFORMATION CONTROL SYSTEMS (CICS) TRANSACTIONS - A method, system, and computer programming product for returning a response directly to a transaction request originator in a customer information control system (CICS) is provided. The method can include receiving a transaction request in a CICS and allocating resources in the CICS in response to receiving the transaction request. The method additionally can include determining whether the CICS is an intended endpoint of the transaction request. Finally, the method can include extracting an address of an originator of the transaction request from the transaction request and sending a response to the originator at the extracted address upon determining that the CICS is the intended endpoint of the transaction request, but otherwise routing the transaction request to a different CICS along with the address within the transaction request. | 2013-09-05 |
| 20130232270 | RUNTIME DYNAMIC PERFORMANCE SKEW ELIMINATION - For runtime dynamic performance skew elimination in a computer environment, an exemplary computer environment is configured for calculating a rank heats by utilizing a plurality of fine-grained statistics collected at an extent granularity, including considering bandwidth (BW) and input/outputs per second (IOPS) metrics. An adaptive data placement plan is generated to relocate the data. | 2013-09-05 |
| 20130232271 | METHOD FOR PROVIDING LOGICAL SPACE-BASED POLYMORPHIC SERVICE AND DEVICE USING SAME - Provided are a method of providing a polymorphic service based on a logical space and an apparatus using the method. The method includes receiving, at a polymorphic service server, location information on a polymorphic service client and service request information, which is information on a service requested by the polymorphic service client, and searching for, at the polymorphic service server, dynamic resources available for providing the service on the basis of the location information and the service request information, and providing the service on the basis of the available dynamic resources. Accordingly, a huge space can be implemented as one service providing space in one unified way, and individual services can interoperate as one service to build a standardized large-scale ubiquitous environment. | 2013-09-05 |
| 20130232272 | Optimal Source Interface Selection - Aspects of the subject matter described herein relate to selecting a source interface with which to establish a connection. In aspects, a profile for each network location a host has seen is maintained in a data store. The profile includes information about the network interfaces available to a source host at the network location. This information indicates, among other things, the reliability of each interface of the source host. Based on the profile, an interface is selected with which to establish a connection. If the interface is unsuccessful in establishing the connection, the interface is de-prioritized and another interface may be selected. | 2013-09-05 |
| 20130232273 | SIP Media Retry - Methods, apparatuses and computer programs for selecting a codec for use by a communications device for a session over a network, having a transcoding resource, are provided. It is determined whether the transcoding resource is available for the communications session and, if the transcoding resource is available, a subset of codecs available to the communications device is used in a signalling process used to determine a codec for the session. The subset is selected based on an operative condition affecting the communications device. | 2013-09-05 |
| 20130232274 | NETWORK NODES THAT ESTABLISH SESSIONS USING EXISTING CONNECTIONS IDENTIFIED IN A CENTRAL DATABASE - Network nodes can add information to a central database ( | 2013-09-05 |
| 20130232275 | APPARATUS AND METHOD FOR ESTABLISHING CONNECTIONS - A mechanism for establishing connections is described. The mechanism comprises: sending a first message comprising the domain name of a network element to a server; receiving a response message comprising server record and domain names relevant to primary IP address and secondary IP address of the network element from the server; determining, on the basis of the received response message, the domain names relevant to the primary IP address and secondary IP address of the network element respectively; sending a second message comprising the determined domain name relevant to the primary IP address of the network element to the server; receiving the primary IP address of the network element from the server; attempting to establish a first connection towards the network element based on the obtained primary IP address; sending a third message comprising the determined domain name relevant to the secondary IP address of the network element to the server in the event that the first connection establishment attempt fails; receiving the secondary IP address of the network element from the server in response to the third message; and attempting to establish a second connection towards the network element based on the obtained secondary IP address. | 2013-09-05 |
| 20130232276 | SYSTEM AND METHOD FOR WIRELESSLY BROADCASTING CONTENT FROM A CORE FOR RECEIPT BY A MOBILE CLIENT - A system and method for providing content over a network. In particular, the system and method is capable of providing content, such as broadband streaming multimedia and Internet Protocol (IP) data, to network devices, including mobile devices, with interactive functionality. The network employs at least one core and a plurality of clients. The core and clients each comprise a plurality of modules that cooperatively communicate with each other to monitor and control the delivery of content and to allow for interactive functionality by a user. | 2013-09-05 |
| 20130232277 | Transmitting and Forwarding Data - A network comprises a communication device having network communication interfaces and a data processing node having network communication ports. The communication device includes a first and a second interface communicatively coupled to a first and a second port of the data processing node respectively. The first interface is selected as a primary interface for the transmission of network traffic to destinations across the network. The second interface is selected as a backup interface which is to be selected for the transmission of the network traffic in the case of a need to failover to the backup interface. Network traffic from the communication device is transmitted via the first interface while the first interface is selected as the primary interface. At least one data message is transmitted from the communication device via the second interface, while the first interface is selected as the primary interface. | 2013-09-05 |
| 20130232278 | IPv4 Data Center Support for IPv4 and IPv6 Visitors - A network element (NE) comprising a processor configured to transmit a message to a domain names system (DNS) server, wherein the message comprises a virtual service internet protocol (VSIP) version six (VSIPv6) address corresponding to a service associated with an internet protocol version four (IPv4) address. Also disclosed is a method comprising associating a remote host internet protocol (IP) version six (IPv6) address with a private IPv4 address in a stateful binding table, and associating a local service IPv4 address with a local service VSIPv6 address in a stateless binding table. | 2013-09-05 |
| 20130232279 | Decode Data for Fast PCI Express Multi-Function Device Address Decode - An apparatus and method of fast PCIe multi-function device address decode utilizing a target function data look up table. One or more decode directives (e.g., targeted functions) are provided within the PCIe request packet, thereby eliminating the need for target function search during the decode process in the endpoint device. This enables single-decoder single-step decode implementation in complex multi-function devices. | 2013-09-05 |
| 20130232280 | Sensor Fusion Algorithm - Sensor fusion algorithm techniques are described. In one or more embodiments, behaviors of a host device and accessory devices are controlled based upon an orientation of the host device and accessory devices, relative to one another. A combined spatial position and/or orientation for the host device may be obtained based on raw measurements that are obtained from at least two different types of sensors. In addition, a spatial position and/or orientation for an accessory device is ascertained using one or more sensors of the accessory device. An orientation (or position) of the accessory device relative to the host computing device may then be computed based on the combined spatial position/orientation for the host computing device and the ascertained spatial position/orientation for the accessory device. The relative orientation that is computed may then be used in various ways to control behaviors of the host computing device and/or accessory device. | 2013-09-05 |
| 20130232281 | METHOD FOR OPTIMIZING WIDE PORT POWER MANAGEMENT IN A SAS TOPOLOGY - A SAS expander or initiator places PHYs in a wide port into a persistent reduced power state by signaling to the connected SAS device that the SAS expander or initiator intends to route data traffic through other PHYs in the wide port. The SAS expander or initiator and connected SAS device agree to disuse certain PHYs so that the PHYs enter a reduced power state according to SAS standards. | 2013-09-05 |
| 20130232282 | ELECTRONIC DEVICE AND METHOD OF CONTROLLING THE SAME - There is provided an electronic device connected to at least one external electronic device, the electronic device including a communication unit configured to perform data communication with the at least one external electronic device, an interface unit configured to connect to a sound output device, and a controller configured, when the sound output device is connected to the electronic device through the interface unit, to receive audio data from the at least one external electronic device and to output the received audio data through the sound output device. | 2013-09-05 |
| 20130232283 | MEMORY SYSTEM HAVING HIGH DATA TRANSFER EFFICIENCY AND HOST CONTROLLER - According to one embodiment, the host controller includes a register set to issue command, and a direct memory access (DMA) unit and accesses a system memory and a device. First, second, third and fourth descriptors are stored in the system memory. The first descriptor includes a set of a plurality of pointers indicating a plurality of second descriptors. Each of the second descriptors comprises the third descriptor and fourth descriptor. The third descriptor includes a command number, etc. The fourth descriptor includes information indicating addresses and sizes of a plurality of data arranged in the system memory. The DMA unit sets, in the register set, the contents of the third descriptor forming the second descriptor, from the head of the first descriptor as a start point, and transfers data between the system memory and the host controller in accordance with the contents of the fourth descriptor. | 2013-09-05 |
| 20130232284 | STORAGE SYSTEM AND DATA TRANSFER CONTROL METHOD - It is provided a storage system for inputting and outputting data in accordance with a request from a host computer, comprising: at least one processor for processing data requested to be input or output; a plurality of transfer controllers for transferring data between memories in the storage system; and at least one transfer sequencer for requesting a data transfer to the plurality of transfer controllers in accordance with an instruction from the processor. The processor transmits a series of data transfer requests to the at least one transfer sequencer. The at least one transfer sequencer requests a data transfer to each of the plurality of transfer controllers based on the series of data transfer requests. The each transfer controller transfers data between the memories in accordance with an instruction from the at least one transfer sequencer. | 2013-09-05 |
| 20130232285 | CONTROL METHOD OF FLOW CONTROL SCHEME AND CONTROL MODULE THEREOF - A control method of flow control scheme and a control module thereof are provided. The provided control method includes setting a value of the transaction packets and outputting data to an external device according to the value of the transaction packets. When a not-ready transaction packet is received, the value of the transaction packets is reduced and the data is transmitted according to the value of the transaction packets. | 2013-09-05 |
| 20130232286 | OUTPUT INPUT CONTROL APPARATUS AND CONTROL METHOD THEREOF - An output input (I/O) control apparatus and a control method thereof are provided. The I/O control apparatus includes an interface control unit, a read-only memory, a random access memory, a multiplexer and a micro-process unit. The interface control unit is coupled to a memory apparatus through a bus, and the memory apparatus is external to the I/O control apparatus. The read-only memory stores judgment codes. The multiplexer is controlled by the micro-process unit to switch to the interface control unit, the read-only memory or the random access memory. When the bus is not busy, the micro-process unit can read data from the memory apparatus. When the bus is occupied and busy, the micro-process unit can read and execute codes from the read-only memory or the random access memory so as to avoid computer system instability or thermal damage. | 2013-09-05 |
| 20130232287 | METHOD OF OBTAINING INSTRUCTION FOR TRIGGERING FUNCTION - A method of obtaining a function triggering instruction is provided. The method is adapted to a computer system using a unified extensible firmware interface (UEFI). In the present method, a variable in a read-only memory (ROM) of a basic input/output system (BIOS) is accessed during power-on self test (POST) of the computer system, wherein the variable has a first element, a second element, and a third element. Whether values of the first element and the second element respectively match a variable name and a globally unique identifier (GUID) corresponding to an instruction is determined. If the values of the first element and the second element respectively match the variable name and the GUID corresponding to the instruction, a function triggered by the instruction is executed according to the value of the third element. | 2013-09-05 |
| 20130232288 | POSTING INTERRUPTS TO VIRTUAL PROCESSORS - Embodiments of systems, apparatuses, and methods for posting interrupts to virtual processors are disclosed. In one embodiment, an apparatus includes look-up logic and posting logic. The look-up logic is to look-up an entry associated with an interrupt request to a virtual processor in a data structure. The posting logic is to post the interrupt request in a data structure specified by information in the first data structure. | 2013-09-05 |
| 20130232289 | APPARATUS, SYSTEM, AND METHOD FOR WEAR MANAGEMENT - A storage module is configured to determine a health metric of a storage division of a solid-state storage medium. The health metric may comprise a combination of factors, including, but not limited to: wear level, performance (e.g., program time, erase time, and the like), error rate, and the like. A wear level module may configure storage operations to reduce the wear rate of storage divisions having poor health metrics and/or heath metrics that are degrading more quickly than other storage divisions. Reducing wear rate may include deferring grooming operations, delaying use for storage operations, temporarily retiring the storage division, or the like. Storage divisions may be brought back into service at normal use rates in response determining that other portions of the storage media have been worn to the point that they exhibit similar health and/or reliability characteristics. | 2013-09-05 |
| 20130232290 | REDUCING WRITE AMPLIFICATION IN A FLASH MEMORY - An apparatus having a memory circuit and a manager is disclosed. The memory circuit generally has (i) one or more Flash memories and (ii) a memory space that spans a plurality of memory addresses. The manager may be configured to (i) receive data items in a random order from one or more applications, (ii) write the data items in an active one of a plurality of regions in a memory circuit and (iii) mark the memory addresses in the active region that store the data items as used. Each data item generally has a respective host address. The applications may be executed in one or more computers. The memory addresses in the active region may be accessed in a sequential order while writing the data items to minimize a write amplification. The random order is generally preserved between the data items while writing in the active region. | 2013-09-05 |
| 20130232291 | Transfer Command with Specified Sense Threshold Vector Component - Various embodiments of the present disclosure are generally directed to the accessing of data in a memory, such as but not limited to a flash memory array. In accordance with some embodiments, a transfer command is received to transfer selected data between a control module and a memory module. The transfer command specifies a target address in the memory module and a sense threshold vector associated with the selected data. The sense threshold vector in the received transfer command is used to sense a programmed state of at least one solid-state memory cell at the target address responsive to the received transfer command. The transfer command may be a read or write command. | 2013-09-05 |
| 20130232292 | IMPLEMENTING LARGE BLOCK RANDOM WRITE HOT SPARE SSD FOR SMR RAID - A method and a storage system are provided for implementing a sustained large block random write performance mechanism for shingled magnetic recording (SMR) drives in a redundant array of inexpensive disks (RAID). A Solid State Drive (SSD) is provided with the SMR drives in the RAID. The SSD is used in a hot spare mode, which is activated when a large block random-write event is identified for a SMR drive in the RAID. In the hot spare mode, the SSD temporarily receives new incoming writes for the identified SMR drive. Then the identified SMR drive is updated from the SSD to restore the state of the identified SMR drive, and operations continue with normal writing only using the SMR drives in the RAID. | 2013-09-05 |
| 20130232293 | HIGH PERFORMANCE STORAGE TECHNOLOGY WITH OFF THE SHELF STORAGE COMPONENTS - Using integrated circuits, such as field programmable gate arrays, it is possible to transfer data to common off the shelf storage devices at high speeds which would normally be associated with special purpose hardware created for a particular application. Such high speed storage can include prefetching data to be stored from a memory element into a cache, and translating the commands which will be used in accomplishing the transfer into a standard format, such as peripheral component interconnect express. | 2013-09-05 |
| 20130232294 | ADAPTIVE CACHE PROMOTIONS IN A TWO LEVEL CACHING SYSTEM - Provided are a computer program product, system, and method for managing data in a first cache and a second cache. A reference count is maintained in the second cache for the page when the page is stored in the second cache. It is determined that the page is to be promoted from the second cache to the first cache. In response to determining that the reference count is greater than zero, the page is added to a Least Recently Used (LRU) end of an LRU list in the first cache. In response to determining that the reference count is less than or equal to zero, the page is added to a Most Recently Used (LRU) end of the LRU list in the first cache. | 2013-09-05 |
| 20130232295 | ADAPTIVE CACHE PROMOTIONS IN A TWO LEVEL CACHING SYSTEM - Provided are a computer program product, system, and method for managing data in a first cache and a second cache. A reference count is maintained in the second cache for the page when the page is stored in the second cache. It is determined that the page is to be promoted from the second cache to the first cache. In response to determining that the reference count is greater than zero, the page is added to a Least Recently Used (LRU) end of an LRU list in the first cache. In response to determining that the reference count is less than or equal to zero, the page is added to a Most Recently Used (LRU) end of the LRU list in the first cache. | 2013-09-05 |
| 20130232296 | MEMORY SYSTEM AND CONTROL METHOD OF MEMORY SYSTEM - A memory system in embodiments includes a nonvolatile semiconductor memory that stores user data, a forward lookup address translation table and a reverse lookup address translation table, and a controller. The controller is configured to determine that the user data stored in the nonvolatile semiconductor memory is valid or invalid based on these two tables. The controller may perform data organizing of selecting data determined valid and rewriting the data in a new block. The controller may perform write processing and rewriting processing to the new block alternately at a predetermined ratio. The controller may determine whether a predetermined condition is satisfied on a basis of addresses included in write requests and write data in the MLC mode when the condition is satisfied and write data in the SLC mode when the condition is not satisfied. | 2013-09-05 |
| 20130232297 | Storage System Comprising Flash Memory Modules Subject to Two Wear - Leveling Process - A storage system using flash memories includes a storage controller and plural flash memory modules as storage media. Each flash memory module includes at least one flash memory chip and a memory controller for leveling erase counts of blocks belonging to the flash memory chip. The storage controller combines the plural flash memory modules into a first logical group, translates a first address used for accessing the flash memory modules belonging to the first logical group to a second address used for handling the first address in the storage controller, and combines the plural first logical groups into a second logical group. | 2013-09-05 |
| 20130232298 | MODULAR MASS STORAGE SYSTEM AND METHOD THEREFOR - A modular mass storage system and method that enables cableless mounting of ATA and/or similar high speed interface-based mass storage devices in a computer system. The system includes a printed circuit board, a system expansion slot interface on the printed circuit board and comprising power and data pins, a host bus controller on the printed circuit board and electrically connected to the system expansion slot interface, docking connectors connected with the host bus controller to receive power and exchange data therewith and adapted to electrically couple with industry-standard non-volatile memory devices without cabling therebetween, and features on the printed circuit board for securing the memory devices thereto once coupled to the docking connectors. | 2013-09-05 |
| 20130232299 | CHANGING OWNERSHIP OF CARTRIDGES - Exemplary method, system, and computer program product embodiments for changing ownership of cartridges, such as virtual cartridges between remotely located virtual tape libraries, are provided. In one embodiment, by way of example only, processes and protocols for the changing ownership of the cartridges are controlled from a primary location to a secondary location. The production site is moved for the cartridges. The ownership of the cartridges is waived. Access is allowed to the cartridges. Additional data is written and replicated using resources of the cartridges. | 2013-09-05 |
| 20130232300 | SYSTEM FOR MAINTAINING COHERENCY DURING OFFLINE CHANGES TO STORAGE MEDIA - A proxy device monitors memory access operations between clients and a storage media. The proxy device stores at least some of the data from the storage media in a faster tiering media and provides the data from the faster tiering media to the clients for certain associated memory access operations. The proxy is also configured to monitor Small Computer System Interface (SCSI) communications between the clients and the storage media and invalidate at least some data in the tiering media when particular SCSI messages in the SCSI communications indicate the tiering media contains data that is out of sync with the data in the storage media. | 2013-09-05 |
| 20130232301 | System and Method for Mapping a Logical Drive Status to a Physical Drive Status for Multiple Storage Drives Having Different Storage Technologies within a Server - An information handling system includes a backplane, a storage drive, and a board management controller. The board management controller is configured to discover a physical drive status of the drive from a storage enclosure processor, to receive a logical drive status of the drive, to read a backplane bay identification for the drive from a peripheral connector interface express extender or serial attached small computer system interface chipset logical drive number, and to construct a routing table for the drive to map the logical drive status with the physical drive status of the drive. | 2013-09-05 |
| 20130232302 | STORAGE SYSTEM AND METHOD FOR CONTROLLING THE SAME - Optimum load distribution processing is selected and executed based on settings made by a user in consideration of load changes caused by load distribution in a plurality of asymmetric cores, by using: a controller having a plurality of cores, and configured to extract, for each LU, a pattern showing the relationship between a core having an LU ownership and a candidate core as an LU ownership change destination based on LU ownership management information; to measure, for each LU, the usage of a plurality of resources; to predicate, for each LU based on the measurement results, a change in the usage of the plurality of resources and overhead to be generated by transfer processing itself; to select, based on the respective prediction results, a pattern that matches the user's setting information; and to transfer the LU ownership to the core belonging to the selected pattern. | 2013-09-05 |
| 20130232303 | Method and Apparatus of Accessing Data of Virtual Machine - A methods and device for accessing virtual machine (VM) data are described. A computing device for accessing virtual machine comprises an access request process module, a data transfer proxy module and a virtual disk. The access request process module receives a data access request sent by a VM and adds the data access request to a request array. The data transfer proxy module obtains the data access request from the request array, maps the obtained data access request to a corresponding virtual storage unit, and maps the virtual storage unit to a corresponding physical storage unit of a distributed storage system. A corresponding data access operation may be performed based on a type of the data access request. | 2013-09-05 |
| 20130232304 | ACCELERATED INTERLEAVED MEMORY DATA TRANSFERS IN MICROPROCESSOR-BASED SYSTEMS, AND RELATED DEVICES, METHODS, AND COMPUTER-READABLE MEDIA - Accelerated interleaved memory data transfers in microprocessor-based systems and related devices, methods, and computer-readable media are disclosed. Embodiments disclosed in the detailed description include accelerated interleaved memory data transfers in processor-based systems. Related devices, methods, and computer-readable media are also disclosed. Embodiments disclosed include accelerated large and small memory data transfers. As a non-limiting example, a large data transfer is a data transfer size greater than the interleaved address block size provided in the interleaved memory. As another non-limiting example, a small data transfer is a data transfer size less than the interleaved address block size provided in the interleaved memory. | 2013-09-05 |
| 20130232305 | COMMAND ENCODED DATA COMPRESSION - A method implemented in a computer system may include reading a first set of data byte values, providing a reproducible first array that includes at least one of each data byte value in the first set, identifying in the first array a first contiguous pathway that defines a set of data byte values matching the first set, and creating a second set of command byte values representing the first contiguous pathway. The method may further include providing a reproducible second array that includes at least one of each command byte value in the second set, identifying in the second array a second contiguous pathway that defines a set of command byte values matching the second set, and creating a third set of command byte values representing the second contiguous pathway. | 2013-09-05 |
| 20130232306 | MERGING INDEX NODES OF A HIERARCHICAL DISPERSED STORAGE INDEX - A method begins by a dispersed storage (DS) processing module determining to merge two data object level index nodes and merging the two nodes into a temporarily merged data object level index node. The method continues with the DS processing module initiating updating of a hierarchical ordered index structure by identifying an address for storing the temporarily merged data object level index node, setting up deletion of the two data object level index nodes, setting up linking the temporarily merged data object level index node to a next level node of the hierarchical ordered index structure, and determining whether a change has occurred to at least one of one or more of the two data object level index nodes and the next level node. When the change has not occurred, the method continues with the DS processing module commencing the updating of the hierarchical ordered index structure. | 2013-09-05 |
| 20130232307 | DISPERSED STORAGE WRITE PROCESS - A dispersed storage (DS) method begins by issuing a plurality of write commands to a plurality of DS storage units. The method continues by receiving a write acknowledgement from one of the plurality of DS storage units to produce a received write acknowledgement. The method continues by issuing a plurality of commit commands to the plurality of DS storage units when a write threshold number of the received write acknowledgements have been received. The method continues by receiving a commit acknowledgement from a DS storage unit of the plurality of DS storage units to produce a received commit acknowledgement. The method continues by issuing a plurality of finalize commands to the plurality of DS storage units when a write threshold number of the received commit acknowledgements have been received. | 2013-09-05 |
| 20130232308 | Method and Memory Device for Generating a Time Estimate - A method and memory device for generating a time estimate are provided. In one embodiment, a memory device generates a time estimate from time stamps in file system metadata for a plurality of files stored in the memory device and uses the time estimate to perform a time-based activity in the memory device. In another embodiment, a memory device generates a time estimate from time stamps stored in a plurality of files stored in the memory device and uses the time estimate to perform a time-based activity in the memory device. In yet another embodiment, a memory device obtains a plurality of time stamps, selects one or more of the plurality of time stamps based on validity rankings, generates a time estimate from the selected time stamp(s), and uses the time estimate to perform a time-based activity in the memory device. | 2013-09-05 |
| 20130232309 | CONTENT ALIGNED BLOCK-BASED DEDUPLICATION - A content alignment system according to certain embodiments aligns a sliding window at the beginning of a data segment. The content alignment system performs a block alignment function on the data within the sliding window. A deduplication block is established if the output of the block alignment function meets a predetermined criteria. At least part of a gap is established if the output of the block alignment function does not meet the predetermined criteria. The predetermined criteria is changed if a threshold number of outputs fail to meet the predetermined criteria. | 2013-09-05 |
| 20130232310 | ENERGY EFFICIENCY IN A DISTRIBUTED STORAGE SYSTEM - A system for providing block layout in a distributed storage system. A request receiver receives requests to perform a read or write operation for a data block. A memory device stores ordered replica lists and a swap policy. Each list is for a respective stored data block and has one or more entries specifying prioritized replica location information associated with storage devices and priorities there for. A load balancer scores and selects an original location for the data block specified in a request responsive to the information and a policy favoring fully operational storage devices having higher priority locations. The swap policy evaluates the original location responsive to the information and estimated workload at storage device locations to decide upon at least one alternate location responsive to the write operation, and to decide to place the data block at the at least one alternate location responsive to the read operation. | 2013-09-05 |
| 20130232311 | DATA SHARING USING DIFFERENCE-ON-WRITE - When a virtual machine writes to a page that is being shared across VMs, a share value is calculated to determine how different the page would be if the write command were implemented. If the share value is below a predefined threshold (meaning that the page would not be “too different”), then the page is not copied (as it would be in a standard copy-on-write operation). Instead, the difference between the contents of the pages is stored as a self-contained delta. The physical to machine memory map is updated to point to the delta, and the delta contains a pointer to the original page. When the VM needs to access the page that was stored as a delta, the delta and the page are then fetched from memory and the page is reconstructed. | 2013-09-05 |
| 20130232312 | POLICY-BASED DATA MIGRATION CONTROL METHOD FOR STORAGE DEVICE - In recent years, data life cycle management, in which data is relocated from, for example, a new storage sub-system to an older storage sub-system in accordance with how new the data is or the frequency of use of the data, has become important. One technology for achieving data life cycle management is technology for migrating the contents of a storage area (“volume”) of a storage sub-system to another volume without affecting the host computer that uses the volume. In the present invention, when an associated source volume (for example, the source volume in a copy pair association) of a pair of associated volumes is migrated, migration of an associated destination volume (for example, the target volume in the copy pair association) is also controlled. In this way, it is possible to control the migration of a pair (or a group) of associated volumes in accordance with the user's requirements. | 2013-09-05 |
| 20130232313 | SYSTEM AND METHOD FOR MANAGING REPLICATION IN AN OBJECT STORAGE SYSTEM - An object storage system, such as a content addressed storage system, manages replication of objects across network locations to balance storage space and data security. Network locations set a policy of replicating each object at the object's primary network location and a secondary network location. The secondary network location creates a first replica of the object and a virtual unique identifier representing a second replica of the object at the secondary network location. Creation of the second replica is suppressed unless the first replica becomes invalid so that storage space is conserved without substantially increasing the risk of loss of information represented by the object. | 2013-09-05 |
| 20130232314 | COMMUNICATION MANAGEMENT APPARATUS, COMMUNICATION MANAGEMENT METHOD, AND COMPUTER PROGRAM PRODUCT - According to an embodiment, a communication management apparatus mediates data between an information processing terminal having a temporary memory and an external memory device that is installed outside the information processing terminal. The apparatus includes a receiving unit configured to receive a write request issued by a device other than the information processing terminal for writing the data in the external memory device; a reading-writing unit configured to control reading of the data from the external memory device and control writing of the data in the external memory device; and a delete command issuing unit configured to, when the write request with respect to the external memory device is received, issue a delete command to the information processing terminal for deleting temporary data that is stored in the temporary memory. | 2013-09-05 |
| 20130232315 | SCALABLE, CUSTOMIZABLE, AND LOAD-BALANCING PHYSICAL MEMORY MANAGEMENT SCHEME - A physical memory management scheme for handling page faults in a multi-core or many-core processor environment is disclosed. A plurality of memory allocators is provided. Each memory allocator may have a customizable allocation policy. A plurality of pagers is provided. Individual threads of execution are assigned a pager to handle page faults. A pager, in turn, is bound to a physical memory allocator. Load balancing may also be provided to distribute physical memory resources across allocators. Allocations may also be NUMA-aware. | 2013-09-05 |
| 20130232316 | MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENS - In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced. | 2013-09-05 |
| 20130232317 | VECTOR PROCESSING APPARATUS AND VECTOR PROCESSING METHOD - A vector processing apparatus includes a storage pointer generation unit and an instruction execution unit including a plurality of vector pipeline units. The storage pointer generation unit receives the vector instruction and range information thereof and generates the storage pointer value. When receiving a succeeding vector instruction being able to be processed in parallel together with a preceding vector instruction, the storage pointer generation unit updates the storage pointer value based on the range information so as to input each element of the succeeding vector instruction into a vector pipeline unit that is unused by the preceding vector instruction, and the instruction execution unit processes in parallel the preceding vector instruction and the succeeding vector instruction according to the storage pointer value. | 2013-09-05 |
| 20130232318 | METHODS, APPARATUS, AND INSTRUCTIONS FOR CONVERTING VECTOR DATA - A computer processor includes a decoder for decoding machine instructions and an execution unit for executing those instructions. The decoder and the execution unit are capable of decoding and executing vector instructions that include one or more format conversion indicators. For instance, the processor may be capable of executing a vector-load-convert-and-write (VLoadConWr) instruction that provides for loading data from memory to a vector register. The VLoadConWr instruction may include a format conversion indicator to indicate that the data from memory should be converted from a first format to a second format before the data is loaded into the vector register. Other embodiments are described and claimed. | 2013-09-05 |
| 20130232319 | INFORMATION PROCESSING SYSTEM, ROUTING METHOD AND PROGRAM - A disclosed information processing system includes 2 | 2013-09-05 |
| 20130232320 | PERSISTENT PREFETCH DATA STREAM SETTINGS - A prefetch unit includes a transience register and a length register. The transience register hosts an indication of transient for data stream prefetching. The length register hosts an indication of a stream length for data stream prefetching. The prefetch unit monitors the transience register and the length register. The prefetch unit generates prefetch requests of data streams with a transient property up to the stream length limit when the transience register indicates transient and the length register indicates the stream length limit for data stream prefetching. A cache controller coupled with the prefetch unit implements a cache replacement policy and cache coherence protocols. The cache controller writes data supplied from memory responsive to the prefetch requests into cache with an indication of transient. The cache controller victimizes cache lines with an indication of transient independent of the cache replacement policy. | 2013-09-05 |
| 20130232321 | Unpacking Packed Data In Multiple Lanes - Receiving an instruction indicating first and second operands. Each of the operands having packed data elements that correspond in respective positions. A first subset of the data elements of the first operand and a first subset of the data elements of the second operand each corresponding to a first lane. A second subset of the data elements of the first operand and a second subset of the data elements of the second operand each corresponding to a second lane. Storing result, in response to instruction, including: (1) in first lane, only lowest order data elements from first subset of first operand interleaved with corresponding lowest order data elements from first subset of second operand; and (2) in second lane, only highest order data elements from second subset of first operand interleaved with corresponding highest order data elements from second subset of second operand. | 2013-09-05 |
| 20130232322 | UNIFORM LOAD PROCESSING FOR PARALLEL THREAD SUB-SETS - One embodiment of the present invention sets forth a technique for processing load instructions for parallel threads of a thread group when a sub-set of the parallel threads request the same memory address. The load/store unit determines if the memory addresses for each sub-set of parallel threads match based on one or more uniform patterns. When a match is achieved for at least one of the uniform patterns, the load/store unit transmits a read request to retrieve data for the sub-set of parallel threads. The number of read requests transmitted is reduced compared with performing a separate read request for each thread in the sub-set. A variety of uniform patterns may be defined based on common access patterns present in program instructions. A variety of uniform patterns may also be defined based on interconnect constraints between the load/store unit and the memory when a full crossbar interconnect is not available. | 2013-09-05 |
| 20130232323 | OBFUSCATION OF CONTROL FLOW OF SOFTWARE - Methods, media and systems that obfuscate control flow in software programs. The obfuscation can impede or prevent static flow analysis of a software program's control flow. In one embodiment, a method, performed by a data processing system, identifies each branch point in a set of branch points in a first version of software and replaces, in each branch point in the set, a representation of a target of the branch point with a computed value that depends upon at least one prior computed value in a stream of instructions in the first version of software. Other embodiments are also described. | 2013-09-05 |
| 20130232324 | Activating Applications Based on Accelerometer Data - In some implementations, a computer-implemented method includes storing a plurality of acceleration profiles in a mobile device; receiving accelerometer data from an accelerometer in the mobile device; correlating the accelerometer data with one accelerometer profile in the plurality of accelerometer profiles; and activating a user application of the mobile device that is associated with the correlated accelerometer profile. Each acceleration profile can correspond to a sequence of acceleration forces a mobile device would be subjected to when carried with a user during an activity that corresponds to the correlated acceleration profile. | 2013-09-05 |
| 20130232325 | ELECTRONIC DEVICE TO RESTORE MBR, METHOD THEREOF, AND COMPUTER-READABLE MEDIUM - An electronic device includes a storage unit to store a master boot record (MBR) and an operating system, a control unit to boot the electronic device using the stored MBR and operating system, to generate and store backup data of the MBR in the storage unit when the electronic device is booted, a validity determination unit to determine validity of the MBR when a predetermined event has occurred, and a restoration unit to restore the MBR using the backup data stored in the storage unit if the MBR is not valid. | 2013-09-05 |
| 20130232326 | Electronic Device Booting Method and Electronic Device Applying the Same - An electronic device booting method includes following steps: booting the electronic device when a power button of the electronic device is triggered; determining if a preset button of the electronic device is triggered; initializing at least one specific hardware element of the electronic device when the preset button is triggered; and executing an operation system (OS) before the specific hardware element is initiated when the preset button is not triggered. An electronic device is also disclosed. | 2013-09-05 |
| 20130232327 | Operating System Context Switching - A technique for quickly switching between a first operating system (OS) and a second OS involves deactivating the first OS and booting the second OS from memory. The technique can include inserting a context switching layer between the first OS and a hardware layer to facilitate context switching. It may be desirable to allocate memory for the second OS and preserve state of the first OS before deactivating the first OS and booting the second OS from memory. | 2013-09-05 |
| 20130232328 | METHOD TO SAFELY REPROGRAM AN FPGA - One FPGA provides a multiplexer that allows a host CPU to directly access a second FPGA's memory for upgrading. The second FPGA acts as a buffer and does not participate directly in the upgrade. This permits safer loading and minimizes the impact of a power interruption during upgrading. The architecture can be expanded to any number of FPGA's and any type of software/firmware loading, allowing system programming with a very low risk of catastrophic failure. | 2013-09-05 |
| 20130232329 | Encrypting And Decrypting A Virtual Disc - A computer-readable storage medium containing machine executable instructions that when executed by a processor cause the processor to encrypt a virtual disc; wherein the virtual disc comprises a virtual disc image; and wherein execution of the machine executable instructions cause the processor to: receive the virtual disc; increase the size of the virtual disc; write a decryption-master-boot-record and a decryption program to the virtual disc; encrypt at least a portion of the virtual disc image, wherein the decryption program comprises decryption-machine-executable-instructions for decrypting the at least partially encrypted virtual disc image in accordance with a cryptographic key. | 2013-09-05 |
| 20130232330 | METHOD FOR ENABLING CALIBRATION DURING START-UP OF A MICRO CONTROLLER UNIT AND INTEGRATED CIRCUIT THEREFOR - A method for enabling calibration during start-up of a micro controller unit device is provided. The method comprises, within the MCU device, reading overlay initialisation data from at least one memory element within an external support device operably coupled to the MCU device, and configuring memory mapping functionality of the MCU device to overlay data stored within at least a part of device memory of the MCU device with calibration data stored within the at least one memory element of the external support device in accordance with the overlay initialisation data. | 2013-09-05 |
| 20130232331 | INFORMATION HANDLING SYSTEM PERFORMANCE OPTIMIZATION SYSTEM - A performance optimization system includes a plurality of system components. A monitoring plug-in and a configuration plug-in are coupled to each of the plurality of system components. A monitoring engine receives monitoring information for each of the plurality of system components from their respective monitoring plug-in. A configuration engine sends configuration setting information to each of the plurality of system components through their respective configuration plug-ins. A performance optimization engine receives the monitoring information from the monitoring engine, determines a policy associated with the monitoring information and, in response, retrieves configuration setting information that is associated with the policy and sends the configuration setting information to the configuration engine in order to change the configuration of at least one of the plurality of system components. | 2013-09-05 |
| 20130232332 | INCONSPICUOUS MODE FOR MOBILE DEVICES - A communication device is configured to switch from a normal mode of operation to an inconspicuous mode of operation in which a reduced set of information is presented on a home screen of a display of the device in comparison to a set of information presented on the home screen in the normal mode of operation. In addition, other display properties such as contrast and brightness may be adjusted to make them less conspicuous. The home screen in the inconspicuous mode of operation is less obtrusive or conspicuous to individuals than in the normal mode of operation. The device may enter the inconspicuous mode upon user request or by detecting at least one environmental condition using a sensor available to the mobile communication device. The environmental condition may be anything that the device can detect or sense in its surrounding environment such as ambient light or sound. The device may return to the normal mode of operation by user request or when the environmental condition is no longer present. | 2013-09-05 |
| 20130232333 | METHOD AND APPARATUS FOR INTEGRATING PRECISE TIME PROTOCOL AND MEDIA ACCESS CONTROL SECURITY IN NETWORK ELEMENTS - A transmit portion of a network device including a medium access control (MAC) module configured to receive a frame of data to be transmitted from the network device in accordance with a MAC security (MACsec) protocol. In response to the frame of data being a precise time protocol (PTP) frame, the MAC module is configured to encrypt the PTP frame in accordance with the MACsec protocol, and associate an identifier with the encrypted PTP frame. A physical layer module includes a transmit module configured to transmit the encrypted PTP frame from the network device at a particular time. A PTP module configured to, based on the identifier associated with the encrypted PTP frame, generate a time stamp indicating the particular time that the transmit module transmits the encrypted PTP frame from the network device. The time stamp is transmitted from the network device along with the encrypted PTP frame. | 2013-09-05 |
| 20130232334 | SYSTEM AND METHOD FOR OBTAINING CERTIFICATE STATUS OF SUBKEYS - Systems and methods for updating status of digital certificate subkeys. A request is made to a key server to verify if a given key is revoked. If it is not, then the key with its subkeys is acquired from the key server. If one or more subkeys or signatures of the subkeys are different in the acquired key, then the key is replaced. | 2013-09-05 |
| 20130232335 | NETWORK OPTIMIZATION FOR SECURE CONNECTION ESTABLISHMENT OR SECURE MESSAGING - A first device is configured to receive an instruction to establish a secure connection with a second device or to send a secure message to the second device. The instruction may include a secure connection invitation or a message. The first device may send information, associated with the second device, to a first server; receive a response from the first server; obtain parameters based on the response indicating that the second device is subscribed to the first server; communicate the parameters to the first server; receive a parameters identifier associated with the parameters; store the parameters identifier in the secure connection invitation or the message; and send the secure connection invitation or the message to the second device. The second device may receive the parameters identifier to obtain the parameters to establish the secure connection or to decrypt the secure message. | 2013-09-05 |
| 20130232336 | METHOD AND SYSTEM FOR USER AUTHENTICATION FOR COMPUTING DEVICES UTILIZING PKI AND OTHER USER CREDENTIALS - A system and method for user authentication utilizing PKI credentials and user credentials on an electronic device comprising a mobile communication device, smart phone, a computer or other computing device. | 2013-09-05 |
| 20130232337 | USER TERMINAL AND METHOD FOR PLAYING DIGITAL RIGHTS MANAGEMENT CONTENT - Disclosed herein are a user terminal and method for playing DRM content. The user terminal includes a common security platform. The common security platform includes a DRM application management unit and a security management unit. The DRM application management unit stores and executes a DRM application that requests authentication from a license server and receives a license, including a decryption key for decrypting encrypted DRM content. The DRM application is an application in a downloadable form. The security management unit decrypts the encrypted DRM content, provided by a content providing server, using the decryption key included in the license issued via the DRM application. | 2013-09-05 |
| 20130232338 | NETWORK SECURITY APPLIANCE - Methods, devices, and systems that may be used to secure networked devices are provided. One method includes receiving, at a security device, encrypted configuration data from a management server connected to a data network, from packets addressed to a networked device. The method further includes managing, by the security device, packets between the networked device and other devices accessible through a network based upon the configuration data. The method further includes sending, by the security device, a plurality of encrypted heartbeat messages to the management server utilizing an address associated with the networked device as the originating address for packets in which the encrypted heartbeat messages are transmitted. | 2013-09-05 |
| 20130232339 | SYSTEMS, METHODS AND APPARATUSES FOR THE SECURE TRANSMISSION OF MEDIA CONTENT - The systems, methods and apparatuses described herein permit encrypted media content to be displayed by a display device under control of a local device. The local device may comprise a computer processor to control playing of the encrypted media content and a first communication interface to transmit an association encryption envelope and, according to the control, the encrypted media content. The display device may comprise a second communication interface coupled to the first interface to receive the encrypted media content and the association encryption envelope, a decryption engine to decrypt the association encryption envelope using a private key of the display device to recover a symmetric encryption key used to encrypt the encrypted media content and decrypt the encrypted media content using the recovered symmetric encryption key, and a decoder to decode the decrypted media content for display on a display screen according to the control. | 2013-09-05 |
| 20130232340 | WATERMARK GENERATOR, WATERMARK DECODER, METHOD FOR PROVIDING A WATERMARK SIGNAL, METHOD FOR PROVIDING BINARY MESSAGE DATA IN DEPENDENCE ON A WATERMARKED SIGNAL AND A COMPUTER PROGRAM USING IMPROVED SYNCHRONIZATION CONCEPT - A watermark generator for providing a watermark signal in dependence on binary message data, the watermark generator has an information spreader configured to spread an information unit to a plurality of time-frequency-domain values, to obtain a spread information representation. The watermark generator also has a synchronization inserter configured to multiplicatively combine the spread information representation with a synchronization sequence to obtain a combined information-synchronization representation. The watermark generator also has a watermark signal provider configured to provide the watermark signal on the basis of the combined information-synchronization representation. A watermark decoder, methods and computer programs are also described. | 2013-09-05 |
| 20130232341 | SYSTEM AND METHOD FOR INITIALIZING TOKENS IN A DICTIONARY ENCRYPTION SCHEME - Computer systems and applications are provided for encrypting data in a manner which preserves the ability to process the encrypted data. The method includes arranging a plurality of plaintext symbols in lexicographical order; defining respective first and second subsets of the lexicographically arranged symbols; defining a first and a second set of random tokens for use with the first and second subsets of symbols, respectively; adding a first random constant value to each token in the first set of random tokens; adding a second random constant value to each token in the second set of random tokens; defining the first set of random tokens comprises establishing a first average distance between tokens; and defining the second set of random tokens comprises establishing a second average distance between tokens; wherein the second average distance is different than the first average distance, and the second random constant value is greater than the first random constant value. | 2013-09-05 |
| 20130232342 | SYSTEM FOR PROCESSING FEEDBACK ENTRIES RECEIVED FROM SOFTWARE - A system for processing feedback entries received from software provided by a vendor to an end user machine. The end user machine includes the software, a feedback module, and a database. The feedback module: establishes a secret key k(0) and a secret key n(0; generates an identification tag FE(0); generates a secret key s(0); generates an encryption E | 2013-09-05 |
| 20130232343 | SOFTWARE SELF-DEFENSE SYSTEMS AND METHODS - Systems and methods are disclosed for protecting a computer program from unauthorized analysis and modification. Obfuscation transformations can be applied to the computer program's local structure, control graph, and/or data structure to render the program more difficult to understand and/or modify. Tamper-resistance mechanisms can be incorporated into the computer program to detect attempts to tamper with the program's operation. Once an attempt to tamper with the computer program is detected, the computer program reports it to an external agent, ceases normal operation, and/or reverses any modifications made by the attempted tampering. The computer program can also be watermarked to facilitate identification of its owner. The obfuscation, tamper-resistance, and watermarking transformations can be applied to the computer program's source code, object code, or executable image. | 2013-09-05 |
| 20130232344 | TECHNIQUE FOR SUPPORTING MULTIPLE SECURE ENCLAVES - A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed. | 2013-09-05 |
| 20130232345 | System and Method for Implementing a Trusted Dynamic Launch and Trusted Platform Module (TPM) Using Secure Enclaves - An apparatus and method are described for implementing a trusted dynamic launch and trusted platform module (TPM) using a secure enclave. For example, a computer-implemented method according to one embodiment of the invention comprises: initializing a secure enclave in response to a first command, the secure enclave comprising a trusted software execution environment which prevents software executing outside the enclave from having access to software and data inside the enclave; and executing a trusted platform module (TPM) from within the secure enclave, the trusted platform module securely reading data from a set of platform control registers (PCR) in a processor or chipset component into a memory region allocated to the secure enclave. | 2013-09-05 |
| 20130232346 | METHOD AND APPARATUS WITH STOCHASTIC CONTROL BASED POWER SAVING OPERATION - A method and apparatus controls power consumption of at least one processor core by generating dynamic voltage and clock frequency scaling control information based on stochastic controller control parameters and workload performance error data. A processor core's voltage and clock frequency is varied based on the generated dynamic voltage and clock frequency scaling control information. In one example, a stochastic controller, is coupled to a dynamic voltage and clock frequency scaling (DVFS) circuit. The stochastic controller uses the stochastic controller control parameters and workload performance error data and generates the dynamic voltage and clock frequency scaling control information to control the DVFS circuit. Related methods are also disclosed. | 2013-09-05 |
| 20130232347 | METHOD AND APPARATUS FOR DYNAMIC POWER MANAGEMENT - An integrated circuit (IC) includes a first power supply node that is arranged to receive a first power supply signal. The IC also includes process detection circuits. Each process detection circuit provides a process detection output signal such that a value associated with the process detection output signal is a function of process variation at a location of the process detection circuit outputting the process detection signal. The IC also includes a processing unit that executes the processor-executable instructions to provide at least one voltage control signal, based, at least in part, on the process detection signals. The voltage control signal(s) include a first voltage control signal is associated with a target voltage for the first power supply signal. | 2013-09-05 |
| 20130232348 | Multi-Stage Power Adapter - Multi-stage power adapter techniques are described in which a power adapter for a device is configured to selectively switch between a relatively low power supply and a relatively high power supply. The low power supply may be employed upon initial connection of the adapter to a host device to ensure that the adapter is safe when disconnected and does not supply full power before the device is ready to receive the high power supply. The low power supply may supply enough power for the host device to detect the connection of the adapter and establish initial communication with the adapter. A switch to the high power supply by the adapter may then occur in response to a notification from the host device that indicates the host device is ready for the high power supply. The switch to high power supply enables normal operation of the host device. | 2013-09-05 |
| 20130232349 | Multi-Stage Power Adapter - Multi-stage power adapter techniques are described in which a power adapter for a device is configured to selectively switch between a relatively low power supply and a relatively high power supply. The low power supply may be employed upon initial connection of the adapter to a host device to ensure that the adapter is safe when disconnected and does not supply full power before the device is ready to receive the high power supply. The low power supply may supply enough power for the host device to detect the connection of the adapter and establish initial communication with the adapter. A switch to the high power supply by the adapter may then occur in response to a notification from the host device that indicates the host device is ready for the high power supply. The switch to high power supply enables normal operation of the host device. | 2013-09-05 |
| 20130232350 | Accessory Device Authentication - Accessory device authentication techniques are described. In one or more embodiments, connection of an accessory device to a host computing device is detected. Responsive to the detection, an authentication sequence may occur to verify an identity and/or capabilities of the accessory device. Upon successful authentication of the accessory device, the host device may authorize the accessory device for power exchange interactions with the host device. The host device may then draw supplemental power from a power source associated with the authorized accessory device, such as a battery or power adapter. The host device may also enable the accessory device to obtain and use power supplied by the host device in some scenarios. Power exchange between a host device and an authorized accessory may be managed in accordance with capabilities of the accessory device that are identified during authentication. | 2013-09-05 |
| 20130232351 | DYNAMIC VOLTAGE TRANSITIONS - The operating voltage of an integrated circuit (e.g., a processor) is changed in response to one or more conditions (e.g., a laptop computer is connected to an AC power source). Both the operating frequency and the operating voltage of the integrated circuit are changed. The voltage regulator providing the operating voltage to the integrated circuit is caused to transition between voltage levels using one or more intermediate steps. The integrated circuit continues to operate in the normal manner both at the new voltage and throughout the voltage transition. | 2013-09-05 |
| 20130232352 | DIGITAL RACK INTERFACE POD (DRIP) WITH INTELLIGENT POWER CONTROL SYSTEM AND METHOD - An intelligent power control system and method adapted for use with a digital rack interface pod (DRIP). A switching regulator generates a set output voltage. If power is available from a USB port of an external device, such as an external server, then the system uses this power to power the DRIP. If DC power is detected as being received on a different input from an external power transformer, then the system may still continue to use the power being received from the USB port to power the DRIP. If power from the USB port of the external device is lost but power from the external transformer is present, then the system may use the power available from the external transformer to power the DRIP. If the DRIP is being powered by USB power from the external device, and no DC power is available from the external transformer, but backup power from an appliance to which the DRIP is coupled is being received on one of the DRIP's power input ports, then the DRIP may switch to backup power from the appliance if power from the USB port of the external device (e.g., server) is lost. The system thus intelligently prioritizes the use of power available from a plurality of different power sources to maintain the DRIP powered on when one or more of the power sources is lost or otherwise not available. | 2013-09-05 |
| 20130232353 | Mobile Device Power State - Techniques for mobile device power state are described. In one or more implementations, a mobile device includes a computing device that is flexibly coupled to an input device via a flexible hinge. Accordingly, the mobile device can operate in a variety of different power states based on a positional orientation of the computing device to an associated input device. In one or more implementations, an application that resides on a computing device can operate in different application states based on a positional orientation of the computing device to an associated input device. In one or more implementations, techniques discussed herein can differentiate between vibrations caused by touch input to a touch functionality, and other types of vibrations. Based on this differentiation, techniques can determine whether to transition between device power states. | 2013-09-05 |
| 20130232354 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING SYSTEM, AND COMPUTER-READABLE RECORDING MEDIUM - An information processing apparatus may include an acquiring unit to periodically acquire, from an apparatus, information indicating an amount of power consumption stored for each of power supply states of the apparatus, a computation unit to compute a ratio of the amount of power consumption for each of the power supply states included in the information, for each information acquired by the acquiring unit, and an output unit to output information indicating a change in the ratio, based on an order of the information acquired. | 2013-09-05 |
| 20130232355 | COMMUNICATION DEVICE - A communication device includes a communicating unit that communicates with another electronic device, and a controller that intermittently controls the supply of power to the communicating unit by keeping the supply of power to the communicating unit during a first time period and stopping the supply of power to the communicating unit during a second time period, and determines whether the other electronic device is connected to the communication device within the first time period. When the other electronic device is connected within the first time period, the controller keeps the supply of power to the communicating unit. When the other electronic device is not connected within the first time period, the controller stops the supply of power to the communicating unit during the second time period after the first time period elapses. | 2013-09-05 |
| 20130232356 | ELECTRICAL POWER SAVING SYSTEM - An electrical power saving system including a video display apparatus and at least two video and audio signal transmission apparatuses connected to each other via a communication network. Each of the video and audio signal transmission apparatuses includes a transmission and reception unit that transmits and receives a control command via the communication network and an operation state switching unit that switches an operation state according to the control command. The operation state switching unit is configured to switch a current operation state to an operation state of lower electricity consumption, when the transmission and reception unit receives a control command indicating that another video and audio signal transmission apparatus is transmitting a video and audio signal to the video display apparatus. | 2013-09-05 |
| 20130232357 | METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION OF A PROCESSOR - A method for controlling the clock frequency of a processor while suppressing performance degradation is disclosed. The processor receives power from a battery to operate at a high clock frequency HFM(f) or a low clock frequency LFM(f). An allowable current Im is set for the discharge current of the battery. The time during which the processor operates at the HFM(f) and the time during which the processor operates at the LFM(f) are controlled by PWM. As the feedback current Ifb increases, the time during which the processor operates at the LFM(f) become longer than the time during which the processor operates at the HFM(f). | 2013-09-05 |
| 20130232358 | METHOD AND APPARATUS FOR INCREASING THE POWER CAPABILITY OF A POWER SUPPLY - One controller for a power supply includes an oscillator, a first circuit, a counter, and a pause circuit. The first circuit generates a drive signal to control switching of a switch to regulate an output of the power supply. The first circuit initiates an on time period of the switch in response to both a clock signal of the oscillator and an enable signal that is generated in response to a feedback signal of the power supply. The counter receives the enable signal and generates an output signal when the counter reaches a count value indicating that the enable signal has been idle for an amount of time. The pause circuit generates a pause signal in response to the output signal of the counter. The oscillator is paused in response to the pause signal and a maximum on time period of the switch is extended while the oscillator is paused. | 2013-09-05 |
| 20130232359 | ENERGY EFFICIENT MICROPROCESSOR PLATFORM BASED ON INSTRUCTIONAL LEVEL PARALLELISM - Embodiments of a processing architecture are described. The architecture includes a fetch unit for fetching instructions from a data bus. A scheduler receives data from the fetch unit and creates a schedule allocates the data and schedule to a plurality of computational units. The scheduler also modifies voltage and frequency settings of the processing architecture to optimize power consumption and throughput of the system. The computational units include control units and execute units. The control units receive and decode the instructions and send the decoded instructions to execute units. The execute units then execute the instructions according to relevant software. | 2013-09-05 |
| 20130232360 | Data Processing System with Thermal Control - Various embodiments of the present invention provide systems and methods for a data processing system with thermal control. For example, a data processing system with thermal control is disclosed that includes a number of data processors and a scheduler, which is operable to determine the power consumption of the data processors and to switch the data processing system from a first mode to a second mode and from the second mode to a third mode. The data processing system consumes less power in the third mode than in the first mode. The second mode prepares the data processing system to enter the third mode. | 2013-09-05 |
