| 36th week of 2009 patent applcation highlights part 17 |
| Patent application number | Title | Published |
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| 20090219039 | METHOD AND CIRCUIT FOR DETECTING THE PRESENCE, POSITION AND/OR APPROACH OF AN OBJECT IN RELATIVE TO AT LEAST ONE ELECTRODE - A circuit for detecting the presence, position or the approach of an object in an observation area, the circuit has a sensor electrode assembly with an electrode that forms part of a capacitor system whose capacitance relative to a reference potential (e.g. ground) is dependent on the presence, position or approach of objects in the observation area. An evaluation circuit coupled to the sensor electrode detects a phase shift of the capacitance of the condenser system. An LC network is coupled to the capacitor system, and an oscillator connected to the electrode applies a frequency to the system formed by including the electrode and the LC network at a frequency within the range of a parallel resonance frequency of the LC network. | 2009-09-03 |
| 20090219040 | Sensor for Quantifying Widening Reduction Wear on a Surface - A wear sensor ( | 2009-09-03 |
| 20090219041 | Water Content Detection Sensor System - A water content detection sensor includes a circuit member in which low resistance conductors | 2009-09-03 |
| 20090219042 | Probe card - A probe card includes a plurality of probes that contacts a plurality of electrodes provided in the semiconductor wafer and that inputs or outputs an electrical signal in or from the electrodes, a probe head that holds the probes, a substrate having a wiring which is provided near the surface of the substrate facing the probe head so as to be contactable with the probe head and is connected to the probes, a core layer formed of a material which is buried in the substrate and has a coefficient of thermal expansion lower than that of the substrate, and a connecting member that electrically connects at least some of the probes with an external device via the wiring. | 2009-09-03 |
| 20090219043 | Probe Card - A probe card includes probes that are made of a conductive material and come into contact with a semiconductor wafer to receive or output an electric signal; a probe head that holds the probes; a substrate that has a wiring pattern corresponding to a circuit structure for generating a signal for a test; a reinforcing member that reinforces the substrate; an interposer that is stacked on the substrate for connection of wires of the substrate; a space transformer that is stacked between the interposer and the probe head and transforms intervals among the wires; and a plurality of first post members that have a height greater than the thickness of the substrate, and are embedded in a portion of the substrate on which the interposer is stacked. | 2009-09-03 |
| 20090219044 | Calibration technique for measuring gate resistance of power MOS gate device at wafer level - This invention discloses a method for calibrating a gate resistance measurement of a semiconductor power device that includes a step of forming a RC network on a test area on a semiconductor wafer adjacent to a plurality of semiconductor power chips and measuring a resistance and a capacitance of the RC network to prepare for carrying out a wafer-level measurement calibration of the semiconductor power device. The method further includes a step of connecting a probe card to a set of contact pads on the semiconductor wafer for carrying out the wafer-level measurement calibration followed by performing a gate resistance Rg measurement for the semiconductor power chips. | 2009-09-03 |
| 20090219045 | TESTBED FOR TESTING ELECTRONIC CIRCUITS AND COMPONENTS - There is disclosed an electronic testbed, an electronic testbed board, and a method for positioning receptacles for nails in the electronic testbed board. In an embodiment, the electronic testbed board includes a mounting through-hole for mounting a receptacle for a nail. The mounting through-hole is drilled to a suitably precise diameter for mounting the receptacle substantially perpendicular to the testbed board. One or more via-holes are located adjacent the mounting through-hole, and are adapted to allow an electrical connection between any conductive layers provided at the one or more via-holes. The receptacle may be mounted more accurately and the electronic test bed may be built more accurately by separating the functions of the via-holes and the mounting through-hole. | 2009-09-03 |
| 20090219046 | PROBE CARD INCLINATION ADJUSTING METHOD, INCLINATION DETECTING METHOD AND STORAGE MEDIUM STORING A PROGRAM FOR PERFORMING THE INCLINATION DETECTING METHOD - An inclination adjusting method adjusts an inclination of a probe card installed at a probe apparatus to make the probe card be in parallel with a mounting surface of a movable mounting table for mounting thereon an object to be inspected. The method includes: detecting an average tip height of multiple probes disposed at each of plural locations of the probe card by using a tip position detecting device; obtaining an inclination of the probe card with respect to the mounting table based on differences in the average tip heights detected from the plural locations of the probe card; and adjusting the inclination of the probe card based on the obtained inclination. | 2009-09-03 |
| 20090219047 | PROBE FOR TESTING ELECTRICAL PROPERTIES OF A TEST SAMPLE - A probe for testing electrical properties of test samples includes a body having a probe arm defining proximal and distal ends, the probe arm extending from the body at the proximal end of the probe arm, whereby a first axis is defined by the proximal and the distal ends. The probe arm defines a geometry allowing flexible movement of the probe arm along the first axis and along a second axis perpendicular to the first axis, and along a third axis orthogonal to a plane defined by the first axis and the second axis. | 2009-09-03 |
| 20090219048 | Image Display Device and Testing Method of the Same - It is the primary object of the present invention to provide a simple and accurate testing circuit and a testing method while occupying as small space as possible in an image display device. The testing circuit including a NAND circuit connected in series is mounted on the image display device. A broken wiring on a data signal line and a defect in a data latch circuit can be detected by observing an output waveform from the testing circuit. Accordingly, a broken wiring or the like on the data signal line and a scanning line and a defect in the latch circuit can be tested simply and accurately without an expensive testing apparatus and a great deal of time while occupying as small space as possible. | 2009-09-03 |
| 20090219049 | Method and Apparatus for Testing and Protecting Digital Output Circuits - A method and system for testing and protecting the operability of an output module. An output channel includes a transistor having a gate, a source, and a drain. The output channel drives a load with a load voltage and a load current in dependence upon a gate drive signal applied to the gate. The system determines a voltage threshold and a current threshold and monotonically varies the gate drive signal from a starting value for a predetermined time interval while monitoring the load current and the load voltage. The system returns the gate drive signal to the starting value if any of the load voltage reaches the voltage threshold, the load current reaches the current threshold, or a predetermined time interval expires indicating the condition of the output module. | 2009-09-03 |
| 20090219050 | METHOD FOR DETECTING A MALFUNCTION IN AN ELECTROMAGNETIC RETARDER - A method for detecting a malfunction in an electromagnetic retarder. More specifically, the method relates to a retarder comprising: stator primary coils ( | 2009-09-03 |
| 20090219051 | HYBRID NANOTUBE/CMOS DYNAMICALLY RECONFIGURABLE ARCHITECTURE AND AN INTEGRATED DESIGN OPTIMIZATION METHOD AND SYSTEM THEREFOR - A hybrid nanotube, high-performance, dynamically reconfigurable architecture, NATURE, is provided, and a design optimization flow method and system, NanoMap. A run-time reconfigurable architecture is provided by associating a non-volatile universal memory to each logic element to enable cycle-by-cycle reconfiguration and logic folding, while remaining CMOS compatible. Through logic folding, significant logic density improvement and flexibility in performing area-delay tradeoffs are possible. NanoMap incorporates temporal logic folding during the logic mapping, temporal clustering and placement steps. NanoMap provides for automatic selection of a best folding level, and uses force-direct scheduling to balance resources across folding stages. Mapping can thereby target various optimization objectives and user constraints. A high-density, high-speed carbon nanotube RAM can be implemented as the universal memory, allowing on-chip multi-context configuration storage, enabling fine-grain temporal logic folding, and providing a significant increase in relative logic density. | 2009-09-03 |
| 20090219052 | Transmitter swing control circuit and method - Disclosed herein are embodiments of a swing compensation scheme for compensating errors in a transmitter driver. | 2009-09-03 |
| 20090219053 | POWER EFFICIENT MULTIPLEXER - A power efficient multiplexer. In accordance with a first embodiment of the present invention, a power efficient multiplexer comprises a transmission gate structure for selectively passing one of a plurality of input signals and a stacked inverter circuit for inverting the one of a plurality of input signals. Both the stacked inverter and the transmission gate provide beneficial reductions in static power consumption in comparison to conventional multiplexer designs. | 2009-09-03 |
| 20090219054 | CURRENT MODE LOGIC DIGITAL CIRCUITS - A digital circuit comprises: a first arm including a first metal oxide semiconductor field effect transistor (M | 2009-09-03 |
| 20090219055 | Signal Comparison Circuit and Power Conversion Device - The voltage deviation is converted into the time quantity with the first integration circuit for the voltage detection and the second integration circuit for the voltage detection. The current setting value and the current measurements are converted into the time quantity with the second integration circuit for the current control to which the first integration circuit for the current control from which the voltage value of the set current value corresponding is input and the voltage value of the value of the current of the inductor corresponding are input and it controls. And, the start of the first integration circuit for the current control is delayed with operation quantity signal generation circuit only at the time that the high-resolution evaluation or more than the start of the first integration circuit for the current control and corresponds to the voltage deviation. | 2009-09-03 |
| 20090219056 | SIGNAL DETECTION CIRCUIT WITH DEGLITCH AND METHOD THEREOF - A signal detection circuit is used for detecting signal squelch of a differential input signal to generate a corresponding digital output signal. The signal detection circuit includes: a reference voltage generator for generating a reference voltage of which the common mode voltage tracks the common mode voltage of the input signal; a real-time signal judgment circuit, real-time rectifying and amplifying a difference between the input signal and the reference voltage; and a deglitch circuit, sampling and/or amplifying an output signal of the real-time signal judgment circuit, and transforming sampling results into the digital output signal to reflect signal squelch of the differential input signal. | 2009-09-03 |
| 20090219057 | Systems and methods for determining an out of band signal - Various embodiments of the present invention provide systems and circuits that provide for out of band detection. As one example, an out of band detection circuit is disclosed that includes an input signal, a clock generation circuit, and a sampling circuit. The clock generation circuit receives the input signal and derives therefrom a sampling clock, and the sampling circuit is operable to sample the input signal at a time indicated by the sampling clock. | 2009-09-03 |
| 20090219058 | CORRELATED DOUBLE SAMPLING CIRCUIT AND SAMPLE HOLD CIRCUIT - A correlated double sampling circuit has a sampling capacitor equally divided into a plurality of portions. In the correlated double sampling circuit, an input signal is sampled at a plurality of sampling points and an averaging switch is closed to obtain an average value of a plurality of sampling values obtained by sampling. High frequency noise superimposed on the input signal is thus reduced and a difference between the average values of the plurality of sampling values obtained by sampling is output. | 2009-09-03 |
| 20090219059 | TRACK-AND-HOLD CIRCUIT WITH LOW DISTORTION - A track-and-hold circuit is provided. This track-and-hold circuit is adapted to track an analog input signal and hold a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with a hold signal. Preferably, the track-and-hold circuit includes a bi-directional current source that sources and sinks current through a first output node and a second output node, a unity gain amplifier that is coupled to first and second output nodes of the bi-directional current source and that receives the analog input signal, a resistor coupled to an output of the unity gain amplifier, and a capacitor coupled between the resistor and ground. Of interest, however, is the bi-directional current source, which includes a differential input circuit that is adapted to receive the track signal and the hold signal and that is coupled to the first and second output nodes and an RC network that is coupled to the differential input circuit. The RC network receives the analog input signal and is scaled to change the location of a zero to reduce the signal-dependence of the sampling instant. | 2009-09-03 |
| 20090219060 | METHOD AND APPARATUS OF SFDR ENHANCEMENT - A track-and-hold or sample-and-hold (S/H) circuit for an analog-to-digital converter (ADC) is provided. A difference between the disclosed S/H circuit and conventional S/H circuits is the use of a peaking circuit. This peaking circuit generally provides increased current to switching transistor when transitioning between track and hold which can increase the Spurious-Free Dynamic Range (SFDR) as low frequencies, by as much as 15 dB. | 2009-09-03 |
| 20090219061 | PULSE GENERATOR CIRCUIT AND COMMUNICATION APPARATUS - A pulse generator circuit that outputs pulses having a predetermined shape from an output terminal based on a start signal includes a timing generator circuit that generates (n+1) signals (n is an integer greater than or equal to 2), the phases of which sequentially change at predetermined time intervals from the point when the phase of the start signal changes, first and second power supplies that supply predetermined potentials, n impedance devices, and a switching circuit that connects the output terminal to the first or second power supply in a predetermined order according to the value of a logic function based on the (n+1) signals via the corresponding impedance device. | 2009-09-03 |
| 20090219062 | BUFFER CIRCUIT AND PHOTORECEIVING CIRCUIT USING THE SAME - A buffer circuit includes a first transistor having a base connected to a first power supply, an emitter as a current signal input node, and a collector as a current signal output node, a second transistor having a base connected to the first power supply, a first constant current circuit using a difference between outgoing current from the emitter of the first transistor and an input current at the current signal input node as a constant current, and determining outgoing current from the emitter of the second transistor as a current same as the constant current; and a first mirror circuit that makes a collector current of the first transistor equal to a collector current of the second transistor in which the first mirror circuit has a third transistor with a collector connected to the collector of the first transistor and a fourth transistor with a collector connected to a collector of the second transistor, a first operating point voltage is provided to the current signal output node between the third transistor and the first transistor, and a second operating point voltage based on the first operating point voltage is provided to a node between the fourth transistor and the second transistor. | 2009-09-03 |
| 20090219063 | METHODS AND ARTICLES OF MANUFACTURE FOR OPERATING ELECTRONIC DEVICES ON A PLURALITY OF CLOCK SIGNALS - Embodiments of the invention relate to an integrated circuit comprising at least one functional unit configured to operate at a first clock frequency. The integrated circuit also comprises at least one first interconnect originating from a contact pad and leading to at least one frequency divider configured to receive a clock signal having a second frequency and generate one or more clock signals to operate the functional unit at the first frequency. The integrated circuit further comprises at least one second interconnect coupling an output of the frequency divider and an input of the functional unit, wherein a total length of the second wired interconnect is less than a total length of the first wired interconnects. | 2009-09-03 |
| 20090219064 | PULSE GENERATOR CIRCUIT AND COMMUNICATION APPARATUS - A pulse generator circuit that outputs pulses having a predetermined shape from an output terminal based on a start signal includes a timing generator circuit that generates (n) signals (n is an integer greater than or equal to 2), the phases of which sequentially change at predetermined time intervals from the point when the phase of the start signal changes, a pulse width signal generator circuit that generates a first pulse width signal and a second pulse width signal having a pulse width that corresponds to the duration of the pulses to be generated based on the start signal, a first filter circuit to which the first pulse width signal is inputted, the first filter circuit limiting the band of the first pulse width signal, a second filter circuit to which the second pulse width signal is inputted, the second filter circuit limiting the band of the second pulse width signal, first and second power supplies that supply predetermined potentials, a first variable impedance circuit whose impedance value is controlled by the output value from the first filter circuit, a second variable impedance circuit whose impedance value is controlled by the output value from the second filter circuit, and a switching circuit that alternately connects the output terminal to the first power supply via the first variable impedance circuit or the second power supply via the second variable impedance circuit using a logic function value based on at least part of the n signals. | 2009-09-03 |
| 20090219065 | Semiconductor Device and Electronic Apparatus - A read-start-timing set circuit is connected to a timing terminal (CT | 2009-09-03 |
| 20090219066 | POWER-ON RESET CIRCUIT - A power-on reset circuit produces a reset signal output configured by an upper trip-point in an input hysteresis characteristic of the circuit. The upper trip-point is configured by resistances of a first pair of resistors coupled in series at an internal voltage reference node. A temperature coefficient of the upper trip-point is configured by resistance values of a second pair of resistors where each resistor is coupled with a corresponding switching device with an associated switching threshold. A magnitude of the input hysteresis characteristic is configured by resistances of a third pair of resistors in series. The magnitude of hysteresis is configured independent of configuring either the level or the temperature coefficient of the upper trip-point. | 2009-09-03 |
| 20090219067 | Locked Loop Circuit With Clock Hold Function - A locked loop circuit having a clock hold function. The locked loop circuit includes a select circuit, phase mixing circuit, hold signal generator and latch circuit. The select circuit selects one of a plurality of phase values in response to a select signal, and the phase mixing circuit generates a first clock signal having a phase angle according to the selected phase value. The hold signal generator asserts a hold signal in response to a transition of the select signal, and the latch circuit latches the state of the first clock signal in response to assertion of the hold signal. | 2009-09-03 |
| 20090219068 | Phase detector, phase comparator, and clock synchronizing device - A flip-flop circuit includes: a first latch circuit that receives input of a data signal and a rise delay clock signal, raises a signal of a first node according to the fall of the rise delay clock signal, and lowers the signal of the first node according to the rise of the rise delay clock signal; a second latch circuit that receives input of the signal of the first node and the clock signal and lowers a signal of a second node at timing when the clock signal falls; a third latch circuit that receives input of the signal of the second node and the clock signal and generates an output signal for maintaining the data signal; and a pull-down circuit that pulls down the signal of the first node with the rise delay clock signal. | 2009-09-03 |
| 20090219069 | Semiconductor integrated circuit device - Circuit elements and wirings constituting a circuit, and first electrodes electrically connected to such a circuit are provided on one main surface of a semiconductor substrate. An organic insulating film is formed on the circuit except for openings on the surfaces of the first electrodes. First and second external connecting electrodes are provided on the organic insulating film. At least one conductive layer for electrically connecting the first and second external connecting electrodes and the first electrodes is placed on the organic insulating film. | 2009-09-03 |
| 20090219070 | CONTROL DEVICE FOR USE IN A RESONANT DIRECT CURRENT/DIRECT CURRENT CONVERTER - A control device for controlling a switch unit of a resonant direct current/direct current converter includes a frequency modulation controller and a pulse selector. The frequency modulation controller is adapted to be coupled electrically to the converter for receiving a correcting threshold value and output information of the converter, and for generating a synchronization signal according to the correcting threshold value and the output information received thereby. The pulse selector is adapted to be coupled electrically to the converter and the frequency modulation controller for receiving the correcting threshold value, the output information and the synchronization signal, and for generating a driving signal according to the correcting threshold value, the output information and the synchronization signal received thereby. The driving signal is adapted to drive the switch unit and has a working period. The driving signal switches between high and low signal levels at a frequency that is substantially equal to that of the synchronization signal during the working period. | 2009-09-03 |
| 20090219071 | Transmission line based high voltage pulse generator - A high voltage, fast pulse rise/fall time, and high repetition rate pulse generator solves the high pulse repetition rate limitations associated with RF power amplifiers and gap switch type pulse generators. The pulse generator employs a transmission line architecture and structural techniques that allow for continued high voltage, fast rise/fall time, and high repetition pulse rate operation of the pulse generator without impairment of the pulse generator while exceeding performance characteristics achievable with conventional RF power amplifiers and gap switch type pulse generators. | 2009-09-03 |
| 20090219072 | Apparatus, circuit and method of transmitting signal - An apparatus includes a transmission circuit which transmits a data by a differential signal, and a control circuit which halts a portion of the differential signal under a predetermined condition. | 2009-09-03 |
| 20090219073 | HIGH RESOLUTION TIME-TO-DIGITAL CONVERTER - A time-to-digital converter (TDC) can have a resolution that is finer than the propagation delay of an inverter. In one example, a fractional-delay element circuit receives a TDC input signal and generates therefrom a second signal that is a time-shifted facsimile of a first signal. The first signal is supplied to a first delay line timestamp circuit (DLTC) and the second signal is supplied to a second DLTC. The first DLTC generates a first timestamp indicative of a time between an edge of a reference input signal to the TDC and an edge of the first signal. The second DLTC generates a second timestamp indicative of a time between the edge of the reference input signal and an edge of the second signal. The first and second timestamps are combined and together constitute a high-resolution overall TDC timestamp that has a finer resolution than either the first or second timestamps. | 2009-09-03 |
| 20090219074 | Capacitive Coupling Type Level Shift Circuit of Low Power Consumption and Small Size - Provided is a level shift circuit. The level shift circuit includes an inverter including a first transistor having a first polarity to which an input signal from an input port is applied through a gate and a second transistor having a second polarity which is an opposite polarity to the first polarity, the second transistor being connected in series to the first transistor between a positive source voltage and a negative source voltage and a connection node between the first and second transistors being an output port, a capacitor connected between a gate of the first transistor and a gate of the second transistor, and a voltage adjusting means for accurately adjusting a voltage applied to the gate of the second transistor according to an exact switching operation time of the second transistor, using a clock signal and an output port signal of the inverter. A stable and high-speed operation can be performed with a comparatively small size and low power consumption can be achieved. | 2009-09-03 |
| 20090219075 | Full Bridge Arrangement - A full bridge that produces an alternating output signal can be driven by operating switching elements of the full bridge in each period in a switching sequence that determines the order of the activation and deactivation of the switching elements. The switching elements are switched in at least two different switching sequences, a first switching sequence is repeated n times before a second switching sequence is carried out, with n>1, or the switching elements are switched in at least three different switching sequences. | 2009-09-03 |
| 20090219076 | APPARATUS, SYSTEM, AND METHOD FOR GROUNDING INTEGRATED CIRCUIT OUTPUTS - An apparatus, system, and method are disclosed for grounding IC outputs. A first switching module turns on when an IC power supply voltage exceeds a base voltage. The first switching module is in communication with IC outputs and a common ground. The IC outputs are configured to be pulled up to the IC power supply voltage through pull-up resistors when a first voltage is driven lower than the base voltage. In addition, the first switching module connects the IC outputs to the common ground. A second switching module turns on, turns turn off the first switching module, disconnects the IC outputs from the common ground, and pulls the IC outputs up to the IC power supply voltage when the IC power supply voltage exceeds a minimum working voltage. | 2009-09-03 |
| 20090219077 | VOLTAGE MULTIPLIER WITH IMPROVED EFFICIENCY - A multi-stage voltage multiplication circuit and methodology are provided which use a multi-stage charge pump boosting circuit ( | 2009-09-03 |
| 20090219078 | CHARGE PUMP DOWN CIRCUIT AND METHOD FOR THE SAME - The present invention discloses a charge pump down circuit which comprises three capacitors operating in three time phases. In the first time phase, the total of the voltages across the three capacitors is equal to an input voltage; in the second time phase, the voltage across the second capacitor is equal to the voltage across the third capacitor; in the third time phase, the difference between the voltages across the first and the second capacitors is equal to the voltage across the third capacitor, wherein the voltage across the third capacitor is the output voltage of the charge pump down circuit. | 2009-09-03 |
| 20090219079 | CHARGE PUMP CIRCUIT FOR RFID INTEGRATED CIRCUITS - An exemplary embodiment of the invention provides a charge pump stage ( | 2009-09-03 |
| 20090219080 | INTERNAL VOLTAGE GENERATION CIRCUIT - Internal voltage generation circuit including a reference oscillation signal generator for generating a reference oscillation signal according to a comparison result of a pumping voltage with a reference voltage, an oscillation signal generator for generating a plurality of oscillation signals with a predetermined phase difference and a pumping voltage generator for generating a pumping voltage through sequential charge pumping operations performed in response to the plurality of oscillation signals, respectively. | 2009-09-03 |
| 20090219081 | INTERNAL VOLTAGE GENERATOR OF SEMICONDUCTOR MEMORY DEVICE - An internal voltage generation circuit of semiconductor memory device includes a reference voltage generation unit configured to generate a reference voltage, and a pumping control unit configured to be enabled at every active mode, compare the reference voltage with a fed-back voltage of a pumping voltage terminal, and output a pumping enable signal based on a comparison result. A storage unit is configured to store and output the pumping enable signal outputted from the pumping control unit. A charge pumping unit is configured to drive the pumping voltage terminal by performing a charge pumping operation in response to the pumping enable signal outputted from the storage unit. | 2009-09-03 |
| 20090219082 | Semiconductor device whose internal power supply voltage is generated by voltage step-up circuit - A semiconductor device includes a voltage step-up circuit and a control circuit. The voltage step-up circuit includes at least a first capacitor and a second capacitor which generate an internal power supply voltage. The control circuit controls the voltage step-up circuit. The control circuit connects the first and second capacitors in series to perform a first voltage step-up operation and connects the first and second capacitors in parallel to perform a second voltage step-up operation. The voltage step-up circuit generates a first stepped-up voltage in the first voltage step-up operation and generates a second stepped-up voltage in the second voltage step-up operation. The circuit area of the voltage step-up circuit with a plurality of stepped-up levels is reduced. | 2009-09-03 |
| 20090219083 | ELECTRIC CIRCUIT DEVICE - An electric circuit device includes: a power supply line; a load circuit; a current supply controller which compares a voltage of the power supply line with a certain voltage; and a current supply circuit which supplies a electric current from the power supply line to the load circuit and changes the electric current during a supply of the electric current. | 2009-09-03 |
| 20090219084 | Device for Optimising the Energy Consumption of an Electric Circuit Component - An apparatus for optimizing power consumption of an electrical circuit component in an operating- and evaluating-circuit of a two-conductor field device, wherein a control unit is provided, which switches the electrical circuit component with a clock signal. An energy supply unit is provided for supplying the circuit component with energy, and wherein at least one energy-storing component is connected to at least one output, at least one input and/or a supply input of the electrical circuit component. The apparatus provides for a field device, a suitable electronics for enabling improvement of the energy budget of the evaluating- and operating-circuit, especially its circuit component. | 2009-09-03 |
| 20090219085 | DIFFERENTIAL TO SINGLE-ENDED CONVERSION CIRCUIT AND COMPARATOR USING THE CIRCUIT - An electrical circuit for conversion from differential to single-ended includes a differential amplifier stage and first and second buffer circuits. The differential amplifier stage includes a first and a second input; and a first and a different second charging circuit that can be operatively coupled, respectively, with an output of the conversion circuit and with an auxiliary output. Each of the first and second buffer circuits is functionally arranged between one of said outputs and between one of said charging circuits. The buffer circuits being configured so as to substantially equalize relative impedances seen towards said outputs. | 2009-09-03 |
| 20090219086 | AMPLIFIER, AMPLIFYING METHOD, AND FILTER - An amplifier is provided which includes: a first variable capacitance device of which capacitance is variable, a second variable capacitance device of which capacitance is variable, electrically connected to the first variable capacitance device, and of an inverse conductivity type from the first variable capacitance device, and a first input unit for selectively inputting a bias voltage and a voltage signal to the first variable capacitance device and the second variable capacitance device, wherein, in the event that the bias voltage and the voltage signal are input to the first variable capacitance device and the second variable capacitance device, the capacitance of the first variable capacitance device and the second variable capacitance device is taken as a first value, and wherein the voltage signal is amplified with the capacitance of the first variable capacitance device and the second variable capacitance device as a second value smaller than the first value. | 2009-09-03 |
| 20090219087 | TRAVELLING WAVE AMPLIFIER - A travelling wave amplifier has two inductive transmission lines ( | 2009-09-03 |
| 20090219088 | APPARATUS AND METHOD FOR CORRECTING NON-LINEAR DISTORTION BASED ON CHARACTERISTIC MODELING OF HIGH POWER AMPLIFIER - An apparatus for correcting a non-linear distortion includes a pre-distorter for pre-distorting a transmit signal inputted from an external apparatus based on pre-distortion characteristics outputted from a pre-distortion characteristic predictor; a modulator for modulating the pre-distorted signal to thereby generate a modulated signal; a frequency up-converter for up-converting a frequency of the modulated signal to thereby generate an up-converted signal; a high power amplifier for amplifying the up-converted signal to a high power amplified signal; a frequency down-converter for down-converting a frequency of the high power amplified signal, thereby generate a down-converted signal; a demodulator for demodulating the down-converted signal, to thereby generate a demodulated signal; a high power amplifying characteristic predictor for predicting characteristics of the high power amplifier based on the pre-distorted signal and the demodulated signal; and a pre-distortion characteristic predictor for predicting the pre-distortion characteristics based on the pre-distorted signal and the predicted high power amplifying characteristics. | 2009-09-03 |
| 20090219089 | Amplifier arrangement and method - An amplifier arrangement having a transistor arrangement comprising a first transistor ( | 2009-09-03 |
| 20090219090 | OUTPUT DC OFFSET PROTECTION FOR CLASS D AMPLIFIERS - A class D amplifier with output DC offset protection is disclosed. The DC offset protection receives a PWM input signals from the outputs and investigates the PWM output signals whether there is a large DC voltage difference is being reflected on the speaker load. If so, shutdown signal SD will be sent by the DC offset protection to the PWM control logic and gate driver, thus, shutting down the output of the class D system and preventing disastrous condition from being develop across the speaker. | 2009-09-03 |
| 20090219091 | SYSTEM AND METHOD FOR MEASURING THE OUTPUT OF A PHOTODETECTOR - A system for measuring the output of a photodetector is disclosed. An integrating amplifier circuit receives a signal output from the photodetector and is adapted to output an integrating amplifier voltage proportional to the signal output from the photodetector. A reference source is adapted to serve as a voltage source and is adapted to output a reference voltage proportional to background light incident upon the photodetector. A difference amplifier electronically coupled to the integrating amplifier circuit and to the adjustable reference, receiving the integrating amplifier voltage and the reference voltage, respectively. The difference amplifier is adapted to generate an amplified output using the reference voltage subtracted from the integrating amplifier voltage. | 2009-09-03 |
| 20090219092 | HIGHLY LINEAR DIFFERENTIAL AMPLIFIER WITH A NOVEL RESISTIVE SOURCE DEGENERATION NETWORK - There is provided a highly linear differential amplifying circuit. The highly linear differential amplifying circuit includes: a differential amplifying unit including a main differential amplifying unit having a differential pair of transistors for amplifying a difference of two input signals and an auxiliary amplifying unit connected in parallel with the main differential amplifying unit, wherein second-order derivatives of transconductances of the main differential amplifying unit and the auxiliary differential amplifying unit are properly set to have an offset; and a source degeneration resistor unit including a first source degeneration resistor to a fourth source degeneration resistor. Accordingly, the linearity of the differential amplifying circuit is improved at a wide output power region. | 2009-09-03 |
| 20090219093 | AMPLIFIER WITH ACTIVE INDUCTOR - An amplifier comprises an amplifier stage and an active inductor. The amplifier stage has an input terminal and an output terminal. The active inductor comprises first and second resistors and first and second transistors. The first resistor has a first terminal coupled to the output terminal of the amplifier stage, and a second terminal. The second resistor has a first terminal coupled to the output terminal of the amplifier stage, and a second terminal. The first transistor has a first current electrode coupled to the second terminal of the first resistor, a control electrode coupled to receive a bias voltage, and a second current electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a control electrode coupled to the second terminal of the second resistor, and a second current electrode coupled to a first power supply voltage terminal. | 2009-09-03 |
| 20090219094 | DIFFERENTIAL AMPLIFIER CIRCUIT AND FREQUENCY MIXER FOR IMPROVING LINEARITY - A differential amplifier circuit and a frequency mixer for improving linearity are disclosed. The disclosed differential amplifier circuit includes first and second loads, a first output terminal for the first load, a second output terminal for the second load, a differential amplifying stage including a differential stage for amplifying a voltage difference between a first input stage and a second input stage, and a biasing current source for biasing the differential stage, and a non-linearity filtering circuit for filtering a non-linear signal generated from the differential amplifying stage. The non-linearity filtering circuit includes a first cross circuit including a first transistor to connect the first and second output terminals, and a second cross circuit including a second transistor to connect the first and second output terminals. The differential amplifier circuit achieves an improvement in linearity, as compared to conventional differential amplifier circuits, by offsetting, at a load side, a non-linear component generated at an active element of the differential amplifier circuit, to output only a linear current component. | 2009-09-03 |
| 20090219095 | OPERATIONAL TRANSCONDUCTANCE AMPLIFIER (OTA) - Apparatus and methods provide an operational transconductance amplifier (OTA) with one or more self-biased cascode current mirrors. Applicable topologies include a current-mirror OTA and a folded-cascode OTA. In one embodiment, the self-biasing cascode current mirror is an optional aspect of the folded-cascode OTA. The self-biasing can advantageous reduce the number of biasing circuits used, which can save chip area and cost. One embodiment includes an input differential pair of a current-mirror OTA. | 2009-09-03 |
| 20090219096 | OPEN LOOP DC CONTROL FOR A TRANSIMPEDANCE FEEDBACK AMPLIFIER - A transimpedance amplifier having open-loop DC control is provided. The open-loop feedback control may provide a DC bias that is configurable based on the characteristics of an input device, such as, a photodiode or a magnetoresistor. The open-loop feedback control may provide quick recovery from voltage level variations and may provide stability for the amplifier. | 2009-09-03 |
| 20090219097 | DEVICE AND METHOD FOR AMPLIFYING RADIOCOMMUNICATION SIGNALS - The present invention relates to a method for amplifying radiocommunication signals via a string ( | 2009-09-03 |
| 20090219098 | METHOD AND SYSTEM FOR POLAR MODULATION WITH DISCONTINUOUS PHASE FOR RF TRANSMITTERS WITH POWER CONTROL - Aspects of a method and system for polar modulation with discontinuous phase for RF Transmitters with power control may include performing by one or more circuits comprising a plurality of amplifiers, configuring one or more of the plurality of amplifiers to provide a coarse amplitude gain and a power level gain. One or more remaining ones of the plurality of amplifiers may be configured to provide an amplitude offset gain, and a signal may be amplified utilizing a combined gain provided by the one or more of the plurality of amplifiers and by the one or more remaining ones of the plurality of amplifiers. The signal may comprise modulated RF signal, and/or a phase modulated RF signal. An RF carrier signal may be modulated to generate the signal. | 2009-09-03 |
| 20090219099 | DIGITAL SYNTHESIZER FOR LOW POWER LOCATION RECEIVERS - A high-frequency phase locked loop synthesizer having a selectable fractional-N divider and integer divider along with a phase frequency detector implemented as a CMOS logic block. | 2009-09-03 |
| 20090219100 | VOLTAGE-CONTROLLED OSCILLATOR GAIN CALIBRATION FOR TWO-POINT MODULATION IN A PHASE-LOCKED LOOP - A phase-locked loop (PLL) is arranged to receive high-pass data at a first input and low-pass data at a second input. A first digital input is coupled to a primary path through a digital-to-analog converter (DAC) and a second digital input is coupled to a feedback path of the PLL. The controller provides the first input and the second input during a calibration procedure. The controller adjusts first and second control inputs in an attempt to keep the input voltage to a voltage-controlled oscillator (VCO) in the PLL constant while determining the gain of the VCO in Hz/LSB. | 2009-09-03 |
| 20090219101 | Ovenized crystal oscillator assembly - An oscillator assembly including an oscillator seated on a pad of thermally conductive material formed on the surface of a printed circuit board and covered by a lid defining an oven for the oscillator. In one embodiment, a plurality of heaters are located on different sides of the oscillator and at least partially seated on the pad for evenly transferring heat to the pad and the oscillator. In one embodiment, the oscillator is a temperature compensated crystal oscillator and an integrated amplifier controller circuit on the printed circuit board integrates at least one operational amplifier for controlling the heater(s) and one or more transistors for providing heat to the oven. A canopy seated on the pad and covering the oscillator can be used for transferring heat more evenly to the oscillator. A cavity in the bottom of the printed circuit board defines an insulative air pocket. | 2009-09-03 |
| 20090219102 | STABILIZED ELECTRICAL OSCILLATORS WITH NEGATIVE RESISTANCE - An electrical oscillator includes a first oscillating transistor and a second oscillating transistor. The electrical oscillator also includes a first non-linear load connected to a terminal of the first oscillating transistor, and a second non-linear load connected to a terminal of the second oscillating transistor. The electrical oscillator also includes a negative resistance generated between the terminal of the first oscillating transistor and the terminal of the second oscillating transistor. The electrical oscillator does not include a tunable resonator. | 2009-09-03 |
| 20090219103 | Oscillator Arrangement and Method for Operating an Oscillating Crystal - The oscillator arrangement ( | 2009-09-03 |
| 20090219104 | MEMS RESONATOR, A METHOD OF MANUFACTURING THEREOF, AND A MEMS OSCILLATOR - The invention relates to a MEMS resonator comprising a movable element ( | 2009-09-03 |
| 20090219105 | POLAR MODULATION APPARATUS AND METHOD WITH COMMON-MODE CONTROL - The present invention relates to a polar modulation apparatus and method, in which a polar-modulated signal is generated based on separately processed phase modulation (PM) and amplitude modulation (AM) components of an input signal. An amplified polar modulated output signal is generated in accordance with the phase modulation and amplitude modulation components by using a differential power amplifier circuitry ( | 2009-09-03 |
| 20090219106 | TWO-PORT ISOLATOR - A two-port isolator comprising a central conductor assembly comprising first and second central conductors disposed on a ferrite plate, the first central conductor being connected between a first input/output port and a second input/output port, and the second central conductor being connected between a second input/output port and a ground, wherein the first and second central conductors are constituted by two conductor strip patterns formed on both surfaces of an insulating substrate, wherein the conductor strip patterns are crossing at a predetermined angle with insulation, and wherein both end portions of the conductor strip patterns extend from edges of the insulating substrate and are bent to cover side surfaces of the ferrite plate. | 2009-09-03 |
| 20090219107 | ADJUSTABLE LOW-LOSS INTERFACE - In general, in accordance with an exemplary aspect of the present invention, a low-loss interface for connecting an integrated circuit such as a monolithic microwave integrated circuit to an energy transmission device such as a waveguide is disclosed. The interface comprises an isolation wall placed between an input and output region of an integrated circuit to reduce ripple and isolate the waveguide cavity from the monolithic microwave integrated circuit circuitry. The interface further comprises a turning screw or other similar member that is configured to closely match the impedance of integrated circuit | 2009-09-03 |
| 20090219108 | APPARATUS AND METHOD FOR INCREASING SENSITIVITY OF ULTRASOUND TRANSDUCERS - An acoustical stack for use within an ultrasound transducer that has a center frequency has a poled piezoelectric material layer and at least one impedance matching layer. The poled piezoelectric material layer has top and bottom sides and is formed of poled piezoelectric material that has a first acoustic impedance. The poled piezoelectric material layer has a first thickness and the acoustical stack has an output electrical impedance based on the first thickness. The impedance matching layers are configured to be attached to the top and bottom sides of the poled piezoelectric material layer and have second or third thicknesses. The impedance matching layers are formed of one or more materials that have an acoustic impedance substantially similar to the first acoustic impedance. The poled piezoelectric layer and impedance matching layers form an acoustic resonance thickness. The center frequency of the transducer is based on the acoustic resonance thickness. | 2009-09-03 |
| 20090219109 | MICROWAVE COMBINER/SPLITTER - A power amplifier (power amplifier) having multiple solid state sub-amplifiers connected in parallel between the power amplifier input and the power amplifier output are described. The signal input to the power amplifier is provided to an RF splitter connected between the power amplifier input connector and the input of each of the sub-amplifiers. The RF splitter splits the input power from the signal input and provides the power to the sub-amplifier inputs through input electrical paths. The input electrical paths from the power amplifier input to the sub-amplifiers are substantially physically identical. Each of the sub-amplifiers drive an input of an RF combiner connected between the outputs of the sub-amplifiers and the output of the power amplifier. The RF combiner combines the output power from each of the sub-amplifiers through output electrical paths, and provides the combined power to the power amplifier output. The output electrical paths from the sub-amplifiers to the power amplifier output are substantially physically identical. | 2009-09-03 |
| 20090219110 | MERGED-FILTER MULTIPLEXER - A multiplexer circuit may include a first-frequency-quarter-wavelength transmission line extending between a junction between a common terminal and a second-frequency terminal, and a first-frequency low-impedance circuit electrically directly connecting the first transmission line to a circuit ground. In some examples, a second-frequency-quarter-wavelength transmission line may extend between the first transmission line and a third-frequency terminal. A second-frequency low-impedance circuit may electrically directly connect the second transmission line to the circuit ground. The first and second transmission lines and the first and second low-impedance circuits may provide a third-frequency transmission line. A further second-frequency low-impedance circuit may electrically couple the second terminal to the first transmission line. A third-frequency low-impedance circuit may electrically couple the second terminal to the circuit ground. The first-frequency, further second-frequency, and third-frequency low-impedance circuits and the first transmission line may provide in combination a second-frequency transmission line. | 2009-09-03 |
| 20090219111 | PHASE SHIFTER WITH FLEXIBLE CONTROL VOLTAGE - The invention provides a phase shifter with flexible control voltage that is useful with all RF systems that phase shift a RF signal. The phase shifter according to the present invention may comprise transistors used as switching elements. In one aspect, the phase shifter provides the option of controlling a phase shifter with either a positive or a negative voltage control signal. For example, the dc ground of the transistors included in the phase shifter may be floated, either fixed or adjusted. The RF grounding of the transistors may be achieved by in-band resonant capacitors. Thus, the control voltage provided to the transistors is flexible in that it may be connected to a positive or negative control voltage, or it may be connected to ground, or it may swing from a positive control voltage to a negative control voltage or vice versa. | 2009-09-03 |
| 20090219112 | PHASE SHIFTER WITH FLEXIBLE CONTROL VOLTAGE - The invention provides a phase shifter with flexible control voltage that is useful with all RF systems that phase shift a RF signal. The phase shifter according to the present invention may comprise transistors used as switching elements. In one aspect, the phase shifter provides the option of controlling a phase shifter with either a positive or a negative voltage control signal. For example, the dc ground of the transistors included in the phase shifter may be floated, either fixed or adjusted. The RF grounding of the transistors may be achieved by in-band resonant capacitors. Thus, the control voltage provided to the transistors is flexible in that it may be connected to a positive or negative control voltage, or it may be connected to ground, or it may swing from a positive control voltage to a negative control voltage or vice versa. | 2009-09-03 |
| 20090219113 | METHOD FOR GAP ADJUSTMENT OF TWO MECHANICAL ELEMENTS OF A SUBSTANTIALLY PLANAR MICROMECHANICAL STRUCTURE AND CORRESPONDING ELECTROMECHANICAL RESONATOR - The invention concerns a method for adjusting the operating gap of two mechanical elements of a substantially planar mechanical structure obtained by micro-etching. The method consists in attributing (A) to one of the elements (E) a fixed reference position (RF) in the direction of the residual gap separating said elements; connecting (C) the other element (OE) to the fixed reference position (RF) by an elastic link (S) and installing (D) between the fixed reference position (RF) and the other element (OE) at least a stop block defining an abutting gap, maximum displacement amplitude of the other element; subjecting (DE) the other element (OE) to a displacement antagonistic to the elastic link (S) up to the abutting position constituting the operating position, the residual gap being reduced to the difference between residual gap and abutting gap and less than the resolution of the micro-etching process. The invention is applicable to electromechanical resonators. | 2009-09-03 |
| 20090219114 | Apparatus, method, and computer program product providing edgeless carbon nanotube resonator arrays - A nanotube apparatus is described. The apparatus includes a first electrode having a first edge. An array of nanotubes distributed in a closed path are also included. The closed path surrounds the first electrode and adjacent to the first edge. The closed path is also locally straight. Each of the nanotubes has an end that is free to oscillate. The apparatus also includes a second electrode having a second edge surrounding both the first electrode and the array of nanotubes. Methods are also described. | 2009-09-03 |
| 20090219115 | Resonant Element and Method for Manufacturing the Same - A plurality of flat-plate filter elements are placed on a pallet having a plurality of holding holes. Each of the filter elements includes a rear-principal-surface electrode pattern having a ground electrode provided on a rear principal surface and a front-principal-surface electrode pattern having a principal-surface electrode provided on a front principal surface. One of a first side surface and a second side surface of each of the filter elements is placed on a printing surface of the pallet. A first side-surface electrode pattern of a point-symmetric form in the side surfaces is formed on the side surfaces placed on the printing surface of the pallet. Then, the filter elements are vertically inverted, and a second side-surface electrode pattern having the same form as the first side-surface electrode pattern is formed on the side surfaces facing each other. | 2009-09-03 |
| 20090219116 | Cable to waveguide transition apparatus having signal accumulation form of backshort and active phase shifting using the same - A cable to waveguide transition apparatus having a signal accumulation form of a backshort is disclosed. The cable to waveguide transition apparatus having a signal accumulation form of a backshort, includes: a waveguide; a RF probe for transferring a radio frequency (RF) signal to the waveguide; and a backshort having the signal accumulation form for reflecting the RF signal excited from the RF probe, wherein the backshort reflects a first fundamental frequency signal excited from the RF probe to have a phase identical to a phase of a second fundamental frequency signal excited from the RF probe to an aperture of the waveguide, and reflects a first 2-order harmonic frequency signal excited from the RF probe to have a phase reverse to a phase of a second 2-order harmonic frequency signal excited to an aperture of the waveguide in order to eliminate the 2-order harmonic frequency signal. | 2009-09-03 |
| 20090219117 | PLUG-IN DEVICE FOR SIGNAL CORRECTION - Described herein are systems and methods for a JXP-type plug-in device that may be inserted within existing transmission equipment, such as RF amplifiers and the like, to provide an appropriate amount of flat attenuation to the lower frequencies of signals being processed in the equipment while allowing desired peaking at high frequencies of the same signals to compensate for high-frequency roll-off. | 2009-09-03 |
| 20090219118 | Power tool lockdown device - Disclosed is an apparatus for selectively permitting electricity to flow to a power tool having a power cord. The apparatus comprises a body having an exterior surface and having a passage therethrough. The passage contains an electrical relay having an electrical input side and an electrical output side. A switch on the exterior surface of the body selectively closes the electrical relay upon activation by a user. A mounting portion on the body is adapted for securing the body to the power tool and a power receiving portion in the body receives the power cord of the power tool. The mounting portion has transfer wires associated therewith in electrical connection between the output side of the relay and a power switch of the power tool. The power cord is in electrical connection with the electrical input side of the relay. | 2009-09-03 |
| 20090219119 | ELECTROMAGNETIC CONTACTOR - electromagnetic contactor comprising a winding ( | 2009-09-03 |
| 20090219120 | ELECTROMAGNET DEVICE - An electromagnet device has a movable iron piece having an end that is operable to contact and separate to and from a magnetic pole portion of an iron core. The movable iron piece rotates based on magnetization and demagnetization of a coil wound around the iron core. A tapered surface is formed on at least one end of an attraction surface of the movable iron piece, which attracts to and separates from the magnetic pole portion of the iron core. At least one contacting portion that is in flush with and continuous to the attraction surface and in contact with the magnetic pole portion of the iron core is arranged in a projecting manner on the tapered surface. | 2009-09-03 |
| 20090219121 | SUPERCONDUCTING MAGNET CURRENT ADJUSTMENT BY FLUX PUMPING - In a superconducting magnet arrangement having main magnet windings, a first switch is connected between first and second ends of the main magnet windings, an induction coil has a first end connected to the first end of the main magnet windings and having a second end connected through a second switch to the second end of the main magnet windings, and a further coil capable of magnetically coupling with the induction coil, current flowing in the main magnet windings is adjusted by flux pumping. | 2009-09-03 |
| 20090219122 | Apparatus for Magnetizing a Magnetizable Element and a Sensor Device - An apparatus is for magnetizing a magnetizable element to generate magnetically encoded regions. The apparatus includes electric connection elements for electrically contacting at least two different portions of the magnetizable element. The apparatus also includes an electric signal supply unit connected to the electric connection elements and adapted for applying at least two different electric signals to the at least two different portions so as to generate at least two different magnetically encoded regions in the at least two different portions of the magnetizable element. | 2009-09-03 |
| 20090219123 | MAGNET UNIT FOR MAGNETRON SPUTTERING SYSTEM - According to an aspect of an embodiment, a magnet unit for a magnetron sputtering system includes a base board, an inner magnet fixed to the base board and an outer magnet fixed to the base board. The outer magnet is fixed surround the inner magnet. At least one of a portion of the inner magnet or a portion of the outer magnet is displaceable on the base board. | 2009-09-03 |
| 20090219124 | TRANSFORMER FOR MULTI-OUTPUT POWER SUPPLIES - This invention relates to a transformer ( | 2009-09-03 |
| 20090219125 | BOBBIN FOR SECONDARY WINDING OF IGNITION COIL - The present invention discloses a bobbin ( | 2009-09-03 |
| 20090219126 | ALPHA-TURN COIL - An alpha-turn coil includes: a plurality of coil main bodies made by winding a wire rod having a desired diameter; and lead wire having a start part and a stop part formed integrally with outer peripheries of the coil main bodies, and connecting the coil main bodies to each other. The stop part of the lead wire of a forward coil main body is extended to the start part of the lead wire of a backward coil main body, and the lead wire is extended to compose the coil main body. | 2009-09-03 |
| 20090219127 | BALUN TRANSFORMER USING A DRUM-SHAPED CORE - A balun transformer includes: a drum-shaped core having a core unit and a pair of flanges arranged on both sides of the core unit; a plurality of terminal electrodes arranged on the flanges; a primary winding wound around the core unit, both ends of the primary winding being connected to the terminal electrodes; and a secondary winding wound around the core unit, both ends and a center tap of the secondary winding being connected to the terminal electrodes, wherein the secondary winding includes a first wire extending from one end to the center tap, and a second wire extending from the other end to the center tap, and the first wire and the second wire are wound around the core unit so as to extend along each other. | 2009-09-03 |
| 20090219128 | METHOD FOR FABRICATING LATERAL-MOVING MICROMACHINED THERMAL BIMORPH - A method of making a Lateral-Moving Micromachined Thermal Bimorph which provides the capability of achieving in-plane thermally-induced motion on a microchip, as opposed to the much more common out-of-plane, or vertical, motion seen in many devices. The present invention employs a novel fabrication process to allow the fabrication of a lateral bimorph in a fundamentally planar set of processes. In addition, the invention incorporates special design features that allow the bimorph to maintain material interfaces. | 2009-09-03 |
| 20090219129 | Arrangement and method for temperature compensation for resistance - An arrangement and a method for temperature compensation for a resistance ( | 2009-09-03 |
| 20090219130 | PORTABLE ELECTRONIC DEVICE AND RECOVERY METHOD THEREFOR - A portable electronic device includes an airbag, a gas-injection apparatus connecting with the airbag, a housing, a liquid detecting apparatus and a control apparatus. The gas-injection apparatus connected with the airbag is used for injecting gas into the airbag so that the airbag is in an inflated state. The housing with a receiving space is used for accommodating the airbag in a deflated state, and the airbag is capable of expanding out of the housing when changing from the deflated state to the inflated state. The liquid detecting apparatus is configured for detecting when the portable electronic device contacts liquid and generating a detecting signal. The control apparatus is configured for controlling the gas-injection apparatus to inject gas into the airbag upon receiving the detecting signal. | 2009-09-03 |
| 20090219131 | System for tracking hand washing and other tasks - The system is designed for use in a hospital for tracking hand washing and other medical care related tasks. It includes multiple disinfectant soap dispenser devices connected to a network server that provide confirmation that caregivers are in compliance with hospital rules regarding hand cleanliness and the performance of other patient maintenance or treatment procedures. The system individually identifies each disinfectant soap dispenser device, identifies the location of the device associated with each patient and identifies each authorized caregiver or unauthorized recorded person using the device. The device identifies its location, the identity of caregiver, the time and date of use of device, and same is recorded in a network server as part of patient records. | 2009-09-03 |
| 20090219132 | SYSTEM FOR PRODUCT AUTHENTICATION AND TRACKING - An authentication system enabling a customer to verify the authenticity of a product in a foolproof, secure and simple manner. plurality of secret sets of numbers ( | 2009-09-03 |
| 20090219133 | SHOWING MANAGEMENT SYSTEM TO AUTOMATICALLY MATCH AND CONTROL ELECTRONIC LOCKBOXES - A showing management system for automatically controlling access to an electronic lockbox utilizing showing appointment data maintained by the showing management system, whereby the showing appointment data is transmitted to the electronic lockbox and/or electronic key device. The electronic lockbox will open only when the actual access time is within the scheduled showing appointment time. The showing management system further programmatically matching a specific electronic lockbox with a specific Listing ID, whereby lockbox access data from an electronic lockbox are matched with showing appointment records maintained in the showing management system to complete the lockbox access records when the Listing ID for a particular showing appointment is missing from the lockbox access record. | 2009-09-03 |
| 20090219134 | KEYLESS ENTRY DEVICE - A keyless entry device which performs communication between a portable device and a vehicle-side device is provided in a vehicle. The vehicle includes a door handle provided with a grip portion, which is provided with a vehicle-side electrode that detects an electric field induced in a human body by a portable device electrode, and the vehicle-side electrode has at least two of a first face opposed to a vehicle body face of the vehicle, a second face opposed to the vehicle body face of the vehicle and disposed at a position more distant from a vehicle body than the first face, and an upper face and a lower face orthogonal to the first face and the second face and parallel to each other. The vehicle-side electrode includes faces other than the first face or includes the first face having a smaller area than other faces. | 2009-09-03 |
| 20090219135 | DIGITAL OVER-THE-AIR KEYING SYSTEM - A system for providing operational access to equipment or vehicles is disclosed wherein digital access codes are assigned and transported over-the-air governing a vehicle's or equipment's use. The access codes can be generated in connection with comparison of entered and stored biometric data and/or entered code from a keypad. Various security protocols can be used to ensure the secure dispatch and delivery of code information. | 2009-09-03 |
| 20090219136 | Secure Document, In Particular Electronic Passport With Enhanced Security - A secure document, in particular an electronic passport, includes a support equipped, on the one hand, with active security devices having a microcircuit connected to an antenna that can produce an electromagnetic response when it passes through the electromagnetic field of a contactless reader designed to query the identity document. The support is equipped, on the other hand, with passive security devices selected so as to have electrical characteristics, in particular inductive, capacitive and resistive, that are suitable for amplifying the electromagnetic response of the active security devices to make it go beyond a threshold that allows the secure document to be identified when it is placed in the electromagnetic field of a contactless reader. The invention has a useful application in national programs to issue passports with increased security. | 2009-09-03 |
| 20090219137 | Variable frequency tag - An antenna assembly is operative for receiving interrogating radiation at a variable frequency tag and generating a corresponding received signal, and for receiving a signature signal and radiating corresponding response radiation. A logic unit is operative for receiving the received signal and outputting the signature signal in response, the signature signal including a signature code for use in identifying the tag. A voltage controlled oscillator is operative for controlling a rate at which the signature code is output; and a power supply is operative for providing an electrical potential difference for energizing the tag. The voltage controlled oscillator is operable to output the signature code at a rate which is governed by the magnitude of the received signal. | 2009-09-03 |
| 20090219138 | Reader interfacing device - A reader interfacing device is operative for providing a communication path between a tag or smart label reader configured to emit and receive interrogating radiation suitable for interrogating tags or smart labels at a first radiation frequency; and a remote tag or smart label is configured to be interrogated using radiation of a second frequency, the first frequency and the second frequency being mutually different by at least an order of magnitude, and the reader being operable to communicate through the device to the remote tag or smart label. The device includes a power supply for converting interrogating radiation received at the device from the reader to generate power supply potentials for powering the device. Moreover, the device is mutually magnetically coupled to the reader for receiving the interrogating radiation therefrom and for providing a modulated load thereto for communicating back to the reader. In order to achieve such magnetic coupling, the device including a loop antenna for magnetically coupling to a corresponding loop antenna of the reader. The device provides, for example, the advantage that the reader can conform to a standard ISO 15693 and the device enables remote tags and smart labels not conforming to the standard to communicate with the reader. | 2009-09-03 |
