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36th week of 2009 patent applcation highlights part 13
Patent application numberTitlePublished
20090218639SEMICONDUCTOR DEVICE COMPRISING A METAL GATE STACK OF REDUCED HEIGHT AND METHOD OF FORMING THE SAME - By providing a CMP stop layer in a metal gate stack, the initial height thereof may be efficiently reduced after the definition of the deep drain and source areas, thereby providing enhanced process conditions for forming highly stressed dielectric materials. Consequently, the dielectric material may be positioned more closely to the channel region substantially without deteriorating gate conductivity.2009-09-03
20090218640Self Aligned Silicided Contacts - Structures and methods of forming self aligned silicided contacts are disclosed. The structure includes a gate electrode disposed over an active area, a liner disposed over the gate electrode and at least a portion of the active area, an insulating layer disposed over the liner. A first contact plug is disposed in the insulating layer and the liner, the first contact plug disposed above and in contact with a portion of the active area, the first contact plug including a first conductive material. A second contact plug is disposed in the insulating layer and the liner, the second contact plug disposed above and in contact with a portion of the gate electrode, the second contact plug includes the first conductive material. A contact material layer is disposed in the active region, the contact material layer disposed under the first contact plug and includes the first conductive material.2009-09-03
20090218641PIEZOELECTRIC SUBSTRATE, FABRICATION AND RELATED METHODS - Improved methods, and related systems and devices, for fabricating selectively patterned piezoelectric substrates suitable for use in a wide variety of systems and devices. A method can include providing a piezoelectric substrate having a protrusion of substrate material, depositing an electrically conductive coating so as to cover a portion of a side of the substrate and protrusion, and removing a portion of the coated protrusion.2009-09-03
20090218642MICROELECTROMECHANICAL SYSTEMS COMPONENT AND METHOD OF MAKING SAME - A microelectromechanical systems (MEMS) component 2009-09-03
20090218643Semiconductor Pressure Sensor - An object of the present invention is to solve problems in that aluminum electrodes, aluminum wires, and I/O terminals are corroded by corrosive gasses when a pressure of a pressure medium containing corrosive matters such as exhaust gas is measured with a semiconductor sensor; and improve not only the corrosion resistance of the sensor chip but also the corrosion resistance of the portion particularly functioning as the pressure receiver.2009-09-03
20090218644Integrated Circuit, Memory Device, and Method of Manufacturing an Integrated Circuit - According to one embodiment of the present invention, an integrated circuit including a plurality of conductive lines is provided. The conductive lines are configured to guide electric currents or voltages. The conductive lines are at least partially surrounded by material which increases the electric field confinement of electric fields occurring within the conductive lines, and which functions as a diffusion barrier for material included within the conductive lines.2009-09-03
20090218645 MULTI-STATE SPIN-TORQUE TRANSFER MAGNETIC RANDOM ACCESS MEMORY - A multi-state spin-torque transfer magnetic random access memory (STTMRAM) is formed on a film and includes a first magnetic tunneling junctions (MTJ) having a first fixed layer, a first sub-magnetic tunnel junction (sub-MTJ) layer and a first free layer. The first fixed layer and first free layer each have a first magnetic anisotropy. The STTMRAM further includes a non-magnetic spacing layer formed on top of the first MTJ layer and a second MTJ formed on top of the non-magnetic spacing layer. The second MTJ has a second fixed layer, a second sub-MTJ layer and a second free layer. The second fixed and second free layers each have a second magnetic anisotropy, wherein at least one of the first or second magnetic anisotropy is perpendicular to the plane of the film.2009-09-03
20090218646ELECTROMAGNETIC WAVE DETECTING ELEMENT - The present invention is to provide an electromagnetic wave detecting element that can suppress a decrease in utilization efficiency of electromagnetic waves at sensor portions. An upper electrode of each of plural sensor portions, that are provided in correspondence with intersection portions of plural scan lines and plural signal lines disposed to intersect one another, is electrically connected to any other adjacent upper electrode. At each group of sensor portions whose upper electrodes are electrically connected, a common electrode line and the upper electrode of any sensor portion belonging to that group of sensor portions are connected by a contact pad via a contact hole formed in an insulating film and at a connection place of a number that is less than a number of sensor portions belonging to that group of sensor portions.2009-09-03
20090218647Semiconductor Radiation Detector With Thin Film Platinum Alloyed Electrode - A compound semiconductor radiation detector includes a body of compound semiconducting material having an electrode on at least one surface thereof. The electrode includes a layer of a compound of a first element and a second element. The first element is platinum and the second element includes at least one of the following: chromium, cobalt, gallium, germanium, indium, molybdenum, nickel, palladium, ruthenium, silicon, silver, tantalum, titanium, tungsten, vanadium, zirconium, manganese, iron, magnesium, copper, tin, or gold. The layer can further include sublayers, each of which is made from a different one of the second elements and platinum as the first element.2009-09-03
20090218648NEAR-FIELD OPTICAL PROBE BASED ON SOI SUBSTRATE AND FABRICATION METHOD THEREOF - Provided is near-field optical probe including: a cantilever arm support portion that is formed of a lower silicon layer of a silicon-on-insulator (SOI) substrate, the cantilever arm support portion having a through hole formed therein at a side of the lower silicon layer; and a cantilever arm forming of a junction oxidation layer pattern and an upper silicon layer pattern on the SOI substrate that are supported on an upper surface of the lower silicon layer and each have a smaller hole than the through hole, a silicon oxidation layer pattern having a tip including an aperture at a vertical end, corresponding with the hole on the upper silicon layer pattern, and an optical transmission prevention layer that is formed on the silicon oxidation layer pattern and does not cover the aperture.2009-09-03
20090218649Highly efficient silicon detector with wide spectral range - High efficiency silicon radiation detector from ultraviolet to near infrared region, including a structure with a wide spectral range that work at the ultraviolet region, said structure, comprises a silicon photodetector with an excess of silicon 3-10%, and annealing temperature at 1100° C., increasing the wave length range from 200 to 1100 nm.2009-09-03
20090218650IMAGE SENSOR DEVICE WITH SUBMICRON STRUCTURE - An image sensor device is disclosed. The image sensor device comprises a substrate having a pixel region and at least one integrated circuit in the substrate of the pixel region. A photodiode is disposed on the substrate of the pixel region, comprising a lower electrode, a transparent upper electrode and a photoelectric conversion layer. The lower electrode is disposed on the substrate and is electrically connected to the integrated circuit. The photoelectric conversion layer is disposed on the lower electrode and has a submicron structure therein. The transparent upper electrode is disposed on the photoelectric conversion layer.2009-09-03
20090218651COMPOSITE SUBSTRATES FOR THIN FILM ELECTRO-OPTICAL DEVICES - An electro-optic device includes at least one electro-optic module having first and second conductive layers and at least first and second semiconductor layers disposed between the conductive layers. At least one optically transparent, electrically insulating base substrate is disposed on the module. The base substrate has a plurality of grooves disposed therein and an electrically conducting material filling the grooves. Electrical contact is established between the conducting material and at least one of the conducting layers of the module.2009-09-03
20090218652DEVICE COMPRISING ELECTRODE PAD - A pad structure 2009-09-03
20090218653Exposure apparatus, method for cleaning member thereof, maintenance method for exposure apparatus, maintenance device, and method for producing device - A lithography apparatus includes a part having a photocatalytic coating. The lithography apparatus can be an extreme ultraviolet lithography apparatus or an immersion lithography apparatus.2009-09-03
20090218654Semiconductor Memory Devices Including Extended Memory Elements - A semiconductor memory device may include a semiconductor substrate having an active region thereof, and the active region may have a length and a width, with the length being greater than the width. A field isolation layer may be on the semiconductor substrate surrounding the active region. First and second wordlines may be on the substrate crossing the active region, with the first and second wordlines defining a drain portion of the active region between the first and second wordlines and first and second source portions of the active region at opposite ends of the active region. First and second memory storage elements may be respectively coupled to the first and second source portions of the active region, with the first and second wordlines being between portions of the respective first and second memory storage elements and the active region in a direction perpendicular to a surface of the substrate.2009-09-03
20090218655Integrated passive devices - The specification describes an integrated passive device (IPD) that is formed on a polysilicon substrate. A method for making the IPD is disclosed wherein the polysilicon substrate is produced starting with a single crystal handle wafer, depositing a thick substrate layer of polysilicon on one or both sides of the starting wafer, forming the IPD on one of the polysilicon substrate layers, and removing the handle wafer. In a preferred embodiment the single crystal silicon handle wafer is a silicon wafer rejected from a single crystal silicon wafer production line.2009-09-03
20090218656METHODS OF MAKING SEMICONDUCTOR STRUCTURES INCLUDING VERTICAL DIODE STRUCTURES - Semiconductor structures and methods of making a vertical diode structure are provided. The vertical diode structure may have associated therewith a diode opening extending through an insulation layer and contacting an active region on a silicon wafer. A titanium silicide layer may be formed over the interior surface of the diode opening and contacting the active region. The diode opening may initially be filled with an amorphous silicon plug that is doped during deposition and subsequently recrystallized to form large grain polysilicon. The silicon plug has a top portion that may be heavily doped with a first type dopant and a bottom portion that may be lightly doped with a second type dopant. The top portion may be bounded by the bottom portion so as not to contact the titanium silicide layer. In one embodiment of the vertical diode structure, a programmable resistor contacts the top portion of the silicon plug and a metal line contacts the programmable resistor.2009-09-03
20090218657INDUCTIVELY COUPLED INTEGRATED CIRCUIT WITH NEAR FIELD COMMUNICATION AND METHODS FOR USE THEREWITH - A circuit includes a first integrated circuit or die having a first circuit and a first inductive interface. A second integrated circuit or die includes a second circuit and a second inductive interface, wherein the first inductive interface and the second inductive interface are aligned to magnetically communicate first signals between the first circuit and the second circuit and wherein the second inductive interface is coupled to engage in near field communications with a remote device, wherein the near field communications include second signals.2009-09-03
20090218658SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE, AND MANUFACTURING METHOD OF THE SAME - The present invention provides a technology that makes it possible to enhance the gain and the efficiency of an RF bipolar transistor. Device isolation is given between a p+ type isolation region and an n+ type collector embedded region and between a p+ type isolation region and an n type collector region (an n+ type collector extraction region) with an isolation section that surrounds the collector extraction region in a plan view and is formed by embedding a dielectric film in a groove penetrating an isolation section, a collector region, and a collector embedded region and reaching a substrate. Further, a current route is formed between an emitter wiring (a wiring) and the substrate with an electrically conductive layer formed by embedding the electrically conductive layer in a groove penetrating a dielectric film, silicon oxide films, a semiconductor region, and the isolation regions and reaching the substrate, and thereby the impedance between the emitter wiring and the substrate is reduced.2009-09-03
20090218659CHAMFERED FREESTANDING NITRIDE SEMICONDUCTOR WAFER AND METHOD OF CHAMFERING NITRIDE SEMICONDUCTOR WAFER - Technology of making freestanding gallium nitride (GaN) wafers has been matured at length. Gallium nitride is rigid but fragile. Chamfering of a periphery of a GaN wafer is difficult. At present edges are chamfered by a rotary whetstone of gross granules with weak pressure. Minimum roughness of the chamfered edges is still about Ra 10 μm to Ra 6 μm. The large edge roughness causes scratches, cracks, splits or breaks in transferring process or wafer process. A wafer of the present invention is bevelled by fixing the wafer to a chuck of a rotor, bringing an edge of the wafer into contact with an elastic whetting material having a soft matrix and granules implanted on the soft matrix, rotating the wafer and feeding the whetting material. Favorably, several times of chamfering edges by changing the whetting materials of smaller granules are given to the wafer. The chamfering can realize small roughness of Ra 10 nm and Ra 5 μm at edges of wafers.2009-09-03
20090218660SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor substrate (2009-09-03
20090218661SILICON SUBSTRATE AND MANUFACTURING METHOD THEREOF - A silicon substrate is manufactured from single-crystal silicon which is grown to have a carbon concentration equal to or higher than 1.0×102009-09-03
20090218662SEMICONDUCTOR DEVICE - A semiconductor device includes: a first semiconductor region of a first conductive type; a second semiconductor region of the first conductive type formed on an upper surface of the first semiconductor region and having a lower impurity concentration than that of the first semiconductor region; a third semiconductor region of the first conductive type formed on the upper surface of the first semiconductor region and having a higher impurity concentration than that of the second semiconductor region; and a fourth semiconductor region of a second conductive type different from the first conductive type formed on upper surfaces of the second semiconductor region and the third semiconductor region. A PN junction is formed between the second semiconductor region and third semiconductor region and the fourth semiconductor region. The second semiconductor region is formed to surround the third semiconductor region.2009-09-03
20090218663LEAD FRAME BASED SEMICONDUCTOR PACKAGE AND A METHOD OF MANUFACTURING THE SAME - A method of manufacturing a semiconductor package, where the package includes a surface for attachment of the package to a device by a joint formed of a connective material in a joint area of the surface. The method is characterised in that it comprises the step of patterning one or more channels on the surface which channels extend away from the joint area towards an edge of the surface. Also the method has the step of applying a compound to one or more channels which compound interacts with the connective material, such that when the semiconductor package is attached to the device the interaction defines one or more paths in the connective material. These correspond to the one or more channels on the surface and allow the passage of waste material away from the joint area to the outer edge of the surface.2009-09-03
20090218664STRUCTURE OF A LEAD-FRAME MATRIX OF PHOTOELECTRON DEVICES - A structure of a lead-frame matrix of photoelectron devices is provided. The lead-frame matrix is used to fabricate a first lead-frame array and a second lead-frame array. In the structure of the lead-frame matrix of the photoelectron devices, pins of the first lead-frame array and pins of the second lead-frame array are alternatively inserted.2009-09-03
20090218665POWER DEVICE PACKAGE AND METHOD OF FABRICATING THE SAME - Provided are a power device package, which can be made compact by mounting semiconductor chips in recesses formed in a substrate and improve operational reliability by rapidly dissipating heat generated during operation to the outside, and a method of fabricating the power device package. The power device package includes: a substrate having a first surface and a second surface opposite to each other, and one or more recesses formed in the first surface; a wiring pattern formed on the first surface of the substrate; one or more power semiconductor chips placed in the recesses and electrically connected to the wiring pattern; a lead frame electrically connected to the wiring pattern; one or more control semiconductor chips electrically connected to the power semiconductor chips to control the power semiconductor chips; and an optional sealing member sealing the substrate, the wiring pattern, the power semiconductor chips, the control semiconductor chips, and at least a part of the lead frame so as to expose the second surface of the substrate.2009-09-03
20090218666Power device package and method of fabricating the same - Provided are a power device package, which can be made compact by vertically stacking substrates on which semiconductor chips are mounted, and a method of fabricating the power device package. The power device package includes: a first substrate comprising a first surface and a second surface opposite to each other, and a first wiring pattern formed on the first surface; one or more power semiconductor chips mounted on the first surface of the first substrate and electrically connected to the first wiring pattern; a second substrate vertically spaced apart from the first substrate and comprising a second wiring pattern; one or more first control semiconductor chips mounted on the second substrate and electrically connected to the second wiring pattern; a lead frame electrically connected to the first wiring pattern and the second wiring pattern; and a sealing member sealing the first substrate, the power semiconductor chips, the second substrate, the first control semiconductor chips, and at least a part of the lead frame so as to expose the second surface of the first substrate.2009-09-03
20090218667SMART CARDS AND METHODS FOR PRODUCING A SMART CARD - The invention relates to smart cards. In one embodiment a smart card has a card body having at least a first, a second and a third layer. The first and the second layer are at least partly composed of polycarbonate. The third layer is arranged between the first and the second layer and is composed of a material having a melting point of T2009-09-03
20090218668Double-side mountable MEMS package - The MEMS package has a mounting substrate on which one or more transducer chips are mounted wherein the mounting substrate has an opening. A top cover is attached to and separated from the mounting substrate by a spacer forming a housing enclosed by the top cover, the spacer, and the mounting substrate and accessed by the opening. Electrical connections are made between the one or more transducer chips and the mounting substrate and/or between the one or more transducer chips and the top cover. A bottom cover can be mounted on a bottom surface of the mounting substrate wherein a hollow chamber is formed between the mounting substrate and the bottom cover, wherein a second opening in the bottom cover is not aligned with the first opening. Pads on outside surfaces of the top and bottom covers can be used for further attachment to printed circuit boards. The top and bottom covers can be a flexible printed circuit board folded under the mounting substrate.2009-09-03
20090218669MULTI-CHIP PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME - A method of fabricating a multi-chip package structure is provided. In the method, a number of cavities are formed on a predetermined cutting line of a first wafer by partly removing the first wafer and a first metal layer. Conductive walls of a first circuit layer are electrically connected to a cut cross-section of the first metal layer exposed by the cavities. In addition, conductive bumps of a second wafer are pressed into a cover layer and electrically connected to the first circuit layer. The first metal layer is then patterned to form a second circuit layer having a number of second pads. Next, the first wafer and the second wafer are cut along the predetermined cutting line to form a number of separated multi-chip package structures.2009-09-03
20090218670STORAGE MEDIUM AND SEMICONDUCTOR PACKAGE - A semiconductor package includes a semiconductor chip formed with a non-volatile semiconductor memory, a resin encapsulation that encapsulates the semiconductor chip, electrodes in a lattice (solder balls) formed and arrayed in a lattice on a bottom surface of the resin encapsulation. The solder balls include a signal electrode formed within the central region of the array and a dummy electrode formed outside the signal electrode.2009-09-03
20090218671SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - In a semiconductor device of the present invention, semiconductor chips are stacked in multi-layers. Each of the semiconductor chip includes: through vias extending through a top main surface thereof to a bottom surface opposite to the top main surface; a circuit element surface formed on the top main surface; pads arranged on the circuit element surface; bumps formed on the pads; and via pads, formed on the bottom surface thereof, to which the bumps of its upper semiconductor chip are joined, and positions at which the bumps of each of the semiconductor chips are respectively arranged are different from those at which the bumps of its upper semiconductor chip are arranged.2009-09-03
20090218672SOLDER RESIST MATERIAL, WIRING BOARD USING THE SOLDER RESIST MATERIAL, AND SEMICONDUCTOR PACKAGE - The present invention provides a solder resist material, which can suppress the warpage of a semiconductor package upon exposure to heat or impact even when used in a thin wiring board and meets a demand for size reduction in electronic devices and a higher level of integration, and a wiring board comprising the solder resist material and a semiconductor package. The solder resist material of the present invention can effectively suppress the warpage of a semiconductor package through a fiber base material-containing layer interposed between resin layers. The fiber base material-containing layer is preferably unevenly distributed in the thickness direction of the solder resist material.2009-09-03
20090218673Semiconductor package having a bridge plate connection - A semiconductor package is disclosed. The package includes a leadframe having drain, source and gate leads, a semiconductor die coupled to the leadframe, the semiconductor die having a plurality of metalized source areas and a metalized gate area, a patterned source connection having a plurality of dimples formed thereon coupling the source lead to the semiconductor die metalized source areas, a patterned gate connection having a dimple formed thereon coupling the gate lead to the semiconductor die metalized gate area, a semiconductor die drain area coupled to the drain lead, and an encapsulant covering at least a portion of the semiconductor die and drain, source and gate leads.2009-09-03
20090218674SEMICONDUCTOR MODULE - A semiconductor module including: a semiconductor chip, an integrated circuit being formed in the semiconductor chip; a plurality of electrodes electrically connected to the integrated circuit; an insulating film formed on the semiconductor chip and having a plurality of openings positioned corresponding to the plurality of electrodes; and a long elastic protrusion extending on the insulating film. A plurality of interconnects respectively extend from over the electrodes to over the elastic protrusion, directions of the interconnects intersecting an axis AX that is parallel to the extending direction of the elastic protrusion. A plurality of leads are respectively in contact with the interconnects in an area positioned on the elastic protrusion. A cured adhesive maintains a space between a surface of the semiconductor chip on which the elastic protrusion is formed and a surface of the elastic substrate on which the leads are formed. A surface of the elastic protrusion except an area on which the interconnects are provided is in close contact with the elastic substrate due to an elastic force.2009-09-03
20090218675MULTIPACKAGE MODULE HAVING STACKED PACKAGES WITH ASYMMETRICALLY ARRANGED DIE AND MOLDING - Semiconductor chip packages have die asymmetrically arranged on the respective substrates. Two such packages having complementary arrangements can be stacked, one inverted with respect to the other, such that the two die are situated side-by-side in the space between the two substrates. Also, multipackage modules include stacked packages, each having the die asymmetrically arranged on the substrate. Adjacent stacked packages have complementary asymmetrical arrangements of the die, and one package is inverted with respect to the other in the stack, such that the two die are situated side-by-side in the space between the two substrates. Also, methods are disclosed for making the packages and for making the stacked package modules.2009-09-03
20090218676SEMICONDUCTOR DEVICE - A small-sized surface mount package having a low on-resistance is achieved, in which a power MOSFET etc. is sealed. In one side a molding resin, two silicon chips are sealed. On one side of the molding resin, three source leads and one gate lead are arranged. The three source leads are joined each other inside the molding resin, and the joined portion and a source pad of the silicon chip are electrically coupled each other via two Al ribbons. Moreover, a gate pad of the silicon chip is electrically coupled to the gate lead via one Au wire.2009-09-03
20090218677BOARD-ON-CHIP TYPE SUBSTRATES WITH CONDUCTIVE TRACES IN MULTIPLE PLANES, SEMICONDUCTOR DEVICE PACKAGES INCLUDING SUCH SUBSTRATES, AND ASSOCIATED METHODS - A method for fabricating a chip-scale board-on-chip substrate, or redistribution element, includes forming conductive planes on opposite sides of a substrate. A first of the conductive planes includes two sets of bond fingers, conductive traces that extend from a first set of the bond fingers, and two sets of redistributed bond pads, including a first set to which the conductive traces lead. The second conductive plane includes conductive traces that extend from locations that are opposite from the second set of bond fingers toward locations that are opposite from the locations of the second set of redistributed bond pads. Conductive vias are formed through the second set of bond fingers to the conductive traces of the second conductive plane. In addition, conductive vias are also formed to electrically connect the conductive vias of the second conductive plane to their corresponding redistributed bond pads in the first conductive plane. Redistribution elements including these features, as well as semiconductor device assemblies including the redistribution elements and assembly methods, are also disclosed.2009-09-03
20090218678SEMICONDUCTOR IC-EMBEDDED SUBSTRATE AND METHOD FOR MANUFACTURING SAME - A semiconductor IC-embedded substrate suitable for embedding a semiconductor IC in which the electrode pitch is extremely narrow. The substrate comprises a semiconductor IC 2009-09-03
20090218679CHIP PACKAGE AND PROCESS THEREOF - A chip package is disclosed. The chip package comprises a chip, a plurality of bond pads, a plurality of connecting lines and a rigid cover. The chip has a plurality of recesses arranged along at least an edge of the chip and also has an active surface and a backside. The bond pads are disposed on the active surface and the bond pads are arranged to be corresponding to the recesses respectively. The connecting lines are disposed on surfaces of the recesses respectively at the edge of the chip. For each of the connecting lines, a first end of the connecting line is connected to one of the bond pads and a second end of the connecting line extends to the backside to be a terminal pad. The rigid cover is located on the active surface without covering the bond pads on the active surface.2009-09-03
20090218680PROCESS OF GROUNDING HEAT SPREADER/STIFFENER TO A FLIP CHIP PACKAGE USING SOLDER AND FILM ADHESIVE - A method of grounding a heat spreader/stiffener to a flip chip package comprising the steps of attaching an adhesive film to a substrate and attaching a stiffener to the adhesive film. The adhesive film may have a number of first holes corresponding with a number of grounding pads on the substrate. The grounding pads may be configured to provide electrical grounding. The stiffener may have a number of second holes corresponding with the number of first holes of the adhesive film and number the grounding pads of the substrate. The grounding pads are generally exposed through the first and the second holes.2009-09-03
20090218681Carbon nanotube and metal thermal interface material, process of making same, packages containing same, and systems containing same - A carbon nanotube (CNT) array is patterned on a substrate. The substrate can be a microelectronic die or a heat sink for a die. The patterned CNT array is patterned by using a patterned catalyst on the substrate to form the CNT array by growing. The patterned CNT array can also be patterned by using a patterned mask on the substrate to form the CNT array by growing. A computing system that uses the CNT array for heat transfer from the die is also used.2009-09-03
20090218682SEMICONDUCTOR CHIP - An integrated circuit package comprising at least one semiconductor chip of a first material, wherein the semiconductor chip comprises an active part and a passive part that is connected to each other, the passive part comprises at least one cavity, the at least one cavity is filled with a filler of a second material, and the thermal conductivity of the second material is higher than the thermal conductivity of the first material.2009-09-03
20090218683Semiconductor Device - The present invention provides a non-insulated type DC-DC converter having a circuit in which a power MOS•FET for a high side switch and a power MOS•FET for a low side switch are connected in series. In the non-insulated type DC-DC converter, the power transistor for the high side switch, the power transistor for the low side switch, and driver circuits that drive these are respectively constituted by different semiconductor chips. The three semiconductor chips are accommodated in one package, and the semiconductor chip including the power transistor for the high side switch, and the semiconductor chip including the driver circuits are disposed so as to approach each other.2009-09-03
20090218684AUTOCLAVE CAPABLE CHIP-SCALE PACKAGE - A power semiconductor package that includes a power semiconductor device having a threshold voltage that does not vary when subjected to an autoclave test.2009-09-03
20090218685SEMICONDUCTOR MODULE AND METHOD OF PRODUCING THE SAME - A semiconductor module including: a semiconductor chip in which an integrated circuit is formed; an electrode formed on the semiconductor chip and electrically connected to the integrated circuit; an insulating film formed on the semiconductor chip and having an opening positioned corresponding to the electrode; an elastic protrusion disposed on the insulating film, a surface of the elastic protrusion opposite to the insulating film being convexly curved; an interconnect extending from over the electrode to over the elastic protrusion; an elastic substrate on which a lead is formed, the lead being in contact with part of the interconnect positioned on the elastic protrusion; and an adhesive maintaining a space between a surface of the semiconductor chip on which the elastic protrusion is formed and a surface of the elastic substrate on which the lead is formed. The elastic substrate has a first depression formed by elastic deformation. The lead is in contact with the interconnect on a surface of the first depression.2009-09-03
20090218686SEMICONDUCTOR, SEMICONDUCTOR MODULE, METHOD FOR MANUFACTURING THE SEMICONDUCTOR MODULE, AND MOBILE APPARATUS - A semiconductor module includes a device mounting board and a semiconductor device mounted on the device mounting board. The device mounting board includes an insulating resin layer, a wiring layer provided on one main surface of the insulating resin layer, and bump electrodes, electrically connected to the wiring layer, which are protruded from the wiring layer toward the insulating resin layer. The semiconductor device has device electrodes which are disposed counter to a semiconductor substrate and the bump electrodes, respectively. The surface of a metallic layer provided on the device electrode lies on the same plane as the surface of a protective layer.2009-09-03
20090218687Semiconductor Chip with Passivation Layer Comprising Metal Interconnect and Contact Pads - The invention provides a semiconductor chip comprising a semiconductor substrate comprising a MOS device, an interconnecting structure over said semiconductor substrate, and a metal bump over said MOS device, wherein said metal bump has more than 50 percent by weight of gold and has a height of between 8 and 50 microns.2009-09-03
20090218688OPTIMIZED PASSIVATION SLOPE FOR SOLDER CONNECTIONS - A semiconductor structure includes at least one bond pad. An insulator layer is on the surface of the semiconductor chip and on a portion of the bond pad. The polyimide layer comprises a bottom surface contacting and coplanar with the surface of the semiconductor chip, a top surface opposite and parallel to the bottom surface of the polyimide layer, and a sloped side between corresponding ends of the top surface of the polyimide layer and the bottom surface of the polyimide layer. The sloped side joins the bottom surface of the polyimide layer at the top surface of the bond pad. The sloped side of the polyimide layer forms an angle less than 50° with the bottom surface of the polyimide layer.2009-09-03
20090218689FLIP CHIP SEMICONDUCTOR ASSEMBLY WITH VARIABLE VOLUME SOLDER BUMPS - A method of manufacturing a semiconductor chip is disclosed. A die having a plurality of die-pads is attached to a substrate in a semiconductor package which includes a plurality of substrate-pads. The method involves forming conductive column bumps of differing volumes extending from the die-pads; attaching each of the column bumps to a corresponding substrate-pad to form a subassembly; and reflowing the subassembly so that the column bumps form robust electrical and mechanical connections between the die pads and the substrate pads.2009-09-03
20090218690Reduced-Stress Through-Chip Feature and Method of Making the Same - A feature is inscribed in a major surface of a microelectronic workpiece having a material property expressed as a reference coefficient value. The feature includes a first material having a first coefficient value for the material property and a second material having a second coefficient value for the material property. The first coefficient value is different from the reference coefficient value different from the first coefficient value and the second coefficient value is different from the first coefficient value. The first and second materials behave as an aggregate having an aggregate coefficient value for the material property between the first coefficient value and the reference coefficient value.2009-09-03
20090218691BILAYER METAL CAPPING LAYER FOR INTERCONNECT APPLICATIONS - The invention provides semiconductor interconnect structures that have improved reliability and technology extendibility. In the present invention, a second metallic capping layer is located on a surface of a first metallic cap layer which is, in turn, located on a surface of the conductive feature embedded within a first dielectric material. Both the first and second metallic capping layers are located beneath an opening, e.g., a via opening, the is present within an overlying second dielectric material. The second metallic capping layer protects the first dielectric capping layer from being removed (either completely or partially) during subsequent processing steps. Interconnect structures including via gouging features as well as non-via gouging features are disclosed. The present invention provides methods of fabricating such semiconductor interconnect structures.2009-09-03
20090218692Barrier for Copper Integration in the FEOL - Copper integration in the FEOL stage is disclosed for a preliminary semiconductor device by forming a recess in a substrate of the device, the recess having a bottom surface and sidewall surfaces, depositing a barrier layer having about a 100% step coverage on the sidewall surfaces and the bottom surface, and depositing copper into the recess over the barrier layer to form a contact providing electrical connection to the preliminary semiconductor device.2009-09-03
20090218693LOW RESISTANCE HIGH RELIABILITY CONTACT VIA AND METAL LINE STRUCTURE FOR SEMICONDUCTOR DEVICE - A semiconductor contact structure includes a copper plug formed within a dual damascene, single damascene or other opening formed in a dielectric material and includes a composite barrier layer between the copper plug and the sidewalls and bottom of the opening. The composite barrier layer preferably includes an ALD TaN layer disposed on the bottom and along the sides of the opening although other suitable ALD layers may be used. A barrier material is disposed between the copper plug and the ALD layer. The barrier layer may be a Mn-based barrier layer, a Cr-based barrier layer, a V-based barrier layer, a Nb-based barrier layer, a Ti-based barrier layer, or other suitable barrier layers.2009-09-03
20090218694SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, SEMICONDUCTOR MANUFACTURING AND INSPECTING APPARATUS, AND INSPECTING APPARATUS - A semiconductor device having Cu wiring including a basic crystal structure which can reduce surface voids, and an inspecting technique for the semiconductor device. In the semiconductor device, surface voids can be reduced down to 1/10 or less of a current practical level by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (CSL) boundary having a grain boundary Sigma value 27 or less to all crystal grain boundaries of a Cu wiring to 60% or higher. Alternatively, a similar effect of surface void reduction can be obtained by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (CSL) boundary having a grain boundary Sigma value 3 to all crystal grain boundaries of a Cu wiring to 40% or higher.2009-09-03
20090218695LOW CONTACT RESISTANCE METAL CONTACT - A semiconductor structure and methods of making the same. The semiconductor structure includes a substrate having a silicide region disposed above a doped region, and a metal contact extending through the silicide region and being in direct contact with the doped region.2009-09-03
20090218696SEMICONDUCTOR DEVICE INCLUDING A PADDING UNIT - A semiconductor device includes bit lines formed over a substrate and a padding unit formed over the bit lines. The padding unit includes stacked padding layers. A lower padding layer is formed between the bit lines and an upper padding layer. The upper layer as a slit formed therein. The lower padding layer prevents damage to the bit lines due to plasma gas entering through the slit.2009-09-03
20090218697ELECTRONIC DEVICE, METHOD OF MANUFACTURE OF THE SAME, AND SPUTTERING TARGET - In an electronic device comprising a first electrodes consisting of a metal oxide and a second electrode consisting of an aluminum alloy film directly contacted and electrically connected to the first electrode, the contact interface between the aluminum alloy film and the first electrode is constructed so that at least a part of alloy components constituting the aluminum alloy film exist as a precipitate or concentrated layer. This construction enables direct contact between the aluminum alloy film and the electrode consisting of a metallic oxide and allows elimination of a barrier metal in such an electronic device, and manufacturing technology therefor.2009-09-03
20090218698Wafer-Level Integrated Circuit Package with Top and Bottom Side Electrical Connections - A wafer-level, batch processed, die-sized integrated circuit (IC) package with both top and bottom side electrical connections is disclosed. In one aspect, a number of bonding wires can be attached to bond pads on the top side (active circuit side) of an IC wafer. Trenches can be formed in the wafer at scribe regions and the bonding wires can extend through the trench. The trench can be filled with coating material. The bonding wires can be partially exposed on the top and/or bottom sides of the wafer to distribute electrical connections from the bond pads to the top and/or bottom sides of the wafer.2009-09-03
20090218699METAL INTERCONNECTS IN A DIELECTRIC MATERIAL - A semiconductor device includes an interconnect having electrically conductive portions and a dielectric layer made of a first dielectric material. A trench is formed in the dielectric layer. The exposed portions of the dielectric layer which form the side walls of the trench are removed. A dielectric liner is then deposited on the side walls of the trench, the liner being made of a second dielectric material.2009-09-03
20090218700Three dimensional structure memory - A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 μm in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.2009-09-03
20090218701INDUCTIVELY COUPLED INTEGRATED CIRCUIT WITH MAGNETIC COMMUNICATION PATH AND METHODS FOR USE THEREWITH - An integrated circuit includes a first integrated circuit die having a first circuit and a first inductive interface and a second integrated circuit die having a second circuit and a second inductive interface. A substrate is coupled to support the first integrated circuit die and the second integrated circuit die, the substrate including a magnetic communication path aligned with the first inductive interface and the second inductive interface, to magnetically communicate signals between the first circuit and the second circuit.2009-09-03
20090218702METHODS FOR BONDING AND MICRO-ELECTRONIC DEVICES PRODUCED ACCORDING TO SUCH METHODS - One inventive aspect is related to a method of bonding two elements and micro-electronic devices produced according to such methods. In one aspect, a micro-electronic device includes a first and a second element, bonded together by a joining structure. The joining structure has a first micropattern portion, a second micropattern portion, and a joining portion in between the first and second micropattern portions. The first and second micropattern portions are made of cobalt. The joining portion includes intermetallic compounds of cobalt and tin (Sn).2009-09-03
20090218703Lamination Tape for Reducing Chip Warpage and Semiconductor Device Containing Such Tape - A lamination tape is disclosed which includes a base film with an adhesive layer on one side wherein the coefficient of thermal expansion (CTE) of the adhesive layer is adapted so as to reduce warpage of a semiconductor die when the lamination tape is attached to the passive side of the semiconductor die.2009-09-03
20090218704MIXER, MIXING DEVICE AND UNIT FOR MEASURING MEDICAL COMPONENT - This invention provides a mixer without a rotational or similar structure, capable of mixing quickly several liquids including at least one liquid being prone to gel or solidify, a mixing device with the mixer incorporated, and a medical component-measuring unit capable of reducing the formation of thrombi and accurately measuring the concentration of glucose, and with a small time constant, which unit can be incorporated into medical support devices, such as artificial endocrine pancreas devices. The mixer has an air bubble-trapping structure for temporarily trapping air bubbles supplied to a surface of a mixing channel through which liquids to be mixed flow. The mixing device has the mixer, an air bubble supplier or generator to make air bubbles exist in the mixing channel, and a liquid supplier for supplying liquids to be mixed to a liquid inlet. The medical component-measuring unit has the mixer or the mixing device.2009-09-03
20090218705METHODS AND SYSTEMS FOR PROCESSING SILICONE HYDROGEL OPHTHALMIC LENSES FOR IMPROVED LENS TRANSFER - This invention includes methods and systems for processing silicone hydrogel ophthalmic lenses using aqueous solutions which contain dimethyl siloxane as as processing aids to facilitate lens transfer.2009-09-03
20090218706METHOD OF MANUFACTURING PHOTONIC BANDGAP FIBRE - A method of manufacturing a photonic bandgap fibre comprises preparing composite rods having a central region of a first refractive index, and a surrounding region of a second refractive index. There follow steps of: selectively removing the surface of the composite rods to produce composite rods having a part with a first diameter and a part with a second diameter larger than said first diameter; stacking composite rods around a core rod; inserting the stacked rods into jacket tube to form an assembly; and reducing the jacket tube and stacked rods into fibre. Embodiments may comprise measuring the refractive index of the composite rods to calculate a ratio of diameters of the central region and surrounding region to determine an amount of the surface of the composite rods to remove. Further embodiments may comprise flowing chlorine gas through the assembly to remove impurities or moisture present in the surface of rod and jacket tube of the assembly.2009-09-03
20090218707METHOD FOR MAKING PEN/PMMA MULTILAYER OPTICAL FILMS - Methods and apparatuses are provided for the manufacture of coextruded polymeric multilayer optical films. The multilayer optical films have an ordered arrangement of layers of two or more materials having particular layer thicknesses and a prescribed layer thickness gradient throughout the multilayer optical stack. The methods and apparatuses described allow improved control over individual layer thicknesses, layer thickness gradients, indices of refraction, interlayer adhesion, and surface characteristics of the optical films. The methods and apparatuses described are useful for making interference polarizers, mirrors, and colored films that are optically effective over diverse portions of the ultraviolet, visible, and infrared spectra.2009-09-03
20090218708Process for preparing concentrated aqueous micellar solutions - The present invention provides a method for preparing supersaturated aqueous solutions of micelles of compounds in which the solubility in water is less than the critical micelle concentration. The solutions can be process to prepare solid micelles which have advantageous properties for drug delivery.2009-09-03
20090218709MOULDING METHOD AND APPARATUS - A method and apparatus are provided for moulding an article by feeding molten plastics material into a metering cavity (2009-09-03
20090218710INJECTION MOLDING MACHINE AND METHOD OF CONTROLLING THE SAME - An injection molding machine 2009-09-03
20090218711Method of increasing ceramic paste stiffening/gelation temperature by using a salt and precursor batch - The present invention provides a ceramic precursor batch composition comprising inorganic ceramic-forming ingredients, a binder, an aqueous solvent and a chaotropic agent. The presence of the chaotropic agent provides a composition with a lower viscosity and/or a greater batch stiffening temperature allowing for increased extrusion feedrates. Methods for producing a ceramic honeycomb body using the ceramic precursor batch composition of the present invention are also provided.2009-09-03
20090218712Method of Forming a Ladder - A method for forming a ladder including: forming first and second expandable members used in constructing the ladder, the forming of each of the first and second expandable members which includes; expanding a covering to define a cavity; expanding foam in the cavity in an expansion direction to expand the covering into a predetermined shape; and connecting the first and second expandable members together by disposing a plurality of rungs therebetween.2009-09-03
20090218713VACUUM HEAT-SET OF NET SHAPE LATEX VACUUM BAGS - A net shaped latex vacuum bag as used in the fabrication of composite structural parts having complex shapes. Liquid latex is first allowed to air dry in the form of a thin flat, flexible sheet. The latex sheet is then vacuum formed over a tool having the complex shape of the part to be fabricated and assumes the shape and configuration of the tool's outer surface. The latex sheet is then rapidly cured at an elevated temperature, so as to permanently assume the part's shape for subsequent use in forming composite structural parts of the same complex shape. In one embodiment, the latex sheet may be formed on the tool by dipping the tool in liquid latex, allowing the latex coating to dry, and cutting the dry latex coating to permit separation of the tool from the latex coating which is then used in composite part fabrication.2009-09-03
20090218714APPARATUS - The invention relates to apparatus for filling a cavity during production of a pharmaceutical dosage form. The apparatus comprises a cavity open at an upper surface and closed at a lower surface. The lower surface is defined by an initial layer of powder. A powder source and a fluid pump are also provided. The fluid pump is arranged to draw gas away from the cavity such that the gas pressure within the cavity is reduced below the ambient gas pressure before the cavity is filled to a predetermined fill level with powder from the powder source.2009-09-03
20090218715METHOD OF MAKING A DUNNAGE PLATFORM - A dunnage platform is in the general shape of a rectangular slab with legs extending form one side. The dunnage platform is made from an expanded polystyrene core. A chemical combination process is used to chemically combine portion of the core proximal to its surface with high impact polystyrene. In a first of two parts of the combination process, the core is placed in a forming mold with one of its two sides and two thirds of its thickness extending therefrom. A heated sheet of high impact polystyrene is brought into contact with the portion of the core extending from the mold. In a similar manner, the other of the two sides of the core is made to extend from the forming mold for contact with a heated sheet of high impact polystyrene.2009-09-03
20090218716METHOD AND APPARATUS FOR FORMING HOLLOW MOLDINGS HAVING THIN FILM ON INNER SURFACE - The method employs a stationary mold having depositing recesses equipped in its inside with a deposition element such as a target electrode, and movable molds made slidable. A primary molding is performed to form a body portion and a cover member to have joint portions around their opening. The body portion left in the vertically sliding mold is deposited after it was densely covered with the depositing recesses. Next, the deposited body portion and the cover member, as left in the molds, are registered and mold clamped, and the molten metal is injected to integrated the joint portions.2009-09-03
20090218717BUILDING COMPONENT OF RECYCLED MATERIAL AND METHOD FOR MANUFACTURING SUCH A BUILDING COMPONENT - A building component having a core of recycled material is manufactured according to a method having the following steps: cutting small waste; mixing the small waste particles with a resin; supplying the mixture of small waste particles and resin to a sleeve of set plate material, wherein a hardening agent is added; allowing the mixture in the sleeve to cure; positioning the entirety of the cured mixture and the sleeve in a closed vacuum mould in which set plate material is arranged; filling the mould with a filler; allowing the material in the mould to cure; and releasing the building component thus obtained from the mould. The building component thus obtained has many advantages. In particular, this component is indestructible, durable, strong and lightweight. Moreover, application thereof contributes to a reduction of the mountain of waste and an increased safety.2009-09-03
20090218718MANUFACTURING METHOD FOR A MOLD - According to an aspect of an embodiment, a manufacturing method for a mold includes a step of forming a protection film having fluidity on a front surface of a base material on which concave/convex patterns are partitioned, and a step of punching a mold from the base material by causing a male mold to come into a female mold while overlapping a punching surface of the male mold on a back surface of the base material.2009-09-03
20090218719ROTARY PROCESS FOR FORMING UNIFORM MATERIAL - A thin, uniform membrane comprising polymeric fibrils or a combination of fibrils and particles, wherein the fibrils have randomly convoluted cross-sections, and a process for making the membrane are disclosed. The membrane may be on the surface of a substrate as part of a composite sheet, or as a stand-alone structure.2009-09-03
20090218720Method and Apparatus for Extruding Cementitious Articles - A method and apparatus (2009-09-03
20090218721CASTING DEVICE, SOLUTION CASTING APPARATUS, AND CASTING METHOD - A casting drum is rotated around a shaft. A peripheral surface of the casting drum moves in an X direction. A dope is discharged through a casting die onto the peripheral surface such that a casting bead is formed so as to extend from a discharge port of the casting die to the peripheral surface. A decompression chamber decompresses an upstream side from the casting bead in a moving direction of the casting drum. The decompression chamber is provided with a sensor unit for detecting a width of the casting bead in a Y direction as width data. A control section shifts outer side seal plates in the Y direction based on the width data detected by the sensor unit such that the outer side seal plates are located in an upstream side from side ends of the casting bead in the X direction. Upon formation of a casting bead having a new width, the control section shifts the outer side seal plates in the Y direction based on the width data of the casting bead having the new width such that the outer side seal plates are located in the upstream side from the side ends of the casting bead having the new width in the X direction.2009-09-03
20090218722CASTING DEVICE, AND SOLUTION CASTING METHOD AND APPARATUS - A casting drum is rotated around a shaft. A peripheral surface of the casting drum moves in an X direction. A dope is discharged through a casting die onto the peripheral surface. A casting bead is formed so as to extend from a discharge port of the casting die to the peripheral surface. A decompression chamber decompresses an upstream side from the casting bead. Air flowing toward the casting bead is generated at the vicinity of the peripheral surface. A lateral labyrinth plate is disposed at a clearance between the decompression chamber and the peripheral surface. The lateral labyrinth plate is provided with a labyrinth groove extending along a width direction of the casting bead. An edge portion for forming the labyrinth groove has a cross section with an acute angle in a direction of air flowing between the decompression chamber and the support.2009-09-03
20090218723AUTOMATED PROTOTYPING OF A COMPOSITE AIRFRAME - A high quality finished prototype fuselage structure of an aircraft is manufactured using a cured female tool and an automated composite layup machine, and then touched up by hand to meet a tolerance or other specification. The female tool is preferably made from a male mold, by depositing layers of composite material over the mold, curing the tool together at a first cure temperature, separating the tool from the mold, and then curing the tool at a second, higher temperature. The first cure temperature should be at or below an upper limit temperature no greater than 180° F. The second cure temperature is preferably in the range of 250° F. to 350° F. The step of hand touching up can comprise one or more of mechanically abrading and deforming a first portion of the fuselage structure to mate with a second portion of the fuselage structure.2009-09-03
20090218724Method for producing a sandwich construction, in particular a sandwich construction for the aeronautical and aerospace fields - The present invention provides a method of producing a construction, in particular a sandwich construction for the aeronautical and aerospace fields, comprising the following steps. A heating material is initially applied on one side of a core construction material. In a further step a reinforcing element is introduced into the core construction material and the heating material in such a way that the reinforcing element extends through the core construction material and the heating material and has a portion which projects beyond the heating material. The heating material is then heated to soften the projecting portion at least in regions and said projecting portion is subsequently deformed using the softened region as a pivot point to engage the core construction material from behind and to form the construction. This method is distinguished in particular by the fact that it allows the portions to be heated substantially simultaneously, and not sequentially as in the state of the art. The time saved as a result in turn has a positive effect on production costs.2009-09-03
20090218725INJECTION MOLDED PANELED MOBILE DEVICE ENCLOSURE - Systems, devices and/or methods that facilitate thinner form factors and/or more robust mobile device enclosures by injection molding mobile device enclosures with panels are presented. These panels can include display panels, window panels and touch sensitive panels. Further, panels can be insert molded. Additionally, select panels can be contemporaneously molded by multi-shot injection molding at least a portion of the panel and a portion of the enclosure body. Multi-shot injection molding can include 2-shot injection molding, multi-shot injection molding, and co-injection injection molding. Injection molding a mobile device enclosure with a panel can provide improved form factor mobile device enclosures and/or provide a more robust mobile device enclosure than many traditional methods.2009-09-03
20090218726DEVICE AND METHOD FOR PRODUCING MULTICOMPONENT PLASTIC PARTS - A device for producing a plastic part that has a plurality of components includes a closing unit for receiving at least one mold in which a thermoplastic molded body can be shaped or positioned, and at least one polyurethane unit for introducing a polyurethane material into a larger cavity comprising the thermoplastic molded body. At least one additional polyurethane unit is provided for introducing an additional polyurethane material having different product properties into a same or a different, larger cavity. As an alternative, the at least one polyurethane unit can be adapted for an additional polyurethane material having different product properties for introduction into the same or a different, larger cavity.2009-09-03
20090218727CAST COMPOSITE SAIL AND METHOD - A method of casting a sail comprising supplying a carrier film, supporting the carrier film along a support mechanism, forming a sail form with the support mechanism, pulling the carrier film across the support mechanism, forming a first coating, wiping the resin to control resin amount for forming the first coating, applying a yarn on the first coating in a pattern, applying a yarn on the first coating in a second pattern, dispensing a resin onto the carrier film to form a second coating covering at least one of the first pattern and the second pattern, wiping the resin to control the resin amount for forming the second coating, applying an additional element to at least one of the first coating and the second coating, applying a top film on the second coating, calendering the first and second coating, and curing the resin of the first and second coating.2009-09-03
20090218728PEEL-AWAY INTRODUCER AND METHOD FOR MAKING THE SAME - A device and method of making a peel-away introducer sheath adapted for use in transcutaneous insertions of medical instrumentation according to an embodiment of the present invention includes, forming at least two anchor apertures in an end portion of a peel-away sheath tube, molding a fitting around the end portion by passing molten resin into a fitting mold and through the at least two anchor apertures, and cooling the resin within the mold and the at least two anchor apertures to thereby fasten the fitting to the sheath tube.2009-09-03
20090218729METHOD AND APPARATUS TO FORM A SPHERICAL END OF AN ELONGATED CYLINDRICAL TUBE - A method for shaping a plurality of tampon applicators includes the steps of heating a forming element forming surface; applying a portion of a first tampon applicator to the forming surface; shaping the portion of the first tampon applicator; cooling the forming surface; and removing the portion of the first tampon applicator from the forming surface. The forming element has a high thermal conductivity and a low thermal mass. The step of heating the forming element forming surface includes heating it to a temperature greater than the softening point of the heat-deformable material of the applicator portion. The step of cooling the forming element forming surface includes cooling it to a temperature less than the softening point of the heat-deformable material. The time required to heat and form the portion of the tampon applicator is less than about 90 seconds. These steps are repeated for subsequent tampon applicators. An apparatus useful in a tampon applicator includes a mold body and means to provide at least a portion of the tampon applicator to the mold. The tampon applicator is at least partially formed of a heat-deformable material. The mold body has a forming element, a forming element fluid cavity, means to apply heat to the forming element, and means to provide cooling fluid through the forming element fluid cavity.2009-09-03
20090218730Acrylon Plastics Inc. - A rotational mold comprises a main portion for forming a hollow body and an inlet tube portion for forming an inlet tube on the hollow body. The inlet tube portion comprises a grooved collar and an annular end wall at one end of the collar for forming external threads about the inlet tube and a peripheral rim about an opening of the inlet tube. A shaft is joined to the annular end wall to extend through the collar to define an annular gap therebetween and includes material thereon spaced from the annular end wall which is arranged for resisting material being formed thereon during molding. The opening of the inlet tube of the finished molded part is thus arranged to be wholly formed by the shaft during molding without subsequent trimming being required.2009-09-03
20090218731Shaped body and method for production of said body - Water-dispersible or water-soluble polymers, particularly those of the family of compounds comprising the poloxamers or the polyesters or amphiphilic agents (emulsifiers), and also lipophilic materials are dispersed by melting the components at suitable temperatures with admixture of pharmaceutically active substances by mechanical procedures, i.e. a lipophilic disperse phase is distributed in a hydrophilic continuous polymer phase to form a stable dispersion. By controlled cooling, curing, and storage followed by high-pressure molding at defined temperatures and operating pressures there are produced, in addition to other types of shaped bodies, dispersed polymeric fatty sticks distinguished by particularly good fracture strength, flexibility, and variable time-specific dimensional stability.2009-09-03
20090218732System and method for edge heating of stretch film - The present invention relates to a method and system for edge treatment of a film in which one or both edges of the film is heated to a temperature above a softening point of a DSC onset temperature. In one embodiment, the edges of film are heated to a temperature above the peak DSC temperature. A central portion of the film between the edges remains at a lower temperature. In one embodiment, an edge heat treatment apparatus having a heated channel is used to receive an edge portion of the film and heat the edge portion.2009-09-03
20090218733LIQUID OR HYDRAULIC BLOW MOLDING - An apparatus and method for simultaneously forming and filling a plastic container is provided. A mold cavity defines an internal surface and is adapted to accept a preform. A pressure source includes an inlet and a piston-like device. The piston-like device is moveable in a first direction wherein liquid is drawn into the pressure source through the inlet and in a second direction wherein the liquid is urged toward the preform. A blow nozzle may be adapted to receive the liquid from the pressure source and transfer the liquid at high pressure into the preform thereby urging the preform to expand toward the internal surface of the mold cavity and creating a resultant container. The liquid remains within the container as an end product.2009-09-03
20090218734Tool, Arrangement, and Method for Manufacturing a Component, Component - This application describes a tool, an arrangement, and a method of manufacturing a component. The manufacturing of the component is achieved by a resin transfer from a storage chamber via a transfer line into a working chamber. Before the resin transfer, taking place, for example by a compressed air charging of the storage chamber, the storage chamber is filled with an amount of resin adjusted to the size of the component. furthermore, a semi-finished product, consisting of cut-to-size reinforcement fibers, is inserted into the working chamber that is adjusted to the form of the component to be produced. Storage chamber, transfer line, and working chamber are configured in a one-piece mould casing of the tool. The application further describes a component manufactured by the above-mentioned tool or by the above-mentioned method respectively.2009-09-03
20090218735METHOD OF SYNTHESIS OF CERAMICS - The present invention relates to producing ceramic targets, which serves as a material source for magnetron, electron-beam, ion-beam and other film applying methods in micro-, opto-, nano-electronics. The aim of the proposed invention is to reduce the doping level of ceramics by non-controllable impurities, to increase a ceramic density and to improve performance characteristics of ceramic targets. In the method for synthesizing the ceramics doped by a low-melting metal consisting in that a mixture of components is pressed and sintered; as a doping additive, the mixture of components contains a low-melting metal and the surface of the main component particles is covered and moistened prior to pressing by the doping metal layer by grinding the mixture of the components. The grinding can be carried out at a melting temperature of the low-melting metal. In a particular case, for the synthesis of zinc oxide ceramic doped with gallium, the mixture of zinc oxide powder with gallium is triturated at a gallium melting temperature. The component mixture can contain a boron compound, as a binder and a doping additive, forming boron oxide during sintering.2009-09-03
20090218736CONTROL OF A MELTING PROCESS - The invention relates to a method to control a process for heating or melting a metal, in particular aluminium, which includes: heating said metal in a fuel-fired furnace wherein a fuel is combusted with an oxygen containing gas, measuring the concentrations of carbon dioxide and oxygen in the furnace atmosphere, calculating the theoretical concentration of oxygen in the furnace atmosphere on the basis of said concentration of carbon dioxide, determining the difference between said theoretical concentration of oxygen and said detected concentration of oxygen and controlling said process depending on said difference.2009-09-03
20090218737DIRECT SMELTING PLANT - A direct smelting plant for producing molten metal from a metalliferous feed material using a molten bath based direct smelting process is disclosed. The plant includes a gas delivery duct assembly extending from a gas supply location away from the vessel to deliver oxygen-containing gas to gas injection lances extending into a direct smelting vessel. The gas delivery duct assembly includes a single gas delivery main connected to the gas injection lances to supply oxygen-containing gas to the gas injection lances. The gas delivery main is located at a height above a lower half of the vessel.2009-09-03
20090218738INSTALLATION FOR THE DRY TRANSFORMATION OF A MATERIAL MICROSTRUCTURE OF SEMI-FINISHED PRODUCTS - An installation for the dry transformation of a material microstructure of semi-finished products, especially for dry bainitization, includes a quenching chamber and a microstructure transformation chamber situated downstream from it in the processing flow, in each case the inner space of the two chambers having applied to it excess gas pressure, at least during the respective method step, for the transformation of the material microstructure. Device(s) are provided for maintaining a minimum excess gas pressure acting on the semi-finished product, during the moving of the semi-finished product from the quenching chamber into the microstructure transformation chamber.2009-09-03
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