35th week of 2017 patent applcation highlights part 48 |
Patent application number | Title | Published |
20170250133 | Systems and Methods for Microelectronics Fabrication and Packaging Using a Magnetic Polymer | 2017-08-31 |
20170250134 | Methods for Microelectronics Fabrication and Packaging Using a Magnetic Polymer | 2017-08-31 |
20170250135 | SEMICONDUCTOR DEVICE WITH PATTERNED GROUND SHIELDING | 2017-08-31 |
20170250136 | SEMICONDUCTOR DEVICE | 2017-08-31 |
20170250137 | SEMICONDUCTOR DEVICE | 2017-08-31 |
20170250138 | SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME | 2017-08-31 |
20170250139 | Alignment Mark Design for Packages | 2017-08-31 |
20170250140 | High Performance Compliant Substrate | 2017-08-31 |
20170250141 | WIRING CIRCUIT BOARD, SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING WIRING CIRCUIT BOARD, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2017-08-31 |
20170250142 | Self-Destructive Circuits Under Radiation | 2017-08-31 |
20170250143 | INTEGRATED CIRCUIT DEVICE WITH OVERVOLTAGE DISCHARGE PROTECTION | 2017-08-31 |
20170250144 | Static Discharge System | 2017-08-31 |
20170250145 | PERFORATED CONDUCTIVE MATERIAL FOR EMI SHIELDING OF SEMICONDUCTOR DEVICE AND COMPONENTS | 2017-08-31 |
20170250146 | Power Supply Transient Performance (Power Integrity) for a Probe Card Assembly in an Integrated Circuit Test Environment | 2017-08-31 |
20170250147 | Semiconductor Device and Method of Manufacture | 2017-08-31 |
20170250148 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE | 2017-08-31 |
20170250149 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | 2017-08-31 |
20170250150 | DUAL SIDE SOLDER RESIST LAYERS FOR CORELESS PACKAGES AND PACKAGES WITH AN EMBEDDED INTERCONNECT BRIDGE AND THEIR METHODS OF FABRICATION | 2017-08-31 |
20170250151 | SEMICONDUCTOR UNIT, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS | 2017-08-31 |
20170250152 | Chip embedding package with solderable electric contact | 2017-08-31 |
20170250153 | ELECTRONIC PART, ELECTRONIC DEVICE, AND ELECTRONIC APPARATUS | 2017-08-31 |
20170250154 | Semiconductor Device and Method of Forming 3D Dual Side Die Embedded Build-Up Semiconductor Package | 2017-08-31 |
20170250155 | MULTI-ACCESS MEMORY SYSTEM AND A METHOD TO MANUFACTURE THE SYSTEM | 2017-08-31 |
20170250156 | IMAGING SYSTEM AND MANUFACTURING APPARATUS | 2017-08-31 |
20170250157 | ELECTRODE ASSEMBLY AND METHOD FOR MANUFACTURING SAME | 2017-08-31 |
20170250158 | Semiconductor Device and Method of Forming Insulating Layers Around Semiconductor Die | 2017-08-31 |
20170250159 | INTEGRATED CIRCUIT DIE HAVING BACKSIDE PASSIVE COMPONENTS AND METHODS ASSOCIATED THEREWITH | 2017-08-31 |
20170250160 | 3DIC Structure and Methods of Forming | 2017-08-31 |
20170250161 | Correction Die for Wafer/Die Stack | 2017-08-31 |
20170250162 | METHOD FOR MANUFACTURING SEMICONDUCTOR APPARATUS, METHOD FOR MANUFACTURING FLIP-CHIP TYPE SEMICONDUCTOR APPARATUS, SEMICONDUCTOR APPARATUS, AND FLIP-CHIP TYPE SEMICONDUCTOR APPARATUS | 2017-08-31 |
20170250163 | CONNECTORS FOR SMART WINDOWS | 2017-08-31 |
20170250164 | DISPLAY APPARATUS AND MANUFACTURING METHOD THEREOF | 2017-08-31 |
20170250165 | SEMICONDUCTOR PACKAGE ASSEMBLY | 2017-08-31 |
20170250166 | THERMAL PERFORMANCE STRUCTURE FOR SEMICONDUCTOR PACKAGES AND METHOD OF FORMING SAME | 2017-08-31 |
20170250167 | EFFICIENTLY MICRO-TRANSFER PRINTING MICRO-SCALE DEVICES ONTO LARGE-FORMAT SUBSTRATES | 2017-08-31 |
20170250168 | DISPLAY INCLUDING NANOSCALE LED MODULE | 2017-08-31 |
20170250169 | OPTICAL PROXIMITY SENSOR ARRANGEMENT AND METHOD FOR PRODUCING AN OPTICAL PROXIMITY SENSOR ARRANGEMENT | 2017-08-31 |
20170250170 | INTEGRATED CIRCUIT PACKAGE AND METHODS OF FORMING SAME | 2017-08-31 |
20170250171 | SEMICONDUCTOR PACKAGE AND REWORK PROCESS FOR THE SAME | 2017-08-31 |
20170250172 | Semiconductor Device and Method of Stacking Semiconductor Die for System-Level ESD Protection | 2017-08-31 |
20170250173 | VERTICAL POWER TRANSISTOR DIE WITH ETCHED BEVELED EDGES FOR INCREASING BREAKDOWN VOLTAGE | 2017-08-31 |
20170250174 | Apparatus for Rectified RC Trigger of Back-to-Back MOS-SCR ESD Protection | 2017-08-31 |
20170250175 | LDMOS TRANSISTOR | 2017-08-31 |
20170250176 | SILICON CONTROLLED RECTIFIER (SCR) BASED ESD PROTECTION DEVICE | 2017-08-31 |
20170250177 | SEMICONDUCTOR INTERGRATED CURCUIT APPARATUS AND MANUFACTURING METHOD FOR SAME | 2017-08-31 |
20170250178 | DECOUPLING CAPACITOR | 2017-08-31 |
20170250179 | SEMICONDUCTOR DEVICE | 2017-08-31 |
20170250180 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-08-31 |
20170250181 | FINFET DEVICE WITH ENLARGED CHANNEL REGIONS | 2017-08-31 |
20170250182 | INTEGRATING VLSI-COMPATIBLE FIN STRUCTURES WITH SELECTIVE EPITAXIAL GROWTH AND FABRICATING DEVICES THEREON | 2017-08-31 |
20170250183 | METHOD, APPARATUS, AND SYSTEM HAVING SUPER STEEP RETROGRADE WELL WITH SILICON AND SILICON GERMANIUM FINS | 2017-08-31 |
20170250184 | SEMICONDUCTOR DEVICE | 2017-08-31 |
20170250185 | DYNAMIC MEMORY STRUCTURE | 2017-08-31 |
20170250186 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATED THEREBY | 2017-08-31 |
20170250187 | Anti-Fuse Memory And Semiconductor Storage Device | 2017-08-31 |
20170250188 | MANUFACTURING METHOD OF NON-VOLATILE MEMORY AND NON-VOLATILE MEMORY | 2017-08-31 |
20170250189 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME | 2017-08-31 |
20170250190 | MEMORY ARRAY HAVING CONNECTIONS GOING THROUGH CONTROL GATES | 2017-08-31 |
20170250191 | METHOD OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE AND SEMICONDUCTOR DEVICE STRUCTURE | 2017-08-31 |
20170250192 | Non-Volatile Memory With Silicided Bit Line Contacts | 2017-08-31 |
20170250193 | METHOD OF MANUFACTURING THREE-DIMENSIONAL SEMICONDUCTOR DEVICE | 2017-08-31 |
20170250194 | SEMICONDUCTOR DEVICES INCLUDING STACKED ELECTRODES | 2017-08-31 |
20170250195 | STACKED MEMORY DEVICE, OPTICAL PROXIMITY CORRECTION (OPC) VERIFYING METHOD, METHOD OF DESIGNING LAYOUT OF STACKED MEMORY DEVICE, AND METHOD OF MANUFACTURING STACKED MEMORY DEVICE | 2017-08-31 |
20170250196 | MULTI-LEVEL FERROELECTRIC MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-08-31 |
20170250197 | LAYOUT STRUCTURE FOR SEMICONDUCTOR INTEGRATED CIRCUIT | 2017-08-31 |
20170250198 | METHOD FOR MANUFACTURING A TRANSISTOR HAVING A SHARP JUNCTION BY FORMING RAISED SOURCE-DRAIN REGIONS BEFORE FORMING GATE REGIONS AND CORRESPONDING TRANSISTOR PRODUCED BY SAID METHOD | 2017-08-31 |
20170250199 | DISPLAY DEVICE | 2017-08-31 |
20170250200 | TRANSISTOR LAYOUT WITH LOW ASPECT RATIO | 2017-08-31 |
20170250201 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-08-31 |
20170250202 | ARRAY SUBSTRATE FOR DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF | 2017-08-31 |
20170250203 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME | 2017-08-31 |
20170250204 | SEMICONDUCTOR DEVICE | 2017-08-31 |
20170250205 | SEMICONDUCTOR DEVICE | 2017-08-31 |
20170250206 | COMPOSITION FOR FORMING SILICA LAYER, METHOD FOR MANUFACTURING SILICA LAYER, AND SILICA LAYER | 2017-08-31 |
20170250207 | THIN FILM TRANSISTOR AND PREPARATION METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY APPARATUS | 2017-08-31 |
20170250208 | MASK FOR DEPOSITION, APPARATUS FOR MANUFACTURING DISPLAY APPARATUS HAVING THE SAME, AND METHOD OF MANUFACTURING DISPLAY APPARATUS WITH MANUFACTURING DISPLAY APPARATUS HAVING MASK FOR DEPOSITION | 2017-08-31 |
20170250209 | Article Comprising a Photodiode-side Integrated Fuse for Avalanche Photodetector Focal Plane Array Pixels and Method Therefor | 2017-08-31 |
20170250210 | SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING A SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS | 2017-08-31 |
20170250211 | SEMICONDUCTOR IMAGE SENSOR DEVICE AND MANUFACTURING METHOD OF THE SAME | 2017-08-31 |
20170250212 | ISOLATION STRUCTURE AND IMAGE SENSOR HAVING THE SAME | 2017-08-31 |
20170250213 | IMAGING ELEMENT, METHOD FOR MANUFACTURING IMAGING ELEMENT, PIXEL DESIGN METHOD, AND ELECTRONIC APPARATUS | 2017-08-31 |
20170250214 | IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME | 2017-08-31 |
20170250215 | PAD STRUCTURE EXPOSED IN AN OPENING THROUGH MULTIPLE DIELECTRIC LAYERS IN BSI IMAGE SENSOR CHIPS | 2017-08-31 |
20170250216 | IMAGING DEVICE | 2017-08-31 |
20170250217 | METHOD OF FORMING A SHALLOW PINNED PHOTODIODE | 2017-08-31 |
20170250218 | METHODS OF FORMING IMAGING PIXEL MICROLENSES | 2017-08-31 |
20170250219 | INORGANIC LED PIXEL STRUCTURE | 2017-08-31 |
20170250220 | Light Emitting Diode Chip, Light Emitting Diode, Backlight Source and Display Apparatus | 2017-08-31 |
20170250221 | METHOD OF MANUFACTURING MAGNETORESISTIVE ELEMENT | 2017-08-31 |
20170250222 | VARIABLE RESISTANCE MEMORY DEVICES | 2017-08-31 |
20170250223 | A RESISTIVE RANDOM-ACCESS MEMORY IN PRINTED CIRCUIT BOARD | 2017-08-31 |
20170250224 | THREE-DIMENSIONAL MEMORY DEVICE WITH VERTICAL SEMICONDUCTOR BIT LINES LOCATED IN RECESSES AND METHOD OF MAKING THEREOF | 2017-08-31 |
20170250225 | VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME | 2017-08-31 |
20170250226 | IMAGE SENSORS HAVING LIGHT GUIDE MEMBERS | 2017-08-31 |
20170250227 | ORGANIC PHOTOELECTRONIC DEVICE AND IMAGE SENSOR | 2017-08-31 |
20170250228 | ORGANIC LIGHT-EMITTING DISPLAY DEVICE | 2017-08-31 |
20170250229 | DISPLAY PANEL HAVING FORCE SENSING FUNCTION | 2017-08-31 |
20170250230 | ORGANIC LIGHT-EMITTING DISPLAY PANEL AND ORGANIC LIGHT-EMITTING DISPLAY DEVICE | 2017-08-31 |
20170250231 | DISPLAY DEVICE | 2017-08-31 |
20170250232 | ORGANIC LIGHT-EMITTING DIODE DISPLAY PANEL AND ORGANIC LIGHT-EMITTING DIODE DISPLAY DEVICE | 2017-08-31 |