34th week of 2014 patent applcation highlights part 72 |
Patent application number | Title | Published |
20140237225 | INFORMATION PROCESSING APPARATUS, CONTROL METHOD FOR INFORMATION PROCESSING APPARATUS, AND PROGRAM - An information processing apparatus includes a first processing unit, a second processing unit which is different from the first processing unit, a supply unit configured to supply a clock to the first processing unit and the second processing unit, and a control unit configured to control the supply unit in such a manner as to stop a supply of the clock to the second processing unit in response to completion of activation of the second processing unit, and to resume the supply of the clock to the second processing unit in response to completion of activation of the first processing unit. | 2014-08-21 |
20140237226 | OPTION READ-ONLY MEMORY USE - Example embodiments disclosed herein relate to altered option read-only memory. A copy of an option read-only memory is stored. The copy is used during a boot process based on a determination that the option read-only memory has been altered. | 2014-08-21 |
20140237227 | PROCESSING DEVICE, ARRAY-TYPE PROCESSING DEVICE, CONTROL METHOD THEREOF, AND INFORMATION PROCESSING SYSTEM - This invention provides an array-type processing device which can reduce power consumption and can also reduce a processing performance drop caused by switching of configuration information. An array-type processing device, which includes a first domain and a second domain, the device comprises a plurality of processing units which are allocated in the first domain, and each of which includes a plurality of processing elements and a router configured to control connections between the plurality of processing elements, a configuration information supply unit configured to supply configuration information to one or more processing units of the plurality of processing units, the configuration information supply unit being allocated in the second domain, and a power supply control unit configured to control the power supply to the plurality of processing units, the power supply control unit being allocated in the second domain. | 2014-08-21 |
20140237228 | SMART CARD RENEWAL - A method includes storing creating a smart card with an expiration date and renewing the smart card after the expiration date. The smart card may be created with data stored upon the smart card for use in the renewal process. The data may comprise a certificate. The smart card may be issued at the information technology department of an organization and may be renewed at a user workstation of the organization. The renewal process may include a renewal environment for authenticating the holder of the smart card. The card holder may be required to provide a personal identification number in order to enter into the renewal environment. The rights conferred by the renewed smart card may be more limited than the rights conferred by the original smart card, both in duration and access to data within the organization. | 2014-08-21 |
20140237229 | BLUETOOTH DEVICE AS SECURITY ACCESS KEY - This application is directed to a system for remotely directing a host device to perform an operation using a key. The key may include a communications circuitry for transmitting data, for example a key identifier or an instruction to perform an operation, within a personal area network created by the communications circuitry. When a host device is within the personal area network, the key may transmit data received by a transceiver on the host device. In response to receiving the data, the host device may perform an operation (e.g., an authentication operation). In some embodiments, the key may transmit data identifying an operation for the host device to perform. In some embodiments, the host device may store in memory key identification information and an associated operation which may be retrieved when the key is brought in proximity of the host device. | 2014-08-21 |
20140237230 | COMPUTER SYSTEM FOR STORING AND RETRIEVAL OF ENCRYPTED DATA ITEMS, CLIENT COMPUTER, COMPUTER PROGRAM PRODUCT AND COMPUTER-IMPLEMENTED METHOD - A system is disclosed comprising multiple sets of client computers each client computer having installed thereon an application program The application program comprising client computer specific log-in information, a database system coupled to the set of client computers via a network. The database system having a log-in component for logging-in the client computers, and being partitioned into multiple relational databases each one of which is assigned to one set of the sets of client computers. Each database further storing encrypted data items, each data item being encrypted with one of the user or user-group specific cryptographic keys, the key identifier of the cryptographic key with which one of the data items is encrypted being stored in the database as an attribute of the one of the encrypted data items. The log-in component comprising assignment information indicative of the assignment of the databases to the set of client computers. | 2014-08-21 |
20140237231 | COMPUTER SYSTEM FOR STORING AND RETRIEVAL OF ENCRYPTED DATA ITEMS, CLIENT COMPUTER, COMPUTER PROGRAM PRODUCT AND COMPUTER-IMPLEMENTED METHOD - A system is disclosed comprising multiple sets of client computers each client computer having installed thereon an application program. The application program comprising client computer specific log-in information, a database system coupled to the set of client computers via a network. The database system having a log-in component for logging-in the client computers, and being partitioned into multiple relational databases each one of which is assigned to one set of the sets of client computers. Each database further storing encrypted data items, each data item being encrypted with one of the user or user-group specific cryptographic keys, the key identifier of the cryptographic key with which one of the data items is encrypted being stored in the database as an attribute of the one of the encrypted data items. The log-in component comprising assignment information indicative of the assignment of the databases to the set of client computers. | 2014-08-21 |
20140237232 | SELECTIVE SHREDDING IN A DEDUPLICATION SYSTEM - Making a target file impratical to be retrieved comprises decrypting a directory manager file using a first directory manager file key. The directory manager file includes an encryption key for a segment that is used when reconstructing a target file. The directory manager file is modified by deleting a reference to the target file. The reference includes a file encryption key. Retrieving the target file is made impractical by the deletion of the reference to the target file in the directory manager file. The modified directory manager file is encrypted using a second directory manager file key. | 2014-08-21 |
20140237233 | METHOD AND APPARATUS FOR PROVIDING CONTENT - Methods and systems for enabling content to be securely and conveniently distributed to authorized users are provided. More particularly, content is maintained in encrypted form on sending and receiving devices, and during transport. In addition, policies related to the use of, access to, and distribution of content can be enforced. Features are also provided for controlling the release of information related to users. The distribution and control of contents can be performed in association with a client application that presents content and that manages keys. | 2014-08-21 |
20140237234 | ENHANCED SYSTEM SECURITY - Methods and systems for maintaining the confidentiality of data provided by an organization for storage on a third party database system are provided. The data can be encrypted on an internal network of the organization and sent to the third party database system for storage. The third party database system can associate metadata with the encrypted data and can store the encrypted data. Accordingly, when a request for the encrypted data is received from a computing device communicating with an internal network of the organization, the encrypted data and associated metadata can be sent to the computing device. A key that is stored on an internal network of the organization can be called through an applet, which utilizes information within the metadata to locate the key on the internal network of the organization. | 2014-08-21 |
20140237235 | INFORMATION PROCESSING DEVICE, INFORMATION STORAGE DEVICE, SERVER, INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD, AND PROGRAM - Content usage control is realized on condition of the establishment of user authentication without having to communicate with a server or the like. An information storage device such as a memory card stores an encrypted content, a converted title key obtained by converting a title key which is an encryption key, and a user token obtained by converting binding secret information to be applied to calculate the title key from the converted title key. A reproducing device that decrypts and reproduces the encrypted content acquires the converted title key and the user token, and generates an authentication key on the basis of user identification information such as a user ID. Furthermore, the binding secret information is calculated by computation processing between the user token and the authentication key, the title key is calculated from the converted title key by applying the calculated binding secret information, and decryption processing of the encrypted content is executed by applying the calculated title key. | 2014-08-21 |
20140237236 | Mobile Security Fob - A computer-implemented method comprising: receiving, from a primary factor authentication device by one or more computer systems, a request to enroll a mobile device as a secondary factor authentication device; and
| 2014-08-21 |
20140237237 | MESSAGE AUTHENTICATION USING A UNIVERSAL HASH FUNCTION COMPUTED WITH CARRYLESS MULTIPLICATION - A method for authenticating a message by a wireless device is described. The wireless device obtains the input message. The wireless device generates a keystream. The wireless device computes a message authentication code using the keystream and a universal hash function. The universal hash function is computed using carryless multiplication. | 2014-08-21 |
20140237238 | DOCUMENT AUTHENTICATION DATA EMBEDDING METHOD AND APPARATUS - A method of embedding authentication data in an electronic document image is described. Data related to an item of information on an image of at least one page in the electronic document is acquired. The image is decomposed into a hierarchy of images having a top level and one or more lower levels each having a higher level parent, each lower level image defining a smaller region of the corresponding higher level parent image, the top level image defining a region that covers the item of information. A first secure identifier of at least the top level image is computed and arranged in a first data arrangement. A second secure identifier of the data related to the item of information is computed and arranged in a second data arrangement with the data related to the item of information. The first and second data arrangements are embedded in the electronic document. | 2014-08-21 |
20140237239 | TECHNIQUES FOR VALIDATING CRYPTOGRAPHIC APPLICATIONS - Disclosed are various embodiments for validating cryptographic applications. A cryptographic application is transmitted to a client device. Subsequently, a communication link is established with the transmitted cryptographic application as it executes in the client device. A round-trip time for communications with the transmitted cryptographic application is measured. Validation data and expected response data is generated, and the validation data is sent to the previously transmitted cryptographic application as it executes in the client device. | 2014-08-21 |
20140237240 | METHOD AND SYSTEMS FOR THE AUTHENTICATION OF A USER - A computer security system used to identify and authenticate a user. In one aspect, a method for identifying and authenticating a user is provided. The method includes establishing a trust between a server machine and an agent on a user machine. The method further includes establishing a session key to encrypt communications between the server machine and the agent. The method also includes receiving a username and password for use in validating the user. Additionally, the method includes creating an executable binary for the extraction of device data from the user machine to uniquely identify the machine. In another aspect, a computer-readable medium including a set of instructions that when executed by a processor causes the processor to identify and authenticate the user is provided. In a further aspect, a system for identifying and authenticating a user is provided. | 2014-08-21 |
20140237241 | MAPPING A GLYPH TO CHARACTER CODE IN OBFUSCATED DATA - In a font applying device on a client side in a computer system composed of the client and a server, an obfuscated font storing section stores an obfuscated font in which a character different from a character identified by the server based on a character code and having the same width of the character identified by the server is mapped to the character code. An obfuscated document receiving section receives an obfuscated document obtained by obfuscating document data as a result of converting the character code to a character code to which a character identified by the server based on the character code in the document data is mapped in the obfuscated font. A deobfuscation processing section identifies the character mapped in the obfuscated font to a character code included in the obfuscated document, and a display control section controls the display of the character. | 2014-08-21 |
20140237242 | COMPACT SECURITY DEVICE WITH TRANSACTION RISK LEVEL APPROVAL CAPABILITY - The present invention relates to the field of securing electronic transactions and more specifically to systems to indicate and verify the approval of the risk level of a transaction and to systems for generating transaction risk level approval codes. | 2014-08-21 |
20140237243 | METHOD AND SYSTEM FOR SECURE OVER-THE-TOP LIVE VIDEO DELIVERY - A method is provided for managing key rotation (use of series of keys) and secure key distribution in over-the-top content delivery. The method provided supports supplying a first content encryption key to a content packaging engine for encryption of a first portion of a video stream. Once the first content encryption key has expired, a second content encryption key is provided to the content packaging engine for encryption of a second portion of a video stream. The method further provides for notification of client devices of imminent key changes, as well as support for secure retrieval of new keys by client devices. A system is also specified for implementing a client and server infrastructure in accordance with the provisions of the method. | 2014-08-21 |
20140237244 | DEVICE AND AUTHENTICATION METHOD THEREFOR - According to one embodiment, an authentication method includes generating, by the memory, first authentication information by calculating secret identification information with a memory session key in one-way function operation, transmitting encrypted secret identification information, a family key block, and the first authentication information to a host, and generating, by the host, second authentication information by calculating the secret identification information generated by decrypting the encrypted secret identification information with the host session key in one-way function operation. The method further includes comparing, by the host, the first authentication information with the second authentication information. | 2014-08-21 |
20140237245 | DEVICE AND AUTHENTICATION METHOD THEREFOR - According to one embodiment, an authentication method includes generating, by the memory, first authentication information by calculating secret identification information with a memory session key in one-way function operation, transmitting encrypted secret identification information, a family key block, and the first authentication information to a host, and generating, by the host, second authentication information by calculating the secret identification information generated by decrypting the encrypted secret identification information with the host session key in one-way function operation. The method further includes comparing, by the host, the first authentication information with the second authentication information. | 2014-08-21 |
20140237246 | Generating a Symmetric Key to Secure a Communication Link - A symmetric key to be used to secure a communication link between a first device and a second device is generated as follows: a first symmetric key is generated; a second symmetric key is generated; packets communicated between the first device and the second device over communication link are hashed to create a hash result; the first symmetric key, the second symmetric key and the hash result are hashed to generate a third symmetric key to be used to secure the communication link. | 2014-08-21 |
20140237247 | SYSTEM AND METHOD FOR PROVISIONING AND AUTHENTICATING VIA A NETWORK - System architecture and corresponding method for securing communication via a network (e.g. IEEE 802.11) is provided. In accordance with one embodiment, the present system and method protocol, may be suitably configured to achieve mutual authentication by using a shared secret to establish a tunnel used to protect weaker authentication methods (e.g. user names and passwords). The shared secret, referred to in this embodiment as the protected access credential may be advantageously used to mutually authenticate a server and a peer upon securing a tunnel for communication via a network. The present system and method disclosed and claimed herein, in one aspect thereof, comprises the steps of 1) providing a communication implementation between a first and a second party; 2) provisioning a secure credential between the first and the second party; and 3) establishing a secure tunnel between the first and the second party using the secure credential. | 2014-08-21 |
20140237248 | MOBILE COMMUNICATION SYSTEM IMPLEMENTING INTEGRATION OF MULTIPLE LOGINS OF MOBILE DEVICE APPLICATIONS - In existing mobile implementations, there is a disconnect between the mobile device accessing the network and the applicative services inasmuch as the entity responsible for network access, such as the VPN Gateway, differs from the entity governing access to applications, such as email servers and SharePoint repositories. Therefore existing solutions typically employ two authentication methods. Of these, the first may be used to authenticate the mobile device to the VPN Gateway, while the second may be used to authenticate the mobile device towards the applications server. In order to facilitate strong authentication it is often desired to utilize a mechanism that uses or combines two different factors, e.g. “something you have” (such as but not limited to a smart card) and “something you know” (such as but not limited to a password). Most currently available mobile devices offer limited options to connect external devices to them, rendering most “Something you have” solutions irrelevant. For instance, there is no ability to connect a smart-card to a mobile phone. | 2014-08-21 |
20140237249 | DEVICE AND AUTHENTICATION METHOD THEREFOR - According to one embodiment, an authentication method includes generating, by the memory, first authentication information by calculating secret identification information with a memory session key in one-way function operation, transmitting encrypted secret identification information, a family key block, and the first authentication information to a host, and generating, by the host, second authentication information by calculating the secret identification information generated by decrypting the encrypted secret identification information with the host session key in one-way function operation. The method further includes comparing, by the host, the first authentication information with the second authentication information. | 2014-08-21 |
20140237250 | Registration and Network Access Control - In embodiments of registration and network access control, an initially unconfigured network interface device can be registered and configured as an interface to a public network for a client device. In another embodiment, a network interface device can receive a network access request from a client device to access a secure network utilizing extensible authentication protocol (EAP), and the request is communicated to an authentication service to authenticate a user of the client device based on user credentials. In another embodiment, a network interface device can receive a network access request from a client device to access a Web site in a public network utilizing a universal access method (UAM), and the request is redirected to the authentication service to authenticate a user of the client device based on user credentials. | 2014-08-21 |
20140237251 | Digital Signature System - A message signing system including a processor operative to receive a seed S | 2014-08-21 |
20140237252 | TECHNIQUES FOR VALIDATING DATA EXCHANGE - Disclosed are various embodiments for confirming transactions between cryptographic applications. A transaction confirmation is generated using metadata for ciphertext data. The transaction confirmation is signed using a private key of a temporary key pair. The signed transaction confirmation and a public key of the temporary key pair are converted into a publication format. The signed transaction confirmation and the public key of the temporary key pair are then published in the publication format. | 2014-08-21 |
20140237253 | CRYPTOGRAPHIC DEVICES AND METHODS FOR GENERATING AND VERIFYING COMMITMENTS FROM LINEARLY HOMOMORPHIC SIGNATURES - A processor of a device generates a cryptographic commitment by receiving a vector {right arrow over (m)}, a public verification key of a homomorphic signature scheme, and a tag; choosing a signature σ in the signature space; generating a commitment c by running the verification algorithm of the homomorphic signature scheme; and outputting the commitment c as intermediate values resulting from the verification algorithm. | 2014-08-21 |
20140237254 | CRYPTOGRAPHIC DEVICES AND METHODS FOR GENERATING AND VERIFYING LINEARLY HOMOMORPHIC STRUCTURE-PRESERVING SIGNATURES - Generation of linearly homomorphic structure-preserving signature σ on a vector (M | 2014-08-21 |
20140237255 | Decryption and Encryption of Application Data - Examples disclose providing a decryption, validation and encryption process. Specifically, disclosure includes decrypting a first encrypted application data to then validate its integrity. Disclosure also includes encrypting the decrypted application data using a technique different from that used to provide the first encrypted application data and then storing the encrypted application data. | 2014-08-21 |
20140237256 | METHOD FOR SECURING DATA USING A DISPOSABLE PRIVATE KEY - A method for securing data uses a unitary device to obtain a biometric reading from a user, and to generate a new key pair corresponding to the user's biometrics. The unitary device uses a private key from the key pair to encrypt data or voice, sends the encrypted data or voice to a second device and deletes the private key. The unitary device can authenticate the user using a previously generated public key corresponding to the user's biometrics. Also, the second device can decrypt the received data or voice using a public key corresponding to the user and previously received from the unitary device. | 2014-08-21 |
20140237257 | SCALABLE PRECOMPUTATION SYSTEM FOR HOST-OPAQUE PROCESSING OF ENCRYPTED DATABASES - A method, system, and computer program product to generate results for a query to an encrypted database stored on a host are described. The method includes generating indexes from the encrypted database, each index identifying records of the encrypted database associated with a range of data for at least one field stored in the records of the encrypted database, and generating index metadata associated with each index, the index metadata indicating the range of data identified by the associated index. The method also includes generating a sub-query from the query for each field associated with the query and determining a subspace of search within the encrypted database based on sub-query results obtained through the index metadata. The method further includes searching the subspace of the encrypted database to generate the results of the query. | 2014-08-21 |
20140237258 | DEVICE AND AUTHENTICATION METHOD THEREFOR - According to one embodiment, an authentication method includes generating, by the memory, first authentication information by calculating secret identification information with a memory session key in one-way function operation, transmitting encrypted secret identification information, a family key block, and the first authentication information to a host, and generating, by the host, second authentication information by calculating the secret identification information generated by decrypting the encrypted secret identification information with the host session key in one-way function operation. The method further includes comparing, by the host, the first authentication information with the second authentication information. | 2014-08-21 |
20140237259 | SYSTEMS/METHODS OF ENCRYPTION - Encryption is provided via an algorithm that maps a block of N input bits onto a block of M output bits, wherein M≧N. Encryption also may be provided in accordance with bit/bandwidth expansion, wherein M>N. At least one bit of the block of M output bits may be pseudo-randomly generated in accordance with a key and a statistical distribution. The statistical distribution may be any desired/preferred statistical distribution (including Gaussian or truncated Gaussian) and the key may be of any desired length that is deemed appropriate to satisfy un-breakability. | 2014-08-21 |
20140237260 | TELECOMMUNICATIONS DEVICE SECURITY - A mobile terminal for use with a cellular or mobile telecommunications network includes a normal execution environment and a secure execution environment The mobile terminal enables the software of the terminal in the secure execution environment to be updated. The terminal may be provided with minimal software initially in the secure execution environment, and is operable to subsequently update the software by over the air transmission of software. Also disclosed is a method for managing rights in respect of broadcast, multicast and/or unicast (downloaded) data. The method defines a service protection platform implemented on mobile terminals having both normal execution environment and secure execution environment. Service protection is provided by separating the operation of service protection application components into those that operate in the normal environment and those that are adapted to execute only in the secure execution environment. | 2014-08-21 |
20140237261 | PROCESS AUTHENTICATED MEMORY PAGE ENCRYPTION - A memory controller encrypts contents of a page frame based at least in part on a frame key associated with the page frame. The memory controller generates a first encrypted version of the frame key based at least in part on a first process key associated with a first process, wherein the first encrypted version of the frame key is stored in a first memory table associated with the first process. The memory controller generates a second encrypted version of the frame key based at least in part on a second process key associated with a second process, wherein the second encrypted version of the frame key is stored in a second memory table associated with the second process, the first process and the second process sharing access to the page frame using the first encrypted version of the frame key and the second encrypted version of the frame key, respectively. | 2014-08-21 |
20140237262 | SYSTEM AND METHOD FOR ESTABLISHING PERPETUAL TRUST AMONG PLATFORM DOMAINS - A method may include generating a first shared secret for a present boot session of the information handling system and determining if a second shared secret existed for a prior boot session of the information handling system. If the second shared secret existed for the prior boot session, the method may include encrypting the first shared secret with the second shared secret and communicating the first shared secret encrypted by the second shared secret from a first information handling resource to a second information handling resource. If the second shared secret did not exist for the prior boot session, the method may include communicating the first shared secret unencrypted from the first information handling resource to the second information handling resource. The method may additionally include securely communicating between the first information handling resource and the second information handling resource using the first shared secret for encryption and decryption. | 2014-08-21 |
20140237263 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM USING THE SAME - According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and an encryption arithmetic module. The memory cell array includes a first storage area and a second storage area. The first storage area is inhibited from being written into and read from and stores secret key data. The second storage area is inhibited from being written into and permitted to be read from and stores encrypted key data and an expected value. The encryption arithmetic module carries out an authentication operation based on the secret key data and message data. The expected value is the result of carrying out the authentication operation. | 2014-08-21 |
20140237264 | AUTHENTICATION METHOD - According to one embodiment, an authentication method comprising: generating a second key by the first key, the first key being stored in a memory and being prohibited from being read from outside; generating a session key by the second key; generating first authentication information, the secret identification information stored in a memory and being prohibited from being read from outside; transmitting encrypted secret identification information to an external device and receiving second authentication information from the external device, the encrypted secret identification information stored in a memory and readable, the second authentication information generated based on the encrypted secret identification information; and determining whether the first authentication information and the second authentication information match. | 2014-08-21 |
20140237265 | LOGICAL-TO-PHYSICAL ADDRESS TRANSLATION FOR A REMOVABLE DATA STORAGE DEVICE - A method for making memory more reliable involves accessing data stored in a removable storage device by translating a logical memory address provided by a host digital device to a physical memory address in the device. A logical memory address is received from the host digital device. The logical memory address corresponds to a location of data stored on the removable storage device. A physical memory address corresponding to the local address is determined by accessing a lookup table corresponding to the logical zone. | 2014-08-21 |
20140237266 | Secure Memory System with Fast Wipe Feature - A Flash-based storage system, card, and/or module comprises a Flash controller configured to encrypt the data pages of a page stripe by shuffling the data pages, including loading each data page into a data shuffling buffer in a sequential order relative to other data pages in the page stripe, and thereafter unloading each data page in a non-sequential order relative to other data pages in the page stripe. The Flash controller is also configured to scramble the data pages of the page stripe by performing a bitwise logical operation on the data pages that are unloaded from the data shuffling buffer. A user key and one or more system keys are used to perform the shuffling and scrambling. The Flash controller is further configured to flush the user key by bypassing the system's backup power supply and performing an emergency system shutdown without backing up system data. | 2014-08-21 |
20140237267 | Dynamically Controlling A Maximum Operating Voltage For A Processor - In an embodiment, a processor includes voltage calculation logic to calculate a plurality of maximum operating voltage values each associated with a number of active cores of the plurality of cores, based at least in part on a plurality of coefficient values. In this way, the processor can operate at different maximum operating voltages dependent on the number of active cores. Other embodiments are described and claimed. | 2014-08-21 |
20140237268 | MOISTURE SHUTDOWN CONTROL - Aspects of shutdown control of a device in the presence of moisture are described. In one embodiment, a moisture detection signal is received from a moisture detector. In turn, certain parameters associated with the moisture detector are identified. For example, the location of the moisture detector may be identified. Additionally or alternatively, a probability for damage to the device, based on the location of the moisture detector, may be identified. An evaluation of the moisture detection signal and the identified parameters is performed. Based on the evaluation, one of various power down procedures for the device may be initiated. In certain cases, a quick power down reaction for one or more subsystems of the device, in response to the detection of moisture, may prevent damage to the device. | 2014-08-21 |
20140237269 | ESTIMATING POWER USAGE IN A COMPUTING ENVIRONMENT - Power usage is estimated in a computing environment by automatically detecting hardware configuration information by use of a software agent that is translated into power consumption information for implementing a plurality of power estimation models for efficient power consumption and utilization. | 2014-08-21 |
20140237270 | POWER SUPPLY CONTROL APPARATUS, POWER SUPPLY CONTROL SYSTEM AND POWER SUPPLY CONTROL METHOD - A power supply control apparatus is disclosed. The power supply control apparatus includes a positional-information-obtaining unit configured to obtain positional information of a communication terminal; a process-information-obtaining unit configured to obtain process information requested by a user of the communication terminal; a distance-determination unit configured to, based on positional information of a processing apparatus that processes the process information obtained by the process-information-obtaining unit and the positional information of the communication terminal obtained by the positional-information-obtaining unit, calculate a distance between the processing apparatus and the communication terminal; and a power-supply-control unit configured to control a power supply of the processing apparatus based on the distance calculated by the distance-determination unit. | 2014-08-21 |
20140237271 | CONTROLLING ENERGIZING RANGE OF MOBILE ELECTRONIC DEVICE - An energization range of a laptop PC is controlled for safety component replacement. An EC can communicate with a battery unit to control a FET of the battery unit. In a power-off state, a PWC receives electricity from the battery unit or an AC/DC adapter. In the power-off state, a system of the EC stops. When a housing cover of the laptop PC is opened, a cover switch turns ON. When a logic circuit detects the operation of the cover switch, the PWC controls a DC/DC converter group to activate the system. The EC receiving electricity turns the FET OFF. Then the PWC turns the FET OFF. | 2014-08-21 |
20140237272 | POWER CONTROL FOR DATA PROCESSOR - A data processor includes a data processor core, and a power controller. The data processor core is adapted to control an external memory system and to perform a task by accessing the external memory system, where the task has an associated computation rate, and the data processor is adapted to control the external memory system by powering up the external memory system when needed. The power controller is coupled to the data processor core for controlling a power consumption of the data processor core and the external memory system by issuing control signals to change an activation time and an activation frequency of the data processor core and the memory system. | 2014-08-21 |
20140237273 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM - An information processing apparatus includes: a wakeup-target identifying section configured to identify a wakeup target in response to a wakeup trigger; and a wakeup processing section configured to wake up the wakeup target identified by the wakeup-target identifying section. | 2014-08-21 |
20140237274 | METHOD FOR CONTROLLING INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING APPARATUS - A method of controlling an apparatus including a processor including a plurality of cores, the method includes, when a number of the cores to be activated is M, determining whether or not a first power consumed by the M activated core is within a range of a second power to be consumed when the number of the cores to be activated is M+N, and when the first power is out of the range of the second power, prohibiting to increase the number of the cores to be activated from M to M+N. | 2014-08-21 |
20140237275 | Multiple Critical Paths Having Different Threshold Voltages in a Single Processor Core - A processor having a multi-Vt critical path is provided that includes both low-Vt devices and high-Vt devices. If the processor is operating in a high performance mode, the multi-Vt critical path is controlled so as to use the low-Vt devices. Conversely, if the processor is operating in a low power mode, the multi-Vt critical path is controlled so as to use the high-Vt devices. In this fashion, the complication of multiple processing cores is avoided in that a single processor core can operate in both the high performance mode and in the low power mode. | 2014-08-21 |
20140237276 | Method and Apparatus for Determining Tunable Parameters to Use in Power and Performance Management - Various method and apparatus embodiments for selecting tunable operating parameters in an integrated circuit (IC) are disclosed. In one embodiment, an IC includes a number of various functional blocks each having a local management circuit. The IC also includes a global management unit coupled to each of the functional blocks having a local management circuit. The management unit is configured to determine the operational state of the IC based on the respective operating states of each of the functional blocks. Responsive to determining the operational state of the IC, the management unit may provide indications of the same to the local management circuit of each of the functional blocks. The local management circuit for each of the functional blocks may select one or more tunable parameters based on the operational state determined by the management unit. | 2014-08-21 |
20140237277 | HYBRID PERFORMANCE SCALING OR SPEECH RECOGNITION - Aspects of the present disclosure describe methods and apparatuses for executing operations on a client device platform that is operating in a low-power state. A first analysis may be used to assign a first confidence score to a recorded non-tactile input. When the first confidence score is above a first threshold an intermediate-power state may be activated. A second more detailed analysis may then assign a second confidence score to the non-tactile input. When the second confidence score is above a second threshold, then the operation is initiated. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. | 2014-08-21 |
20140237278 | CONTROLLING POWER MANAGEMENT IN MICRO-SERVERS - Systems and methods of enabling power management in a micro server include providing multiple cores, a power management module coupled to the cores, and one or more peripherals coupled to the power management module. The power management module may be configured to cause the one or more peripherals to delay operations based on determining that the cores are in a first power consumption state, and place the cores in a second power consumption state for a predetermined time period. The second power consumption state may consume less power than the first power consumption state. The power management module may cause the one or more peripherals to resume their operations based on expiration of the predetermined time period and may place the cores in a third power consumption state based on the expiration of the time period. | 2014-08-21 |
20140237279 | PRIORITY BASED APPLICATION EVENT CONTROL (PAEC) TO REDUCE POWER CONSUMPTION - Methods and apparatus relating to Priority Based Application Event Control (PAEC) to reduce application events are described. In one embodiment, PAEC may determine which applications (and their corresponding sub-system(s)) may cause a processor or platform to exit a low power consumption state. In an embodiment, PAEC may determine which applications (and their corresponding sub-system(s)) may resume operations after a processor or platform exit a low power consumption state. Other embodiments are also claimed and disclosed. | 2014-08-21 |
20140237280 | POWER SUPPLY SYSTEM AND CONTROL METHOD - A power supply system includes a plurality of power supply circuits connected to a common output node and a control unit that controls outputs of the plurality of power supply circuits such that an output value at the output node follows an output target value at the output node. The control unit is configured to change the output of part of the plurality of power supply circuits when there is a deviation smaller than or equal to a predetermined value between the output value and the output target value. | 2014-08-21 |
20140237281 | DATA PROCESSING SYSTEM - A data processing apparatus is provided comprising first processing circuitry, second processing circuitry and shared processing circuitry. The first processing circuitry and second processing circuitry are configured to operate in different first and second power domains respectively and the shared processing circuitry is configured to operate in a shared power domain. The data processing apparatus forms a uni-processing environment for executing a single instruction stream in which either the first processing circuitry and the shared processing circuitry operate together to execute the instruction stream or the second processing circuitry and the shared processing circuitry operate together to execute the single instruction stream. Execution flow transfer circuitry is provided for transferring at least one bit of processing-state restoration information between the two hybrid processing units. | 2014-08-21 |
20140237282 | USB PERIPHERAL AND METHOD OF REDUCING TRANSMISSION POWER THEREOF - Disclosed are a USB peripheral apparatus capable of reducing transmission power of a transmission terminal circuit by significantly increasing resistance values of terminations provided at the transmission terminal circuit and a reception terminal circuit as compared with a specific impedance value of a transmission line, and a transmission power reduction method thereof. | 2014-08-21 |
20140237283 | ESTIMATING POWER USAGE IN A COMPUTING ENVIRONMENT - Power usage is estimated in a computing environment by automatically detecting hardware configuration information by use of a software agent that is translated into power consumption information for implementing a plurality of power estimation models for efficient power consumption and utilization. | 2014-08-21 |
20140237284 | MASKING POWER USAGE OF CO-PROCESSORS ON FIELD-PROGRAMMABLE GATE ARRAYS - Technologies are generally described for masking power usage of co-processors on field-programmable gate arrays. In some examples, one or more moat brick circuits may be implemented around a co-processor loaded on a held-programmable gate array (FPGA). The moat brick circuits may be configured to use negative feedback and/or noise to mask the power usage variations of the co-processor from other co-processors on the FPGA. | 2014-08-21 |
20140237285 | SINGLE-PIN COMMAND TECHNIQUE FOR MODE SELECTION AND INTERNAL DATA ACCESS - A single pin is used to control an operating mode of an integrated circuit and to supply serial data to a host controller. The internal operating mode can be changed by changing a static level on an input/output terminal and maintaining that static level longer than a first time threshold. A read transaction from the integrated circuit can be performed in response to a predetermined sequence on the input/output terminal that includes a pulse that lasts a first predetermined time, the first predetermined time being less than the first time threshold. | 2014-08-21 |
20140237286 | MEMORY SYSTEM PERFORMING ADDRESS MAPPING ACCORDING TO BAD PAGE MAP - A memory system comprises a nonvolatile memory comprising a memory block having multiple pages, and a controller configured to control the nonvolatile memory to store data in the memory block according to a command and logical address received from an external source. The controller is configured to determine whether the logical address is currently mapped to a bad page of the memory block by referring to a bad page map, and as a consequence of determining that the logical address corresponds to the bad page, remaps the logical address to a different page and stores dummy data in the bad page. | 2014-08-21 |
20140237287 | IMPLEMENTING RAID IN SOLID STATE MEMORY - The present disclosure includes systems and techniques relating to implementing fault tolerant data storage in solid state memory. In some implementations, a method includes receiving a data request for a solid state memory; identifying a logical block grouping corresponding to the data request, wherein the logical block grouping indicates physical data storage blocks spanning at least two distinct memory units of the solid state memory; reading stored data and parity information from at least a portion of the physical data storage blocks spanning the at least two distinct memory units; and recovering data of at least one block of the logical block grouping based on the stored data and the parity information. | 2014-08-21 |
20140237288 | INFORMATION PROCESSING APPARATUS, METHOD OF INFORMATION PROCESSING, AND RECORDING MEDIUM HAVING STORED THEREIN PROGRAM FOR INFORMATION PROCESSING - An information processing apparatus includes: processors each having a memories and a memory controller that controls the memories; a normality checker that checks whether the processors operate normally when started; a failure detector that finds any failed processor from a result of the check; a fallback unit that falls back a failed processor if any; a redundancy determiner that determines whether the memories are used in a redundancy configuration; a redundancy cancellation determiner that determines, when the memories are determined to be used in the redundant configuration, whether the redundancy configuration of the memories is to be cancelled; and a redundancy canceller that cancels, when the redundancy configuration of the memories is to be cancelled, the redundancy configuration of the memories in at least one processor operating normally. | 2014-08-21 |
20140237289 | HANDLING FAULTS IN A CONTINUOUS EVENT PROCESSING (CEP) SYSTEM - The concept of faults and fault handling are added to the execution of continuous event processing (CEP) queries. By introducing fault handling techniques to the processing of CEP queries, users are enabled to instruct a CEP query processor to respond to faults in a customized manner that does not necessarily involve the halting of the CEP query relative to which the faults occurred. For example, a fault might be due to a temporary problem. Under such circumstances, the CEP query processor can be instructed to ignore the fault and allow the execution of the CEP query to continue relative to the remainder of the event stream. Alternatively, if the fault is due to a problem with the CEP query itself, then the CEP query processor can be instructed to propagate the fault through the query processing system until the fault ultimately causes the problematic CEP query to be halted. | 2014-08-21 |
20140237290 | INFORMATION PROCESSING APPARATUS, METHOD FOR CONTROLLING INFORMATION PROCESSING APPARATUS, AND INFORMATION PROCESSING SYSTEM - According to an aspect of an embodiment, an information processing apparatus includes a save unit, a stopping unit and a reserve power supply unit. The save unit saves, in a device including an uninterruptible power supply device, first information including information stored in a memory allocated to a virtual machine operated by the information processing apparatus and information stored in a register allocated to the virtual machine at a time of a power outage. The stopping unit stops the virtual machine when the save of the first information is completed. The reserve power supply unit supplies power needed for the processing performed by the save unit and the stopping unit at the time of the power outage. | 2014-08-21 |
20140237291 | USING SHARED PINS IN A CONCURRENT TEST EXECUTION ENVIRONMENT - A method for using shared pins in a concurrent test execution environment is disclosed. The method relates to scheduling tests in concurrently executing test flows for automated test equipment (ATE) in a way so that resources can be shared between the test flows. The method comprises determining if any of a plurality of splits used by a first test contains at least one resource that is shared, wherein the first test and a second test are sequenced for execution in two separate concurrently executing test flows. The method further comprises determining if the first test should execute before the second test if the split is associated with resources required by both the second and first tests. Finally the method comprises reserving the split containing the at least one shared resource for access by the first test before beginning execution of the first test. | 2014-08-21 |
20140237292 | GUI IMPLEMENTATIONS ON CENTRAL CONTROLLER COMPUTER SYSTEM FOR SUPPORTING PROTOCOL INDEPENDENT DEVICE TESTING - A method for performing tests using automated test equipment (ATE) is presented. The method comprises obtaining a protocol selection for programming a programmable tester module using a graphical user interface (GUI). Further, the method comprises configuring the programmable tester module with a communication protocol for application to at least one device under test (DUT), wherein the at least one DUT is communicatively coupled to the programmable tester module. Also the method comprises providing a menu of tests associated with the communication protocol using the GUI and obtaining a program flow using the GUI, wherein the program flow comprises a sequence of tests chosen from the menu of tests. Finally, the method comprises transmitting instructions to the programmable tester module for executing the program flow. | 2014-08-21 |
20140237293 | APPLICATION MONITORING THROUGH CONTINUOUS RECORD AND REPLAY - A method, system, and computer-readable storage medium for application monitoring through continuous record and replay are described herein. The method includes continuously recording execution traces including external non-deterministic input data for an application at a user device and analyzing the recorded execution traces to identify relevant execution traces for determining a behavior of the application. The method also includes reporting the relevant execution traces to a server, wherein the server is configured to replay the relevant execution traces to determine whether the behavior of the application is as expected. | 2014-08-21 |
20140237294 | INFORMATION PROCESSING APPARATUS AND INSTALLATION METHOD - The installation of multiple applications by an installer is executed in a mode that does not display an error message in a display device. Upon an installation performed by the installer ending, the result of the installation performed by the installer is determined. As a result of the determination, an installer that failed at the installation is caused to re-execute the installation of the application whose installation failed in a mode that displays an error message in the display device. As a result of the re-execution, an error message is displayed in the display device by the installer that failed at the installation. | 2014-08-21 |
20140237295 | SYSTEM AND METHOD FOR AUTOMATING TESTING OF COMPUTERS - An application under test may be run in a test mode that receives a series of test scenarios and produces a set of test results under the control of a verification application. The verification application utilizes “typed-data” (i.e., data having known types that are associated with the data itself, e.g., XML-based data) such that a number of parameters can be set for each event and a number of result parameters can be checked for each result in at least one script. A series of scripts can be combined into an action file that may invoke scripts and override parameters within the invoked scripts. The events can be sent and received using a number of messaging protocols and communications adapters. | 2014-08-21 |
20140237296 | ARCHITECTURE FOR REMOTE ACCESS TO CONTENT STATE - Features are disclosed for facilitating remote access to the state of an application or content item currently executing or rendered on a user computing device. A connection between the user computing device and another computing device (or connections between the user computing device and an intermediary system, and between another computing device and the same intermediary system) may be established according to a bidirectional communication protocol. The user computing device may receive and act on communications from the other computing device, including requests for data regarding the current state of an application or content page on the user computing device, instructions to execute some function in the application or content page, etc. In addition, user computing devices may be grouped such that an application or content may be monitored/tested/debugged among a variety of user computing devices. | 2014-08-21 |
20140237297 | METHOD AND SYSTEM FOR SUPPORTING EVENT ROOT CAUSE ANALYSIS - A computer analyzes the root cause of an event, which has occurred in any of multiple management-target apparatuses, based on one or more rules in a storage device, that denote an association between one or more condition events corresponding to one or more events capable of occurring in any of the multiple management-target apparatuses and a conclusion event, which is the cause in a case where the one or more condition events have occurred. The computer, based on an event occurrence log including contents and an occurrence date and time of an event, determines a first event group, which is multiple events presumed to occur as a result of the same cause, creates a new rule in which the multiple events of the first event group are the condition events and one event of the first event group is the conclusion event, and stores the created new rule. | 2014-08-21 |
20140237298 | METHODS, SYSTEMS, AND COMPUTER READABLE MEDIA FOR EARLY DETECTION OF POTENTIAL FLASH FAILURES USING AN ADAPTIVE SYSTEM LEVEL ALGORITHM BASED ON FLASH PROGRAM VERIFY - Methods, systems, and computer readable media for early detection of potential flash failures using an adaptive system level algorithm based on NAND program verify are disclosed. According to one aspect, a method for early detection of potential flash failures using an adaptive system level algorithm based on NAND program verify includes performing a program verify operation after a write to a non-volatile memory, where the program verify mechanism reports a pass or fail based on an existing measurement threshold value, and dynamically adjusting the measurement threshold value used by subsequent program verify operations based on the results of previous program verify operations. | 2014-08-21 |
20140237299 | SECURE ERROR HANDLING - Various embodiments are described herein. Some embodiments include an Operating System and a platform. The platform includes a processor having an error register. The Operating System can write to the error register only via the platform in a secure manner (for example, using platform firmware). Other embodiments are described and claimed. | 2014-08-21 |
20140237300 | DATA PROCESSING APPARATUS AND TRACE UNIT - A data processing apparatus has processing circuitry for executing program instructions and trace circuitry for generating trace data indicating processing activities of the processing circuitry. The trace circuitry may detect a lockup state of the processing circuitry in which the processing circuitry does not make forward progress of execution of the program instructions. In response to detecting the lockup state, the trace circuitry may include in the trace data a lockup identifier indicating that the lockup state has occurred. | 2014-08-21 |
20140237301 | PRESET EVALUATION TO IMPROVE INPUT/OUTPUT PERFORMANCE IN HIGH-SPEED SERIAL INTERCONNECTS - Methods and apparatus for utilization of preset evaluation to improve input/output performance in high-speed serial interconnects are described. In some embodiments, performance of a link is evaluated at a plurality of equalization values and one of the plurality of equalization values is selected for the link based on comparison of a plurality of margin values that are to be determined for each of the plurality of equalization values. Other embodiments are also claimed and/or disclosed. | 2014-08-21 |
20140237302 | CHARACTERIZATION AND FUNCTIONAL TEST IN A PROCESSOR OR SYSTEM UTILIZING CRITICAL PATH MONITOR TO DYNAMICALLY MANAGE OPERATIONAL TIMING MARGIN - Guardband validation for a device having a critical path monitor involves first applying multiple calibration settings to the monitor during functional operation of the processor, and recording corresponding guardbands which result in reduced timing margin. A desired guardband can later be selected for validation. The calibration settings can be based on delays for a critical path. A calibration test procedure can be used to determine the calibration delays for different operating frequencies or voltages that are set or, alternatively, the calibration delays can be set and resultant frequencies measured which are used to calculate the guardband amounts. The critical path monitor may include a modified calibration delay circuit which provides a calibrated delay signal to a critical path synthesis circuit, and the multiple calibration settings can be applied by changing delay taps of the calibration delay circuit in response to a bias delay signal from a power management controller. | 2014-08-21 |
20140237303 | APPARATUS AND METHOD FOR VECTORIZATION WITH SPECULATION SUPPORT - An apparatus and method are described for detecting and responding to fault conditions in a processor. For example, one embodiment of a method comprises: reading each active element in succession from a first vector register, each active element specifying an address for a gather or load operation; detecting one or more fault conditions associated with one or more of the active elements; for each active element read in succession prior to a detected fault condition on an element other than the first active element, storing the data loaded from an address associated with the active element in a first output vector register; and for each active element associated with the detected fault condition and following the detected fault condition, setting a bit in an output mask register to indicate the detected fault condition. | 2014-08-21 |
20140237304 | METHOD FOR COLLECTING ERROR STATUS INFORMATION OF AN ELECTRONIC DEVICE - A method for collecting error status information of a mobile device is disclosed. The method comprises activating an status report program; capturing a screenshot of the electronic device; receiving input text from an user interface of the status report program; and transmitting the screenshot and the input text to a server provider by the status report program. | 2014-08-21 |
20140237305 | APPARATUSES AND METHODS FOR COMPRESSING DATA RECEIVED OVER MULTIPLE MEMORY ACCESSES - Apparatuses and methods for compressing data responsive to a plurality of memory accesses is described. An example compression circuit includes a comparator configured to compare data provided by a group of memory cells associated with a repair address. Each subset of one or more bits of the data is sequentially provided by the group of memory cells responsive to a respective memory access of a plurality of memory accesses. The example compression circuit further including an error bit latch coupled to the comparison circuit. The error bit latch configured to, responsive to an output received from the comparison circuit indicating an error, compress the data to an error bit by setting the error bit to an error detected state and latching the error bit having the error detected state. | 2014-08-21 |
20140237306 | MANAGEMENT DEVICE, MANAGEMENT METHOD, AND MEDIUM - A management device comprises a failure detection unit | 2014-08-21 |
20140237307 | GENERIC ADDRESS SCRAMBLER FOR MEMORY CIRCUIT TEST ENGINE - A generic address scrambler for a memory circuit test engine. An embodiment of a memory device includes a memory stack having one or more of coupled memory elements, a built-in self-test circuit including a generic programmable address scrambler for the mapping of logical addresses to physical addresses for the memory elements, and one or more registers to hold pro-gramming values for the generic programmable address scrambler. | 2014-08-21 |
20140237308 | TEST CONTROL USING EXISTING IC CHIP PINS - An apparatus and method are provided for testing normal circuitry in an integrated circuit, the method including writing test protocols into a plurality of test registers using an enable pin and a switch pin in a first mode, storing a logic high signal in one of the plurality of test registers once the writing is completed, switching from the first mode to a second mode if the one of the plurality of test registers stores the logic high signal, and testing the normal circuitry using the enable pin and the switch pin in the second mode. | 2014-08-21 |
20140237309 | INTERCONNECTIONS FOR PLURAL AND HIERARCHICAL P1500 TEST WRAPPERS - A test architecture accesses IP core test wrappers within an IC using a Link Instruction Register (LIR). An IEEE P1500 standard is in development for providing test access to these individual cores via a test structure called a wrapper. The wrapper resides at the boundary of the core and provides a way to test the core and the interconnections between cores.—The test architecture enables each of the plural wrappers in the IC, including wrappers in cores embedded within other cores, with separate enable signals. | 2014-08-21 |
20140237310 | Test Architecture for Characterizing Interconnects in Stacked Designs - Aspects of the invention relate to ring-oscillator-based test architecture for characterizing interconnects in stacked designs. The disclosed ring-oscillator-based test architecture comprises a plurality of boundary scan cells coupled to a plurality of interconnects. Each of the plurality of boundary scan cells can be configured to operate as, based on control signals, a conventional boundary scan cell or any bit of an asynchronous counter. The control signals are supplied by control circuitry. | 2014-08-21 |
20140237311 | SYSTEM AND METHOD FOR SHARING A COMMUNICATIONS LINK BETWEEN MULTIPLE COMMUNICATIONS PROTOCOLS - A system and method for sharing a communications link between multiple protocols is described. A system includes a communications interface configured to exchange information with other systems using at least one of a plurality of protocols; a protocol select register that stores a value that selects a protocol from among the plurality of protocols to become an active protocol; and a state machine accessible to the communications interface, the state machine used to control the exchange of information through the communications interface according to the active protocol. The active protocol is used by the communications interface to exchange information while the remaining protocols of the plurality of protocols remain inactive. The state machine sequences through a series of states that cause the communications interface to operate according to the active protocol, and that are designated as inert sequences under the remaining protocols. | 2014-08-21 |
20140237312 | Scan Warmup Scheme for Mitigating DI/DT During Scan Test - We report methods relating to scan warmup of integrated circuit devices. One such method may comprise loading a scan test stimulus to and unloading a scan test response from a first set of logic elements of an integrated circuit device at a scan clock first frequency equal to a test clock frequency; adjusting the scan clock from the first frequency to a second frequency by a scan warmup unit, wherein the scan clock second frequency is equal to a system clock frequency; and capturing the scan test response by a shift logic at the scan clock second frequency. We also report processors containing components configured to implement the method, and fabrication of such processors. The methods and their implementation may reduce di/dt events otherwise commonly occurring when testing logic elements of integrated circuit devices. | 2014-08-21 |
20140237313 | Systems and Methods for Trapping Set Disruption - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for performing data decoding including utilization of different scaling values on a portion by portion basis during the data decoding. | 2014-08-21 |
20140237314 | Systems and Methods for Skip Layer Data Decoding - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for performing data decoding including skipping one or more codeword blocks in the data decoding process. | 2014-08-21 |
20140237315 | METHOD AND SYSTEM FOR IMPROVING DATA INTEGRITY IN NON-VOLATILE STORAGE - A method for improving data integrity in a non-volatile memory system includes: accessing a non-volatile memory cell for retrieving hard data bits; generating soft information by capturing a reliability of the hard data bits; calculating syndrome bits by applying a lossy compression to the soft information; and generating a host data by executing a low density parity check (LDPC) iterative decode on the hard data bits and the syndrome bits. | 2014-08-21 |
20140237316 | ENCODING WITH INTEGRATED ERROR-DETECTION - A method of encoding a data set including one or more n-bit pre-coded symbols in an encoder of a computing system includes determining a plurality of n+2-bit code words, each of the plurality of n+2-bit code words having two or greater Hamming distance from one another. The method further includes mapping each of the plurality of n+2-bit code words to a corresponding source symbol, receiving the one or more n-bit pre-coded symbols at the encoder, matching each n-bit pre-coded symbol to a corresponding n+2-bit code word based on the mapping to produce encoded data. and outputting the encoded data. | 2014-08-21 |
20140237317 | DIGITAL BROADCASTING SYSTEM AND METHOD OF PROCESSING DATA - A digital receiving system, and a method of processing data are disclosed. The digital receiving system includes a receiving unit, a known sequence detector, and a channel equalizer. The receiving unit receives a broadcast signal including mobile service data and main service data. The known sequence detector detects known data linearly inserted in a data group. The channel equalizer performs channel-equalizing on the received mobile service data using the detected known data. | 2014-08-21 |
20140237318 | BANDWIDTH OPTIMIZATION IN A NON-VOLATILE MEMORY SYSTEM - A method of bandwidth optimization in a non-volatile memory system includes: retrieving hard data bits; generating soft information from the hard data bits; applying a lossless compression to the soft information for calculating syndrome bits; and executing a low density parity check (LDPC) iterative decode on the hard data bits and the syndrome bits. | 2014-08-21 |
20140237319 | NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A nonvolatile memory device includes a nonvolatile memory, a buffer memory configured to store a plurality of read data transmitted from the nonvolatile memory, an error detection and correction circuit configured to detect an error in partial data of each of the plurality of read data and judging whether the partial data is correctable or not on the basis of the detected error, and a controller configured to analyze the uncorrectable partial data with respect to the plurality of read data to determine a representative value, and to transmit the representative value to the error detection and correction circuit. The plurality of read data is read through a read operation with respect to a same page. | 2014-08-21 |
20140237320 | MEMORY SYSTEM - A memory system includes a controlling unit that configured to control data transfer between the first and the second memory. The controlling unit executes copy processing for, after reading out data stored in a first page of the second memory to the first memory, writing the data in a second page of the second memory, determines, when executing the copy processing, whether the error correction processing for the data read out from the first page is successful, stores, when the error correction processing is successful, corrected data in the first memory and writes the corrected data in the second page, and reads out, when the error correction processing is unsuccessful, the data from the first page to the first memory and writes the data not subjected to the error correction processing in the second page. | 2014-08-21 |
20140237321 | SOLID STATE DRIVE CACHE RECOVERY IN A CLUSTERED STORAGE SYSTEM - A storage system that includes multiple nodes, each node comprises a SSD cache and a management module and hard disk drives that are coupled to the nodes. The management module of each node is arranged to manage a SSD cache map that comprises multiple entries for storing mappings from logical addresses to SSD cache physical addresses and to physical addresses in the hard disk drives. The mappings are related to data units stored in the SSD cache. Upon a rejoin of a certain node following a shut-down or a failure of the certain node, the certain node is arranged to: obtain from at least one other node, current mappings between logical addresses and physical addresses in the hard disk drives, and perform a validation process of the data units stored in the SSD cache in response to relationships between the current mappings and the entries of the SSD cache map. | 2014-08-21 |
20140237322 | STORAGE AT M BITS/CELL DENSITY IN N BITS/CELL ANALOG MEMORY CELL DEVICES, M>N - A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set. | 2014-08-21 |
20140237323 | Data Transmitter, Data Receiver, and Frame Synchronization Method - Embodiments of the present invention provide a data transmitter, a data receiver, and a frame synchronization method. The data transmitter includes a coding module and a processing module. The coding module is configured to perform forward error correction FEC coding on sent data to obtain an FEC code word, and to output the FEC code word and an indication signal for indicating a boundary position of the FEC code word to the processing module. The processing module is configured to insert a training sequence into the FEC code word according to the indication signal, so that a data receiver determines the boundary position of the FEC code word according to the training sequence. | 2014-08-21 |
20140237324 | CHANNEL CODING METHOD OF VARIABLE LENGTH INFORMATION USING BLOCK CODE - A method for channel-coding information bits using a code generation matrix including 32 rows and A columns corresponding to length of the information bits includes, channel-coding the information bits having “A” length using basis sequences having 32-bit length corresponding to columns of the code generation matrix, and outputting the channel-coded result as an output sequence. If “A” is higher than 10, the code generation matrix is generated when (A-10) additional basis sequences were added as column-directional sequences to a first or second matrix. The first matrix is a TFCI code generation matrix composed of 32 rows and 10 columns used for TFCI coding. The second matrix is made when at least one of an inter-row location or an inter-column location of the first matrix was changed. The additional basis sequences satisfy a value 10 of a minimum Hamming distance. | 2014-08-21 |