33rd week of 2016 patent applcation highlights part 55 |
Patent application number | Title | Published |
20160240404 | Method and Apparatus for Planarizing Material Layers | 2016-08-18 |
20160240405 | STAND ALONE ANNEAL SYSTEM FOR SEMICONDUCTOR WAFERS | 2016-08-18 |
20160240406 | SUBSTRATE PROCESSING DEVICE AND SUBSTRATE PROCESSING METHOD | 2016-08-18 |
20160240407 | Laser annealing systems and methods with ultra-short dwell times | 2016-08-18 |
20160240408 | Apparatus and Methods for Annealing Wafers | 2016-08-18 |
20160240409 | SYSTEMS AND METHODS FOR MICROWAVE-RADIATION ANNEALING | 2016-08-18 |
20160240410 | SUBSTRATE LIFT ASSEMBLIES | 2016-08-18 |
20160240411 | MULTI-PROCESSING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | 2016-08-18 |
20160240412 | Substrate Detection Apparatus, Substrate Detection Method and Substrate Processing System | 2016-08-18 |
20160240413 | SUBSTRATE PROCESSING APPARATUS | 2016-08-18 |
20160240414 | Chuck for Suction and Holding a Wafer | 2016-08-18 |
20160240415 | WAFER PROCESSING SYSTEM | 2016-08-18 |
20160240416 | DEVICE AND METHOD FOR CONVEYING AND FLIPPING A COMPONENT | 2016-08-18 |
20160240417 | Ceiling Transport Vehicle | 2016-08-18 |
20160240418 | SUBSTRATE HANDLING SYSTEM FOR ALIGNING AND ORIENTING SUBSTRATES DURING A TRANSFER OPERATION | 2016-08-18 |
20160240419 | ATOMIC-LAYER DEPOSITION SUBSTRATE | 2016-08-18 |
20160240420 | DEVICE AND METHOD FOR ALIGNING SUBSTRATES | 2016-08-18 |
20160240421 | Barrier Seal for Electrostatic Chuck | 2016-08-18 |
20160240422 | ELECTROSTATIC CHUCK DEVICE | 2016-08-18 |
20160240423 | EXPOSURE METHOD, MANUFACTURING METHOD OF DEVICE, AND THIN FILM SHEET | 2016-08-18 |
20160240424 | CHUCK TABLE OF PROCESSING APPARATUS | 2016-08-18 |
20160240425 | SUBSTRATE HOLDING MECHANISM AND SUBSTRATE PROCESSING APPARATUS USING THE SAME | 2016-08-18 |
20160240426 | SUBSTRATE SUPPORT WITH IMPROVED RF RETURN | 2016-08-18 |
20160240427 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | 2016-08-18 |
20160240428 | Method of Forming an Interconnect Structure Having an Air Gap and Structure Thereof | 2016-08-18 |
20160240429 | Dielectric Structures with Negative Taper and Methods of Formation Thereof | 2016-08-18 |
20160240430 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE | 2016-08-18 |
20160240431 | MAGNETIC SIDEWALLS FOR WRITE LINES IN FIELD-INDUCED MRAM AND METHODS OF MANUFACTURING THEM | 2016-08-18 |
20160240432 | METHODS FOR FORMING COBALT-COPPER SELECTIVE FILL FOR AN INTERCONNECT | 2016-08-18 |
20160240433 | RUTHENIUM FILM FORMING METHOD, FILM FORMING APPARATUS, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD | 2016-08-18 |
20160240434 | Method for Via Plating with Seed Layer | 2016-08-18 |
20160240435 | MICROELECTRONIC INTERCONNECT ADAPTOR | 2016-08-18 |
20160240436 | METAL WIRING LAYER FORMING METHOD, METAL WIRING LAYER FORMING APPARATUS, AND RECORDING MEDIUM | 2016-08-18 |
20160240437 | REDUCED HEIGHT M1 METAL LINES FOR LOCAL ON-CHIP ROUTING | 2016-08-18 |
20160240438 | MODIFIED TUNGSTEN SILICON | 2016-08-18 |
20160240439 | Semiconductor Device and Method | 2016-08-18 |
20160240440 | SYSTEMS AND PROCESSES FOR FORMING THREE-DIMENSIONAL INTEGRATED CIRCUITS | 2016-08-18 |
20160240441 | METHOD OF FABRICATING INTEGRATED CIRCUIT DEVICES | 2016-08-18 |
20160240442 | Semiconductor Device and Method of Forming the Same | 2016-08-18 |
20160240443 | Semiconductor Manufacturing Method and Tool | 2016-08-18 |
20160240444 | Method of Semiconductor Fabrication with Height Control Through Active Region Profile | 2016-08-18 |
20160240445 | Method for Positioning a Carrier with Electronic Components and Electronic Component Produced with Such Method | 2016-08-18 |
20160240446 | SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2016-08-18 |
20160240447 | DRIVER INTEGRATED CIRCUIT CHIP AND DISPLAY DEVICE HAVING THE SAME | 2016-08-18 |
20160240448 | RF Package | 2016-08-18 |
20160240449 | Method for Electrophoretically Depositing a Film on an Electronic Assembly | 2016-08-18 |
20160240450 | SEMICONDUCTOR DEVICE | 2016-08-18 |
20160240451 | INTERCONNECT STRUCTURE FOR SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE INTERCONNECT STRUCTURE | 2016-08-18 |
20160240452 | SEMICONDUCTOR PACKAGES WITH SUB-TERMINALS AND RELATED METHODS | 2016-08-18 |
20160240453 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2016-08-18 |
20160240454 | Semiconductor Structure Having Thermal Backside Core | 2016-08-18 |
20160240455 | SYSTEMS, APPARATUS, AND METHODS FOR HEAT DISSIPATION | 2016-08-18 |
20160240456 | SEMICONDUCTOR DEVICE | 2016-08-18 |
20160240457 | INTEGRATED CIRCUIT PACKAGES WITH DUAL-SIDED STACKING STRUCTURE | 2016-08-18 |
20160240458 | PACKAGE | 2016-08-18 |
20160240459 | PAD CONFIGURATIONS FOR AN ELECTRONIC PACKAGE ASSEMBLY | 2016-08-18 |
20160240460 | SINGULATION METHOD FOR SEMICONDUCTOR PACKAGE WITH PLATING ON SIDE OF CONNECTORS | 2016-08-18 |
20160240461 | Semiconductor Package with Multi-Section Conductive Carrier | 2016-08-18 |
20160240462 | SEMICONDUCTOR SUBSTRATE STRUCTURE, SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME | 2016-08-18 |
20160240463 | SUBSTRATE COMPRISING STACKS OF INTERCONNECTS, INTERCONNECT ON SOLDER RESIST LAYER AND INTERCONNECT ON SIDE PORTION OF SUBSTRATE | 2016-08-18 |
20160240464 | HYBRID CIRCUIT BOARD AND METHOD FOR MAKING THE SAME, AND SEMICONDUCTOR PACKAGE STRUCTURE | 2016-08-18 |
20160240465 | Reducing Cracking by Adjusting Opening Size in Pop Packages | 2016-08-18 |
20160240466 | ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF | 2016-08-18 |
20160240467 | WIRING BOARD AND SEMICONDUCTOR PACKAGE | 2016-08-18 |
20160240468 | ANISOTROPIC CONDUCTIVE FILM | 2016-08-18 |
20160240469 | SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF MAKING THE SAME | 2016-08-18 |
20160240470 | SEMICONDUCTOR MODULES AND METHODS OF FORMING THE SAME | 2016-08-18 |
20160240471 | EMBEDDED PACKAGING FOR DEVICES AND SYSTEMS COMPRISING LATERAL GaN POWER TRANSISTORS | 2016-08-18 |
20160240472 | SEMICONDUCTOR DEVICE, LAYOUT DESIGN AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE | 2016-08-18 |
20160240473 | WAFER WITH IMPROVED PLATING CURRENT DISTRIBUTION | 2016-08-18 |
20160240474 | METHOD, SYSTEM AND COMPUTER READABLE MEDIUM USING STITCHING FOR MASK ASSIGNMENT OF PATTERNS | 2016-08-18 |
20160240475 | SEMICONDUCTOR DEVICES INCLUDING SEALING REGIONS AND DECOUPLING CAPACITOR REGIONS | 2016-08-18 |
20160240476 | SELF-ALIGNED INTEGRATED LINE AND VIA STRUCTURE FOR A THREE-DIMENSIONAL SEMICONDUCTOR DEVICE | 2016-08-18 |
20160240477 | SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF | 2016-08-18 |
20160240478 | MODIFIED TUNGSTEN SILICON | 2016-08-18 |
20160240479 | SYSTEM AND METHOD FOR IDENTIFYING OPERATING TEMPERATURES AND MODIFYING OF INTEGRATED CIRCUITS | 2016-08-18 |
20160240480 | METAL OXIDE LAYERED STRUCTURE AND METHODS OF FORMING THE SAME | 2016-08-18 |
20160240481 | INTERPOSER SUBSTRATE, SEMICONDUCTOR STRUCTURE AND FABRICATING PROCESS THEREOF | 2016-08-18 |
20160240482 | LAYER STRUCTURE INCLUDING DIFFUSION BARRIER LAYER AND METHOD OF MANUFACTURING THE SAME | 2016-08-18 |
20160240483 | INTERCONNECT STRUCTURES AND METHODS OF FORMATION | 2016-08-18 |
20160240484 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SAME | 2016-08-18 |
20160240485 | MIDDLE-OF-LINE INTEGRATION METHODS AND SEMICONDUCTOR DEVICES | 2016-08-18 |
20160240486 | CHIP PACKAGE STRUCTURE HAVING A SHIELDED MOLDING COMPOUND | 2016-08-18 |
20160240487 | SEMICONDUCTOR DEVICE | 2016-08-18 |
20160240488 | SEMICONDUCTOR DEVICE WITH AN ISOLATION STRUCTURE COUPLED TO A COVER OF THE SEMICONDUCTOR DEVICE | 2016-08-18 |
20160240489 | NOISE CANCELLATION FOR A MAGNETICALLY COUPLED COMMUNICATION LINK UTILIZING A LEAD FRAME | 2016-08-18 |
20160240490 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICES HAVING REINFORCING ELEMENTS | 2016-08-18 |
20160240491 | RF PACKAGE WITH NON-GASEOUS DIELECTRIC MATERIAL | 2016-08-18 |
20160240492 | ANTENNA ON CERAMICS FOR A PACKAGED DIE | 2016-08-18 |
20160240493 | SEMICONDUCTOR DEVICE PACKAGES AND METHOD OF MAKING THE SAME | 2016-08-18 |
20160240494 | RF PACKAGE AND MANUFACTURING METHOD THEREOF | 2016-08-18 |
20160240495 | INTEGRATED ANTENNAS IN WAFER LEVEL PACKAGE | 2016-08-18 |
20160240496 | DEVICES AND METHODS RELATED TO ELECTROSTATIC DISCHARGE PROTECTION BENIGN TO RADIO-FREQUENCY OPERATION | 2016-08-18 |
20160240497 | WAFER-LEVEL PACKAGE HAVING MULTIPLE DIES ARRANGED IN SIDE-BY-SIDE FASHION AND ASSOCIATED YIELD IMPROVEMENT METHOD | 2016-08-18 |
20160240498 | PACKAGING PROCESS OF ELECTRONIC COMPONENT | 2016-08-18 |
20160240499 | Semiconductor Device and Method of Manufacturing the Same | 2016-08-18 |
20160240500 | PACKAGED SEMICONDUCTOR DEVICES | 2016-08-18 |
20160240501 | REDUCED VOLUME INTERCONNECT FOR THREE-DIMENSIONAL CHIP STACK | 2016-08-18 |
20160240502 | INTEGRATED CIRCUIT PACKAGING SUBSTRATE, SEMICONDUCTOR PACKAGE, AND MANUFACTURING METHOD | 2016-08-18 |
20160240503 | BONDING STRUCTURE FOR SEMICONDUCTOR PACKAGE AND METHODOF MANUFACTURING THE SAME | 2016-08-18 |