32nd week of 2010 patent applcation highlights part 29 |
Patent application number | Title | Published |
20100202203 | Data restoration method for a non-volatile memory - A method and apparatus for selectively restoring data in a non-volatile memory array based on failure type. Weakened data and erroneous data are identified by performing two readings of a specific memory section. Alternatively, an error correction code is used after a first reading of data to identify erroneous data. The manner in which data is restored will depend on whether the data changed because of an erase failure or a program failure. If only a program failure occurred then the data will be reprogrammed without an intervening erase step. If the data experienced an erase failure, then the data will be erased prior to being programmed with correct data. | 2010-08-12 |
20100202204 | PAGE-BUFFER AND NON-VOLATILE SEMICONDUCTOR MEMORY INCLUDING PAGE BUFFER - In one aspect, a non-volatile memory device is provided which is operable in a programming mode and a read mode. The memory device includes a memory cell array which includes a plurality of non-volatile memory cells, a plurality of word lines, and a plurality of bit lines. The memory device further includes an internal data output line for outputting data read from the bit lines of the memory array, and a page buffer operatively connected between a bit line of the memory cell array and the internal data output line. The page buffer includes a sense node which is selectively connected to the bit line, a latch circuit having a latch node which is selectively connected to the sense node, a latch input path which sets a logic voltage of the latch node in the programming mode and the read mode, and a latch output path which is separate from the latch input path and which sets as logic voltage of the internal date output line according to the logic voltage of the latch node. | 2010-08-12 |
20100202205 | SEMICONDUCTOR DEVICE - The degree of integration and the number of rewriting of a semiconductor device having a nonvolatile memory element are improved. A first MONOS nonvolatile-memory-element and a second MONOS nonvolatile-memory-element having a large gate width compared with the first MONOS nonvolatile-memory-element are mounted together on the same substrate, and the first MONOS nonvolatile-memory-element is used for storing program data which is scarcely rewritten, and the second MONOS nonvolatile-memory-element is used for storing processed data which is frequently rewritten. | 2010-08-12 |
20100202206 | NON-VOLATILE MEMORY DEVICES INCLUDING VERTICAL NAND CHANNELS AND METHODS OF FORMING THE SAME - A non-volatile memory device can include a plurality of immediately adjacent offset vertical NAND channels that are electrically coupled to a single upper select gate line or to a single lower select gate line of the non-volatile memory device. | 2010-08-12 |
20100202207 | ALL-BIT-LINE ERASE VERIFY AND SOFT PROGRAM VERIFY - Techniques are disclosed herein for verifying that memory cells comply with a target threshold voltage that is negative. The technique can be used for an erase verify or a soft program verify. One or more erase pulses are applied to a group of non-volatile storage elements that are associated with bit lines and word lines. One or more non-negative compare voltages (e.g., zero volts) are applied to at least a portion of the word lines after applying the erase pulses. Conditions on the bit lines are sensed while holding differences between voltages on the bit lines substantially constant and while applying the one or more compare voltages. A determination is made whether the group is sufficiently erased based on the conditions. At least one additional erase pulse is applied to the group of non-volatile storage elements if the group of non-volatile storage elements are not sufficiently erased. | 2010-08-12 |
20100202208 | SEMICONDUCTOR DEVICE INCLUDING CONTACT PLUG HAVING AN ELLIPTICAL SECTIONAL SHAPE - A semiconductor device includes a first MOS transistor, second MOS transistors, first contact plugs, and a second contact plug. The first MOS transistor with a first conductivity is formed on a semiconductor substrate. The second MOS transistors with a second conductivity are formed on the semiconductor substrate. The first contact plugs has a circular planar shape. The second contact plug has an elliptical planar shape and is formed on a source or a drain in one of the second MOS transistors. The first contact plugs are formed on sources or drains in the remaining second MOS transistors and the first MOS transistor. | 2010-08-12 |
20100202209 | FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF - A flash memory device includes a memory cell array on which data is stored, and page buffers that are connected to the memory cells through the bit lines and apply one of the first voltage, second voltage or third voltage between the first and second voltage, to the respective bit line when performing the program. | 2010-08-12 |
20100202210 | REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE - A selected word line that is coupled to cells for programming is biased with an initial programming voltage. The unselected word lines that are adjacent to the selected word line are biased at an initial V | 2010-08-12 |
20100202211 | NONVOLATILE MEMORY DEVICE AND METHOD FOR PROGRAMMING THE SAME - Provided are a nonvolatile memory device and a method for programming the same. The method for programming the nonvolatile memory device includes programming at least one memory cell of the nonvolatile memory device by repeating program loops. A first self-boosting method is applied to at least one of the program loops and a second self-boosting method, different from the first self-boosting method, is applied to at least one other of the program loops. | 2010-08-12 |
20100202212 | Non-Volatile Memory With Power-Saving Multi-Pass Sensing - A non-volatile memory device capable of reading and writing a large number of memory cells with multiple read/write circuits in parallel has features to reduce power consumption during sensing, which is included in read, and program/verify operations. A sensing verify operation includes one or more sensing cycles relative to one or more demarcation threshold voltages to determine a memory state. In one aspect, coupling of the memory cells to their bit lines are delayed during a precharge operation in order to reduced the cells' currents working against the precharge. In another aspect, a power-consuming precharge period is minimized by preemptively starting the sensing in a multi-pass sensing operation. High current cells not detected as a result of the premature sensing will be detected in a subsequent pass. | 2010-08-12 |
20100202213 | Current-Mode Sense Amplifying Method - A sense amplifying method, applied in a memory having a memory cell and a reference cell, includes: charging the memory cell and the reference cell to have a cell current and a reference current, respectively; duplicating the cell current and the reference current to respectively generate a mirrored cell current via a first current path and a mirrored reference current via a second current path and equalizing a first voltage drop generated as the mirrored cell current flows by the first current path and a second voltage drop generated as the mirrored reference current flows by the second current path; and removing the equalization of the first voltage drop and the second voltage drop and adjusting first voltage drop and the second voltage drop according to a first current flowing by the first current path and a second current flowing by the second current path. | 2010-08-12 |
20100202214 | VERIFYING AN ERASE THRESHOLD IN A MEMORY DEVICE - In one or more embodiments, a memory device is disclosed as having an erase verify operation that includes a negative bias on the p-well in which the memory cell or cells being erased are formed. After an erase pulse is applied to the selected cells to be erased, the p-well is biased with the negative voltage and the erase verify operation is performed to determine the erased state of the cell(s). | 2010-08-12 |
20100202215 | Methods for Programming Nonvolatile Memory Devices - Provided is a method for programming a nonvolatile memory device. The nonvolatile memory device includes a local word line to divide a memory cell string into a first area including a selected word line and a second area not including the selected word line. In the method, word lines of the first area are driven by a first pass voltage and word lines of the second area driven by a second pass voltage higher than the first pass voltage. A cell transistor corresponding to the local word line is turned off after the first pass voltage and the second pass voltage are applied. The selected word line is driven by a program voltage after the cell transistor is turned off. | 2010-08-12 |
20100202216 | NON-VOLATILE MEMORY DEVICE AND SYSTEM HAVING REDUCED BIT LINE BIAS TIME - A non-volatile memory device and system are provided. The non-volatile memory device including; a memory cell array of memory blocks, and a bit line bias block connected to the bit lines and configured to precharge the bit lines, a page buffer precharging the plurality of bit lines and sensing data stored in the memory block via the bit lines, and a controller controlling the bit line bias block to simultaneously precharge the bit lines with the page buffer, thereby reducing the bit line bias time. | 2010-08-12 |
20100202217 | NAND FLASH MEMORY PROGRAMMING - A method of charging a floating gate in a nonvolatile memory cell comprises bringing a substrate channel within the memory cell to a first voltage, bringing a control gate to a programming voltage, and floating the substrate channel voltage while the control gate is at the programming voltage. Memory devices include state machines or controllers operable to perform the described method, and operation of such a state machine, memory device, and information handling system are described. | 2010-08-12 |
20100202218 | System and Method for Level Shifter - In one embodiment, a bit-line interface is disclosed. The bit-line interface has a multiplexer having a plurality of bit-line outputs, and a write path coupled to a multiplexer signal input. The bit-line interface also has a read path coupled to the multiplexer signal input, wherein the read path and the write path share at least one component. | 2010-08-12 |
20100202219 | BURN-IN METHODS FOR STATIC RANDOM ACCESS MEMORIES AND CHIPS - A burn-in method for SRAMs and chips. For a memory cell of the SRAM, the SRAM burn-in method controls the control signals of the memory cell to generate current paths to pass through the memory cell, the corresponding bit-line and the corresponding bit-line-bar. The contacts/vias in the current paths are tested by providing burn-in currents to flow through the current paths, so that mismatched contacts/vias are burned by the burn-in currents. SRAMs that fail the burn-in test are abandoned after the burn-in procedure. | 2010-08-12 |
20100202220 | MEMORY CIRCUITS, SYSTEMS, AND METHODS FOR PROVIDING BIT LINE EQUALIZATION VOLTAGES - A memory circuit includes at least one memory cell for storing a charge representative of a datum. The memory cell is coupled with a word line and a first bit line. At least one bit line equalization transistor is coupled between the first bit line and a second bit line. A bit line equalization circuit is coupled with the bit line equalization transistor. The bit line equalization circuit is configured for providing a pulse to the bit line equalization transistor to substantially equalize voltages of the first bit line and the second bit line during a standby period before an access cycle of the memory cell. | 2010-08-12 |
20100202221 | METHOD OF READING MEMORY CELL - A method for reading a memory cell ( | 2010-08-12 |
20100202222 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes first and second sub-memory-cell areas configured to form a memory cell matrix and include a first bit line and a second bit line respectively to form a data transfer path corresponding to a predetermined memory cell, an additional bit line configured to cross the first sub-memory-cell area and form a data transfer path by being connected with the second bit line and a sensing and amplifying unit configured to sense and amplify data inputted through the additional bit line and the first bit line. | 2010-08-12 |
20100202223 | MEMORY INTERFACE AND OPERATION METHOD OF IT - A memory interface includes a first delaying circuit configured to delay write data to be supplied to an input buffer; a second delaying circuit configured to delay read data read out from an output buffer; a data write circuit configured to supply said write data to a memory through said first delaying circuit; and a data read circuit configured to read said write data written in said memory, as said read data through said second delaying circuit. A control circuit is configured to detect positions of a start edge and end edge of an eye opening which is formed based on fluctuation of said write data or said read data, to specify an intermediate position of the start edge and the end edge, and to determine a phase of a data strobe signal based on a difference between the intermediate position and one of the start edge and the end edge. | 2010-08-12 |
20100202224 | MEMORY WITH DATA CONTROL - In an embodiment, a memory device comprises memory, a first data link, a first input, a second input, a second data link, a first output and a second output. The first data link is configured to input one or more packets into the memory device. The first input is configured to input command strobe signals into the memory device that delineate command packets that are input into the memory device via the first data link. The second input is configured to input data strobe signals into the memory device that delineate data packets that are input into the memory device via the first data link. The first and second outputs are configured to output the command strobe signal and data strobe signal, respectively. The second data link is configured to output packets from the memory device. | 2010-08-12 |
20100202225 | Data input circuit technical field - A data input circuit comprises a sensing control unit which delays an internal write command by a predetermined period and generates a sense amplifier enable signal in response to a first clock signal, and a data sensing unit which senses align data and transfers the sensed data to a global line in response to the sense amplifier enable signal, wherein the sense amplifier enable signal is enabled at a time point when the align data is inputted in the data sensing unit. | 2010-08-12 |
20100202226 | Bank precharge signal generation circuit - A bank precharge signal generation circuit includes a precharge signal generation unit for generating a second precharge signal including a pulse, which is generated in a period delayed by a predetermined period as compared to a pulse of a first precharge signal, in response to an all-bank precharge signal, and a bank precharge signal generation unit for receiving the first and second precharge signals and generate first and second bank precharge signals for precharging first and second banks. | 2010-08-12 |
20100202227 | REFERENCE VOLTAGE AND IMPEDANCE CALIBRATION IN A MULTI-MODE INTERFACE - A memory controller includes a transmit circuit coupled to an output node and a receive circuit coupled to an input node. The transmit circuit transmits first data to a memory device through the output node and the receive circuit is configured to receive second data from the memory device through the input node. The memory controller includes a calibration circuit and control logic coupled to the calibration circuit, where the calibration circuit and the control logic are configured to select a first reference voltage and a driver impedance for the transmit circuit and are configured to select a second reference voltage and a termination impedance for the receive circuit. The first reference voltage, the second reference voltage, the driver impedance and the termination impedance are selected from a set of pre-determined values, which are associated with different signaling modes for communication of the first data and the second data. | 2010-08-12 |
20100202228 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE, NONVOLATILE SEMICONDUCTOR STORAGE SYSTEM AND METHOD OF MANAGING OF DEFECTIVE COLUMN IN NONVOLATILE SEMICONDUCTOR STORAGE SYSTEM - A nonvolatile semiconductor storage device is disclosed, which includes a memory cell array in which nonvolatile memory cells are arranged, a first data holding circuit which temporarily holds a collective processing unit of read or write data to be simultaneously read from or written to the memory cells, a circuit which takes out the data held in the first data holding circuit from the device, and a second data holding circuit in which data is automatically set at a time when power supply is turned on and in which the data is changeable based on a command input to the device, wherein the collective processing unit is equal to a sum of the number of units used within the device and the maximum number of units continuously output from the device to outside or input to the device from outside. | 2010-08-12 |
20100202229 | METHOD AND APPARATUS FOR SELECTIVE DRAM PRECHARGE - Apparatus and method for using a precharge command in which a plurality of address lines are individually used to specify which banks of memory cells within a memory device have an open row that is to be closed | 2010-08-12 |
20100202230 | MEMORIES WITH FRONT END PRECHARGE - Methods, apparatuses and systems of operating digital memory where the digital memory device including a plurality of memory cells receives a command to perform an operation on a set of memory cells, where the set of memory cells contains fewer memory cells than the device as a whole and where the device performs the operation including selectively precharging on the front end of the operation, in response to the received command, only a set of bit lines associated with the set of memory cells. | 2010-08-12 |
20100202231 | THERMALLY STABLE REFERENCE VOLTAGE GENERATOR FOR MRAM - A non volatile memory device comprises memory cells such as MRAM cells, reading circuits and a reference cell for generating a reference for use by the reading circuits, and can determine if the reference is degraded by thermal instability. This can help reduce a data error rate. Detecting such degradation can prove to be more effective than trying to design in enough margins for the lifetime of the device. The reference cell can be less susceptible to degradation than other cells by using different shape of cells and different write currents. Where each reference cell is used by many memory cells, the reference cell tends to be used more often than any particular memory cell and so can be more susceptible to degradation. Another way of ensuring against longer term degradation of the reference is periodically rewriting the reference cell. | 2010-08-12 |
20100202232 | REFRESHING METHOD - A refreshing method suitable for a memory device is provided which includes the following steps. A sleep mode is set and the memory device cannot be read and programmed in the sleep mode. A first and a second memory cell arrays are sequentially auto-refreshed, and the steps for auto-refreshing each of the first and the second memory cell arrays individually include: during an equalization period, switching the potential of a sense line pair, a first bit line pair and a second bit line pair to a reference voltage wherein the sense line pair is not coupled to the second bit line pair, and during a refreshing period, adjusting the potential of the first and the second bit line pairs according to a refresh sequence of the first and the second memory cell arrays, thereby coupling the sense line pair to one of the first and the second bit line pairs. | 2010-08-12 |
20100202233 | SEMICONDUCTOR STORAGE DEVICE AND CONTROL METHOD OF THE SAME - A semiconductor storage device includes a timing allocation unit that sets refresh timing to preferentially perform a refresh operation for maintaining data and data access timing to preferentially perform a data access operation for reading or writing the data in accordance with a clock signal with respect to each memory bank including a plurality of memory cells, and a waiting unit that waits start of the data access operation until the data access timing is started in a case where a request for the data access operation is made during the refresh timing and waits start of the refresh operation until the refresh timing is started in a case where a request for the refresh operation is made during the data access timing. | 2010-08-12 |
20100202234 | POWER-ON MANAGEMENT CIRCUIT FOR MEMORY - A power-on management circuit for a memory device is provided. The power-on management circuit comprises a first external power-on voltage detector, a second external power-on voltage detector, a delay unit, a logic circuit, an internal power-on voltage detector, a voltage control circuit, a plurality of first electric pumps and a second electric pump. The first external power-on voltage detector has a first voltage threshold, receives a first external voltage, and generates a first control signal when the first external voltage is higher than the first voltage threshold. The second external power-on voltage detector has a second voltage threshold, receives a second external voltage, and generates a second control signal when the second external voltage is higher than the second voltage threshold. | 2010-08-12 |
20100202235 | DEVICE AND METHOD FOR STATE RETENTION POWER GATING - A device for state retention power gating, the device includes a group of circuits, each circuit is characterized by a reset state, wherein the device is characterized by including: a first memory entity adapted to save during a shut down period of the group circuits, at least one location of at least one non-reset-state circuit of the group of circuits. | 2010-08-12 |
20100202236 | RAPID SAFEGUARDING OF NVS DATA DURING POWER LOSS EVENT - A method, system, and computer program product for safeguarding nonvolatile storage (NVS) data by a processor in communication with a memory device following a power loss event is provided. A first portion of the NVS data is encrypted using a first buffer module. Subsequently the first portion of the NVS data is transferred to at least one shared storage device, while a second portion of the NVS data is simultaneously encrypted using a second buffer module. The second portion of the NVS data is subsequently transferred to the at least one shared storage device. | 2010-08-12 |
20100202237 | FLASH BACKED DRAM MODULE WITH A SELECTABLE NUMBER OF FLASH CHIPS - A memory device for use with a primary power source and a backup power source, includes: volatile memory; an interface for connecting to a backup power source; a plurality of ports, each of which is for receiving a different corresponding non-volatile memory chip; a plurality of interfaces, each of which is for communicating through a different corresponding one of the plurality of ports with any non-volatile memory connected to that port; a controller that is programmed to activate a selectable set of the plurality of interfaces depending on which ports are to receive non-volatile memory chips, wherein said controller is also programmed to react to a loss of power from the primary power source by moving data from the volatile memory through the selected interfaces to whatever non-volatile memory is connected to the selectable set of interfaces. | 2010-08-12 |
20100202238 | FLASH BACKED DRAM MODULE INCLUDING LOGIC FOR ISOLATING THE DRAM - A memory device for use with a primary power source including: non-volatile memory; volatile memory; an interface for connecting to a backup power source; isolation logic for controlling access to the volatile memory by a host processor, said isolation logic having a first mode during which the isolation logic provides the host processor with access to the volatile memory for storing or reading data and a second mode during which the isolation logic isolates the volatile memory from access by the host processor; and a controller controlling the isolation logic, said controller programmed to place the isolation logic in the first mode when the volatile memory is being powered by the primary power source and, when power to the volatile memory from the primary power source is interrupted, to place the isolation logic in the second mode and transfer data from the volatile memory to the non-volatile memory. | 2010-08-12 |
20100202239 | STAGED-BACKUP FLASH BACKED DRAM MODULE - A memory device for use with a primary power source includes: volatile memory including a plurality of memory portions each of which has a normal operating state and a low-power state; an interface for connecting to a backup power source arranged to temporarily power the volatile memory upon a loss of power from the primary power source; a non-volatile memory; and a controller in communication with the volatile memory and the non-volatile memory programmed to detect a loss of power of the primary power source and in response to move data from the volatile memory to the non-volatile memory at least one memory portion at a time, and while moving data from the volatile memory to the non-volatile memory place the memory portions from which data is being moved into a normal operating state and the memory portions from which data is not being moved into a low-power state. | 2010-08-12 |
20100202240 | STATE OF HEALTH MONITORED FLASH BACKED DRAM MODULE - A device includes: non-volatile memory; a controller in communication with the non-volatile memory, wherein the controller is programmed to move data from a volatile memory to the non-volatile memory upon a loss of power of a primary power source of the volatile memory; and a backup power supply providing temporary power to the controller and the volatile memory upon the loss of power of the primary power source, including: a capacitor bank with an output terminal; a connection to a voltage source that charges the capacitor bank to a normal operating voltage; and a state-of-health monitor that is programmed to generate a failure signal based on a voltage at the output terminal of the capacitor bank. | 2010-08-12 |
20100202241 | WORD LINE DRIVING CIRCUIT AND METHOD - A word line driving circuit includes an address decoding signal generating unit and a word line voltage supply unit. The address decoding signal generating unit includes inverter chain receiving and delaying a first address decoding signal and outputting the delayed first address decoding signal. The word line voltage supply unit includes a pull-up driver that supplies the delayed first address signal to a selected word line in response to a second address decoding signal. The inverter chain includes an NMOS transistor outputting the delayed first address signal and a source terminal of the NMOS transistor receives a set voltage that is higher than a ground voltage and lower than a high voltage. | 2010-08-12 |
20100202242 | SEMICONDUCTOR MEMORY DEVICE USING BUS INVERSION SCHEME - A semiconductor memory device is capable of transferring address signals at high speed and improving the operation reliability even though an input rate of an address signal increases, and thus a degradation of an operation speed caused by applying a bus inversion scheme can be prevented and power consumption can be reduced. The semiconductor memory device includes a bus inversion decoding block configured to determine whether a plurality of address signals are inverted or not by decoding an indication control signal, and an address buffer block configured to receive two address signals per one cycle of an external clock, align the received address signals for parallel processing, and transfer the address signals or inverted address signals according to an output of the bus inversion decoding block. | 2010-08-12 |
20100202243 | SCREW MACHINE - A screw machine for treating at least partially powdery bulk material has a housing with at least one housing bore and a screw arranged in the housing bore. A vacuum housing portion is provided, which is formed as a vacuum housing insert, which is releasably attached in the housing, in which a metal nonwoven is exchangeably held as a gas-permeable wall portion on a base body. | 2010-08-12 |
20100202244 | COOLING STICK FOR A BLENDER AND METHOD OF USING SAME - A cooling stick for a blender includes a cylindrical member designed to fit tightly through a circular aperture extending through the blender lid. The member has a lower portion and an upper portion with a surrounding rim of a diameter larger than the circular aperture. The lower portion has a lower end sized and shaped to avoid contact with the blender blade assembly. The cylindrical member has an interior chamber, an opening extending from an exterior of the member to the chamber and means for sealing the opening. A cooling fluid is located within the interior chamber. The fluid is cooled or frozen when the cooling stick is located in a cooling environment. When the chilled cooling stick is mounted to the lid of the blender, the cooling stick will cool contents of the blender when the blender is operated. The cooling stick also cools the blender contents after operation. | 2010-08-12 |
20100202245 | AGITATION SYSTEM AND METHOD FOR MEASURING SETTLING RATE OF SOLIDS FROM A SUSPENSION - An agitation system including a motor that is capable of measuring the torque output of the motor required to mix a suspension. The motor is attached to an agitator which is placed in a suspension to be measured. The agitator is placed in the suspension and the agitation system is turned on for a period of time. This period determined by the type of agitator used and the characteristics of the suspension. When the suspension is well mixed and the torque measurement on the agitator becomes stable, the agitation system is stopped. The suspension is allowed to sit without agitation for a period of time and the agitation system is started again. After a period of time the agitation system is started and the amount of torque needed to begin turning the agitator is measured. | 2010-08-12 |
20100202246 | MULTICOMPONENT PACKAGING - A multicomponent packaging is disclosed for an adhesive with at least one first and at least one second component. A first chamber is provided for accommodating the first component of the adhesive, the first chamber having an opening for removal of the adhesive. A second chamber is arranged within the first chamber for accommodating the second component of the adhesive. A sealing means is provided which, in the stored state of the multicomponent packaging, seals the opening in a fluid-tight manner. | 2010-08-12 |
20100202247 | DEVICE FOR PROCESSING MOLECULAR CLUSTERS OF LIQUID TO NANO-SCALE - A device for processing molecular clusters of a liquid to nano-scale is provided and includes a stirring chamber having a hexagonal (or octagonal) column space; a plurality of first stirring modules, each of which has at least one first stirring blade having a left-handed swastika shape (or right-handed swastika shape) for pushing a liquid to flow; and a plurality of second stirring modules, each of which has at least one second stirring blade having a right-handed swastika shape (or left-handed swastika shape) for pushing the liquid to reversely flow. Thus, molecular clusters of the liquid are collided with each other under a condition with high temperature, high pressure and high stirring speed, until the particle diameter of the molecular clusters is reduced to a nano-scale. | 2010-08-12 |
20100202248 | STATIC MIXING ELEMENT - A static mixing element for installation in a hollow body ( | 2010-08-12 |
20100202249 | PARTICLE MOTION SENSOR-BASED STREAMER POSITIONING SYSTEM - A technique includes disposing a particle motion sensor on a spread of at least one streamer and using the particle motion sensor to acquire a measurement of a signal, which is transmitted from an acoustic transmitter. The technique includes determining a heading of the particle motion sensor based at least in part on the measurement. | 2010-08-12 |
20100202250 | IMAGING WITH VECTOR MEASUREMENTS - A technique includes receiving seismic data, which are indicative of pressure measurements and pressure gradient measurements acquired in a seismic survey of at least one subterranean formation. The technique includes modeling an image of the subterranean formation(s) as a function of the pressure measurements and the pressure gradient measurements. The technique includes determining the image based on the modeling. | 2010-08-12 |
20100202251 | USING A ROTATION SENSOR MEASUREMENT TO ATTENUATE NOISE ACQUIRED BY A STREAMER-DISPOSED SENSOR - A technique includes receiving data indicative of a first measurement acquired by a rotation sensor on a seismic streamer and based on the first measurement, estimating a torque noise present in a measurement acquired by a second sensor on the streamer. The technique includes attenuating the torque noise based on the estimate. | 2010-08-12 |
20100202252 | MULTI-MODE DOWNHOLE ACOUSTIC SOURCE - A multimode acoustic source device for disposition in a borehole formed in a subterranean formation is aligned along an axial axis of the borehole and has a plurality of radiating plates circumferentially disposed about the axial axis. A drive mechanism is proposed to independently and reversibly move each radiating plate from a first position to a second position in a direction transverse to the axial axis. This enables the multimode source to generate each of several azimuthal modes for logging a subterranean formation. | 2010-08-12 |
20100202253 | ULTRASONIC SENSOR UNIT AND ELECTRONIC DEVICE - An ultrasonic sensor unit includes an ultrasonic transmission sensor array having a plurality of ultrasonic transmission sensors configured and arranged to transmit ultrasonic waves, and an ultrasonic reception sensor array having a plurality of ultrasonic reception sensors configured and arranged to receive the ultrasonic waves. The ultrasonic reception sensor array re coupled to the ultrasonic transmission sensor array so that the ultrasonic transmission sensors and the ultrasonic reception sensors do not overlap in planar view. One of the ultrasonic transmission sensor array and the ultrasonic reception sensor array include a plurality of through-holes through which one of the ultrasonic transmission sensors and the ultrasonic reception sensors provided in the other of the ultrasonic transmission sensor array and the ultrasonic reception sensor array are exposed. | 2010-08-12 |
20100202254 | CMUTS WITH A HIGH-K DIELECTRIC - A capacitive ultrasound transducer includes a first electrode, a second electrode, and a third electrode, the third electrode including a central region disposed in collapsibly spaced relation with the first electrode, and a peripheral region disposed outward of the central region and disposed in collapsibly spaced relation with the second electrode. The transducer further includes a layer of a high dielectric constant material disposed between the third electrode and the first electrode, and between the third electrode and the second electrode. The transducer may be operable in a collapsed mode wherein the peripheral region of the third electrode oscillates relative to the second electrode, and the central region of the third electrode is fully collapsed with respect to the first electrode such that the dielectric layer is sandwiched therebetween. Piezoelectric actuation, such as d31 and d33 mode piezoelectric actuation, may further be included. A medical imaging system includes an array of such capacitive ultrasound transducers disposed on a common substrate. | 2010-08-12 |
20100202255 | TIMEPIECE FITTED WITH A LIGHTING DEVICE COMPRISING AN ULTRAVIOLET LIGHT-EMITTING DIODE - The invention relates to a timepiece ( | 2010-08-12 |
20100202256 | Near-field light generating device including surface plasmon generating element - A near-field light generating device includes: a base having a top surface; a waveguide that allows laser light to propagate therethrough and is disposed above the top surface of the base; and a surface plasmon generating element that is disposed above the top surface of the base so as to adjoin the waveguide in a direction parallel to the top surface of the base. The waveguide has a side surface that faces the surface plasmon generating element. The surface plasmon generating element includes: a coupling part that is opposed to a part of the side surface of the waveguide with spacing therebetween and causes excitation of a surface plasmon by coupling with evanescent light occurring from the part of the side surface; and a near-field light generating part that generates near-field light based on the surface plasmon excited at the coupling part. | 2010-08-12 |
20100202257 | REPRODUCTION OUTPUT CONTROL APPARATUS, REPRODUCTION OUTPUT CONTROL METHOD, OR THE LIKE - There are provided a reproduction output control apparatus, a reproduction output control method, a reproduction output control processing program and so on which can quickly (in a short time) search a desirable program information out of program information such as a plurality of song data which are continuously recorded on a recording means. | 2010-08-12 |
20100202258 | Optical Disk Drive and Operation Method Thereof - An optical disk drive includes a pickup apparatus and a servo error correction unit. The pickup apparatus reads data recorded on an optical disk or records encoded data on the optical disk. The pickup apparatus includes a servo control unit. The servo error correction unit generates, based upon data read by the pickup apparatus, a tilt control signal to correct the tilt of the pickup apparatus generated as a result of the eccentricity of the optical disk and the tilt of the optical disk,. The servo control unit of the pickup apparatus controls the tilt of the optical disk and the tilt of the pickup apparatus in response to the tilt control signal. | 2010-08-12 |
20100202259 | OPTICAL DISC APPARATUS - An optical disc apparatus for recording or reproducing on or from an optical disc, comprising a laser light source for emitting a laser beam; a drive portion for driving the laser light source; a detection portion for detecting the emission power of the laser beam; and means for focusing the laser beam onto the optical disc, wherein information is reproduced by a reproducing power varied according to a recording power to obtain reproducing signals having necessary quality while suppressing deterioration of the recording quality due to the reproducing power. | 2010-08-12 |
20100202260 | READ AND WRITE POWER CONTROL METHODS AND SYSTEM FOR OPTICAL RECORDING DEVICE - The present invention discloses read and write power control methods and system for an optical recording device that records information on an optical disk having read-only areas. The read and write power control methods respectively introduce the steps of determining a specific level of a former power control signal output based on a former power control, and then according to the specific level, setting a predetermined level of a power control signal to induce a present power control for rapidly outputting a proper power of the pick-up head. Accordingly, the level transition of the read/write power control signal can be shortened and even eliminated. An unstable read/write power output for the pick-up head can be avoided. | 2010-08-12 |
20100202261 | OPTICAL RECORDING MEDIUM, OPTICAL RECORDING MEDIUM MANUFACTURING METHOD, REPRODUCTION SIGNAL PROCESSING METHOD AND EVALUATION METHOD - An optical head | 2010-08-12 |
20100202262 | BLOCK NOISE DETECTION AND FILTERING - Systems and methods for block noise detection and filtering are disclosed. One embodiment includes, computing difference magnitudes in pixel values for adjacent pixels in the image. The difference magnitudes can include horizontal difference magnitudes for horizontally adjacent pixels and vertical difference magnitudes for vertically adjacent pixels. One embodiment further includes using normalized sums of the difference magnitudes to determine a set of noise characteristics of the block noise and a set of image characteristics of the image and configuring inputs to the block noise filter using the set of noise and image characteristics. | 2010-08-12 |
20100202263 | METHOD FOR JUDGING OPTICAL DISC, OPTICAL DISC DEVICE AND PROGRAM - Provided is a method for easily judging that a disc is an optical disc that conforms to the DVD Download standards, without generating malfunction. A Wobble signal is detected in a data zone ( | 2010-08-12 |
20100202264 | RECORDING METHOD FOR OPTICAL DISC DEVICE - An optical disc device recording method, which includes determining whether or not a recording process that records information on a label surface of an optical disc has failed, detecting a recording failure position at which the recording process has failed when the determining step determines the recording process has failed, and resuming the recording process from the detected recording failure position. | 2010-08-12 |
20100202265 | Optical Disc Reader - An optical disc reader comprising a controller that controls a read operation to read data recorded on an optical disc and a counter that counts the number of zero crossings in a tracking error signal. Between the completion of focusing operation and the start of tracking operation, the controller determines whether or not the light beam is properly focused on a data recording layer in the optical disc based on the number of zero crossings in the tracking error signal counted by the counter. If it is determined that the light beam is not properly focused, the controller causes the focusing operation to be performed again. Otherwise, if it is determined that the light beam is properly focused on the data recording layer, the controller causes the tracking operation to be performed and then starts the read operation. | 2010-08-12 |
20100202266 | RECORDING DEVICE AND METHOD, COMPUTER PROGRAM, AND RECORDING MEDIUM - A recording apparatus ( | 2010-08-12 |
20100202267 | TRACK DETERMINATION - A light beam is scanned on a track of a recording medium, the track having a first track region and a second track region, each track region having a physical property that has recurring deviations. A wobble signal is derived from the light beam, the wobble signal having information associated with the recurring deviations. Whether the light beam is at the first track region or the second track region is determined based on a frequency, a period, or a pulse width of the wobble signal. | 2010-08-12 |
20100202268 | OPTICAL RECORDING METHOD, OPTICAL RECORDING APPARATUS, APPARATUS FOR MANUFACTURING A MASTER THROUGH EXPOSURE PROCESS, OPTICAL INFORMATION RECORDING MEDIUM AND REPRODUCTION METHOD - An optical recording method for recording information by irradiating an optical disc medium with a modulated write pulse train of laser light variable over a plurality of power levels such that a plurality of marks are formed on the optical disc medium, edge positions of each of the marks and a space between adjacent two of the marks being utilized for recording of the information. The optical recording method includes the steps of: encoding record data to generate encoded data which is a combination of marks and spaces; classifying the encoded data according to a combination of a mark length of the mark, a space length of a first space that immediately precedes the mark, and a space length of a second space that immediately succeeds the mark; generating a write pulse train for forming the mark, in which at least one of a leading end edge position, a trailing end edge position and a pulse width of the write pulse train is changed according to a classification result; and irradiating the optical disc medium with the write pulse train generated to form the plurality of marks on the optical disc medium. | 2010-08-12 |
20100202269 | DATA RECORDING METHOD IN HOLOGRAPHY OPTICAL MEMORY SYSTEM - According to an aspect of the present invention, a data recording method in a holography optical memory system, for recording a two-dimensional pixel data page in a recording medium can be provided. In accordance with an embodiment of the present invention, the data recording method in a holography optical memory system can include recording sequentially the signal beams carrying one-dimensional pixel data lines, included in the original two dimensional pixel data page, in the recording medium by using the same reference beam. Here, the pixel data page can be recorded such that any two adjacent pixel data lines are partially overlapped with each other in an area of the recording medium. | 2010-08-12 |
20100202270 | OPTICAL INFORMATION RECORDING METHOD AND APPARATUS - In a recording apparatus capable of performing a curing process at high speed by curing a plurality of books at a time during recording and capable of performing recording of a recordable type, when recording is stopped once, the unit of books to be cured at a time is set smaller than that during continuous recording, in order to realize inexpensively both performing a curing process at high speed in hologram recording and realizing recording of a recordable type freely in a book unit. It is therefore possible to terminate recording in the unit of arbitrary books irrespective of the unit of books to be cured, and perform recording of a recordable type without loss. | 2010-08-12 |
20100202271 | OBJECTIVE LENS FOR RECORDING HOLOGRAM AND HOLOGRAM RECORDING DEVICE - Provided is an objective lens for recording a hologram that condenses an recording beam on a hologram recording medium, and the objective lens is configured so as to condense, in the case where the recording beam is incident upon the objective lens in a form of a parallel beam flux, an on-axis beam flux and an off-axis beam flux contained in the parallel flux so as to form a beam waist in the hologram recording medium, and such that a distance between an off-axis image point of the off-axis beam flux that defines a largest field angle among the off-axis beam fluxes gradually converging ahead of the beam waist and the hologram recording medium becomes minimal. | 2010-08-12 |
20100202272 | METHOD OF FABRICATING NANOROD INFORMATION STORAGE MEDIUM - A method of fabricating an information storage medium, the method including forming a plurality of nanorod recording layers on a substrate by sputtering using a mask having a plurality of nanorod patterns. | 2010-08-12 |
20100202273 | LASER DRIVING DEVICE, OPTICAL UNIT, AND LIGHT DEVICE - A laser driving device includes: a first pulse generating section; a second pulse generating section; a light emission waveform generating section; a light emission level pattern storing section; and a second storing section. | 2010-08-12 |
20100202274 | INFORMATION PROCESSING APPARATUS - An information processing apparatus includes: a hard disk drive unit including a hard disk drive configured to read various data from and write various data in a magnetic disk incorporated therein; a housing of an apparatus main body configured to hold the hard disk drive on a substrate to be freely attached and detached; a hard-disk-drive holding member provided in the hard disk drive unit, configured to include a first anti-vibration member having vibration damping properties disposed on a predetermined surface parallel to a disk width direction of the magnetic disk and fix and hold the hard disk drive in a state in which the first anti-vibration member is sandwiched between the hard disk drive and the predetermined member, and formed of a metal member; a member to be guided provided in the hard disk drive unit and provided on a surface parallel to the disk width direction of the magnetic disk different from the predetermined surface of the hard-disk-drive holding member; and a base member provided in the housing of the apparatus main body, configured to have a guide section for guiding the member to be guided in attaching and detaching directions of the hard disk drive unit and come into contact with the hard-disk-drive holding member of the hard disk drive unit attached to the substrate according to the guide by the guide section, and formed of a metal member. | 2010-08-12 |
20100202275 | TURNTABLE - A turntable of a recording medium drive can include a coupler having an inner circumference to which a rotating shaft is fixed, and an outer circumference onto which a disk is inserted; a table extending outwardly from the outer circumference of the coupler and for mounting the disk thereon; and first and second claws elastically supporting the disk by making contact with a clamping region of the disk. In an embodiment, the distance from the center of the rotating shaft to an outer surface of the first claws making contact with the clamping region of the disk is longer than the distance from the center of the rotating shaft to an outer surface of the second claw making contact with the clamping region of the disk. | 2010-08-12 |
20100202276 | RECORDING MEDIUM, ADDRESS GENERATING AND DETECTION METHOD, AND REPRODUCTION AND RECORDING APPARATUS - A recording medium, an address generating method, an address detection method and a recording and reproduction apparatus capable of extending the wobble address without any considerable wobble restructuring are disclosed. Virtual bits not recorded in the disc and expressed by the difference of the rule or the presence or absence of the information embedded in a part or the whole of the wobble address are generated. Thus, the extended address can be obtained without changing the number of bits of the address embedded in the wobble. | 2010-08-12 |
20100202277 | INFORMATION RECORDING METHOD AND APPARATUS, INFORMATION RECORDING MEDIUM, AND INFORMATION RECORDING MEDIUM MANUFACTURING METHOD AND APPARATUS - Content information (CI) is recorded, and then control information including an encryption key is recorded. The area in which the content information (CI) is written is shifted with respect to the user area (UIA) in a playback-only disc. The control information (SI) is written with an identical shift. As a result of the shift, content information (CI) or dummy data (DD) is written in the area (SIA) in which control information is recorded in a playback-only disc. Information indicating the value of the shift is selected randomly and deleted when the disc is removed from the recording apparatus. When encrypted content is downloaded and recorded on a recordable optical disc, the complete content can be recorded on the disc correctly just once. | 2010-08-12 |
20100202278 | RECORDING MEDIUM, PLAYBACK APPARATUS, PROGRAM, AND PLAYBACK METHOD - A BD-ROM contains a plurality of titles which can be branched among, and a Java application. The Java application is a program described in a programming language for a virtual machine. A life cycle where execution by the virtual machine is enabled is predetermined. Each of the titles contains an application management table indicates an application that has a life cycle bound to the title. | 2010-08-12 |
20100202279 | Recording Medium Having a Substrate Containing Microscopic Pattern of Parallel Groove and Land Sections and Recording/Reproducing Equipment Therefor - An information recording medium | 2010-08-12 |
20100202280 | ALUMINUM-ALLOY REFLECTION FILM FOR OPTICAL INFORMATION-RECORDING, OPTICAL INFORMATION-RECORDING MEDIUM, AND ALUMINUM-ALLOY SPUTTERING TARGET FOR FORMATION OF THE ALUMINUM-ALLOY REFLECTION FILM FOR OPTICAL INFORMATION-RECORDING - There are provided an aluminum-alloy reflection film for optical information-recording, having low thermal conductivity, low melting temperature, and high corrosion resistance, capable of coping with laser marking, an optical information-recording medium comprising the reflection film described, and an aluminum-alloy sputtering target for formation of the reflection film described. The invention includes (1) an aluminum-alloy reflection film for optical information-recording, containing an element Al as the main constituent, 1.0 to 10.0 at. % of at least one element selected from the group of rare earth elements, and 0.5 to 5.0 at. % of at least one element selected from the group consisting of elements Cr, Ta, Ti, Mo, V, W, Zr, Hf, Nb, and Ni, (2) an optical information-recording medium comprising any of the aluminum-alloy reflection films described as above, and (3) a sputtering target having the same composition as that for any of the aluminum-alloy reflection films described as above. | 2010-08-12 |
20100202281 | Simultaneous Estimation of Multiple Channel Coefficients Using a Common Probing Sequence - An access node of a communication system comprises a plurality of transmitters adapted for communication with at least one receiver. The access node is operative to simultaneously estimate channel coefficients between multiple ones of the transmitters and the receiver, and to utilize the estimated channel coefficients to control at least one data signal sent by at least one of the multiple transmitters to the receiver. In the process of simultaneously estimating the channel coefficients, the access node transmits a plurality of distinct probing signals, each of which is generated based on a distinct combination of a common probing sequence and a selected one of a plurality of different frequency expansions. The access node may comprise at least a portion of at least one central office of a DSL communication system. | 2010-08-12 |
20100202282 | Method and apparatus for ranging in Broadband wireless access communication system - An apparatus and operation method of a Mobile Station (MS) for ranging in a broadband wireless access communication system includes receiving information for ranging code hopping from a Base Station (BS). The MS determines a hopping offset value that is a start of a ranging codes group using the information for ranging code hopping. The MS also determines a ranging codes group using the hopping offset value, and randomly selects at least one or more ranging codes among the determined ranging codes group and transmitting the selected ranging codes to the BS. | 2010-08-12 |
20100202283 | METHOD AND APPARATUS FOR WALSH SPACE ASSIGNMENT IN A COMMUNICATION SYSTEM - Techniques for Walsh space assignment are disclosed. In one aspect, a list of Walsh functions is maintained in the base station and mobile stations. A Walsh space indicator is transmitted to indicate which of the Walsh functions on the list are to be used in communication. The Walsh space indicator is updated according to the dynamically varying transmit power available or the use of Walsh functions within the base station. Methods by which a mobile station can request Walsh space information are provided. In another aspect, a Walsh space indicator channel is continually broadcast for mobile stations to detect the Walsh space indicator therefrom. In yet another aspect, the Walsh space indicator is used to initialize convolutional encoders and decoders, to provide a mechanism for mitigating against errors introduced while receiving Walsh space indicators. Various other aspects are also presented. | 2010-08-12 |
20100202284 | CQI Adjustment for Arbitrary Transport Format Selection Algorithms - Network node ( | 2010-08-12 |
20100202285 | METHOD AND SYSTEM OF RESTORING FLOW OF TRAFFIC THROUGH NETWORKS - An algorithm is presented, which may be used to generate LSPs for path-oriented virtual circuit networks. The algorithm maximizes throughput of traffic-flow through the network according to certain constraints which may selected to suit various scenarios and recovery schemes. The algorithm may be used by network operators to maximize financial profit from existing networks which has a predetermined bandwidth capacity. | 2010-08-12 |
20100202286 | METHOD & APPARATUS FOR THE EFFICIENT USE OF AVAILABLE COMMUNICATIONS NETWORK BANDWIDTH - A communications network gateway receives a stream of information formatted to be compatible with a first sub-network and it receives a stream of information formatted to be compatible with a second sub-network. The frames in the second stream are extracted and modified to be compatible with the transmission format of the first sub-network. The two streams of information are then aggregated for transmission over a logical network link in a manner that optimizes the bandwidth utilization of the overall communications network. | 2010-08-12 |
20100202287 | SYSTEM AND METHOD FOR NETWORK OPTIMIZATION BY MANAGING LOW PRIORITY DATA TRANSFERS - As more internet service providers have more customers with high-speed internet access accounts and these customers access more multi-media rich data (such as videos), the network infrastructure of internet service providers becomes saturated. Thus, internet service providers are facing pressure to upgrade their networks. However, high-speed digital networking equipment is expensive. Thus, internet service providers need to optimize the usage of their existing networks. To optimize the usage of existing networks, a system of delaying certain data requests is proposed. By delaying certain data requests, the various components in a network can shift data transfers from peak traffic times to lower traffic times. One useful application of delayed requests is the case in which a web client requests data ahead of schedule either through predictive methods or through subscriptions for desired data. | 2010-08-12 |
20100202288 | RANDOM ACCESS SCHEME FOR USER EQUIPMENT - A method of efficiently processing a random access response message, when a terminal (or user equipment) performs random access, is disclosed. After the terminal transmits a random access preamble to a base station, the terminal may receive a random access response message having a format of medium access control protocol data unit (MAC PDU) including only a backoff indicator subheader in a MAC header of the MAC PDU, from the base station in response to the random access preamble. As described above, the terminal, which has received the random access response message including only a backoff indicator subheader in the MAC header of the MAC PDU, may consider a random access response reception procedure not successful and may perform a subsequent procedure for a random access responses reception failure. | 2010-08-12 |
20100202289 | METHOD AND APPARATUS FOR INTERFERENCE MANAGEMENT IN A WIRELESS COMMUNICATION SYSTEM - Systems and methodologies are described herein that facilitate interference control and resource management in a wireless communication system. As described herein, a base station, terminal, and/or other entity in a wireless communication system that observes interference from one or more other network entities can construct and communicate resource utilization messages (RUMs) in order to request the interfering network entities to conduct power backoff on designated resources. Parameters constructed as a function of quality of service (QoS) and/or priority metrics (such as head-of-line delays, queue lengths, burst sizes, delay targets, average rates, or the like) can be included within the RUM, such that an entity receiving the RUM can compute QoS changes associated with various power backoff levels in order to select a power backoff level that maximizes overall system QoS performance. | 2010-08-12 |
20100202290 | Data Flow Control - There is disclosed a method and controller for controlling an information flow in a data transmission system. In one embodiment, the method and controller receives a plurality of data packets. The method and controller further generate a modified information flow by providing a variable spacing between the data packets that is exponentially distributed. The variable spacing between the data packets may be random or pseudo-random. | 2010-08-12 |
20100202291 | Method of Selecting Media Flow - In a method and a system for handling a request for a service or a media flow from a user of a cellular radio system, means are provided for deciding if an already existing PDP context or EPS Bearer is to be used for the requested service or media flow based on information received from the system. | 2010-08-12 |
20100202292 | Mechanism for Achieving Packet Flow Control In a Multi-Threaded, Multi-Packet Environment - A processing engine to accomplish a multiplicity of tasks has a multiplicity of processing tribes, each tribe comprising a multiplicity of context register sets and a multiplicity of processing resources for concurrent processing of a multiplicity of threads to accomplish the tasks, a memory structure having a multiplicity of memory blocks, each block storing data for processing threads, and an interconnect structure and control system enabling tribe-to-tribe migration of contexts to move threads from tribe-to-tribe. The processing engine is characterized in that individual ones of the tribes have preferential access to individual ones of the multiplicity of memory blocks. | 2010-08-12 |
20100202293 | JITTER MANAGEMENT FOR PACKET DATA NETWORK BACKHAUL OF CALL DATA - Managing packet data network jitter is disclosed. A first call data associated with a mobile network communication session is received. A second call data that is older than the first call data is dropped from a buffer if required to make room in the buffer for the first call data. | 2010-08-12 |
20100202294 | NETWORK CONGESTION MANAGEMENT SYSTEMS AND METHODS - Systems, methods and software useful for overcoming network congestion problems including head-of-line blocking issues and other network congestion problems. In certain aspects, flow control mechanisms implemented in a switch device or other network device manage buffer and system level resources using a scheduler to control the amount of data requested from a local SAN fabric. Switches and other network devices configured according to the present invention monitor each individual SCSI task, and are configured to apply flow control measures to each active session when buffering resources become scarce, such as when buffering data for a slower-speed WAN link or TCP/IP based interconnects of any speed. | 2010-08-12 |
20100202295 | PROGRAMMABLE METERING BEHAVIOR BASED ON A TABLE LOOKUP - A network device for processing data on a data network including a plurality of ports, configured to receive data from a data network and to send processed data to the data network via an egress port, a controller interface, configured to communicate with an external controller, a memory management unit, configured store data on and retrieve data from the memory and a metering unit, configured to police a flow of the processed data to be sent to the egress port. The metering unit further includes programmable registers, in communication with the controller interface, configured to be programmed through controller signals sent through the controller interface from the external controller, such at all aspects of the flow of the processed data may be controlled by the external controller. | 2010-08-12 |
20100202296 | WIRELESS COMMUNICATION SYSTEM, WIRELESS COMMUNICATION CONTROL APPARATUS AND WIRELESS COMMUNICATION CONTROL METHOD, AND COMPUTER PROGRAM - A communication terminal under the control of a wireless base station recursively has wireless base station capabilities in a parent network, constructs a daughter network within a scope of resources of the own apparatus assigned by the wireless base station, and assigns the resources to an other communication terminal under the control of the communication terminal having base station capabilities. This novel constitution allows to configure two or more networks guaranteed not to interfere each other, thereby allowing the coexistence of a plurality of personal area networks on a same frequency channel. At the same time, the novel constitution allows expanding a network area without increasing the scale of equipment. | 2010-08-12 |
20100202297 | METHOD, DEVICE, AND SYSTEM FOR TRAFFIC SWITCHING IN MULTI-PROTOCOL LABEL SWITCHING TRAFFIC ENGINEERING - A method, device, and system for traffic switching in Multi-Protocol Label Switching Traffic Engineering (MPLS TE) are disclosed. The method includes: transmitting traffic over a standby Label Switching Path (LSP) after detecting fault of an active LSP; detecting that the forwarding entry on the active LSP is delivered completely after the fault of the active LSP is rectified; and switching the traffic to the active LSP, and transmitting the traffic over the active LSP. The present invention ensures that the forwarding entry on the active LSP is delivered completely, and prevents packet loss and traffic loss in the case of switching the traffic back from the standby LSP to the active LSP, thus improving the user experience and enhancing the network availability and stability. | 2010-08-12 |
20100202298 | NETWORK COORDINATE SYSTEMS USING IP INFORMATION - Systems and methods that improve predictions of network latency in network coordinate systems (NCS) based on combining Internet topology information therewith. Topology information can be incorporated into the NCS by system/methodologies represented by geographic bootstrapping; autonomous system (AS) correction; history prioritization; symmetric updates or a combination thereof. Such can improve latency estimation between nodes when using a virtual coordinate system based on latency measurements between nodes. | 2010-08-12 |
20100202299 | MULTI-TIERED SCALABLE NETWORK MONITORING - A network analysis architecture provides a suite of complementary logic operable at different temporal and spatial timescales. The distinct temporal and spatial scales define different tiers, each analyzing network events according to predetermined temporal and spatial scales of progressive magnitude. Particular event detection logic may be operable on an immediate temporal scale, while other logic identifies trends over a longer time period. Similarly, different spatial scales are appropriate to different algorithms, as in logic that examines only headers or length of packets, or inspects an entire payload or transferred file. Deployment of logic that is focused on different timing and scope of data allows timely action in the case of readily apparent deviations, and permits longer term analysis for identifying trends that emerge over time. By selecting a suite of complementary logic directed at different deviant behavior, the focus of a single logic scheme is not charged with producing absolute screening of all traffic. | 2010-08-12 |
20100202300 | SYSTEMS AND METHODS FOR SPACE-TIME DETERMINATIONS WITH REDUCED NETWORK TRAFFIC - Space-time solutions are determined by exchanging pings among nodes in a network. Each ping includes a current space-time state of the transmitting node, which includes the transmitting node's currently estimated location and corrected time (as a count stamp). A particular node in the network receives pings from the other nodes in the network and uses the data in the received pings to estimate its own current position and to correct its own free-running clock relative to a common system time. As a service to the network, the particular node then transmits its corrected time (as a count stamp) and estimated position to the other nodes. In some embodiments, the space-time solutions discussed herein are used as backup to other navigation systems, such as the Automatic Dependent Surveillance-Broadcast (ADS-B) system. | 2010-08-12 |
20100202301 | METHOD FOR SWITCHING BETWEEN A LONG GUARD INTERVAL AND A SHORT GUARD INTERVAL AND MODULE USING THE SAME - The module for switching between a long guard interval and a short guard interval comprises a signal processing unit, a measurement unit, a comparison unit and a switching unit. The module receives a first data symbol, and the data symbol has one of a long guard interval and a short guard interval. The signal processing unit is configured to generate a second data symbol in accordance with the first data symbol. The measurement unit is configured to measure a portion of the first and second data symbols in order to generate a first measurement value and a second measurement value. The comparison unit is configured to generate an output signal by comparing the first and second measurement values with a threshold value. The switching unit is configured to selectively switch guard intervals of subsequent data symbols in accordance with the output signal. | 2010-08-12 |
20100202302 | SYSTEM AND METHOD FOR RESERVING AND SIGNALING HYBRID AUTOMATIC REPEAT REQUEST IDENTIFIERS - A system and method are provided for determining a radio condition for a first user agent; and reserving a number of HARQ Process IDs based on the radio condition for the first user agent. A system and method are also provided for sending a number of reserved HARQ Process IDs over a control channel. | 2010-08-12 |