32nd week of 2009 patent applcation highlights part 26 |
Patent application number | Title | Published |
20090196061 | VEHICLE LIGHT AND METHOD - A vehicle cornering light can improve the visibility in a diagonally front area of the vehicle without increasing the luminous intensity of the cornering light (or light source thereof). The cornering light that is provided at or near a front corner of a vehicle and is configured to emit light for illuminating a diagonally front area of the vehicle can include a light source that can emit light with a color temperature of from 3700K to 7000K. The cornering light can emit light for illuminating a lateral area ranging from 60° to 75° with respect to the longitudinal direction of the vehicle. The light source can be composed of a first light source configured to emit light for illuminating an area partly overlapping, or adjacent to, an illumination area of the headlight of the vehicle, and a second light source configured to emit light for illuminating an area partly overlapping, or adjacent to, the illumination area of the first light source. The color temperatures of the headlight, the first light source, and the second light source are sequentially changed to be higher in this respective order. | 2009-08-06 |
20090196062 | Systems, Devices, and/or Methods for Rotating a Vehicle Lamp - In certain exemplary embodiments, an apparatus for rotating one or more vehicle lamps can include a case body, a motor, a printed circuit board, and/or a gear reducing mechanism. The motor can be mounted on the outside of the case body and/or can include a case shell and/or an end cover. The revolving shaft of the motor can be supported on the case shell and/or the end cover of the motor by a first bearing and/or a second bearing respectively. The end of the revolving shaft of the motor can enter into the case body and/or be fixed with a driving gear which can engage with the gear reducing mechanism. The output shaft of the gear reducing mechanism can actuate the vehicle lamp, so as to change the direction of irradiation of the vehicle lamp. | 2009-08-06 |
20090196063 | VEHICLE LAMP ASSEMBLY - A vehicle lamp assembly includes a light source unit (e.g., one or more LEDs) mounted to an associated vehicle for providing illumination and a heat sink thermally coupled to the light source unit for dissipating generated heat therefrom. The heat sink has a main body portion, spaced apart fins extending from the main body portion, and an angled surface section on the main body portion disposed between adjacent ones of the spaced apart fins for urging environmental elements to run off the heat sink. | 2009-08-06 |
20090196064 | VEHICLE LAMP ASSEMBLY - A vehicle lamp assembly for a vehicle includes a light source unit (e.g., one or more LEDs) mounted to the vehicle for providing illumination and a heat sink thermally coupled to the light source unit for dissipating generated heat therefrom. An air guide is secured to the vehicle for guiding air to the heat sink to remove heat therefrom. | 2009-08-06 |
20090196065 | Front Unit for a Motor Vehicle - The invention concerns a front unit for a motor vehicle with
| 2009-08-06 |
20090196066 | OPTICAL CONNECTING MEMBER AND DISPLAY APPARATUS - Disclosed is an information processing device with lighting function that realizes reduced power consumption and cost reductions. The optical connecting member | 2009-08-06 |
20090196067 | BACKLIGHT - The present invention relates to a backlight for a liquid crystal display (LCD). The backlight can comprise a back cover including a bottom plate and side covers, a light guide plate disposed on the bottom plate, and cold cathode fluorescence lamps (CCFLs) located on the sides of the light guide plate and enclosed by the side covers. The CCFLs can be disposed on four sides of the light guide plate. The CCFLs can be two lamps in L shape or four lamps in a straight line shape disposed on the sides of the light plate, with high voltage ends of one CCFL adjacent to the low voltage ends of another CCFL, thus allowing the LCD lighter, slimmer and more compact in structure. | 2009-08-06 |
20090196068 | BACKLIGHT MODULE AND DISPLAY APPARATUS HAVING THE SAME - A backlight module is provided. The backlight module includes a light guide plate, an optical component, and a light source for generating light. The optical component is provided for adjusting or veering the light emitted from the light source along a direction perpendicular to the light guide plate. One end of the optical component is affixed to the light source for receiving the incident light. The other end of the optical component faces, and is separated from, the light guide plate, so as to direct the light to the light guide plate. | 2009-08-06 |
20090196069 | PLANAR LIGHTING DEVICE - Provided is a thin, lightweight planar lighting device capable of emitting uniform illumination light free from brightness unevenness and enabling increase in dimensions. The device includes a light source and a light guide plate disposed opposite to the light source, and the light guide plate includes a light entrance plane opposite to the light source and a light exit plane containing one side of the light entrance plane, and has a shape growing thicker in direction perpendicular to the light exit plane with the increasing distance from the light entrance plane and contains scattering particles for scattering light entering through the light entrance plane and propagating the inside thereof. | 2009-08-06 |
20090196070 | LIGHT EMITTING APPARATUS AND LIGHT UNIT HAVING THE SAME - Provides are a light emitting apparatus and a light unit having the same. The light emitting apparatus comprises a light emitting device comprising a light emitting element and a plurality of external leads, and a plurality of electrode pads under the light emitting device. | 2009-08-06 |
20090196071 | LIGHTING SYSTEM FOR CREATING AN ILLUMINATED SURFACE - The present invention combines point light sources in combination with a light guide element and light redirecting elements into a system which can emit light across one or more extended surfaces of the light guide and may be designed to be able to emit light uniformly across the extended surfaces. The system comprises one or more light-emitting elements and a light guide in which are defined one or more voids. The light-emitting elements are optically coupled to the light guide by positioning them adjacent to a surface of the light guide, or by positioning them proximal to one or more of the voids. One or more light-emitting elements can be optically coupled to one void such that they emit light into the light guide substantially through that void and not through any other void of the one or more voids. Optically coupled to the light guide are a plurality of light redirecting elements for altering of the propagation of light through the light guide, thereby enabling light to be emitted from the surface of the light guide in a desired pattern, for example in a uniform illumination pattern. | 2009-08-06 |
20090196072 | Phase-shifted dual-bridge DC/DC converter with wide-range ZVS and zero circulating current - Disclosed is a family of new DC/DC converters and a new control method. The converter comprises two bridge inverters, two full-wave rectification circuits and a current-doubler filter. Each inverter is able to generate a symmetrical and isolated AC output voltage. Phase-shift control is employed to control the phase difference between the two bridge inverters. By shifting the phase, the converter changes the two inverters' output voltage overlapping area to regulate its output voltage. The bridge inverters always operate at 50% duty cycle, like an open loop Bus Converter, to achieve wide-range zero voltage switching and eliminate circulating current for normal operation. For low output voltage regulation and soft start, Pulse Width Modulation (PWM) control is used. The converters and the control method improve power conversion efficiency, maximize magnetic component utilization, reduce semiconductor stress and decrease EMI emission. | 2009-08-06 |
20090196073 | Switching power supply unit - A switching power supply unit capable of simplifying its structure by reducing the number of parts for wiring is provided. A rectifier circuit has a diode inserted between a first secondary winding and a second secondary winding to form a series circuit therewith, and a diode inserted between a third secondary winding and a fourth secondary winding to form a series circuit therewith. A smoothing circuit has a first choke coil inserted between an input section connected to a center tap and an output terminal, and a second choke coil inserted between an input part connected to a junction point and an output terminal. A first path and a second path are formed of a wiring member made of a single sheet metal, and a third path and a fourth path are formed of a wiring member made of another sheet metal. | 2009-08-06 |
20090196074 | Resonant Converter - A resonant converter includes a square wave generator including a first switch and a second switch, and generating a first square wave corresponding to an input voltage by alternately turning on/off the first and second switches; a resonator including a first coil of a primary coil of a transformer, and generating a resonance waveform corresponding to the first square wave; and an output unit including a second coil of a secondary coil of the transformer, and outputting a voltage corresponding to a current generated in the second coil corresponding to the resonance waveform. The square wave generator includes a pulse frequency modulation controller for turning on/off the first and second switches, comparing a first voltage linearly increased while the second switch maintains the turn-on state and a second voltage corresponding to an integration value on the time of the current flowing to the second switch when the second switch is turned off, and changing on/off drive frequencies of the first and second switches according to a comparison result. Therefore, a resonant converter driven with safety is realized. | 2009-08-06 |
20090196075 | FLY-FORWARD CONVERTER POWER SUPPLY - A fly-forward converter topology for a switched-mode power supply (SMPS) that may incorporate the advantages of both a forward converter and a flyback converter into a two-stage half-wave converter is provided. The fly-forward converter may be considered as a half-wave forward converter that has been modified with the addition of another secondary winding and a second rectifier, operating as a forward converter during the on period of the primary-side switch(es) and functioning as a flyback converter during the off period. Magnetizing energy stored in the core of the converter's transformer is not lost or recirculated in the primary, but may be transferred from the primary to the secondary. By transferring the transformer magnetizing energy to the secondary during the off period, the transformer core of the fly-forward converter may be reset without additional core resetting circuitry. | 2009-08-06 |
20090196076 | INTEGRATED BASE DRIVER AND SWITCHING WINDINGS FOR AN ESBT POWER DRIVER - A power supply circuit includes: a switching flyback transformer having a primary winding and a secondary winding; a current transformer having a primary winding and a secondary winding; and a switching transistor have a conduction path and a control terminal. The primary winding of the switching flyback transformer, the primary winding of the current transformer and the conduction path of the switching transistor are coupled together in a series circuit. The switching flyback transformer and the current transformer share a common core. The windings of the switching flyback transformer may be wound around one leg of the common core, while the windings of the current transformer may be wound around a different leg of the common core. | 2009-08-06 |
20090196077 | ENERGY MANAGEMENT SYSTEM AND CONTROL METHOD USING THE SAME - The present disclosure relates to an energy management system (EMS) and a method using the same, wherein the EMS comprises, a communication module receiving a channel information of a high voltage direct current (HVDC) system via a network; a circuit realization unit obtaining a connection information among constituent elements symbolizing the constituent elements among each node in electrical symbols by sequentially following pre-set nodes of the HVDC system, and forming the HVDC system by connecting the symbolized constituent elements using electrical lines by using the channel information of HVDC system received by the communication module; a system analyzing unit analyzing an operation mode of the HVDC system through the connection information among the constituent elements of the HVDC system obtained by the circuit realization unit; and a controller managing and controlling the HVDC system by giving an energy management command in response to the operation mode analyzed by the system analyzing unit. | 2009-08-06 |
20090196078 | Static converter - A static converter includes a current converter on the three-phase side and a current converter on the single-phase side, which are electrically conductively linked to one another on the DC voltage side, and which are respectively electrically conductively connected on the AC voltage side to a feeding three-phase network and a single-phase receiving network. According to an embodiment of the invention, one network-commutated current converter is provided as the current converter on the three-phase side, wherein the current converter on the single-phase side has two phase modules which are connected in parallel on the DC voltage side and whose current converter branches each have at least one two-pole subsystem. This results in a static converter which is simpler and costs less than a known static converter. | 2009-08-06 |
20090196079 | SELF-ADJUSTING BLEEDER FOR A FORWARD CONVERTER - A switched mode power supply (SMPS) may be operated with uncoupled output inductors. Overvoltage produced by “low-load” conditions may be controlled through use of an adaptive regulating bleeder. The bleeder may comprise a shunt regulator and a power dissipation resistor connected in parallel with a load of the SMPS. As load on the SMPS is reduced below a predetermined level, the shunt regulator may begin to conduct. Current may pass through the power dissipation resistor. Power dissipation may occur at a rate sufficient to maintain continuous conductance through an output inductor of the SMPS. During normal load operation, the shunt regulator may not conduct and inefficient dissipation of power through the resistor may be avoided. | 2009-08-06 |
20090196080 | Controller for use in a resonant direct current/direct current converter - A controller is adapted for controlling a switch of a resonant direct current/direct current converter, and includes: a pulse width modulation controlling unit for detecting an output voltage of the resonant direct current/direct current converter, and for generating a pulse width modulation signal according to the output voltage detected thereby; a fixed frequency signal generating unit for generating a fixed frequency signal; and a logic synthesizing unit for synthesizing the pulse width modulation signal and the fixed frequency signal so as to generate a driving signal that is adapted to drive the switch of the resonant direct current/direct current converter. | 2009-08-06 |
20090196081 | SYSTEM AND METHOD FOR PROVIDING SWITCHING TO POWER REGULATORS - System and method for providing switching to power regulators. According to an embodiment, the present invention provides system for providing switching. The system includes a first voltage supply that is configured to provide a first voltage. The system also includes a second voltage supply that is configured to provide a second voltage. The second voltage being independent from the first voltage. The system additionally includes a controller component that is electrically coupled to the first voltage supply. For example, the controller component being configured to receive at least a first input signal and to provide at least a first output signal. Additionally, the system includes a gate driver component that is electrically coupled to the second voltage supply. The gate driver component is configured to receive at least the first output signal and generated a second output signal in response to at least the second voltage and the first output signal. | 2009-08-06 |
20090196082 | Multiphase Converter Apparatus and Method - An ac/ac converter for accepting a pulsating dc input with encoded sinusoidal modulation and providing a multiphase modulated output. The converter comprises a bridge including a plurality of switches having switch legs for modulating the pulsating dc input at a carrier frequency over a plurality of phases. The bridge is coupled at one end to a pulsating dc source and coupled at another end to a modulated signal output. A controller is provided for the plurality of switches for causing, for each of the plurality of phases, under unity power factor, one of the switch legs to modulate the pulsating dc input at the carrier frequency while the other switch legs do not modulate the pulsating dc input at the carrier frequency. | 2009-08-06 |
20090196083 | Integrated circuits to control access to multiple layers of memory - Circuits to control access to memory; for example, third dimension memory are disclosed. An integrated circuit (IC) may be configured to control access to memory cells. For example, the IC may include a memory having memory cells that are vertically disposed in multiple layers of memory. The IC may include a memory access circuit configured to control access to a first subset of the memory cells in response to access control data in a second subset of the memory cells. Each memory cell may include a non-volatile two-terminal memory element that stores data as a plurality of conductivity profiles that can be non-destructively sensed by applying a read voltage across the two terminals of the memory element. New data can be written by applying a write voltage across the two terminals of the memory element. The two-terminal memory elements can be arranged in a two-terminal cross-point array configuration. | 2009-08-06 |
20090196084 | Memory chip array - Provided is a memory chip array comprising a plurality of cell arrays and at least one predecoder commonly connected to the plurality of cell arrays, wherein the memory chip array promotes an efficient arrangement structure of the memory chip array and is minimized in area. | 2009-08-06 |
20090196085 | SRAM MEMORY CELL PROTECTED AGAINST CURRENT OR VOLTAGE SPIKES - A memory cell is protected against current or voltage spikes. The cell includes a group of redundant data storage nodes for the storage of information in at least one pair of complementary nodes. The cell further includes circuitry for restoring information to its initial state following a current or voltage spike which modifies the information in one of the nodes of the pair using the information stored in the other node. The data storage nodes of each pair in the cell are implanted on opposite sides of an opposite conductivity type well from one another within a region of a substrate defining the boundaries of the memory cell. | 2009-08-06 |
20090196086 | HIGH BANDWIDTH CACHE-TO-PROCESSING UNIT COMMUNICATION IN A MULTIPLE PROCESSOR/CACHE SYSTEM - A processor/cache assembly has a processor die coupled to a cache die. The processor die has a plurality of processor units arranged in an array. There is a plurality of processor sets of contact pads on the processor units, one processor set for each processor unit. Similarly, the cache die has a plurality of cache units arranged in an array. There is a plurality of cache sets of contact pads on the cache die, one cache set for each cache unit. Each cache set is in contact with one corresponding processor set. | 2009-08-06 |
20090196087 | Non-volatile register - A non-volatile register is disclosed. The non-volatile register includes a memory element. The memory element comprises a first end and a second end. The non-volatile register includes a register logic connected with the first and second ends of the memory element. The register logic is positioned below the memory element. The memory element may be a two-terminal memory element configured to store data as a plurality of conductivity profiles that can be non-destructively determined by applying a read voltage across the two terminals. New data can be written to the two-terminal memory element by applying a write voltage of a predetermined magnitude and/or polarity across the two terminals. The two-terminal memory element retains stored data in the absence of power. A reference element including a structure that is identical or substantially identical to the two-terminal memory element may be used to generate a reference signal for comparisons during read operations. | 2009-08-06 |
20090196088 | RESISTANCE CONTROL IN CONDUCTIVE BRIDGING MEMORIES - An integrated circuit may comprise one or more resistive storage cells, wherein each resistive storage cell comprises a resistive storage medium that is switchable between at least a high resistive state and a low resistive state; and a resistance element communicatively coupled to the resistive storage medium in series. | 2009-08-06 |
20090196089 | Phase change material, phase change memory device including the same, and methods of manufacturing and operating the phase change memory device - Disclosed may be a phase change material alloy, a phase change memory device including the same, and methods of manufacturing and operating the phase change memory device. The phase change material alloy may include Si and Sb. The alloy may be a Si—O—Sb alloy further including O. The Si—O—Sb alloy may be Si | 2009-08-06 |
20090196090 | Nanoscale Shift Register And Signal Demultiplexing Using Microscale/Nanoscale Shift Registers - Methods for inputting a data-value pattern into a nanowire crossbar, for inputting a data-value pattern into a nanowire crossbar that support computer instructions stored in a computer-readable medium, and for distributing a received data value to each of a set of nanowires that support control logic implemented in logic circuits are provided. First and second nanoscale shift registers are employed, the first having output signal lines that form or interconnect with a first parallel set of nanowire-crossbar nanowires and the second having output signal lines that form or interconnect with a second parallel set of nanowire-crossbar nanowires. A first pattern of values is stored in the first shift register and a second pattern of values is stored in the second shift register using voltage signals below the WRITE voltage for junctions of the crossbar. Voltage signals greater than or equal to the WRITE threshold are applied for junctions of the crossbar to write the pattern of data values into the crossbar. | 2009-08-06 |
20090196091 | Self-aligned phase change memory - A self-aligned phase change memory may be formed by blanket depositing a number of layers and then using patterning techniques to define the individual cells. In one embodiment, a layer of phase change material may be blanket deposited over a lower electrode material. The structure may then be patterned and etched to form a plurality of spaced, parallel elongate first strips. Those strips may then be covered with a filler material, planarized, and then patterned again in a transverse direction to form a plurality of transverse, spaced, parallel second strips. The resulting structure then has singulated phase change material with connections in at least one of the row or column direction. The singulated the phase change material is self-aligned to underlying and overlying electrodes. | 2009-08-06 |
20090196092 | Programming bit alterable memories - Program failures during programming can be corrected during reading using an error correcting code. This allows an array to pass programming more readily, speeding the operation of the memory and avoiding the need to continually reprogram or to issue an error message that the programming was unsuccessful. This makes the memory more user friendly and robust. | 2009-08-06 |
20090196093 | STACKED DIE MEMORY - A memory includes a first die including a first array of phase change memory cells and a second die including a second array of phase change memory cells. The second die is stacked above the first die. The memory includes lines configured to access the first die and the second die. The first die and the second die are enclosed in a single package. | 2009-08-06 |
20090196094 | INTEGRATED CIRCUIT INCLUDING ELECTRODE HAVING RECESSED PORTION - An integrated circuit includes a first electrode including an etched recessed portion. The integrated circuit includes a second electrode and a resistivity changing material filling the recessed portion and coupled to the second electrode. | 2009-08-06 |
20090196095 | MULTIPLE MEMORY CELLS AND METHOD - Memory devices and methods described are shown that provide improvements, including improved cell isolation for operations such as read and write. Further, methods and devices for addressing and accessing cells are shown that provide a simple and efficient way to manage devices with multiple cells associated with each access transistor. Examples of multiple cell devices include phase change memory devices with multiple cells associated with each access transistor. | 2009-08-06 |
20090196096 | Memory Cells, Methods Of Forming Memory Cells, And Methods Of Forming Programmed Memory Cells - In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel region; and a drain region on an opposing side of the channel region from the source region. The channel region has phase change material adjacent the drain region. In some embodiments, the phase change material may be adjacent both the source region and the drain region. Some embodiments include methods of programming a memory cell that has phase change material adjacent a drain region. An inversion layer is formed within the channel region adjacent the gate dielectric, with the inversion layer having a pinch-off region within the phase change material adjacent the drain region. Hot carriers (for instance, electrons) within the pinch-off region are utilized to change a phase within the phase change material. | 2009-08-06 |
20090196097 | Device for reading memory data and method using the same - Provided are a device for reading memory data and a method using the same. The device for reading memory data comprises a memory cell which stores multi-bit information, an information detection unit which detects as much bit information as a predetermined number of bits from among multi-bit information, a source-line voltage control unit which controls a source-line voltage of the memory cell based on the detected bit information from the information detection unit, and a remaining bit information read unit which reads remaining bit information stored in the memory cell by using the controlled source-line voltage. | 2009-08-06 |
20090196098 | Multiple-Level Memory with Analog Read - A memory circuit includes a plurality of memory cells, each of the memory cells being operative to store multiple bits of data therein, and a plurality of column lines and row lines coupled to the memory cells for selectively accessing the memory cells. The circuit further includes multiple sense amplifiers, each of the sense amplifiers being connected to a corresponding one of the column lines and being operative to detect an electric charge stored in a selected one of the memory cells coupled to the corresponding column line and to generate an analog signal indicative of the stored electric charge. An analog multiplexer is connected to the sense amplifiers. The analog multiplexer is operative to receive the respective analog signals from the sense amplifiers and to generate an analog output signal having a magnitude which varies in time as a function of the respective analog signals from the sense amplifiers. | 2009-08-06 |
20090196099 | PAGE BUFFER CIRCUIT OF MEMORY DEVICE AND PROGRAM METHOD - A page buffer circuit of a memory device including a plurality of Multi-Level Cells (MLCs) connected to at least a pair of bit lines includes a Most Significant Bit (MSB) latch, a Least Significant Bit (LSB) latch, a data I/O circuit, an inverted output circuit, a MSB verification circuit, and a LSB verification circuit. The MSB latch is configured to sense a voltage of a sensing node in response to a control signal and store an upper sensing data, and output an inverted upper sensing data, or store an input data and output an inverted input data. The LSB latch is configured to sense a voltage of the sensing node in response to the control signal, and store and output a lower sensing data, or store and output an input data received through the MSB latch. The data I/O circuit is connected to the MSB latch and a data I/O line, and is configured to perform the input and output of a sensing data or the input and output of a program data. | 2009-08-06 |
20090196100 | SYSTEMS AND METHODS FOR REDUCING UNAUTHORIZED DATA RECOVERY FROM SOLID-STATE STORAGE DEVICES - A memory system comprising one or more memory devices is purged to prevent unauthorized access to data stored therein. A host system passes control of purge operations to the memory system. The purge operations are configured to erase data, write a pattern to memory locations, physically damage the memory devices in the memory system, or combinations of the foregoing. The memory system can perform a purge operation on two or more memory devices in parallel. The memory system includes a destroy circuit to provide an over-current and/or over-voltage condition to the memory devices. The memory system also includes one or more isolation circuits to protect control circuitry in the memory system from the over-current and/or over-voltage condition. In some embodiments, the memory system includes a backup battery so it can complete a purge operation if it looses its power connection to the host system. | 2009-08-06 |
20090196101 | MEMORY MODULE - The present invention provides a reliable memory module. The memory module including a plurality of memory devices arranged on a circuit board and controlled by an external memory controller includes a buffer having a function of detecting and correcting an error and a nonvolatile storage area that stores contents of the error. | 2009-08-06 |
20090196102 | FLEXIBLE MEMORY OPERATIONS IN NAND FLASH DEVICES - A flash memory device having at least two bank, where the each bank has an independently configurable page size and core controller. The core controller is local to each bank, and governs memory access operations for the bank that include read, program and erase operations. Each core controller controls timing and activation of row circuits, column circuits, voltage generators, and local input/output path circuits for a corresponding memory access operation of the bank. Concurrent operations are executable in multiple banks to improve performance. Each bank has a page size that is configurable with page size configuration data such that only selected wordlines are activated in response to address data. The configuration data can be loaded into the memory device upon power up for a static page configuration of the bank, or the configuration data can be received with each command to allow for dynamic page configuration of the bank. | 2009-08-06 |
20090196103 | NON-VOLATILE MEMORY DEVICE HAVING CONFIGURABLE PAGE SIZE - A flash memory device having at least one bank, where the each bank has an independently configurable page size. Each bank includes at least two memory planes having corresponding page buffers, where any number and combination of the memory planes are selectively accessed at the same time in response to configuration data and address data. The configuration data can be loaded into the memory device upon power up for a static page configuration of the bank, or the configuration data can be received with each command to allow for dynamic page configuration of the bank. By selectively adjusting a page size the memory bank, the block size is correspondingly adjusted. | 2009-08-06 |
20090196104 | MEMORY AND METHOD OPERATING THE MEMORY - A memory comprises a memory array, a sense unit, and a biasing and shielding circuit. The biasing and shielding circuit is coupled to the memory array and the sense unit, wherein the biasing and shielding circuit comprises a first transistor, a second transistor, and a capacitor. The first transistor has a gate coupled to a biasing voltage and a first terminal coupled to the sense unit. The second transistor has a gate coupled to the biasing voltage and a first terminal coupled to a first potential. The capacitor is coupled to the sense unit and the first transistor. | 2009-08-06 |
20090196105 | Scalable Electrically Eraseable And Programmable Memory (EEPROM) Cell Array - A non-volatile memory (NVM) system includes a plurality of NVM cells fabricated in a dual-well structure. Each NVM cell includes an access transistor and an NVM transistor, wherein the access transistor has a drain region that is continuous with a source region of the NVM transistor. The drain regions of each NVM transistor in a column of the array are commonly connected to a corresponding bit line. The control gates of each NVM transistor in a row of the array are commonly connected to a corresponding word line. The source regions of each of the access transistors in the array are commonly coupled. The NVM cells are programmed and erased without having to apply the high programming voltage V | 2009-08-06 |
20090196106 | MEM SUSPENDED GATE NON-VOLATILE MEMORY - A carrier storage node such as a floating gate is formed on a moving electrode with a control gate to form a suspended gate non-volatile memory, reducing floating gate to floating gate coupling and leakage current, and increasing data retention. | 2009-08-06 |
20090196107 | SEMICONDUCTOR DEVICE AND ITS MEMORY SYSTEM - A semiconductor device selects one mask pattern among from a plurality of the mask patterns, which are stored in a mask resister circuit for mask controlling of a bit width (vertical axis), by a mask pattern selection signal, and controls input and output of data based on the selected mask pattern and a mask control signal of a bit string (horizontal axis), when inputting and outputting data having the consecutive bit string (horizontal axis) and a plurality of the bit widths (vertical axis). A read data converter circuit and a write data converter circuit select to mask or unmask each data signal during burst reading or writing, and masks the data signal. The masked data signal is not written in a memory cell by inactivating a write data buffer circuit during writing, and is not read out by inactivating a data driver circuit connecting with an external input and output terminal. | 2009-08-06 |
20090196108 | SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE TEST METHOD - A semiconductor memory device having a first memory block used when it is determined to be used in a first case, a second memory block used as an alternative of the first memory blocks when it is determined to be used in a second case, a write section that writes determination data into the first memory block for making a determination at the time of the determination and writes the determination data into the second memory block and a read section that reads the determination data written into the first memory block by the write section for making a determination at the time of the determination and reads the determination data written into the second memory block by the write section. | 2009-08-06 |
20090196109 | RANK SELECT USING A GLOBAL SELECT PIN - Methods, memory devices, and systems are disclosed, such as those for accessing a memory circuit through the use of reduced external pins. With one such system, a single external pin receives a global memory select signal which transmits an access signal for one of a plurality of memory circuits in a system. The memory circuits may be stacked and may also be ranked memory circuits. The global memory select signal may be sent to a counter. Such a counter could count the length of time that the global memory select signal is active, and based on the counting, sends a count signal to a comparator. The comparator may compare the count signal with a programmed value to determine if a specific memory chip and/or port is to be accessed. This configuration may be duplicated over multiple ports on the same memory device, as well as across multiple memory ranks. | 2009-08-06 |
20090196110 | INTEGRATED CIRCUIT, AND METHOD FOR TRANSFERRING DATA - An integrated circuit and a method for transferring data is provided. One embodiment provides a method for transferring data in an integrated circuit. The method includes driving a first line in accordance with data to be transferred. The data is transmitted from the first line to a second line based on a capacitive coupling. | 2009-08-06 |
20090196111 | PAGE BUFFER CIRCUIT OF MEMORY DEVICE AND PROGRAM METHOD - A page buffer circuit of a memory device including a plurality of Multi-Level Cells (MLCs) connected to at least a pair of bit lines includes a Most Significant Bit (MSB) latch, a Least Significant Bit (LSB) latch, a data I/O circuit, an inverted output circuit, a MSB verification circuit, and a LSB verification circuit. The MSB latch is configured to sense a voltage of a sensing node in response to a control signal and store an upper sensing data, and output an inverted upper sensing data, or store an input data and output an inverted input data. The LSB latch is configured to sense a voltage of the sensing node in response to the control signal, and store and output a lower sensing data, or store and output an input data received through the MSB latch. The data I/O circuit is connected to the MSB latch and a data I/O line, and is configured to perform the input and output of a sensing data or the input and output of a program data. | 2009-08-06 |
20090196112 | Block decoding circuits of semiconductor memory devices and methods of operating the same - A block decoding circuit of a semiconductor memory device includes a plurality of block decoders, a plurality of repair address check circuits, a dummy repair address check circuit and a block selection signal generation circuit. The plurality of block decoders are configured to decode a received block selection address. The plurality of repair address check circuits are configured to generate second output signals based on whether a received block selection address and word line selection address are repair addresses. The dummy repair address check circuit is configured to generate a control signal in response to the block selection address and the word line selection address. The block selection signal generation circuit is configured to generate block selection signals based on the first output signals from the plurality of block decoders, the control signal from the dummy repair address circuit, and the second output signals from the repair address check circuits. | 2009-08-06 |
20090196113 | Fuse circuit and semiconductor memory device including the same - The fuse circuit includes a first program unit, a second program unit and a sensing circuit. The first and second program units are programmed simultaneously. The first program unit is programmed in a program mode in response to a fuse program signal and outputs a first signal in a sensing mode, such that the first signal increases when the first program unit is programmed. The second program unit is programmed in the program mode in response to the program signal and outputs a second signal in the sensing mode, such that the second signal decreases when the second program unit is programmed. The sensing circuit generates a sensing output signal in response to the first and second signals, such that the sensing output signal indicates whether or not the program units are programmed. | 2009-08-06 |
20090196114 | Semiconductor storage device - A semiconductor storage device includes: a plurality of I/O terminals configured in a block, and including a representative I/O terminal and a non-representative I/O terminal; a plurality of memory cells each associated with the plurality of I/O terminals to store data; a data input portion to which data to be stored in the plurality of memory cells is input; and a data output portion which outputs data stored in the plurality of memory cells, the data input portion including a branch circuit which distributes the data input to the representative I/O terminal to all of the plurality of memory cells when the data to be stored in the plurality of memory cells is input while in test mode, and the data output portion including: a selection circuit which is connected to the representative I/O terminal, and which selects one of the data output from the plurality of memory cells and outputs the selected data from the representative I/O terminal when the data stored in the plurality of memory cells is output while in the test mode; and a dummy circuit which is provided between the non-representative I/O terminal and the memory cell associated with the non-representative I/O terminal. | 2009-08-06 |
20090196115 | SEMICONDUCTOR DEVICE FOR PREVENTING ERRONEOUS WRITE TO MEMORY CELL IN SWITCHING OPERATIONAL MODE BETWEEN NORMAL MODE AND STANDBY MODE - When an operational mode is shifted to a standby mode, a first transistor is brought into a conduction state by a control signal, and a word line is thereby clamped to a ground voltage. Further, a second transistor is brought into a non-conduction state, and supply of an internal power supply voltage to a word line driver is shut off. Subsequently, the supply of the internal power supply voltage is halted for saving electrical power. When the operational mode returns to a normal mode, the supply of the internal power supply voltage is started, and subsequently, the first transistor is brought into the non-conduction state by the control signal, and the second transistor is thereby brought into the conduction state. | 2009-08-06 |
20090196116 | SEMICONDUCTOR MEMORY HAVING A BANK WITH SUB-BANKS - Methods and apparatus that provide an additional level(s) of hierarchy within a bank of a Dynamic Random Access Memory (DRAM) are provided. The bank has a plurality of separately addressable sub-banks. | 2009-08-06 |
20090196117 | SYSTEM AND METHOD FOR MEMORY ARRAY DECODING - A memory system includes Q memory blocks that each include M memory sub-blocks. The memory system also includes Q word line decoders that each are associated with a different one of the Q memory blocks. The memory system also includes a bit line decoder and Q×M switch modules. Each Q×M switch module selectively controls access to up to J of the M memory sub-blocks of the Q memory blocks. The Q word line decoders and the bit line decoder access less than M memory sub-blocks in at least two of the Q memory blocks during one of a read and write operation. M and Q are integers greater than 1, and J is an integer greater than or equal to 1 | 2009-08-06 |
20090196118 | Design Structure Of Implementing Power Savings During Addressing Of DRAM Architectures - A design structure embodied in a machine readable medium used in a design process includes random access memory device having an array of individual memory cells arranged into rows and columns, each memory cell having an access device associated therewith. Each row of the array further includes a plurality of N word lines associated therewith, with a wherein N corresponds to a number of independently accessible partitions of the array, wherein each access device in a given row is coupled to only one of the N word lines of the row. Logic in signal communication with the array receives a plurality of row address bits and determine, for a requested row identified by the row address bits, which of the N partitions within the requested row are to be accessed, such that access devices within a selected row, but not within a partition to be accessed, are not activated. | 2009-08-06 |
20090196119 | Containing device for containing and holding in a removable manner a closed container for fluid products inside a mixing machine - Containing device for containing and correctly holding closed container ( | 2009-08-06 |
20090196120 | Downhole Measurements of Mud Acoustic Velocity - One or more acoustic transducers are used to measure ultrasonic velocities in the mud in the interior channel of a drill collar. Corrections may be applied for temperature and/or fine grain drill cuttings to get the ultrasonic velocity in the annulus between the drill collar and the borehole wall. The latter velocity may be used for caliper measurements and for correcting measurements made by formation evaluation sensors. | 2009-08-06 |
20090196121 | ULTRASOUND SENSOR, IN PARTICULAR, A MOTOR VEHICLE ULTRASOUND SENSOR - Ultrasound sensor ( | 2009-08-06 |
20090196122 | UNDERWATER ACOUSTIC POSITIONING SYSTEM AND METHOD - A method for determining the position of an underwater device includes placement of a plurality of station keeping devices on or below the surface of the water in known positions. A device to locate is provided for placement below the surface of the water, and the device to locate and the station keeping devices are provided with a synchronized time base and a common acoustic pulse time schedule. Each station keeping device sends an acoustic pulse at a time according to the common acoustic pulse schedule. The device to locate receives pulses sent by the station keeping devices and calculates a distance between itself and each station keeping device based upon the time that the acoustic pulse is sent and the time that the pulse is received. The device to locate then calculates its position based upon the distances between the device to locate and the station keeping devices. Systems and devices are also disclosed. | 2009-08-06 |
20090196123 | Collaborative Appointment and Reminder System - An appointment system for synchronizing disparate electronic calendars of a plurality of remote electronic devices is disclosed. The system includes a primary electronic calendar having a memory for storing information from the remote electronic devices. A processing means processes the information received from remote electronic devices that are connected to an electronic network. The primary electronic calendar utilizes a remote device access means to access each remote electronic device. The primary electronic calendar reads from and writes to each remote electronic calendar through one of the at least one remote device translation means thereby synchronizing the electronic calendar of each remote electronic device with the primary electronic calendar. Appointments, events and reminder maintained on any one of the electronic devices are displayed on all the remote electronic devices associated with the electronic network. | 2009-08-06 |
20090196124 | MODULAR MOVEMENT THAT IS FULLY FUNCTIONAL STANDALONE AND INTERCHANGEABLE IN OTHER PORTABLE DEVICES - A portable device comprising a modular movement is disclosed. The modular movement has a body housing a plurality of layers that include a top layer of glass, and a movement subassembly for displaying information, including time, wherein the modular movement includes all parts necessary for power and operation, including the displaying of the information, such that the modular movement is fully functional standalone. The portable device further includes a case, which includes a receptacle for removably receiving the modular movement without need for a tool, such that the modular movement is user-interchangeable with another case of another portable device. | 2009-08-06 |
20090196125 | WRISTWATCH GEAR AND METHOD FOR MANUFACTURING WRISTWATCH GEAR - The center wheel and pinion has a center shaft provided with a center pinion that is formed from a crystalline metal, and a center tooth part composed of a metallic glass alloy that is integrally formed with the center shaft. The center shaft has a center pinion and other external peripheral regions that are formed by cutting the external periphery of a cylindrical member provided with a support hole. The external periphery of the coupling part to which the center tooth part is coupled is formed in a quadrangular shape. The center tooth part composed of a metallic glass alloy has a tooth continuously formed at the disc-shaped external periphery, and a center position that is integrally formed surrounding the entire external periphery of the quadrangular-shaped coupling part of the center shaft. | 2009-08-06 |
20090196126 | Method for buffering audio data in optical disc systems in case of mechanical shocks or vibrations - Method for buffering audio data in optical recording media, and apparatus using such method for reading from and/or writing to optical recording media in case of an error condition (e.g. upon shock or vibration). It comprises the steps of, as audio data is read from a position on the medium prior to a position corresponding to a verified write position in the memory and in case writing to the memory is inhibited; counting the number of samples read; searching for two subsequent markers distant of one frame (to take into account the case where a marker could be corrupted); determining the remaining distance to the verified write position based on the sample count; restarting writing the audio data to the memory when the data read from the medium corresponds to the verified write position. | 2009-08-06 |
20090196127 | OPTICAL RECORDING HEAD AND OPTICAL RECORDING APPARATUS - Provided is an optical recording head in which a light beam from a light source is collected by an optical element and reflected on a reflecting surface to be formed into a spot light. Since a support portion for supporting the light source of the optical element at a predetermined position and the reflection surface for reflecting the light beam are formed integrally with each other, it is not required to perform the positioning thereof, and light can be collected to a very small spot with high efficiency, and an optical recording head and an optical recording apparatus having low heights can be provided. | 2009-08-06 |
20090196128 | THERMALLY ASSISTED RECORDING SYSTEMS WITH LOW LOSS LIGHT REDIRECTION STRUCTURE - A system according to one embodiment comprises a slider having a first light channel and a second light channel, the first and second light channels having axes oriented at an angle relative to each other, the angle being less than 180 degrees; and a reflection portion adjacent an exit of the first light channel and an entrance to the second light channel, the reflection portion having an index of refraction that is different than an index of refraction of the first light channel, such that light from the first light channel is reflected into the second light channel. Additional systems and methods are provided. | 2009-08-06 |
20090196129 | ATMOSPHERIC PRESSURE MEASURING APPARATUS AND METHOD OF MEASURING ATMOSPHERIC PRESSURE - An atmospheric pressure measuring apparatus allows a transmitter to transmit an acoustic wave for measurement of the atmospheric pressure. Air propagates the acoustic wave. A receiver receives the acoustic wave. Since the intensity of the acoustic wave changes to follow the variation of the atmospheric pressure, the atmospheric pressure can be measured based on the intensity of the acoustic wave received at the receiver. The atmospheric pressure is in this manner measured with such a simplified structure. | 2009-08-06 |
20090196130 | INFORMATION RECORDING/REPRODUCING APPARATUS - The present invention is directed to improve precision of tracking correction and focus correction while assuring stability of the tracking correction and focus correction during recording/reproducing of data to/from an optical disk. | 2009-08-06 |
20090196131 | SYSTEM AND METHOD FOR PRINTING VISIBLE IMAGE ONTO OPTICAL DISC THROUGH TUNING DRIVING SIGNAL OF OPTICAL PICK-UP UNIT - A system and method for printing a visible image onto an optical disc through tuning a driving signal of an optical pick-up unit are disclosed. The system includes a driving circuit, coupled to the optical pick-up unit, for providing a driving signal to drive the optical pick-up unit; and an adjusting circuit, coupled to the driving circuit, for controlling the driving circuit to adjust the driving signal according to a rotation source signal corresponding to a rotation of the optical disc. | 2009-08-06 |
20090196132 | Method for Improving Focus Accuracy of an Optical Pickup Head - The present invention discloses a method used in an optical disk drive for improving focus accuracy of an optical pickup head. Firstly, during each one revolution of the optical disk, RF | 2009-08-06 |
20090196133 | SIGNAL PROCESSING APPARATUS FOR OPTICAL DISC AND METHOD THEREOF - A signal processing apparatus for an optical disc with a first type region and a second type region includes a processing module and a determining unit. The processing module is used for transforming an input signal to generate a first output signal according to a first amplifying gain, or to amplify the input signal to generate a second output signal according to a second amplifying gain, wherein the input signal is derived from an optical pickup head. The determining unit is coupled to the processing module and arranged to control the processing module to output the first output signal when the input signal is derived from the first type region. Also, the determining unit outputs the second output signal when the input signal is derived from the second type region. | 2009-08-06 |
20090196134 | REPRODUCTION UNIT AND REPRODUCTION METHOD IN REPRODUCTION UNIT - According to one embodiment, a reproduction unit of a recording medium in which in a field where a pattern signal repeated by a fixed frequency is recorded, reproduction data is recorded so that an integral multiple of a minimum unit of a pattern thereof is a one-byte unit, the reproduction unit includes a detection section for defecting a minimum unit pattern from the pattern signal, a synchronization code determination section for determining a synchronization code following the pattern signal and predicting head timing of data following the synchronization code, a pattern forming section for forming an integral number of phase pattern signals from the minimum unit pattern detected by the detection section, and timing coincidence determination section for determining whether each of the integral number of phase pattern signals coincides with the head timing of the data predicted by the synchronization code determination section. | 2009-08-06 |
20090196135 | WRITE-ONCE OPTICAL DISC, AND METHOD AND APPARATUS FOR RECORDING/REPRODUCING DATA ON/FROM THE OPTICAL DISC - A write-once recording medium structure and an apparatus and method for recording final management information on the recording medium, are provided. The recording medium includes a temporary defect management area (TDMA) and a defect management area (DMA). The method includes transferring information recorded in the TDMA to the DMA of the recording medium and recording the transferred information in the DMA as final management information. The final management information includes at least one defect list and either space bit map information or sequential recording range information. The position information on one or all valid defect lists is recorded in the DMA. | 2009-08-06 |
20090196136 | RECORDABLE TYPE INFORMATION RECORDING MEDIUM, INFORMATION RECORDING APPARATUS, AND INFORMATION RECORDING METHOD - In a recording disc, a straight groove ( | 2009-08-06 |
20090196137 | METHOD OF DETECTING BAD SERVO TRACK IN HARD DISK DRIVE - A method of detecting a bad servo track of an HDD includes measuring servo AGC of each of servo sectors of a servo track requiring determination of badness, calculating statistic data with respect to the measured servo AGC of each servo sector, and determining whether the servo track is bad based on the calculated statistic data. Since the badness of a servo track is determined based on the statistic data of the servo AGC, a bad servo track generated due to a change in the overall magnitude of a servo signal is easily detected so that reliability in the detection of a detective servo track can be improved. | 2009-08-06 |
20090196138 | INFORMATION RECORDING APPARATUS AND CONTROL METHOD THEREOF - According to one embodiment, in one embodiment of the invention, a laser drive circuit is provided with a first current source, a second drive current source, and a third current source. The control section selectively obtains a plurality of laser light use mode of controlling the from first to third current sources to use pulse laser light accompanying relaxation oscillation, and a complex laser light use mode of using laser light where laser pulses are combined, whose starting end has an abrupt impulse change portion caused by relaxation oscillation and whose intermediate section is a flat portion with a fixed intensity. | 2009-08-06 |
20090196139 | APPARATUS, SYSTEM, AND METHOD FOR LOCATING AND FAST-SEARCHING UNITS OF DIGITAL INFORMATION IN VOLUME, OPTICAL-STORAGE DISKS - An apparatus, system, and method are disclosed to locate a group of units of digital information in a volume, optical-storage disk. The apparatus includes a first optical recording layer, a second optical recording layer, and an optical disk reading sled. The first optical recording layer stores a first group of units of digital information in a distinct region of the optical disk. The second optical recording layer stores a first locator for the first group of units of digital information in substantially the same distinct region of the optical disk. A first laser in the optical disk reading sled reads the first locator stored in the second optical recording layer, which indicates the contents of the units of digital information stored in the first optical recording layer being read by a second laser, also in the optical disk reading sled. | 2009-08-06 |
20090196140 | OPTICAL DISC, OPTICAL DISC MANUFACTURING METHOD, OPTICAL DISC RECORDING DEVICE AND OPTICAL DISC REPRODUCTION DEVICE - Sub-information necessary to reproduce main information is recorded without deteriorating the reading accuracy of the main information, so that the illegal duplication of an optical disc is prevented. An optical disc | 2009-08-06 |
20090196141 | OPTICAL RECORDING MEDIUM, METHOD FOR UTILIZING DYE COMPOUND AND VISIBLE INFORMATION RECORDING METHOD - An optical recording medium has a constitution wherein a visible information recording medium section and an information recording medium section are bonded through a bonding layer. The visible information recording medium section has a constitution wherein a visible information recording layer, a first reflection layer and a first protection layer are stacked on a first substrate. The information recording medium section has a constitution wherein an information recording layer, a second reflection layer and a second protection layer are stacked on a second substrate having a pregroove formed on the surface. The visible information recording layer contains at least one dye compound among a yellow dye compound, magenta dye compound and a cyan dye compound. | 2009-08-06 |
20090196142 | INFORMATION RECORDING MEDIUM, INFORMATION RECORDING METHOD, AND INFORMATION RECORDING AND REPRODUCING APPARATUS - According to one embodiment, in an information recording medium for which a phase change material is used and in which information is recorded on, reproduced from, and erased from a recording layer by light irradiation, a recrystallization width WR at a periphery of an amorphous recording mark formed on the recording layer by light irradiation, and a recording mark width WA and a track pitch TP satisfy 1.02009-08-06 | |
20090196143 | Method and System for Command-Ordering for a Disk-to-Disk-to-Holographic Data Storage System - A system, method and computer program product for managing command ordering for a host-Disk-to-intermediate-Disk-to-Holographic (D2D2H) data storage system. Specifically, a command ordering detects a command from a host system. A hologram segment associated with the detected command is identified and a determination is made whether the hologram segment is an open hologram segment or a closed hologram segment. A determination is made whether the detected command is to be prioritized. If the detected command is prioritized, the detected command is added to a prioritized command queue. Moreover, if the detected command is not prioritized, the detected command is added to a normal command queue. The detected commands addressing the same hologram segment are then grouped. The execution of one or more grouped commands (prioritized or normal) is deferred for a predetermined period to allow for additional commands to be received for a same command group. | 2009-08-06 |
20090196144 | Method and System for Command-Ordering and Command-Execution Within a Command Group for a Disk-to-Disk-to-Holographic Data Storage System - A system, method and computer program product for managing command ordering and command execution for a host-Disk-to-intermediate-Disk-to-Holographic (D2D2H) data storage system. Specifically, a command ordering and execution (COE) utility selects the command group from a command queue. A determination is made whether the command group includes a write command for writing an entire hologram segment. Responsive to a determination that the command group does not include the write command for writing the entire hologram segment, the entire hologram segment is read to an intermediate system disk. Conflicting commands are then sorted from non-conflicting commands. Specifically, all conflicting write commands are executed before all conflicting read commands. After execution, the entire hologram segment of the intermediate system disk is closed and written in holographic medium. | 2009-08-06 |
20090196145 | OPTICAL INFORMATION RECORDING/REPRODUCING APPARATUS, OPTICAL INFORMATION REPRODUCING APPARATUS, AND OPTICAL INFORMATION RECORDING MEDIUM - An optical information recording/reproducing apparatus includes an irradiation optical system of an information beam to an optical information recording medium that can record information as hologram by using interference fringes produced due to interference between the information beam that carries the information and a reference beam; a first light-reducing element placed in an optical path of the irradiation optical system of the information beam and reduces light intensity of part of the information beam; a detector that detects a reproduction beam emitted from the optical information recording medium; and a second light-reducing element placed in an optical path of the reproduction beam extending from the optical information recording medium to the detector, and that reduces light intensity of the reproduction beam emitted from a first area other than a second area, in which information is recorded with the information beam of which light intensity is reduced by the first light-reducing element. | 2009-08-06 |
20090196146 | OPTICAL PICKUP APPARATUS - An optical pickup apparatus comprising: a diffraction grating that a laser beam enters, the diffraction grating being configured to generate a main beam that is 0th order light and sub-beams that are +1st order diffracted light and −1st order diffracted light; an objective lens configured to focus the main beam and the sub-beams onto a signal recording layer; a main-beam light-receiving portion that the main beam reflected by the signal recording layer is applied to; and sub-beam light-receiving portions that the sub-beams reflected by the signal recording layer are respectively applied to, each light-receiving area of the sub-beam light-receiving portions being smaller than a light-receiving area of the main-beam light-receiving portion. | 2009-08-06 |
20090196147 | Optical pickup apparatus - An optical pickup apparatus for information recording and/or reproduction on different optical information recording media with compatibility among these media, the optical surface of a first objective lens and the optical surface of a second objective lens are formed only of a refractive surface. The second objective lens is used in common for the first light flux with a wavelength of λ | 2009-08-06 |
20090196148 | MASTER RECORDING APPARATUS AND MASTER RECORDING METHOD - According to one embodiment, the invention provides a master recording apparatus and method which can form a pit having a symmetrical pit shape with excellent reproducibility. An embodiment of the invention is a master recording apparatus where a resist film on a master for an optical disk is irradiated with irradiation light from a semiconductor laser to record information on the resist film, where the resist film is formed as an inorganic resist film, and means for outputting the irradiation light from the semiconductor laser as a short pulse laser with a pulse width between 200 ps and 1 ns is provided. | 2009-08-06 |
20090196149 | Optical pickup apparatus - In order to provide an optical pickup apparatus that has a relatively simple configuration and that can carry out recording and/or reproduction of information in a s compatible manner for different optical information storage medium, the optical surface of the first objective lens OBJ | 2009-08-06 |
20090196150 | Multi-stage lens driving device - A multi-stage lens driving device for driving an optical lens so as to perform the functions of zooming and/or focusing comprises: a front cover, a rear cover, a plurality of yokes, a plurality of driving coils, a lens seat, and a plurality of permanent magnets. The front cover is a hollow annular cover having a plurality of recesses formed on an inner periphery thereof and a plurality of holders on an outer periphery thereof. The rear cover can be combined with the front cover, thereby forming a receiving space therebetween. The lens seat is a hollow housing disposed in the receiving space. The yokes are provided in the recesses formed on the inner periphery of the front cover. The permanent magnets are surrounding and embedded in an outer periphery of the lens seat, disposed in correspondence to the yokes and spaced therefrom by a predetermined distance. The driving coils are provided respectively on the holders of the front cover, and correspond respectively to the yokes received in the recesses. When predetermined impulse currents of different directions are applied to the driving coils respectively, polarities of corresponding yokes are reversed, respectively. By virtue of magnetic attraction between the permanent magnets and the yokes, rotation of the lens seat in the receiving space is converted to linear axial translation. | 2009-08-06 |
20090196151 | OPTICAL PICKUP DEVICE, OPTICAL PICKUP CONTROLLER AND OPTICAL PICKUP CONTROL METHOD - An optical pickup device such that the driving force of the drive unit provided on the same optical base as that of the objective lens exerts no adverse influence on controlling of the objective lens is provided. The optical pickup device | 2009-08-06 |
20090196152 | QUARTER-WAVE PLATE, AND OPTICAL PICKUP DEVICE - A quarter-wave plate includes a base member including a ridge and trough periodic structure with a structural period of λ | 2009-08-06 |
20090196153 | TRACKING ERROR SIGNAL GENERATION METHOD AND OPTICAL DISC APPARATUS - According to one embodiment, it is possible to obtain a compensation SPP signal, which compensates a push-pull signal obtained by a ± first-order light or a lens shift compensation signal generated by other method according to phases of a motor to rotate a recording medium, from a MPP signal which is a component indicating the amount of de-tract in a reflected light from any one of recording layers of an optical disc detected by a photodetector, and it is possible to obtain a tracking signal with a high signal-to-noise ratio, by the following equation by using a compensation SPP signal and a MPP signal: | 2009-08-06 |
20090196154 | METHOD FOR MANUFACTURING A BEARING MECHANISM, ELECTRIC MOTOR AND STORAGE DISK DRIVE APPARATUS - A method for manufacturing a bearing mechanism used in an electric motor includes (a) inserting an annular member into a substantially cylindrical closed-bottom cup member to bring a first end portion of a shaft fitted to the annular member into contact with a thermoplastic resin member arranged on an inner bottom surface of the cup member, bringing the annular member into contact with the shaft in a direction leading from an opening of the cup member to a bottom portion of the cup member, and fixing the annular member to the cup member; and (b) deforming the resin member by externally heating the bottom portion of the cup member and applying a load acting toward the bottom portion on a second end portion of the shaft. Further, an electric motor includes a rotor unit, a stator unit, and the bearing mechanism manufactured by this method. | 2009-08-06 |
20090196155 | INFORMATION RECORDING MEDIUM - An information recording medium ( | 2009-08-06 |
20090196156 | HIGH-SPEED OPTICAL DISK DRIVE - If the read speed is increased while high-frequency modulated carrier is fixed at a constant frequency, it becomes difficult to separate the read signal from the carrier by using bandwidth limitation of the analog system because the upper limit of the read signal band nears to the carrier frequency. Moreover, if the separation between them is eased by raising the carrier frequency, a problem that write-waveform controls become difficult arises. However, the carrier amplitude can be suppressed simultaneously preventing leakage to the read signal band by converting the carrier frequency into the stop-band of the adaptive equalizer by making the use of aliasing that occurs at the A/D conversion. | 2009-08-06 |
20090196157 | INFORMATION RECORDING MEDIUM - According to one embodiment, an information recording medium includes a substrate, a phase-change recording layer formed on the substrate, and a reflecting layer formed on the phase-change recording layer. The phase-change recording layer contains tellurium and antimony or bismuth as main components, has a crystallization rate of 2 to 10 ns, and forms a recording mark by changing its crystal state when irradiated with a light pulse having a half-width of 200 ps to 1 ns. | 2009-08-06 |
20090196158 | Optical Disk for an Identification Element - The present invention relates to an optical disk comprising:
| 2009-08-06 |
20090196159 | WRITE-ONCE INFORMATION RECORDING MEDIUM AND DISK APPARATUS - According to one embodiment, a write-once information recording medium includes a transparent resin substrate having concentric or spiral grooves and lands, and a recording film formed on the grooves and lands of the transparent resin substrate, wherein the recording film includes an organic dye layer containing a metal complex monomer and a metal complex polymer, a recording mark is formed in the organic dye layer by emission of a short-wavelength laser beam, and a light reflectance of the recording mark formed by emission of the short-wavelength laser beam is higher than that before emission of the short-wavelength laser beam, and the grooves wobble within a predetermined amplitude range. | 2009-08-06 |
20090196160 | Coating for Optical Discs - An energy-curable flowable coating composition comprising a surface treated inorganic nanoparticle, a photoinitiator, and at least one energy-curable monomer, oligomer or resin. The energy-curable flowable coating can be used as a covering layer of optical discs, and is especially suited for use as a 100 micron cover layer of a Blu-Ray disc, having enhanced scratch resistance and reduced shrinkage. | 2009-08-06 |