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31st week of 2017 patent applcation highlights part 66
Patent application number
Title
Published
20170221842
POWER SEMICONDUCTOR DEVICE LOAD TERMINAL
2017-08-03
20170221843
Semiconductor Devices and Methods of Manufacture Thereof
2017-08-03
20170221844
SEMICONDUCTOR DEVICE WITH THIN REDISTRIBUTION LAYERS
2017-08-03
20170221845
Packaging Devices and Methods of Manufacture Thereof
2017-08-03
20170221846
OPEN-PASSIVATION BALL GRID ARRAY PADS
2017-08-03
20170221847
MICROELECTRONIC SUBSTRATE HAVING EMBEDDED TRACE LAYERS WITH INTEGRAL ATTACHMENT STRUCTURES
2017-08-03
20170221848
CIRCUIT SUBSTRATE AND METHOD FOR MANUFACTURING CIRCUIT SUBSTRATE
2017-08-03
20170221849
ENCAPSULATED ELECTRONIC DEVICE MOUNTED ON A REDISTRIBUTION LAYER
2017-08-03
20170221850
SEMICONDUCTOR DEVICE INCLUDING BUILT-IN CRACK-ARRESTING FILM STRUCTURE
2017-08-03
20170221851
Laser-Induced Forming and Transfer of Shaped Metallic Interconnects
2017-08-03
20170221852
SINTERING TOOL FOR THE LOWER DIE OF A SINTERING DEVICE
2017-08-03
20170221853
ELECTRODE TERMINAL, SEMICONDUCTOR DEVICE, AND POWER CONVERSION APPARATUS
2017-08-03
20170221854
THERMOCOMPRESSION BONDING SYSTEMS AND METHODS OF OPERATING THE SAME
2017-08-03
20170221855
METAL PASTE AND USE THEREOF FOR THE CONNECTING OF COMPONENTS
2017-08-03
20170221856
METHOD FOR BONDING SUBSTRATES TOGETHER, AND SUBSTRATE BONDING DEVICE
2017-08-03
20170221857
Attaching chip attach medium to already encapsulated electronic chip
2017-08-03
20170221858
Tri-Layer CoWoS Structure
2017-08-03
20170221859
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
2017-08-03
20170221860
MULTI-CHIP PACKAGE STRUCTURE, WAFER LEVEL CHIP PACKAGE STRUCTURE AND MANUFACTURING PROCESS THEREOF
2017-08-03
20170221861
Method for Through Silicon via Structure
2017-08-03
20170221862
COOLING SYSTEM FOR 3D IC
2017-08-03
20170221863
Semiconductor Device and Method
2017-08-03
20170221864
LED PACKAGE
2017-08-03
20170221865
Packaging a Substrate with an LED into an Interconnect Structure Only Through Top Side Landing Pads on the Substrate
2017-08-03
20170221866
SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME
2017-08-03
20170221867
SEMICONDUCTOR DEVICE
2017-08-03
20170221868
MANUFACTURING METHODS SEMICONDUCTOR PACKAGES INCLUDING THROUGH MOLD CONNECTORS
2017-08-03
20170221869
METHOD OF PRODUCING OPTOELECTRONIC COMPONENT WITH INTEGRATED PROTECTION DIODE
2017-08-03
20170221870
LIGHT EMITTING DEVICE PACKAGE
2017-08-03
20170221871
SYSTEMS AND METHODS FOR MANUFACTURING ELECTRONIC DEVICES
2017-08-03
20170221872
MANUFACTURE OF WAFER - PANEL DIE PACKAGE ASSEMBLY TECHNOLOGY
2017-08-03
20170221873
APPARATUSES AND METHODS FOR FORMING DIE STACKS
2017-08-03
20170221874
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
2017-08-03
20170221875
DIODE DEVICE OF TRANSIENT VOLTAGE SUPPRESSOR AND MANUFACTURING METHOD THEREOF
2017-08-03
20170221876
ELECTROSTATIC DISCHARGE PROTECTION SEMICONDUCTOR DEVICE
2017-08-03
20170221877
SEMICONDUCTOR DEVICE AND CIRCUIT
2017-08-03
20170221878
SEMICONDUCTOR DEVICE HAVING ESD ELEMENT
2017-08-03
20170221879
ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT WITH LEAKAGE CURRENT REDUCTION AND ASSOCIATED ELECTROSTATIC DISCHARGE PROTECTION METHOD
2017-08-03
20170221880
TUNABLE DEVICE HAVING A FET INTEGRATED WITH A BJT
2017-08-03
20170221881
INSULATED GATE BIPOLAR TRANSISTOR (IGBT) AND RELATED METHODS
2017-08-03
20170221882
SWITCH IMPROVEMENT USING LAYOUT OPTIMIZATION
2017-08-03
20170221883
SEMICONDUCTOR DEVICE
2017-08-03
20170221884
VERTICALLY STACKED NANOWIRE FIELD EFFECT TRANSISTORS
2017-08-03
20170221885
Electric Circuit Including a Semiconductor Device with a First Transistor, a Second Transistor and a Control Circuit
2017-08-03
20170221886
TRANSISTOR CONTACTS SELF-ALIGNED IN TWO DIMENSIONS
2017-08-03
20170221887
BIPOLAR JUNCTION TRANSISTORS WITH EXTRINSIC DEVICE REGIONS FREE OF TRENCH ISOLATION
2017-08-03
20170221888
METHOD OF FORMING SUPER STEEP RETROGRADE WELLS ON FINFET
2017-08-03
20170221889
GATE STACK FOR INTEGRATED CIRCUIT STRUCTURE AND METHOD OF FORMING SAME
2017-08-03
20170221890
METHOD AND DEVICE OF PREVENTING MERGING OF RESIST-PROTECTION-OXIDE (RPO) BETWEEN ADJACENT STRUCTURES
2017-08-03
20170221891
SEMICONDUCTOR DEVICE AND A METHOD FOR FABRICATING THE SAME
2017-08-03
20170221892
METHOD TO IMPROVE DEVICE PERFORMANCE FOR FINFET
2017-08-03
20170221893
INTEGRATED CIRCUIT DEVICE AND METHOD OF FABRICATING THE SAME
2017-08-03
20170221894
Field Effect Transistor Contact with Reduced Contact Resistance
2017-08-03
20170221895
DIELECTRIC LINER ADDED AFTER CONTACT ETCH BEFORE SILICIDE FORMATION
2017-08-03
20170221896
DILUTED DRIFT LAYER WITH VARIABLE STRIPE WIDTHS FOR POWER TRANSISTORS
2017-08-03
20170221897
SEMICONDUCTOR INTEGRATED CIRCUIT LAYOUT STRUCTURE
2017-08-03
20170221898
HIGH-K GATE DIELECTRIC AND METAL GATE CONDUCTOR STACK FOR FIN-TYPE FIELD EFFECT TRANSISTORS FORMED ON TYPE III-V SEMICONDUCTOR MATERIAL AND SILICON GERMANIUM SEMICONDUCTOR MATERIAL
2017-08-03
20170221899
Microcontroller System
2017-08-03
20170221900
Method of Maintaining the State of Semiconductor Memory Having Electrically Floating Body Transistor
2017-08-03
20170221901
METHODS OF FORMING BURIED VERTICAL CAPACITORS AND STRUCTURES FORMED THEREBY
2017-08-03
20170221902
METHOD AND SYSTEM FOR FORMING MEMORY FIN PATTERNS
2017-08-03
20170221903
METHOD TO FORM LOCALIZED RELAXED SUBSTRATE BY USING CONDENSATION
2017-08-03
20170221904
Two-Port SRAM Structure
2017-08-03
20170221905
SRAM CELL AND LOGIC CELL DESIGN
2017-08-03
20170221906
Method for Semiconductor Device Fabrication with Improved Source Drain Proximity
2017-08-03
20170221907
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
2017-08-03
20170221908
METHOD AND STRUCTURE FOR FINFET SRAM
2017-08-03
20170221909
METHOD TO IMPROVE FLOATING GATE UNIFORMITY FOR NON-VOLATILE MEMORY DEVICE
2017-08-03
20170221910
ONE-TIME-PROGRAMMING (OTP) MEMORY CELL WITH FLOATING GATE SHIELDING
2017-08-03
20170221911
FLASH MEMORY AND METHOD OF FABRICATING THE SAME
2017-08-03
20170221912
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
2017-08-03
20170221913
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE
2017-08-03
20170221914
NONVOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
2017-08-03
20170221915
NON-VOLATILE MEMORY DEVICES INCLUDING VERTICAL NAND CHANNELS AND METHODS OF FORMING THE SAME
2017-08-03
20170221916
Flash Memory
2017-08-03
20170221917
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
2017-08-03
20170221918
NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURE THEREOF
2017-08-03
20170221919
SEMICONDUCTOR DEVICE
2017-08-03
20170221920
SEMICONDUCTOR MEMORY DEVICE
2017-08-03
20170221921
VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME
2017-08-03
20170221922
SEMICONDUCTOR DEVICE
2017-08-03
20170221923
DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME
2017-08-03
20170221924
Method for Manufacturing TFT, Array Substrate and Display Device
2017-08-03
20170221925
DISPLAY PANEL, ARRAY SUBSTRATE, AND FABRICATION METHOD THEREOF
2017-08-03
20170221926
METALLIZED JUNCTION FINFET STRUCTURES
2017-08-03
20170221927
DISPLAY SUBSTRATE AND WEARABLE DEVICE
2017-08-03
20170221928
ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
2017-08-03
20170221929
MANUFACTURE METHOD OF LOW TEMPERATURE POLY-SILICON TFT SUBSTRATE AND LOW TEMPERATURE POLY-SILICON TFT SUBSTRATE
2017-08-03
20170221930
THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
2017-08-03
20170221931
SEMICONDUCTOR DEVICE
2017-08-03
20170221932
E-BOOK READER
2017-08-03
20170221933
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
2017-08-03
20170221934
DISPLAY DEVICE
2017-08-03
20170221935
ARRAY SUBSTRATE AND DISPLAY DEVICE
2017-08-03
20170221936
DISPLAY APPARATUS AND ELECTRONIC APPARATUS
2017-08-03
20170221937
EXPOSURE MASK AND METHOD OF MANUFACTURING A SUBSTRATE USING THE EXPOSURE MASK
2017-08-03
20170221938
ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE
2017-08-03
20170221939
FUNCTIONAL ELEMENT AND ELECTRONIC APPARATUS
2017-08-03
20170221940
SEMICONDUCTOR STRUCTURE AND IMAGE SENSOR
2017-08-03
20170221941
BACKSIDE ILLUMINATED (BSI) CMOS IMAGE SENSOR (CIS) WITH A RESONANT CAVITY AND A METHOD FOR MANUFACTURING THE BSI CIS
2017-08-03