30th week of 2011 patent applcation highlights part 18 |
Patent application number | Title | Published |
20110181244 | Charging contact array for enabling parallel charging and series discharging of batteries - A contact array arrangement which both receives charging current for charging batteries of a battery pack, and which also breaks the parallel charging contact position (contact configuration in which individual batteries of the battery pack are charged in parallel) then reestablishes series connection of the batteries when a charge electrode array is urged against the contact array arrangement and when the charge electrode array is removed. A cover covering the contact array may be connected by throughbolts to a support supporting series connection contacts such that depressing the cover by imposing a downward force (e.g., the weight of a charge electrode array), moves the series connection contacts out of contact with those contacts receiving charge current. Springs return the series connection contacts to the series condition. Charge conductors fixed to the contact array pass through or by the series connection such that a very compact device results. | 2011-07-28 |
20110181245 | UNITIZED CHARGING AND DISCHARGING BATTERY MANAGEMENT SYSTEM AND PROGRAMMABLE BATTERY MANAGEMENT MODULE THEREOF - The present invention discloses a unitized charging and discharging battery management system and a programmable battery management module thereof The unitized charging and discharging battery management system includes a smart battery module and a programmable battery management module, which has a universal loop and a control unit. The smart battery module has at least two smart batteries which are electrically connected by a plurality of switches and circuits of the universal loop to form a charging/discharging loop in series/parallel. The control unit monitors the charging and discharging status of the smart batteries to turn on or off the switches accordingly, so as to manage the smart batteries, thereby enhancing the overall power efficacy of the smart battery module. Besides, the service life of the smart battery module is also prolonged due to the simultaneous charging and discharging capability. | 2011-07-28 |
20110181246 | BATTERY MANAGEMENT SYSTEM AND DRIVING METHOD THEREOF - A battery management system and a driving method thereof are provided for detecting a short battery cell. The battery management system includes a main control unit (MCU) and a cell balancing unit. The MCU transmits a battery cell control signal for controlling charge and discharge of the battery cells. The cell balancing unit balances the battery cells according to the battery cell control signal. The MCU includes a cell balancing discharge amount measurement unit and a controller. The cell balancing discharge amount measurement unit measures a cell balancing discharge amount of each of the battery cells. The controller compares a difference value between a maximum value among the cell balancing discharge amounts of the battery cells and each of the cell balancing discharge amounts to determine a short battery cell. | 2011-07-28 |
20110181247 | Secondary battery - A secondary battery includes a plurality of battery cells and measures voltages of the battery cells. The secondary battery includes a capacitive device, a relay and an A/D converter. The capacitive device is connected to the battery cells to sequentially store the voltages of the battery cells. The relay is between the battery cells and the capacitive device, and sequentially connects the battery cells to the capacitive device. The A/D converter is connected to the capacitive device to receive and convert the voltages of the battery cells. | 2011-07-28 |
20110181248 | BATTERY MANAGEMENT APPARATUS - A battery management apparatus for a motor vehicle battery, wherein the battery includes a plurality of series-connected battery cells, wherein the apparatus includes a device for determining a cell voltage for each battery cell in the battery, wherein the apparatus compares the determined cell voltages of the battery cells with one another and processes them such that, if the cell voltage of at least one battery cell is greater than a first limit value and, furthermore, if the cell voltage of at least one battery cell differs from the cell voltage of the or each other battery cell by more than a defined second limit value, the apparatus uses the lowest cell voltage of the battery cells as the reference voltage, and it discharges the or each other battery cell with a higher cell voltage in order to balance the voltage between the battery cells at the reference voltage. | 2011-07-28 |
20110181249 | CHARGING METHOD AND CHARGER FOR NON-AQUEOUS ELECTROLYTE SECONDARY BATTERY - In a charging method for a non-aqueous electrolyte secondary battery which comprises a positive electrode including a lithium-containing composite oxide as an active material, a negative electrode including a material capable of charging and discharging lithium ions as an active material, and a non-aqueous electrolyte, an open circuit voltage of the secondary battery is detected. When the detected value is smaller than a predetermined voltage x, charging is performed at a comparatively small current value B. When the detected value is equal to or greater than the predetermined voltage x and smaller than a predetermined voltage z, charging is performed at a comparatively great current value A. When the detected value is equal to or greater than the predetermined voltage z and smaller than a predetermined voltage y, charging is performed at a comparatively small current value C. When the detected value is greater than the predetermined voltage y, constant-voltage charging is performed or charging is terminated. Here, x2011-07-28 | |
20110181250 | POWER SUPPLY APPARATUS - A power supply apparatus includes: an AC generator including an AC generating section, and a rectifier for rectifying an AC voltage generated in the AC generating section, and outputting a DC voltage; and a DC/DC converter for converting the output voltage of the rectifier into a DC voltage having a different voltage value, wherein the output voltage of the rectifier is set to be larger than the output voltage of the DC/DC converter in accordance with the rotation speed of the AC generating section and the amount of power supply to an electrical load connected to the DC/DC converter, and is stepped down and outputted by using the DC/DC converter. The power supply apparatus is capable of increasing an output power efficiently. | 2011-07-28 |
20110181251 | Alternative Switch Power Circuitry Systems - Reliability enhanced systems are shown where an short-lived electrolytic capacitor can be replaced by a much smaller, perhaps film type, longer-lived capacitor to be implemented in circuits for power factor correction, solar power conversion, or otherwise to achieve DC voltage smoothing with circuitry that has solar photovoltaic source ( | 2011-07-28 |
20110181252 | Driving Circuit for Depletion Mode Semiconductor Switches - A driving circuit for a half bridge utilizing bidirectional semiconductor switches in accordance with an embodiment of the present application includes a high side driver operable to control a high side bidirectional semiconductor switch, wherein the high side driver provides a negative bias voltage to the bidirectional semiconductor switch to turn the high side bidirectional semiconductor switch OFF. A low side driver may be operable to control a low side bidirectional semiconductor switch. An external voltage source with a negative terminal of the voltage source connected to the high side driver may be provided. A high side driving switch may be positioned between the negative terminal of the voltage source and the high side driver and operable to connect the high side driver to the negative terminal of the voltage source when the low side driver turns the low side bidirectional semiconductor switch ON. | 2011-07-28 |
20110181253 | SYSTEM AND METHOD FOR HIGH PRECISION CURRENT SENSING - An apparatus for sensing an input current through an inductor includes an RC circuit connected in parallel with the inductor across first and second input pins of an integrated circuit. A voltage monitoring circuit monitors a first voltage at the first input pin of the integrated circuit and monitors a second voltage at the second input pin of the integrated circuit. An op-amp compares the first voltage with the second voltage and generates a control output responsive to the comparison. A current sink circuit responsive to the indication controls the first voltage to substantially equal the second voltage. | 2011-07-28 |
20110181254 | DIRECT CURRENT (DC) CORRECTION CIRCUIT FOR A TIME OF FLIGHT (TOF) PHOTODIODE FRONT END - A system and method that compensates for the effects of ambient light in a time of flight (TOF) sensor front end is provided. Moreover, a direct current (DC) correction loop is utilized at the front end, which removes a DC component from a current generated by the TOF sensor and accordingly prevents saturating the front end. The DC correction loop attenuates the DC component without adding significant thermal noise at a modulation frequency and provides a corrected signal to the front end circuitry. The corrected signal is processed and utilized to detect a position of an object within the optical field of the sensor. | 2011-07-28 |
20110181255 | SEMICONDUCTOR DEVICE AND POWER SUPPLY UNIT USING THE SAME - In a power supply unit having high-side and low-side switching elements each including power MOSFETs connected in parallel, the power MOSFETs are controlled so that the number of the transistors in an off state is increased as an output current becomes lower, and particularly, the transistors turned off when the output current is low are disposed on an outer side of a loop formed from a positive terminal of an input capacitor of a printed board to a negative terminal of the input capacitor via the switching elements. Thus, by turning off packages of the power MOSFETs disposed on an outer side of the main circuit loop and turning on packages of the power MOSFETs disposed on an inner side of the loop, the parasitic inductance of a main circuit is reduced, so that the switching loss can be reduced and efficiency in a light load can be improved. | 2011-07-28 |
20110181256 | Current Controlled Current Source, and Methods of Controlling a Current Source and/or Regulating a Circuit - Current sources, systems including the current source, and methods for regulating and/or controlling a circuit using the current source. The current source is generally configured to (i) receive a reference current, a bias voltage and a feedback/input current and (ii) provide an output current. The systems generally include the current source, a circuit directly or indirectly receiving the output current, a bias source/generator configured to provide the bias voltage, and a current reference configured to sink or source a predetermined amount of current from or to the output current. The method generally includes (a) applying a bias voltage to the current source, the current source receiving an input current and providing an output current; (b) sinking or sourcing a reference current from or to the output current; (c) applying the output of the current source directly or indirectly to a regulated circuit; and (d) providing the input current from the regulated circuit. | 2011-07-28 |
20110181257 | Controlled Load Regulation and Improved Response Time of LDO with Adapative Current Distribution Mechanism - A low drop-out (LDO) voltage regulation circuit includes first and second internal current paths. The first internal current path is between the input supply voltage and ground and includes the regulator's buffer circuit. The second internal current path is between the input supply voltage and ground and includes the regulator's power transistor. The amount of current flowing through the first internal current path relative to the amount of current flowing through the second internal current path is an increasing function of a current supplied to a load connected to the output supply node. The load regulation of the LDO is improved as the DC gain will not go down at lower load currents. Further, the no load to full load response time is improved as the load pole and power MOS gate pole are actively controlled with respect to output load current. In this mechanism, as the amount of current being supplied to the load decreases, the internal current flow shifts from the first internal current path to the second internal current path and vice versa. This arrangement maintains the desired pole structure and keeps the quiescent current largely the same for all load current levels. | 2011-07-28 |
20110181258 | Low-power feedback and method for DC-DC converters and voltage regulators for energy harvesters - A converter ( | 2011-07-28 |
20110181259 | VOLTAGE REGULATOR AND RELATED VOLTAGE REGULATING METHOD THEREOF - A voltage regulator includes: a first comparator for comparing a first reference voltage with a feedback voltage to generate a first comparing result accordingly; a first transistor for controlling an output voltage at an output node in response to the first comparing result; a second transistor for adjusting the output voltage at the output node in response to a control signal; a feedback block, for providing the feedback voltage according to the output voltage; and a control block, for receiving the output voltage and providing the control signal according to the output voltage. | 2011-07-28 |
20110181260 | Controller of the power inverter circuit and a control method - A highly accurate control is achieved in such a way that a timing value is generated from a differential control amount calculation result and a filter calculation result at iteration intervals not exceeding the iteration intervals of the filter calculation and then the timing set value of a driving signal generation circuit is updated by this timing value. A device for controlling a power conversion circuit comprises an AD conversion circuit ( | 2011-07-28 |
20110181261 | POWER CONVERSION WITH ZERO VOLTAGE SWITCHING - A power converter constituted of: a control circuitry; a first electric coil; a first electronically controlled switch associated with the first electric coil and responsive to the control circuitry, the first electronically controlled switch arranged to charge the first electric coil responsive to a closed state of the first electronically switch; and a second electronically controlled switch arranged to present a substantially short circuit across the first electric coil when the second electronically controlled switch is closed, the second electronically controlled switch responsive to the control circuitry and not arranged to either charge or discharge the first electric coil. | 2011-07-28 |
20110181262 | SWITCHING REGULATOR - Provided is a switching regulator capable of performing stable start-up with a soft-start operation without causing excessive extension of a soft-start time period. In a start-up period, a voltage approximating a feedback voltage (FB) is provided as an initial value of a soft-start reference voltage. The feedback voltage (FB) and the soft-start reference voltage become substantially equal to each other at a moment when the start-up is completed, to thereby realize a smooth transition of an operating state from the start-up to normal control. | 2011-07-28 |
20110181263 | OVER-CURRENT DETECTING APPARATUS FOR SWITCHING ELEMENT - An over-current detecting apparatus for a switching element ( | 2011-07-28 |
20110181264 | CONTROLLER FOR BUCK AND BOOST CONVERTER - A PWM controller for adjusting an output voltage of a buck and boost converter includes a first saw wave generator, which generates a first saw wave in accordance with the level of the output voltage. A first comparator coupled to the first saw wave generator compares the first saw wave with a first reference voltage and generates a first pulse. A peak hold circuit coupled to the first saw wave generator holds a peak value of the first saw wave. A second saw wave generator coupled to the peak hold circuit generates a second saw wave having a lower limit value that is the peak value of the first saw wave. A second comparator coupled to the second saw wave generator compares the second saw wave with the first reference voltage and generates a second pulse. | 2011-07-28 |
20110181265 | DC/DC CONVERTER CIRCUIT - A charging pump circuit of discharging electric charge charged during charging period to load during boosting period, and an amplifier and a voltage control resistor element arranged in feedback loop by being configured with the feedback loop of feeding back output voltage such that the output voltage of the charging pump circuit is made to be a predetermined value during boosting period are provided, the voltage control resistor element is controlled by the amplifier, and set to a control resistance value of enabling the charging pump circuit to control during boosting period, and the amplifier controls the voltage control resistor element such that the voltage control resistor element is brought into OFF state during charging period, and a resistance value of the voltage control resistor element is lowered to a control resistance value immediately after shifting from charging period to boosting period. | 2011-07-28 |
20110181266 | SWITCHING POWER SUPPLY CIRCUIT - There is provided a switching power supply circuit which receives a voltage from a direct current voltage source and supplies a direct current power to a load part. The circuit includes a switching element, a current detection circuit which is serially connected to the switching element, and which converts a current flowing in the switching element into a voltage, a control circuit which outputs a switch driving signal to control an ON/OFF operation of the switching element such that a current flowing in the load part becomes constant, a reference voltage generation circuit which generates a reference voltage proportional to an ON duty of the switch driving signal, and an error amplification circuit which outputs error information between a voltage output from the current detection circuit and the reference voltage. The control circuit adjusts the ON duty of the switch driving signal based on the error information. | 2011-07-28 |
20110181267 | Test analyzer - A portable calibrated resistive load testing analyzer for use with an Electronic Biofeedback Stimulation Device.
| 2011-07-28 |
20110181268 | System and Method for Detecting the Presence of an Unsafe Line Condition in a Disconnected Power Meter - A method of detecting the presence of an unsafe line condition at a power metering device is disclosed. The method comprises the steps of determining if a disconnect switch is in the open position, and measuring a first voltage at a first load contact. The method measures a second voltage at a second load contact and determines if the first voltage is greater than a first voltage threshold or less than a second voltage threshold. The method further determines if the second voltage is greater than the first voltage threshold or less than the second voltage threshold. The method indicates that an unsafe condition exists if either the first voltage is greater than the first voltage threshold, or first voltage is less than the second voltage threshold or the second voltage is greater than the first voltage threshold or the second voltage is less than the second voltage threshold, when the disconnect switch is in the open position. | 2011-07-28 |
20110181269 | APPARATUS AND METHOD FOR IDENTIFYING THE PHASE AND TERMINAL FOR POWER SYSTEM DEVICES - An apparatus and method for identifying the current and voltage phase and terminal for power system devices is described. In one aspect of the present invention, the respective current phase and terminal of two current terminals is identified based on a known phase and known phase angle associated with a third current terminal at the location of the electrical power system. In another aspect of the present invention, the voltage phase and terminal is identified based on a known phase and known phase angle associated with a third current terminal at the location of the electrical power system. In another aspect of the present invention, the respective voltage phase and terminal of three voltage terminals is identified based on known phase and known phase angles associated with first and second current terminals at the location of the electrical power system. | 2011-07-28 |
20110181270 | Power supply controlling apparatus, and non-transitory computer readable recording medium - A power supply controlling apparatus including: a measurement portion that measures electric power information concerning electric power supplied to another apparatus, a storing control portion that stores the electric power information measured by the measurement portion and measurement time when the electric power information is measured, into a volatile storage, and stores the electric power information and the measurement time stored into the volatile storage, into a nonvolatile storage in desired timing; and a supplement portion that, when a first power supply is turned off and turned on again, supplements to the volatile storage electric power information and time concerning electric power assumed to be supplied to the another apparatus between final measurement time in a plurality of pieces of measurement time stored in the nonvolatile storage and time when the first power supply is turned on again. | 2011-07-28 |
20110181271 | PEAKING CIRCUIT, PEAKING CIRCUIT CONTROL METHOD, WAVEFORM MEASUREMENT APPARATUS, AND INFORMATION PROCESSING APPARATUS - A peaking circuit according to the present invention includes amplifiers connected in multiple stages and feedback circuits for feedback to an input from two or more output points with different gains as seen from the input. The peaking circuit is configured to be able to change an amount of feedback of the feedback circuits. | 2011-07-28 |
20110181272 | Metering apparatus for liquids and method for metering liquids - A metering apparatus for liquids and a method for metering liquids which facilitate the operation of a further metering after detaching the pipette point or syringe | 2011-07-28 |
20110181273 | POSITION DETECTING SYSTEM AND POSITION DETECTING METHOD - To provide a position detecting system including a detected object disposed in a detection space and an external device disposed outside the detection space. The detected object includes a resonant circuit that generates a resonant magnetic field according to a driving magnetic field formed in the detection space, and the external device includes at least two drive coils that form the driving magnetic field in the detection space, at least two drive-signal input units that respectively input a drive signal for forming the driving magnetic field to the drive coils, at least one sense coil that detects a magnetic field formed in the detection space, a signal adjustment unit that adjusts a phase and an amplitude of the drive signal input to each of the drive coils by the drive-signal input units, based on a magnetic field detected by the sense coil, and a position deriving unit that derives a position of the detected object based on the magnetic field detected by the sense coil. | 2011-07-28 |
20110181274 | METHOD FOR ANALYZING DC SUPERPOSITION CHARACTERISTICS OF INDUCTANCE DEVICE, AND ELECTROMAGNETIC FIELD SIMULATOR - A method for analyzing the DC superposition characteristics of an inductance device using a magnetic field analysis simulator, comprising a first step of determining an initial magnetization curve from initial magnetization to saturation magnetization, and pluralities of minor loops at different operating points, on a toroidal core made of the same magnetic material as that of the inductance device, and obtaining point-list data showing the relation between magnetic flux density or magnetic field strength and incremental permeability from the incremental permeability at each operating point; a second step of determining an operating point at a predetermined direct current on each element obtained by mesh-dividing an analysis model of the inductance device by a magnetic field analysis simulator based on the initial magnetization curve of the core, allocating the incremental permeability to the operating point from the point-list data, and integrating the inductance of each element obtained from the incremental permeability to determine the inductance of the entire inductance device; and a third step of repeating the second step at different direct current levels to determine the DC superposition characteristics. | 2011-07-28 |
20110181275 | SPIRAL MAGNETIC FIELD APPARATUS AND METHOD FOR PIPELINE INSPECTION - A system and method are disclosed for inspecting the wall of a pipeline while traveling therethrough. The system may comprise a portion of pipe comprising a pipe wall forming a cylindrical tube defining a circumferential direction and an axial direction. The system may further include an in-line inspection tool positioned within the portion of pipe. The in-line inspection tool may include a frame extending in the axial direction and at least one magnet connected to the frame and positioned to generate a magnetic field. The magnetic field may be orientated obliquely with respect to the circumferential and axial directions of the pipeline. The inspection tool may include a transmitter connected to the frame to generate an inspection signal within the magnetic field. | 2011-07-28 |
20110181276 | Metal detector utilizing combined effects of modified flux linkage and oscillator excitation current - A first coil configuration ( | 2011-07-28 |
20110181277 | METHOD OF DETERMINING FORMATION PARAMETER - A nuclear magnetic resonance relaxation dispersion method to determine the wettability and other parameters of a fluid in a porous medium such as in an earth formation is provided. The method includes the steps of measuring the spin-lattice relaxation time T | 2011-07-28 |
20110181278 | NMR CONTRAST LOGGING - An apparatus for estimating a property of an earth formation penetrated by a borehole, the apparatus includes: a carrier configured to be conveyed through the borehole; a nuclear magnetic resonance (NMR) instrument disposed at the carrier and configured to perform an NMR measurement on a volume sensitive to the NMR measurement; and a contrast agent disposed in the volume and comprising particles that form a suspension in a liquid, the suspension of particles being configured increase a magnetic field gradient of at least one earth formation material in the volume to change an NMR relaxation time constant of the at least one earth formation material; wherein the NMR measurement on the volume containing the at least one earth formation material and the contrast agent is used to estimate the property. | 2011-07-28 |
20110181279 | Method And Apparatus For Detection of A Liquid Under A Surface - Methods for detecting a liquid under a surface and characterizing Ice are provided The liquid may be a liquid hydrocarbon such as crude oil or fuel oil or mineral oil The surface may be ice, snow, or water, and the method may be practiced in an arctic region to detect oil spills, leaks, or seepages The methods may be used with a range finder to characterize marine ice The methods may include a nuclear magnetic resonance (NMR) tool with antenna to send a radio-frequency (RF) excitation pulse or signal into volume of substances being detected, detect an NMR response signal to determine the presence of the liquid of interest The NMR response may include a relaxation time element and an intensity level and may include a free induction signal (T2*), a spin echo signal (T2), a train of spin echo signals (T2), or a thermal equilibrium signal (T 1). | 2011-07-28 |
20110181280 | METHOD AND SYSTEM FOR ECHO PLANAR IMAGING - In a method and system for echo planar imaging, after having applied a radiofrequency pulse and a slice selection gradient, continuous readout gradients alternating between positive and negative are applied and a phase encoding gradient is applied before starting each readout gradient. A slice selection gradient is applied at the same time as applying the phase encoding gradient. Scanning signals are collected during the duration of the readout gradients. Image reconstruction is implemented based on the scanning signals to obtain a scanned image. | 2011-07-28 |
20110181281 | EQUIPMENT FOR INSPECTING EXPLOSIVES AND/OR ILLICIT DRUGS, ANTENNA COIL AND METHOD FOR INSPECTING EXPLOSIVES AND/OR ILLICIT DRUGS - Equipment for inspecting explosives and/or illicit drugs comprises a means for generating high-frequency pulses, an antenna coil which irradiates an object of inspection with the generated high-frequency pulses working as a radio wave and receives a nuclear quadrupole signal which is generated from the object of inspection when the object of inspection is excited by the radio wave, and a means for detecting explosives and/or illicit drugs in the object of inspection based on the nuclear quadrupole signal thus received, wherein the antenna coil is formed in the shape of a figure of “8” by using a high-frequency coaxial cable so that two solenoid coil portions wound reversely to each other can be provided, and is used while facing the object of inspection. Various explosives and/or illicit drugs can be inspected compactly and surely by the equipment for inspecting explosives and/or illicit drugs and an inspecting method using such equipment for inspecting explosives and/or illicit drugs. | 2011-07-28 |
20110181282 | Method and apparatus for designing and/or implementing variable flip angle MRI spin echo train - A variable flip angle (VFA) MRI (magnetic resonance imaging) spin echo train is designed and/or implemented. For example, a target train of detectable spin-locked NMR (nuclear magnetic resonance) echo signal amplitudes may be defined and a corresponding designed sequence of variable amplitude (i.e., variable NMR nutation angle) RF refocusing pulses may be determined for generating that target train of spin echoes in an MRI sequence (e.g., used for acquiring MRI data for a diagnostic imaging scan or the like). Such a designed VFA sequence may be output for study and/or use by an MRI system sequence controller. | 2011-07-28 |
20110181283 | System for Concurrent Acquisition of MR Anatomical Brain Images and MR Angiograms Without Contrast-Injection - An MR imaging system without the use of a contrast agent, in a first repetition time interval, generates a non-selective magnetization preparation pulse for magnetizing an anatomical volume encompassing blood flowing into a selected slab within the volume for blood signal suppression, generates RF excitation pulses and acquires a first MR imaging dataset of the selected slab within the volume with a suppressed blood signal. The system in a second repetition time interval succeeding the first repetition time interval, generates a selected slab magnetization preparation pulse for magnetizing the selected slab, generates RF excitation pulses and acquires a second MR imaging dataset of the selected slab within the volume. An image data processor substantially subtracts imaging data of the first MR imaging dataset from the second MR imaging dataset to provide an image enhancing a vessel structure in the selected slab and also substantially averages imaging data to provide an MR anatomical image. | 2011-07-28 |
20110181284 | MAGNETIC FIELD GRADIENT MONITOR APPARATUS AND METHOD - A method based on pure phase encode FIDs that permits high strength gradient measurement is disclosed. A small doped water phantom (1˜3 mm droplet, T | 2011-07-28 |
20110181285 | METHOD AND APPARATUS FOR MAGNETIC RESONANCE IMAGING TO CREATE T1 MAPS - In a method and apparatus for MR imaging, a data acquisition sequence is executed wherein at least two slices of an examination subject are imaged in parallel with a gradient echo method for spatially resolved quantification of the T | 2011-07-28 |
20110181286 | MAGNETIC RESONANCE IMAGING APPARATUS, AND BREATH-HOLDING IMAGING METHOD - In order to make it possible to set the optimal breath-holding imaging conditions according to the subject without extension of an imaging time or the sacrifice of image quality, one scan is divided into one or more breath-holding measurements and free-breathing measurements on the basis of the imaging conditions of a breath-holding measurement, which are input and set according to the subject, and a region of the k space measured in the breath-holding measurement is controlled. Preferably, in the breath-holding measurement, low-frequency data of the k space is measured. Moreover, preferably, imaging conditions of the breath-holding measurement include the number of times of breath holding or a breath-holding time, and the operator can set any of these values. | 2011-07-28 |
20110181287 | MAGNETIC RESONANCE IMAGING APPARATUS - A magnetic resonance imaging apparatus comprises: static magnetic field generation means which generates a static magnetic field in an imaging space where an object to be examined is placed; gradient magnetic field generation means which generates a gradient magnetic field in the imaging space; high-frequency magnetic field generation means which generates a high-frequency magnetic field in the imaging space; calculation means which calculates an amount of the electromagnetic wave absorbed by the object when the high-frequency magnetic field is irradiated to the object; and a measurement means which measures a characteristic of the high-frequency magnetic field generation means. | 2011-07-28 |
20110181288 | Trace explosives personnel screening system - A detector system with a portal including a plurality of output ports that direct a plurality of output airstreams in an essentially horizontal direction, and a plurality of intake ports that pull in air. The system also includes at least one concentrator coupled to at least one of the intake ports, and a detector coupled to the concentrator. The horizontally oriented output airstreams and multiple intake ports provide a system that can rapidly screen multiple people for explosives and other substances. | 2011-07-28 |
20110181289 | LOCATOR ASSEMBLY FOR DETECTING, LOCATING AND IDENTIFYING BURIED OBJECTS AND METHOD OF USE - A locator assembly for the detection, location and identification of a buried object is provided comprising a sensor portion adapted to detect and measure the magnetic field strength of a buried object. A control assembly is connected to the sensor portion, wherein the control assembly is adapted to receive and analyze the magnetic field strength provided by the sensor portion to ascertain the location of a buried object. An identification portion is connected to the control assembly and operates independent of the sensor portion, wherein the identification portion is adapted to communicate with the buried object to ascertain the identity of the buried object. A method for the detection, location and identification of a buried object is also provided. | 2011-07-28 |
20110181290 | RECEIVER COIL ASSEMBLY FOR AIRBORNE GEOPHYSICAL SURVEYING WITH NOISE MITIGATION - An airborne geophysical surveying system comprising a receiver coil assembly for towing by an aircraft, the receiver assembly including a receiver coil for sensing changes in a magnetic field component of a magnetic field, and a receiver coil orientation sensing system for sensing orientation changes of the receiver coil. A controller receives signals representing the sensed changes in the magnetic field component from the receiver coil and the sensed orientation changes from the receiver coil orientation sensing system and corrects the sensed changes in the magnetic field component to provide a signal that is corrected for noise caused by changing orientation of the receiver coil in a static geomagnetic field. | 2011-07-28 |
20110181291 | Measuring device for purity measurements in a media circuit of a power station and method for operating said measuing device - A measuring device for carrying out purity measurements in a media circuit of a power station with an ion exchanger device and a measuring means for measuring a parameter of a media current flowing through the ion exchanger device is described. In order to obtain measurements in a rapid and reliable manner at the start up of the ion exchanger device, for example during the start-up phase of the power station, it is suggested that the ion exchanger device has two flow paths for two different operating modes of the power station. | 2011-07-28 |
20110181292 | SYSTEM FOR DIAGNOSING SENSORS TO FIND OUT ABNORMALITY THEREIN - In an abnormality diagnosing system for first and second current sensors for measuring a current, an obtaining unit obtains at least one pair of measured values of the first and second current sensors. The at least one pair of measured values is measured by the first and second current sensors at a substantially same timing. A diagnosing unit diagnoses whether there is an abnormality in at least one of the first and second current sensors based on a function defining a relationship between the at least one pair of measured values of the first and second current sensors. | 2011-07-28 |
20110181293 | Method for Diagnosing an Electrical Connection, and Output Assembly - A output assembly and method for diagnosing an electrical connection for reliably identifying a possible wire break to a load in redundantly connected output assemblies in which a control device for operating a switching device is configured such that the control device subjects the measured value to a test criterion, wherein satisfaction of the test criterion initially noted in the output assembly as a diagnosis fault, and the test criterion is applied cyclically within a time period comprising a waiting time, and wherein another output assembly performs a switch-off test during this time, thus allowing a statement to be made as to whether a wire break is present. | 2011-07-28 |
20110181294 | ELECTRICAL CONNECTION QUALITY DETECTION - According to one aspect, embodiments of the invention provide a method of monitoring an electrical connection, the method comprising monitoring a temperature of the electrical connection, monitoring a level of current passing through the electrical connection, and determining, in response to monitoring temperature and current, whether the temperature of the electrical connection exceeds a temperature threshold associated with the level of current passing through the electrical connection. | 2011-07-28 |
20110181295 | FAULT DETECTION USING COMBINED REFLECTOMETRY AND ELECTRONIC PARAMETER MEASUREMENT - Systems and methods for detecting a fault in an electronic conductor are provided. Electronic parameter measurements are combined with reflectometry profiles to determine when faults are present on the electronic conductor. | 2011-07-28 |
20110181296 | ARC FAULT DETECTOR WITH CIRCUIT INTERRUPTER - There is here disclosed a method and apparatus for detecting the occurrence of arcing of a conductor by monitoring the current on an AC power line. The signal detected is split and directed along four separate paths to generate four signals having separate characteristics which represent the current in the line. A first path is for a signal representative of the current flowing in the line. A second path is for a signal having a pulse for each occurrence of a positive step change in current that is significant and has a di/dt value above a predetermined value. A third path is for a signal having a pulse for each occurrence of a negative step change in current that is significant and has a di/dt value above a predetermined value. A fourth path is for a signal having a voltage level representative of the broadband noise signal on the line. Using at least one of five different methods in combination with one of three input signals, a reference signal designated as “SINE” is generated. The SINE signal generated in combination with a CURRENT input is used to produce a control waveform “DELTA”. DELTA can be represented as a relative value or as an absolute difference between the SINE and the CURRENT. Each occurring half cycle of the DELTA signal is analyzed by, for example, a micro-controller for specific identifiable characteristics found to indicate the presence of arcing. Upon the detection of arcing, an output signal can be generated to activate a circuit interrupting mechanism, sound an audio alarm and/or alert a central monitoring station. | 2011-07-28 |
20110181297 | Communicating with an Implanted Wireless Sensor - The present invention determines the resonant frequency of a sensor by adjusting the phase and frequency of an energizing signal until the frequency of the energizing signal matches the resonant frequency of the sensor. The system energizes the sensor with a low duty cycle, gated burst of RF energy having a predetermined frequency or set of frequencies and a predetermined amplitude. The energizing signal is coupled to the sensor via magnetic coupling and induces a current in the sensor which oscillates at the resonant frequency of the sensor. The system receives the ring down response of the sensor via magnetic coupling and determines the resonant frequency of the sensor, which is used to calculate the measured physical parameter. The system uses a pair of phase locked loops to adjust the phase and the frequency of the energizing signal. | 2011-07-28 |
20110181298 | MEASUREMENT APPARATUS AND TEST APPARATUS - Provided is a measurement apparatus that measures a signal under measurement input thereto, comprising a plurality of signal measurement circuits that measure a level of a signal input thereto, according to a sampling clock provided thereto; a noise measuring section that measures a noise component propagated from a first signal measurement circuit to a second signal measurement circuit, among the plurality of signal measurement circuits, based on a measurement result output by the second signal measurement circuit; and a clock supplying section that, when the signal under measurement is being measured, supplies the first signal measurement circuit and the second signal measurement circuit with sampling clocks having the same period and that, when the noise component is being measured, supplies the first signal measurement circuit and the second signal measurement circuit with sampling clocks having different periods. | 2011-07-28 |
20110181299 | ELECTRIC FIELD WHISTLE - In one embodiment, an electric field sensor is provided including an elongated conductor; a circuit including an input and an output connected across the elongated conductor wherein said circuit includes a DC to AC signal converter; wherein said elongated conductor is operative to impose a DC signal on said circuit input in response to being exposed to an electric field and broadcast an AC signal converted from said DC signal in response to said electric field being greater than a threshold level. | 2011-07-28 |
20110181300 | Remote Detection and Measurement of Objects - Provided are methods of using electromagnetic waves for detecting metal and/or dielectric objects. Methods include directing microwave and/or mm wave radiation in a predetermined direction using a transmission apparatus, including a transmission element; receiving radiation from an entity resulting from the transmitted radiation using a detection apparatus; and generating one or more detection signals in the frequency domain using the detection apparatus. Methods may include operating a controller, wherein operating the controller includes causing the transmitted radiation to be swept over a predetermined range of frequencies, performing a transform operation on the detection signal(s) to generate one or more transformed signals in the time domain, and determining, from one or more features of the transformed signal, one or more dimensions of a metallic or dielectric object upon which the transmitted radiation is incident. A system and method for remote detection and/or identification of a metallic threat object using late time response (LTR) signals is also disclosed. | 2011-07-28 |
20110181301 | Absolute Position Determination of Movably Mounted Member in Medication Delivery Device - The present invention relates to a medication delivery device for expelling set doses of medicament, the medication delivery device comprising a position determining arrangement for detecting absolute positions of a movably mounted member, such as a dose indicator barrel, relative to a housing of the medication delivery device. The position determining arrangement comprises a plurality of electrically conducting electrodes arranged on an outer surface of the movably mounted member, and a plurality of contacts members fixedly arranged relative to the housing of the medication delivery device. A first and a second contact member are arranged to follow a first path across the electrically conducting electrodes upon movement of the movably mounted member relative to the housing, whereas a third and a fourth contact member are arranged to follow a second path across the electrically conducting electrodes upon movement of the movably mounted member relative to the housing. | 2011-07-28 |
20110181302 | INDUCTIVE POSITION SENSOR - A rotary position sensor having a transmitter coil energized by a high frequency current source. A first receiver coil includes an even number N of loops wherein adjacent loops of the first receiver coil are oppositely wound. A second receiver coil also includes N loops where adjacent loops are oppositely wound. Furthermore, the second receiver coil is angularly offset from the first receiver coil by 180/N degrees. A noncircular coupler constructed of an electrically conductive material is rotatably mounted relative to the coils so that the coupler element overlies at least a portion of the first and second receiver coils. A circuit processes the output signals from the first and second receiver coils and generates an output signal representative of the rotational position of the coupler. | 2011-07-28 |
20110181303 | ELECTROMAGNETIC WAVE DETECTION SYSTEMS AND METHODS - Systems and methods for detecting electromagnetic waves are disclosed. A system for use in detecting an electromagnetic wave includes an inductive device and a spintronic device. The inductive device generates an induced electromagnetic field when the inductive device receives the electromagnetic wave. The spintronic device has an impedance that changes when exposed to the induced electromagnetic field from the inductive device. The change in impedance is indicative of the electromagnetic wave received by the inductive device. Another system for use in detecting or transmitting an electromagnetic wave includes a conductive device and an inductive device. The inductive device is configured to generate an induced electromagnetic wave when the inductive device receives an electromagnetic wave passed by the conductive device. Another system for detecting electromagnetic wave permittivity or permeability of an object includes a pair of antennas and an inductive device. | 2011-07-28 |
20110181304 | Determining a Dielectric Property of a Capacitor - An apparatus for determining a dielectric property of a capacitor arrangement, having an alternating signal generator for applying an electric alternating signal to the capacitor arrangement. It further contains an evaluation circuit for evaluating at least one electric measuring quantity of an electric signal tapped from the capacitor arrangement. It further comprises balancing means which are arranged in an electric path between the alternating signal generator and the capacitor arrangement and by means of which a parameter of the electric alternating signal can be changed in such a way that an output signal of the evaluation circuit assumes a specific value, preferably zero, under defined constant conditions. Control means are provided for emitting an electric control signal to the balancing means, by means of which the change of the at least one parameter can be controlled. The apparatus can thus be balanced in a simple, rapid, cost-effective and especially automatic way. | 2011-07-28 |
20110181305 | POSITION DETECTING DEVICE AND METHOD - A position detecting device includes: a transmitting conductor group formed of a plurality of conductors arranged in a first direction; a receiving conductor group formed of a plurality of conductors arranged in a second direction intersecting the first direction; a signal detecting circuit configured to detect a signal occurring in at least one of the transmitting conductor group and the receiving conductor group on a basis of position indication by an indicating object; a transmitting conductor selecting circuit; and a receiving conductor selecting circuit. Each of the transmitting conductor group and the receiving conductor group is sectioned into at least a first conductor group and a second conductor group adjacent to each other. Conductors are selected such that a direction of selecting each of the conductors forming the first conductor group and a direction of selecting each of the conductors forming the second conductor group are different from each other. | 2011-07-28 |
20110181306 | ISOLATION MONITORING SYSTEM AND METHOD UTILIZING A VARIABLE EMULATED INDUCTANCE - A system for measuring leakage resistance between a high voltage (HV) system of a vehicle and a vehicle chassis includes an emulated inductance that is connected between the HV system and the vehicle chassis and that has an inductive reactance that substantially cancels a capacitive reactance between the HV system and the vehicle chassis. A signal source outputs one of an AC current signal and an AC voltage signal between the HV system and the vehicle chassis. A sensor measures one of an AC current response to the AC voltage signal between the HV system and the vehicle chassis and an AC voltage response to the AC current signal between the HV system and the vehicle chassis. | 2011-07-28 |
20110181307 | Nanoscale multiplexer - In one embodiment of the present invention, a microscale or sub-microscale signal line, interconnected with one set of parallel nanowires of a nanowire crossbar, serves as a multiplexer. The multiplexer is used to detect the conductivity state of a nanowire junction within the nanowire crossbar. In one method embodiment of the present invention, a first signal is output to the two nanowires interconnected by the nanowire junction, while a second signal is output to the remaining nanowires of the nanowire crossbar. Then, the second signal is output to the two nanowires interconnected by the nanowire junction, while the first signal is output to the remaining nanowires of the nanowire crossbar. The resulting signal detected on the multiplexer is reflective of the conductivity state of the nanowire junction. | 2011-07-28 |
20110181308 | TEST APPARATUS AND TESTING METHOD - A main power supply supplies a power supply voltage to a power supply terminal of a DUT. A control pattern generator generates a control pattern including a pulse sequence. A compensation circuit intermittently injects a compensation current to the power supply terminal of the DUT via a path different from that of the main power supply. A switch is arranged between an output terminal of a voltage source and the power supply terminal of the DUT, and is turned on and off according to the control pattern. | 2011-07-28 |
20110181309 | TEST APPARATUS AND TEST MODULE - Provided is a test apparatus for testing at least one device under test, including: a test module that includes a plurality of test sections, the plurality of test sections testing the device under test by exchanging signals with the device under test; and a plurality of test control sections that control the plurality of test sections, where the test module includes the plurality of test sections; a setting storage section that stores setting as to which of the plurality of test control sections should be associated with each of the plurality of test sections; and an interface section that is connected to the plurality of test sections, provides an access request issued from one of the plurality of test control sections and directed to the test module, to a test section associated with the test control section, and is able to set, independently for each of the plurality of test sections, which of the plurality of test control sections should control the test section. | 2011-07-28 |
20110181310 | TEST APPARATUS AND TEST METHOD - Provided is a test apparatus for testing a device under test, including: a plurality of test modules that exchange signals with the device under test; a bus to which the plurality of test modules are connected; and a test control section that controls the plurality of test modules via the bus, where each of the plurality of test modules includes: a test section that exchanges signals with the device under test, and a module control section that controls the test section, and the module control section of each test module exchanges signals with the module control section of another test module, via the bus. | 2011-07-28 |
20110181311 | TEST APPARATUS AND TEST METHOD - Provided is a test apparatus and a test method related to the test apparatus for testing a device under test, including: a plurality of test modules that exchange a signal with the device under test; a test control section that outputs a group read instruction for collectively reading data stored in two or more of the test modules; and a control interface section that reads the data from the two or more test modules according to the group read instruction, and collectively sends the read data to the test control section. | 2011-07-28 |
20110181312 | Mixed signal integrated circuit, with built in self test and method - A mixed signal integrated circuit includes a signal source to inject a test signal into the signal path of the mixed signal integrated circuit, a feedback loop and a signal comparator for determining characteristics of a resulting signal. Conveniently, the test signal may be a digital signal injected upstream of a digital to analog converter (DAC). By connecting the output to the input, the entirety of the signal path and the majority of the integrated circuit may be tested. The signal may be condition or manipulated in the feedback loop. By incorporating test signal generation and measurement into the mixed signal integrated circuit, the cost of test equipment and the test duration for each device under test may be reduced. | 2011-07-28 |
20110181313 | EVALUATION DEVICE AND EVALUATION METHOD FOR SUBSTRATE MOUNTING APPARATUS AND EVALUATION SUBSTRATE USED FOR THE SAME - There are provided an evaluation device and an evaluation method for a substrate mounting apparatus capable of simply evaluating a temperature control function of the substrate mounting apparatus depending on evaluation conditions or circumstances and an evaluation substrate used for the same. The substrate mounting apparatus holds a target substrate mounted on a mounting surface and controls a temperature of the target substrate. The evaluation device includes an evacuable airtight chamber in which the substrate mounting apparatus is provided; an evaluation substrate which is mounted on the mounting surface instead of the target substrate and includes a self-heating resistance heater; and a temperature measurement unit which measures a temperature of the evaluation substrate. | 2011-07-28 |
20110181314 | Member for adjusting horizontality, and probe card with the same - Disclosed herein are a member for adjusting horizontality and a probe card with the same. The member for adjusting horizontality according to the present invention horizontally couples a micro probe head to a probe substrate with an adhesive layer therebetween, and the member for adjusting horizontality which is coupled to the micro probe head does not have an edge of the coupling portion and an edge of the adhesive layer. Therefore, according to the member for adjusting horizontality and the probe card with the same of the present invention, it is possible to prevent the coupling portions of the micro probe head from being broken, by reducing stress applied to the micro probe head during the process of horizontally coupling the micro probe head to the probe substrate. | 2011-07-28 |
20110181315 | Adaptive Device Aging Monitoring and Compensation - Improved device aging monitoring and compensation schemes are presented herein. In particular, embodiments enable quantitative measurement of actual aging experienced by a device up to the instant of measurement, rather than rely on static a priori estimation of aging effects under worst case conditions. As such, embodiments provide adaptive device aging monitoring and compensation schemes. In addition, embodiments allow for aging monitoring and compensation to be performed at a desired granularity, whereby aging monitoring and compensation can be performed at a chip, module, or sub-module level. Further, embodiments inherently compensate for the effects of aging on passive components (e.g., parasitics of interconnect wires, capacitors, etc.) in addition to active device aging. | 2011-07-28 |
20110181316 | Deactivation of Integrated Circuits - Integrated circuits and methods of permanently disabling integrated circuits are disclosed. An integrated circuit having an erasable non-volatile memory adapted to store an activation code and logic to disable the integrated circuit when the code in the erasable non-volatile memory has been altered or erased after it has been separated from a substrate, is placed into an electromagnetic field of sufficient power to erase or reprogram the erasable non-volatile memory. The entire integrated circuit is permanently disabled by erasing, altering, or reprogramming the erasable non-volatile memory. In preferred embodiments, the integrated circuit comprises a non-erasable non-volatile memory storing the activation code, and circuitry adapted to permanently disable the integrated circuit when the code in the erasable non-volatile memory does not match the activation code in the non-erasable non-volatile memory. Erasing, altering, or reprogramming the erasable non-volatile memory results in a mismatch of the non-volatile memories, which permanently deactivates the integrated circuit. | 2011-07-28 |
20110181317 | OPERATIONAL TIME EXTENSION - Some embodiments provide a reconfigurable integrated circuit (“IC”). This IC has several reconfigurable circuits, each having several configurations for several configuration cycles. The reconfigurable circuits include several time-extending reconfigurable circuits. During the operation of the IC, each particular time-extending reconfigurable circuit maintains at least one of its configurations over at least two contiguous cycles, in order to allow a signal to propagate through a signal path, which contains the particular time-extending circuit, within a desired amount of time. Some embodiments provide a method of designing a reconfigurable IC that has several reconfigurable circuits, each having several configurations and operating in several reconfiguration cycles. The method identifies a signal path through the IC that does not meet a timing constraint. The signal path includes several circuits, one of which is a particular reconfigurable circuit. The method then maintains a configuration of the particular reconfigurable circuit constant over at least two contiguous reconfiguration cycles in order to reduce signal delay through the signal path and thereby satisfy the timing constraint. | 2011-07-28 |
20110181318 | Electrically and/or Thermally Actuated Device - An electrically, thermally, or electrically and thermally actuated device is disclosed herein. The device includes a substrate, a first electrode established on the substrate, an active region established on the electrode, and a second electrode established on the active region. A pattern is defined in at least one of the substrate, the first electrode, the second electrode, or the active region. At least one of grain boundaries are formed within, or surface asperities are formed on, at least one of the electrodes or the active region. The pattern controls the at least one of the grain boundaries or surface asperities. | 2011-07-28 |
20110181319 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT USING THE SAME - The present invention provides a high speed and low power consumption LSI operable in a wide temperature range in which a MOS transistor having back gates is used specifically according to operating characteristics of a circuit. | 2011-07-28 |
20110181320 | Differential logic circuit, frequency divider, and frequency synthesizer - A differential logic circuit includes: a differential logic unit which receives a plurality of logic signals, performs a logic operation, and outputs a result of the logic operation from a pair of differential signal output terminals thereof; and a current source circuit which supplies current to the differential logic unit and which controls a magnitude of the current. The differential logic circuit further includes: a load circuit connected to the differential signal output terminals; and a load control circuit which is connected to the load circuit and controls a load of the load circuit such that a direct-current output voltage of the pair of differential signal output terminals is constant. | 2011-07-28 |
20110181321 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit has a squelch circuit which has a first noninverting input terminal and a first inverting input terminal, which compares differential amplitude between a signal which is input to the first noninverting input terminal and a signal which is input to the first inverting input terminal with a preset threshold, and which outputs a signal depending upon a result of the comparison. The semiconductor integrated circuit has a first switch circuit between a first reception terminal and the first noninverting input terminal. The semiconductor integrated circuit has a second switch circuit between a second reception terminal and the first inverting input terminal. The semiconductor integrated circuit has a third switch circuit between the first reception terminal and the first inverting input terminal. The semiconductor integrated circuit has a fourth switch circuit between the second reception terminal and the first noninverting input terminal. | 2011-07-28 |
20110181322 | Device and method for generating a current pulse - A device for producing a current pulse includes supply terminals for providing a power supply voltage, and a switch which is situated in a control current branch between the supply terminals, which switch is configured to switch a control current through the control current branch as a function of an actuation signal. The device also has a current mirror having a control transistor and a signal transistor, the control transistor being situated in series to the first switch in the control current branch, and the signal transistor being configured to provide the current pulse as a function of the control current through the control transistor. | 2011-07-28 |
20110181323 | METHOD FOR GENERATING A SIGNAL REPRESENTATIVE OF THE CURRENT DELIVERED TO A LOAD BY A POWER DEVICE AND RELATIVE POWER DEVICE - An integrated power transistor includes emitter or source regions, and a comb-like patterned metal electrode structure interconnecting the emitter or source regions and defining at least one connection pad. The comb-like patterned metal electrode structure includes a plurality of fingers. A current sensing resistor produces a voltage drop representative of a current delivered to a load by the integrated power transistor. The current sensing resistor includes a portion of a current carrying metal track having a known resistance value and extending between one of the fingers and a connectable point along the current carrying metal track. | 2011-07-28 |
20110181324 | SELF-ADJUSTING GATE BIAS NETWORK FOR FIELD EFFECT TRANSISTORS - The present invention is directed to a self-adjusting gate bias network for field effect transistors in radio frequency applications. A bias network for field effect transistors is provided comprising a field effect transistor having a source electrode connected to ground and a drain electrode connected to a load; a radio frequency network connected to the gate electrode; a gate bias network connected to the gate electrode; wherein a device having a non-linear characteristic is provided in series between the gate electrode and the gate bias network such that a forward bias current at the gate electrode of the field effect transistor is reduced or prevented. | 2011-07-28 |
20110181325 | CIRCUIT AND METHOD OF CLOCKING MULITIPLE DIGITAL CIRCUITS IN MULTIPLE PHASES - A circuit includes a power supply terminal and a clock parsing circuit configured to produce multiple clock signals having a common clock period and different phases. The circuit further includes a plurality of digital circuits coupled to the clock parsing circuit and the power supply terminal. Each digital circuit includes an input to receive data and logic to process the data. Each digital circuit is responsive to a phase associated with a respective clock signal of the multiple clock signals to draw current from the regulated power supply terminal to process the data to produce a data output. Additionally, the circuit includes an output timing management circuit coupled to each of the plurality of digital circuits and configured to control data outputs of each of plurality of digital circuits to prevent timing violations at one or more destination circuits. | 2011-07-28 |
20110181326 | PHASE-LOCKED LOOP HAVING A FEEDBACK CLOCK DETECTOR CIRCUIT AND METHOD THEREFOR - A method for a phase-locked loop (PLL) in an integrated circuit, wherein the PLL comprises a voltage-controlled oscillator (VCO). The method includes, in a training mode: (1) setting a control voltage of the VCO at a first voltage level; (2) increasing the control voltage of the VCO from the first voltage level to a second voltage level, until a loss of the feedback signal is detected; and (3) storing an indicator value corresponding to the second voltage level of the control voltage of the VCO. The method further includes, in a normal mode: (1) monitoring a voltage level of the control voltage of the VCO by generating a monitored indicator value corresponding to the voltage level of the control voltage of the VCO; and (2) asserting the loss of feedback signal based on a comparison of the monitored indicator value and the indicator value. | 2011-07-28 |
20110181327 | PLL oscillator circuit - Disclosed is a PLL oscillator circuit capable of examining an unlock state while being equipped with an auto retry function enabling automatic relock. In the PLL oscillator circuit, a MPU receives a lock detection signal from the PLL-IC that receives an external reference signal and an output signal from a VCXO and outputs a control voltage to the VCXO, sets data for unlock alarm test at the PLL-IC, the data turning a lock state into an unlock state, when determining an unlock state with the lock detection signal from the PLL-IC, outputs an unlock alarm output signal to the outside, determines whether the unlock state continues for a first time period, and when the unlock state continues for the first time period, executes retry to set data for relock at the PLL-IC. | 2011-07-28 |
20110181328 | FREQUENCY ADJUSTING APPARATUS AND DLL CIRCUIT INCLUDING THE SAME - A frequency adjusting apparatus includes a frequency control signal generating unit that generates a multi-bit frequency control signal, which is changed in level bit by bit, in response to a reference clock signal, and a frequency adjusting unit that adjusts the frequency of the reference clock signal in response to the multi-bit frequency control signal. | 2011-07-28 |
20110181329 | SEMICONDUCTOR DEVICE AND PULSE WIDTH DETECTION METHOD - An internal pulse waveform shaping circuit provided to an IC chip generates an internal pulse monitor signal that changes in a predetermined direction at a rise timing of an internal pulse signal during a period in which a first enable signal is asserted and a second enable signal is de-asserted and then continues in the changed state for a predetermined period of time or longer, and generates the internal pulse monitor signal that changes in the predetermined direction at a fall timing of the pulse signal during a period in which the first enable signal is de-asserted and the second enable signal is asserted and then continues in the changed state for the predetermined period of time or longer. The generated internal pulse monitor signal is output to a tester for detecting the pulse width of the internal pulse signal. | 2011-07-28 |
20110181330 | FLIP-FLOP, FREQUENCY DIVIDER AND RF CIRCUIT HAVING THE SAME - A flip-flop, and a frequency divider and an RF circuit using the flip-flop. The frequency divider, which receives a first signal and generates a second signal by dividing a frequency of the first signal, including a plurality of flip-flops that each latch and output a signal based on the first signal; and at least one switch unit that is switched in response to a control signal to modify a signal transfer path between the plurality of the flip-flops, wherein a different number of flip-flops are activated in response to each first and second status of the control signal so that the frequency of the first signal is divided by different multiples. | 2011-07-28 |
20110181331 | INTEGRATED CIRCUIT WITH LEAKAGE REDUCTION IN STATIC NETS - A method for reducing leakage current of a delay line on a static net is provided. The static net provides a signal communication path between a data output of a first flip-flop and a data input of a second flip-flop via the delay line. The delay line is designed using standard cells but the standard cells are selected based on leakage power consumption in order to reduce the leakage power consumption of the delay line. | 2011-07-28 |
20110181332 | RING OSCILLATOR FOR GENERATING OSCILLATING CLOCK SIGNAL - A ring oscillator including a plurality of buffer units, each of which has a cross-coupled structure, for generating clock signals using a bias voltage having a predetermined voltage level applied thereto, wherein the clock signals have a swing width corresponding to the bias voltage. | 2011-07-28 |
20110181333 | STACKED TRANSISTOR DELAY CIRCUIT AND METHOD OF OPERATION - A delay circuit and method of operation has a plurality of series-connected stages including a first stage and a last stage that provides the delayed signal. Each of the series-connected stages has a plurality of series-connected transistors having an outermost transistor and an innermost transistor and one or more or none of a plurality of intervening transistors. Each of the plurality of series-connected transistors is connected in series to a respective different load stack. An input signal that is coupled to the first stage is propagated repeatedly between the first stage, intervening stages if any, and a last stage. The first stage has a signal input, one or more feedback inputs, and at least two output terminals. | 2011-07-28 |
20110181334 | TRACK AND HOLD CIRCUIT AND RELATED RECEIVING DEVICE WITH TRACK AND HOLD CIRCUIT EMPLOYED THEREIN - An operational circuit includes: a gain control circuit arranged to provide a gain value upon an input signal according to a set of control signals, wherein the gain control circuit includes a first resistor-based network and a second resistor-based network; an operational amplifier coupled to the gain control circuit and arranged to generate an output signal according to the input signal and the gain value; and a first capacitor coupled to the operational amplifier and arranged to hold the output signal between a first input terminal and a first output terminal of the operational amplifier, wherein when the operational circuit is operating, a first terminal of the first capacitor is consistently coupled to the first input terminal of the operational amplifier, and a second terminal of the first capacitor is consistently coupled to the first output terminal of the operational amplifier. | 2011-07-28 |
20110181335 | INTERFACE CIRCUIT, LSI, SERVER DEVICE, AND METHOD OF TRAINING THE INTERFACE CIRCUIT - Power consumption is increased in an interface circuit having a signal processing function for waveform shaping due to influence of a circuit added for waveform shaping. Also, since a plurality of boards are connected to a backplane in a system, they are not exchanged in accordance with distances while there are boards being far or near are mixed, but a common board is used. Thus, it is necessary to prepare a configuration of an interface circuit meeting the longest transfer distance. An interface circuit disabling a part of or all of operations of a waveform shaping circuit is provided. Accordingly, in accordance with transfer distances, switching of operation ranges of waveform shaping circuit inside the interface circuit is possible, and operation ranges of the waveform shaping circuit can be limited, and power consumption of the interface circuit, an LSI including the interface circuit, and a server device can be reduced. | 2011-07-28 |
20110181336 | Output Buffer Circuit and Method for Avoiding Voltage Overshoot - An output buffer circuit for avoiding voltage overshoot includes an input stage, an output bias circuit, an output stage, a clamp circuit, and a control unit. The input stage includes a positive input terminal, for receiving an input voltage, and a negative input terminal. The input stage generates a current signal according to the input voltage. The output bias circuit is coupled to the input stage, for generating a dynamic bias according to the current signal. The output stage is coupled to the input stage and the output bias circuit, including an output terminal, reversely coupled to the positive input terminal, and at least one output transistor, coupled to the output bias circuit and the output terminal, for providing a driving current to the output terminal according to the dynamic bias to generate an output voltage. | 2011-07-28 |
20110181337 | SEMICONDUCTOR INTEGRATED CIRCUIT AND ELECTRONIC DEVICE - AVS (Adaptive Voltage Scaling) technique, by which variability and uncertainty are both taken into account. In the system arranged for AVS technique, a detection circuit optimum for each type of process variation is set. Examples of the detection circuit so arranged include a first measurement circuit for detection of variability, which produces a relative value with respect to the gate delay mean value, and a second measurement circuit for detection of uncertainty, which produces a relative value related to the gate delay standard deviation. The first and second measurement circuits are provided separately from each other. The control information for deciding the supply voltage is prepared based on relative values produced by the detection circuits. When preparing the control information, reference is made to e.g. a table data. | 2011-07-28 |
20110181338 | Dual path level shifter - Dual path level shifter methods and devices are described. The described level shifter devices can comprise voltage-to-current and current-to-voltage converters. | 2011-07-28 |
20110181339 | LEVEL SHIFT CIRCUIT - A level shift circuit of the invention includes a CMOS inverter circuit that receives an input pulse signal having a crest value of a first potential, a latch circuit that operates on a power supply of a second potential which is higher than the first potential, and a power supply circuit that supplies a power supply of not less than the first potential and less than the second potential to the CMOS inverter circuit. The latch circuit has one end thereof connected to an output end of the CMOS inverter circuit and outputs from the other end thereof an output pulse signal having a crest value of the second potential and a same phase as the input pulse signal. The power supply circuit functions to limit the power supply when the input pulse signal assumes at least the ground level. | 2011-07-28 |
20110181340 | Fast Voltage Level Shifter Circuit - A voltage level shifting circuit with an input terminal and an output terminal. The level shifting circuit has a field-effect transistor (FET) switch with a gate attached to the input terminal, a drain attached to the output terminal and a source attached to a current changing mechanism. The current changing mechanism includes a current mirror circuit having an output connected between the source and an electrical earth. The output of the current mirror circuit is preferably adapted to change a current flowing between the drain and the source based on an input voltage applied to the gate. | 2011-07-28 |
20110181341 | PUSH-PULL DRIVER CIRCUIT - A push-pull driver circuit includes a control circuit which controls switching operations of a plurality of high-side transistors, a level-shift circuit which shifts a control signal, output by the control circuit when the control circuit performs turn-off control on the plurality of transistors, to a first voltage by which the plurality of transistors are turned off, and which inputs the shifted signal to a gate of one of the plurality of transistors, and a conduction-state selection circuit which, if an output of the level-shift circuit is the first voltage, inputs the output to gates of the rest of the transistors, and otherwise, according to the control by the control circuit, sets each of gate inputs of the rest of the transistors to either a high-impedance state or a second voltage by which the plurality of transistors are turned on. | 2011-07-28 |
20110181342 | HIGH-FREQUENCY SWITCH MODULE - A high-frequency switch module includes a switch element, high-frequency circuits, and a GND circuit. The switch element includes an antenna port, switch ports, and an FET switch. The FET switch switches connection between the switch ports and the antenna port. The high-frequency circuits connect any of the switch ports to a signal processing circuit. In the GND circuit, the switch port, which is not connected to the high-frequency circuits, is directly connected to a GND electrode. | 2011-07-28 |
20110181343 | Power controlling integrated circuit and retention switching circuit - A power control integrated circuit is provided having a voltage switching device and a retention switching device that has an input from an overdrive voltage supply such that in a retention enabled configuration a retention switching device is switched on more strongly relative to being both coupled to and driven from the voltage supply input signal associated with the voltage switching device. An overdriven retention switching device is provided as a separate entity from the voltage switching device itself and a computer readable storage medium is provided storing a data structure comprising a standard cell circuit definition for use in generating validating the circuit layout of a circuit cell of an integrated circuit. The circuit cell comprising an overdriven retention switching device. A further data structure corresponding to a standard cell is provided comprising an overdriven retention switching device and a voltage switching device and yet a further standard cell data structure is provided comprising an overdriven voltage switching device. | 2011-07-28 |