29th week of 2017 patent applcation highlights part 51 |
Patent application number | Title | Published |
20170207147 | CHIP PACKAGE HAVING INTEGRATED CAPACITOR | 2017-07-20 |
20170207148 | LEAD FRAME AND SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207150 | CLIP-BONDED SEMICONDUCTOR CHIP PACKAGE USING METAL BUMPS AND METHOD FOR MANUFACTURING THE PACKAGE | 2017-07-20 |
20170207151 | SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | 2017-07-20 |
20170207152 | Package Structure To Enhance Yield of TMI Interconnections | 2017-07-20 |
20170207153 | SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-07-20 |
20170207154 | SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207155 | PRINTED CIRCUIT BOARD, SEMICONDUCTOR PACKAGE INCLUDING THE PRINTED CIRCUIT BOARD, AND METHOD OF MANUFACTURING THE PRINTED CIRCUIT BOARD | 2017-07-20 |
20170207156 | SUBSTRATE STRUCTURE | 2017-07-20 |
20170207157 | METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE, AND SEMICONDUCTOR PACKAGE | 2017-07-20 |
20170207158 | MULTI-STACKED DEVICE HAVING TSV STRUCTURE | 2017-07-20 |
20170207159 | POROUS ALUMINA TEMPLATES FOR ELECTRONIC PACKAGES | 2017-07-20 |
20170207160 | POWER ELECTRONICS PACKAGE AND METHOD OF MANUFACTURING THEREOF | 2017-07-20 |
20170207161 | SUBSTRATE STRUCTURE AND METHOD OF MANUFACTURING THE SAME | 2017-07-20 |
20170207162 | METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE USING THE SAME | 2017-07-20 |
20170207163 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME | 2017-07-20 |
20170207164 | METHOD FOR FABRICATING SEMICONDUCTOR STRUCTURES INCLUDING A HIGH RESISTIVTY LAYER, AND RELATED SEMICONDUCTOR STRUCTURES | 2017-07-20 |
20170207165 | METHOD, APPARATUS, AND SYSTEM FOR OFFSET METAL POWER RAIL FOR CELL DESIGN | 2017-07-20 |
20170207166 | METHOD FOR FABRICATING A LOCAL INTERCONNECT IN A SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207167 | Copper Contact Plugs with Barrier Layers | 2017-07-20 |
20170207168 | BRIDGE INTERCONNECTION WITH LAYERED INTERCONNECT STRUCTURES | 2017-07-20 |
20170207169 | Backside Contacts for Integrated Circuit Devices | 2017-07-20 |
20170207170 | MULTI-LAYER PACKAGE | 2017-07-20 |
20170207171 | FLEXIBLE SUBSTRATE HAVING A VIA-HOLE WITH A CONDUCTIVE MATERIAL AND A METHOD FOR MANUFACTURING THE SAME | 2017-07-20 |
20170207172 | ELECTRONIC COMPONENT PACKAGE AND METHOD OF MANUFACTURING THE SAME | 2017-07-20 |
20170207173 | PACKAGE SUBSTRATE | 2017-07-20 |
20170207174 | SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207175 | CONTACT USING MULTILAYER LINER | 2017-07-20 |
20170207176 | Method for Forming Alignment Marks and Structure of Same | 2017-07-20 |
20170207177 | Quasi-Lateral Diffusion Transistor with Diagonal Current Flow Direction | 2017-07-20 |
20170207178 | SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207179 | SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207180 | SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207181 | WAFER PROCESSING METHOD | 2017-07-20 |
20170207182 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME | 2017-07-20 |
20170207183 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-07-20 |
20170207184 | SEMICONDUCTOR DEVICE AND METHOD | 2017-07-20 |
20170207185 | PATTERN DECOMPOSITION LITHOGRAPHY TECHNIQUES | 2017-07-20 |
20170207186 | ELECTRONIC DEVICE AND ELECTRONIC APPARATUS | 2017-07-20 |
20170207187 | METHOD FOR PRODUCING MEMBER FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE, AND MEMBER FOR SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207188 | METHOD FOR FABRICATING GLASS SUBSTRATE PACKAGE | 2017-07-20 |
20170207189 | STRUCTURE AND METHOD OF REINFORCING A CONDUCTOR SOLDERING POINT OF SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207190 | CONNECTION BODY AND METHOD OF MANUFACTURING CONNECTION BODY | 2017-07-20 |
20170207191 | BONDING SYSTEM AND ASSOCIATED APPARATUS AND METHOD | 2017-07-20 |
20170207192 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207193 | APPARATUS AND METHODS FOR MICRO-TRANSFER-PRINTING | 2017-07-20 |
20170207194 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME | 2017-07-20 |
20170207195 | SEMICONDUCTOR DEVICES WITH DUPLICATED DIE BOND PADS AND ASSOCIATED DEVICE PACKAGES AND METHODS OF MANUFACTURE | 2017-07-20 |
20170207196 | INTEGRATED CIRCUIT STRUCTURES WITH RECESSED CONDUCTIVE CONTACTS FOR PACKAGE ON PACKAGE | 2017-07-20 |
20170207197 | DEVICES, PACKAGED SEMICONDUCTOR DEVICES, AND SEMICONDUCTOR DEVICE PACKAGING METHODS | 2017-07-20 |
20170207198 | ELECTRONIC PACKAGES WITH THREE-DIMENSIONAL CONDUCTIVE PLANES, AND METHODS FOR FABRICATION | 2017-07-20 |
20170207199 | LAMINATED SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF LAMINATED SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207200 | THERMALLY ENHANCED SEMICONDUCTOR ASSEMBLY WITH THREE DIMENSIONAL INTEGRATION AND METHOD OF MAKING THE SAME | 2017-07-20 |
20170207201 | METHOD FOR FABRICATING FAN-OUT WAFER LEVEL PACKAGE AND FAN-OUT WAFER LEVEL PACKAGE FABRICATED THEREBY | 2017-07-20 |
20170207202 | LIGHT EMITTING DIODES AND REFLECTOR | 2017-07-20 |
20170207203 | LIGHT EMITTING DEVICE | 2017-07-20 |
20170207204 | Integrated Fan-Out Package on Package Structure and Methods of Forming Same | 2017-07-20 |
20170207205 | SEMICONDUCTOR PACKAGES | 2017-07-20 |
20170207206 | MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEADS FOR STACKED DIE PACKAGES, AND ASSOCIATED SYSTEMS AND METHODS | 2017-07-20 |
20170207207 | Package-on-Package (PoP) Device with Integrated Passive Device in a Via | 2017-07-20 |
20170207208 | MULTI-CHIP PACKAGE SYSTEM AND METHODS OF FORMING THE SAME | 2017-07-20 |
20170207209 | INTEGRATED CIRCUITS WITH HIGH VOLTAGE AND HIGH DENSITY CAPACITORS AND METHODS OF PRODUCING THE SAME | 2017-07-20 |
20170207210 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207211 | SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207212 | ELECTROSTATIC PROTECTIVE DEVICE AND ELECTROSTATIC PROTECTIVE CIRCUIT | 2017-07-20 |
20170207213 | Power Module with MOSFET Body Diode on which Energization Test can be Conducted Efficiently | 2017-07-20 |
20170207214 | 3D SEMICONDUCTOR DEVICE AND STRUCTURE | 2017-07-20 |
20170207215 | APPARATUS AND ASSOCIATED METHOD | 2017-07-20 |
20170207216 | MULTIPLE THRESHOLD VOLTAGES USING FIN PITCH AND PROFILE | 2017-07-20 |
20170207217 | FINFET HAVING LOCALLY HIGHER FIN-TO-FIN PITCH | 2017-07-20 |
20170207218 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-07-20 |
20170207219 | SEMICONDUCTOR DEVICE HAVING A GATE STACK WITH TUNABLE WORK FUNCTION | 2017-07-20 |
20170207220 | VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME | 2017-07-20 |
20170207221 | THREE-DIMENSIONAL (3D) SEMICONDUCTOR MEMORY DEVICES | 2017-07-20 |
20170207222 | FLOATING BODY MEMORY CELL HAVING GATES FAVORING DIFFERENT CONDUCTIVITY TYPE REGIONS | 2017-07-20 |
20170207223 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-07-20 |
20170207224 | Embedded Transistor | 2017-07-20 |
20170207225 | Method for manufacturing a microelectronic circuit and corresponding microelectronic circuit | 2017-07-20 |
20170207226 | SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207227 | MEMORY CIRCUIT HAVING RESISTIVE DEVICE COUPLED WITH SUPPLY VOLTAGE LINE | 2017-07-20 |
20170207228 | NONVOLATILE MEMORY STRUCTURE | 2017-07-20 |
20170207229 | VOLTAGE SWITCHING CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME | 2017-07-20 |
20170207230 | SINGLE-POLY NONVOLATILE MEMORY CELL STRUCTURE HAVING AN ERASE DEVICE | 2017-07-20 |
20170207231 | SINGLE POLY NON-VOLATILE MEMORY DEVICE, METHOD OF MANUFACTURING THE SAME AND SINGLE POLY NON-VOLATILE MEMORY DEVICE ARRAY | 2017-07-20 |
20170207232 | MEMORY DEVICE | 2017-07-20 |
20170207233 | SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD THEREOF | 2017-07-20 |
20170207234 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-07-20 |
20170207235 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207236 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207237 | SEMICONDUCTOR MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207238 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE | 2017-07-20 |
20170207239 | Connection Structure for Vertical Gate All Around (VGAA) Devices on Semiconductor On Insulator (SOI) Substrate | 2017-07-20 |
20170207240 | ARRAY SUBSTRATE, METHOD FOR PRODUCING THE SAME, AND DISPLAY APPARATUS | 2017-07-20 |
20170207241 | DISPLAY DEVICE | 2017-07-20 |
20170207242 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-07-20 |
20170207243 | THIN FILM TRANSISTOR ARRAY PANEL | 2017-07-20 |
20170207244 | Semiconductor Device | 2017-07-20 |
20170207245 | SEMICONDUCTOR DEVICE | 2017-07-20 |
20170207246 | ARRAY SUBSTRATE AND FABRICATION METHOD THEREOF, DISPLAY PANEL | 2017-07-20 |
20170207247 | SEMICONDUCTOR DEVICE, DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE, DISPLAY MODULE INCLUDING THE DISPLAY DEVICE, AND ELECTRONIC APPLIANCE INCLUDING THE SEMICONDUCTOR DEVICE, THE DISPLAY DEVICE, AND THE DISPLAY MODULE | 2017-07-20 |