29th week of 2018 patent applcation highlights part 53 |
Patent application number | Title | Published |
20180204716 | PROTECTIVE FILM FORMING METHOD | 2018-07-19 |
20180204717 | METHOD AND DEVICE FOR THE SURFACE TREATMENT OF SUBSTRATES | 2018-07-19 |
20180204718 | SOURCE AND DRAIN PROCESS FOR FINFET | 2018-07-19 |
20180204719 | MULTIPLE PATTERNING APPROACH USING ION IMPLANTATION | 2018-07-19 |
20180204720 | SUBSTRATE PROCESSING APPARATUS | 2018-07-19 |
20180204721 | Precursors Of Manganese And Manganese-Based Compounds For Copper Diffusion Barrier Layers And Methods Of Use | 2018-07-19 |
20180204722 | METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE | 2018-07-19 |
20180204723 | IMAGE TRANSFER USING EUV LITHOGRAPHIC STRUCTURE AND DOUBLE PATTERNING PROCESS | 2018-07-19 |
20180204724 | IMAGE TRANSFER USING EUV LITHOGRAPHIC STRUCTURE AND DOUBLE PATTERNING PROCESS | 2018-07-19 |
20180204725 | Method of Manufacturing a Silicon Carbide Semiconductor Device by Removing Amorphized Portions | 2018-07-19 |
20180204726 | BARRIER LAYER ABOVE ANTI-PUNCH THROUGH (APT) IMPLANT REGION TO IMPROVE MOBILITY OF CHANNEL REGION OF FIN FIELD EFFECT TRANSISTOR (FINFET) DEVICE STRUCTURE | 2018-07-19 |
20180204727 | Method of Fabricating a Tunnel Oxide Layer and a Tunnel Oxide Layer for a Semiconductor Device | 2018-07-19 |
20180204728 | Dry Etching Method | 2018-07-19 |
20180204729 | SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING DEVICE | 2018-07-19 |
20180204730 | METHOD OF FORMING PATTERNS, PATTERNS FORMED ACCORDING TO THE METHOD, AND SEMICONDUCTOR DEVICE INCLUDING THE PATTERNS | 2018-07-19 |
20180204731 | SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS THEREOF | 2018-07-19 |
20180204732 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM | 2018-07-19 |
20180204733 | METHOD OF PREFERENTIAL SILICON NITRIDE ETCHING USING SULFUR HEXAFLUORIDE | 2018-07-19 |
20180204734 | ETCHING PLATINUM-CONTAINING THIN FILM USING PROTECTIVE CAP LAYER | 2018-07-19 |
20180204735 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM | 2018-07-19 |
20180204736 | COMPOSITIONS AND METHODS FOR REMOVING CERIA PARTICLES FROM A SURFACE | 2018-07-19 |
20180204737 | METHOD OF MANUFACTURNG SOLAR CELL | 2018-07-19 |
20180204738 | CHAMBER FOR PATTERNING NON-VOLATILE METALS | 2018-07-19 |
20180204739 | SELECTIVE PLANISHING METHOD FOR MAKING A SEMICONDUCTOR DEVICE | 2018-07-19 |
20180204740 | SYSTEM AND METHOD FOR LASER ASSISTED BONDING OF SEMICONDUCTOR DIE | 2018-07-19 |
20180204741 | SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THEREOF | 2018-07-19 |
20180204742 | SUBSTRATE PROCESSING APPARATUS | 2018-07-19 |
20180204743 | SUBSTRATE TREATMENT METHOD AND SUBSTRATE TREATMENT DEVICE | 2018-07-19 |
20180204744 | SCRUBBING APPARATUS FOR ELECTRONIC MODULE AND AN AUTOMATIC SCRUBBING METHOD THEREOF | 2018-07-19 |
20180204745 | SUBSTRATE PROCESSING APPARATUS, SUBSTRATE PROCESSING METHOD AND COMPUTER READABLE RECORDING MEDIUM | 2018-07-19 |
20180204746 | GRINDING APPARATUS | 2018-07-19 |
20180204747 | SUBSTRATE SUPPORT ASSEMBLY HAVING SURFACE FEATURES TO IMPROVE THERMAL PERFORMANCE | 2018-07-19 |
20180204748 | CERAMIC HEATER | 2018-07-19 |
20180204749 | FLEXIBLE SUPPORT SUBSTRATE FOR TRANSFER OF SEMICONDUCTOR DEVICES | 2018-07-19 |
20180204750 | PLASMA PARAMETERS AND SKEW CHARACTERIZATION BY HIGH SPEED IMAGING | 2018-07-19 |
20180204751 | SUBSTRATE CONTAINER WITH ENHANCED CONTAINMENT | 2018-07-19 |
20180204752 | FRAME UNIT TRANSFER SYSTEM | 2018-07-19 |
20180204753 | DOOR OPENING/CLOSING SYSTEM, AND LOAD PORT EQUIPPED WITH DOOR OPENING/CLOSING SYSTEM | 2018-07-19 |
20180204754 | SUBSTRATE SUPPORTING DEVICE | 2018-07-19 |
20180204755 | RADIANT HEATING PRESOAK | 2018-07-19 |
20180204756 | PLASMA PROCESSING APPARATUS | 2018-07-19 |
20180204757 | PLASMA PROCESSING APPARATUS | 2018-07-19 |
20180204758 | Integrated Circuit Structure with Guard Ring | 2018-07-19 |
20180204759 | INTERCONNECT STRUCTURE INCLUDING AIRGAPS AND SUBSTRACTIVELY ETCHED METAL LINES | 2018-07-19 |
20180204760 | MASKLESS AIR GAP TO PREVENT VIA PUNCH THROUGH | 2018-07-19 |
20180204761 | LATERAL PiN DIODES AND SCHOTTKY DIODES | 2018-07-19 |
20180204762 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2018-07-19 |
20180204763 | SELF-ALIGNED ISOTROPIC ETCH OF PRE-FORMED VIAS AND PLUGS FOR BACK END OF LINE (BEOL) INTERCONNECTS | 2018-07-19 |
20180204764 | POST-ETCH RESIDUE REMOVAL FOR ADVANCED NODE BEOL PROCESSING | 2018-07-19 |
20180204765 | MODIFIED SELF-ALIGNED QUADRUPLE PATTERNING (SAQP) PROCESSES USING CUT PATTERN MASKS TO FABRICATE INTEGRATED CIRCUIT (IC) CELLS WITH REDUCED AREA | 2018-07-19 |
20180204766 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATION METHOD | 2018-07-19 |
20180204767 | SACRIFICIAL LAYER FOR PLATINUM PATTERNING | 2018-07-19 |
20180204768 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2018-07-19 |
20180204769 | LOW TEMPERATURE POLY SILICON BACKBOARD, METHOD FOR MANUFACTURING THE SAME AND LIGHT-EMITTING DEVICE | 2018-07-19 |
20180204770 | REMOVABLE TEMPORARY PROTECTIVE LAYERS FOR USE IN SEMICONDUCTOR MANUFACTURING | 2018-07-19 |
20180204771 | METHOD OF PROCESSING A SUBSTRATE | 2018-07-19 |
20180204772 | SYSTEMS AND METHODS FOR CONTROLLING RELEASE OF TRANSFERABLE SEMICONDUCTOR STRUCTURES | 2018-07-19 |
20180204773 | MEMORY SYSTEM PERFORMING TRAINING OPERATION | 2018-07-19 |
20180204774 | UNIFORM SHALLOW TRENCH ISOLATION | 2018-07-19 |
20180204775 | UNIFORM SHALLOW TRENCH ISOLATION | 2018-07-19 |
20180204776 | BACKSIDE PROCESSED SEMICONDUCTOR DEVICE | 2018-07-19 |
20180204777 | METHOD OF PROCESSING SUBSTRATE AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE SAME | 2018-07-19 |
20180204778 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MODULE PROVIDED WITH SAME | 2018-07-19 |
20180204779 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD | 2018-07-19 |
20180204780 | Package with Tilted Interface between Device Die and Encapsulating Material | 2018-07-19 |
20180204781 | HIGH-FREQUENCY MODULE | 2018-07-19 |
20180204782 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2018-07-19 |
20180204783 | EMI SHIELDING STRUCTURE HAVING HEAT DISSIPATION UNIT AND METHOD FOR MANUFACTURING THE SAME | 2018-07-19 |
20180204784 | SEMICONDUCTOR DEVICE, INVERTER DEVICE, AND VEHICLE | 2018-07-19 |
20180204785 | HIGH-FREQUENCY DEVICE AND MANUFACTURING METHOD THEREOF | 2018-07-19 |
20180204786 | DIE WITH METALLIZED SIDEWALL AND METHOD OF MANUFACTURING | 2018-07-19 |
20180204787 | LEAD FRAME AND METHOD FOR MANUFACTURING THE SAME | 2018-07-19 |
20180204788 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2018-07-19 |
20180204789 | THYRISTOR AND THERMAL SWITCH DEVICE AND ASSEMBLY TECHNIQUES THEREFOR | 2018-07-19 |
20180204790 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2018-07-19 |
20180204791 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | 2018-07-19 |
20180204792 | WORK PIECES AND METHODS OF LASER DRILLING THROUGH HOLES IN SUBSTRATES USING AN EXIT SACRIFICIAL COVER LAYER | 2018-07-19 |
20180204793 | PRINTED CIRCUIT BOARD AND ELECTRONIC EQUIPMENT | 2018-07-19 |
20180204794 | REDUCING TIP-TO-TIP DISTANCE BETWEEN END PORTIONS OF METAL LINES FORMED IN AN INTERCONNECT LAYER OF AN INTEGRATED CIRCUIT (IC) | 2018-07-19 |
20180204795 | Coarse Grid Design Methods and Structures | 2018-07-19 |
20180204796 | EMBEDDED METAL-INSULATOR-METAL (MIM) DECOUPLING CAPACITOR IN MONOLITIC THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT (IC) STRUCTURE | 2018-07-19 |
20180204797 | BOTTOM-UP SELECTIVE DIELECTRIC CROSS-LINKING TO PREVENT VIA LANDING SHORTS | 2018-07-19 |
20180204798 | INCREASED CONTACT ALIGNMENT TOLERANCE FOR DIRECT BONDING | 2018-07-19 |
20180204799 | CONDUCTIVE STRUCTURES, SYSTEMS AND DEVICES INCLUDING CONDUCTIVE STRUCTURES AND RELATED METHODS | 2018-07-19 |
20180204800 | MULTI-LEVEL METALLIZATION INTERCONNECT STRUCTURE | 2018-07-19 |
20180204801 | Method of Forming an Interconnect Structure Having an Air Gap and Structure Thereof | 2018-07-19 |
20180204802 | WIRING BOARD HAVING COMPONENT INTEGRATED WITH LEADFRAME AND METHOD OF MAKING THE SAME | 2018-07-19 |
20180204803 | INTERCONNECT STRUCTURE WITH NITRIDED BARRIER | 2018-07-19 |
20180204804 | ELECTROMAGNETIC SHIELDING FOR INTEGRATED CIRCUIT MODULES | 2018-07-19 |
20180204805 | COMPOSITE MAGNETIC SEALING MATERIAL AND ELECTRONIC CIRCUIT PACKAGE USING THE SAME AS MOLD MATERIAL | 2018-07-19 |
20180204806 | MULTIPLE DRIVER PIN INTEGRATED CIRCUIT STRUCTURE | 2018-07-19 |
20180204807 | SEMICONDUCTOR DEVICE | 2018-07-19 |
20180204808 | Semiconductor Device with Circumferential Structure and Method of Manufacturing | 2018-07-19 |
20180204809 | SEMICONDUCTOR PACKAGE STRUCTURE FOR IMPROVING DIE WARPAGE AND MANUFACTURING METHOD THEREOF | 2018-07-19 |
20180204810 | Chip-on-Substrate Packaging on Carrier | 2018-07-19 |
20180204811 | SEMICONDUCTOR ELEMENT | 2018-07-19 |
20180204812 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD | 2018-07-19 |
20180204813 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD | 2018-07-19 |
20180204814 | METHOD FOR PREPARING A SEMICONDUCTOR PACKAGE | 2018-07-19 |
20180204815 | Package Substrates, Packaged Semiconductor Devices, and Methods of Packaging Semiconductor Devices | 2018-07-19 |