29th week of 2013 patent applcation highlights part 18 |
Patent application number | Title | Published |
20130181723 | Current Measurement in a Power Transistor - A circuit arrangement includes a load transistor and a sense transistor. The first load terminal of the load transistor is coupled to the first load terminal of the sense transistor. A measurement circuit comprising a current source configured to provide a calibration current, the measurement circuit configured to measure a first voltage between the first load terminal and the second load terminal of the sense transistor in the on-state of the sense transistor, to determine a resistance of the sense transistor based on the calibration current and the first voltage, to measure a second voltage between the first load terminal and the second load terminal of the load transistor in the on-state of the load transistor, and to determine a load current through the load transistor based on the resistance of the sense transistor and the second voltage. | 2013-07-18 |
20130181724 | METHOD AND SYSTEM OF WIRELESS POWER TRANSFER FOREIGN OBJECT DETECTION - A wireless power transfer foreign object detector having, at least one secondary receiver coil, an adjustable load electrically coupled to the at least one secondary receiver coil, and at least one temperature sensor providing at least one temperature detection signal, wherein the at least one temperature sensor responsive to at least one thermal state of the at least one secondary receiver coil, and wherein foreign object detection is based at least in part upon the at least one temperature detection signal. | 2013-07-18 |
20130181725 | MEANDER-LINE RING RESONATOR - Methods and apparatus for measuring permittivity comprising: a meander-line ring resonator, which may be may be disposed on a substrate proximate to and separated from an input coupler and an output coupler thereon, the resonator ring further including a continuous conductive material having at least two turns to form a single congruent pattern, symmetrical along at least one axis. | 2013-07-18 |
20130181726 | TOUCH SURFACE AND METHOD OF MANUFACTURING SAME - A device for detecting and quantifying a force applied on a surface comprising a test specimen, an electrically insulating substrate, a first electrode bound to the substrate, a second electrode, an assembly of conductive or semi-conductive nanoparticles in contact with the two electrodes, and a measurement device. The measurement device provides proportional information with respect to an electrical property of the nanoparticles assembly. The electrical property is measured between the first and second electrode. The test specimen is the nanoparticles assembly itself and the electrical property is sensitive to the distance between the nanoparticles of the assembly. The invention uses the nanoparticles assembly itself as a test specimen and allows a force to be quantified even if the nanoparticles assembly is deposited on a rigid substrate. | 2013-07-18 |
20130181727 | CAPACITIVE SENSOR SHEET AND PRODUCTION METHOD THEREOF - A production method of a capacitive sensor sheet, comprising: a film forming step forming of a optically-transparent electroconductive film | 2013-07-18 |
20130181728 | COMPONENT FOR CONDUCTING OR RECEIVING A FLUID AND METHOD FOR TESTING THE COMPONENT - A component for conducting or receiving a fluid, in particular a component of a fluid-conducting line system of an industrial plant, especially of a line system of a tertiary cooling circuit of a nuclear power plant, includes a wall having a supporting structure made of a glass-fiber-reinforced plastic. Electrically insulating inner and outer protective layers are disposed on respective inner and outer surfaces of the supporting structure. An electrically conductive inner intermediate layer lies between the inner protective layer and the supporting structure and is provided with an electrical terminal. An electrically conductive outer intermediate layer lies between the outer protective layer and the supporting structure, is provided with an electrical terminal and is electrically insulated from the inner intermediate layer. A method for testing the component is also provided. | 2013-07-18 |
20130181729 | TESTING PROTECTION SCHEMES OF A POWER CONVERTER - A system for testing the existing protection schemes of a power converter. The system simulates the voltage regulator producing a voltage level below an under-voltage threshold. The system simulates the voltage regulator producing a voltage level above an over-voltage threshold. The system simulates a short in the power converter pulling down the input bus. The system simulates a short in the power converter pulling down the output bus. The system measures the system responses to these simulations against responses of a properly operating system and determines if the power converter's protection schemes are operating correctly. | 2013-07-18 |
20130181730 | PULSED BEHAVIOR MODELING WITH STEADY STATE AVERAGE CONDITIONS - A method for pulsed behavior modeling of a device under test (DUT) using steady state conditions is disclosed. The method includes providing an automated test system (ATS) programmed to capture at least one behavior of the DUT. The ATS then generates a DUT input power pulse that transitions from a predetermined steady state level to a predetermined pulse level and back to the predetermined steady state level. At least one behavior of the DUT is then captured by the ATS while the input power is at the predetermined pulse level. The ATS then steps the predetermined pulse level to a different predetermined pulse level, and the above steps are repeated until a range of predetermined pulse levels is swept. The ATS then steps the predetermined steady state level to a different steady state level, and the above steps are repeated until a range of predetermined steady state levels is swept. | 2013-07-18 |
20130181731 | INVERTER - In a test of discharging a capacitor by electrically turning on a first switching element and a second switching element that are inserted in series in a conductor connecting a positive electrode and a negative electrode of the capacitor, a discharge current that passes through the first and second switching elements tend to apply stress on the first and second switching elements. In this discharge test, while a first control signal for putting the first switching element into a low resistance state is being applied to the first switching element, a second control signal increasing a voltage thereof over time is applied to the second switching element, and application of one of or both of the first and second control signals is stopped when a current detector detects a current. Since a discharge test ends when a limited discharge current starts flowing, stress associated with the discharge test is reduced. | 2013-07-18 |
20130181732 | METHODS OF PREVENTING FREEZING OF RELAYS IN ELECTRICAL COMPONENTS - Disclosed herein are methods of preventing freezing of relays in electrical components operated in specific atmospheric conditions. One such method described herein comprises monitoring a temperature of a relay with a thermocouple located on a contact of the relay while monitoring ambient temperature within the relay. Operation of the electrical component is simulated in a sub-zero temperature and high humidity condition. A freeze potential of the relay is determined by plotting a temperature cross-over curve, wherein both the ambient temperature and the contact temperature are plotted during the operation and cool down period. If the high freeze potential is determined, one or both of the relay and the electrical component are modified with a modification configured to decrease the high freeze potential. | 2013-07-18 |
20130181733 | HANDLER APPARATUS AND TEST METHOD - Provided is a handler apparatus which can connect devices under test to sockets of a test apparatus quickly and with low power consumption. The handler apparatus for conveying and connecting a plurality of devices under test to a plurality of sockets provided on a test head of a test apparatus, includes a position adjusting section that moves each of the plurality of devices under test on the test tray and adjusts the position thereof to a corresponding one of the plurality of sockets; and a device mounting section that mounts the plurality of devices under test whose positions have been adjusted by the position adjusting section, to the plurality of sockets | 2013-07-18 |
20130181734 | HANDLER AND TEST APPARATUS - A handler for conveying a plurality of devices under test to a socket for a test that can reduce a test time includes: a test section provided with the socket; a heat applying section into which a tray having a plurality of devices under test placed on its surface is conveyed and that controls the temperature of the devices under test to a predetermined test temperature and conveys the tray into the test section; a device image capturing section that in the heat applying section, captures images of the respective devices under test by moving with respect to the surface of the tray in two non-parallel directions of a first direction and a second direction; and a position adjusting section that adjusts the positions of the devices under test with respect to the socket based on the images of the devices under test captured by the device image capturing section. | 2013-07-18 |
20130181735 | HANDLER AND TEST APPARATUS - A handler for conveying DUTs to a socket for a test that can reduce a test time includes: a test section including the socket; a heat applying section into which a tray having plural DUTs placed on its surface is conveyed and that controls the temperature of the DUTs to a predetermined test temperature and conveys the tray into the test section; and a device image capturing section that includes imaging elements arranged along a first direction the number of which is equal to DUTs arranged along the first direction and that in the heat applying section, captures images of the DUTs by moving the imaging elements relative to the surface of the tray in a second direction non-parallel with the first direction; and a position adjusting section that adjusts the positions of the DUTs relative to the socket based on their images captured by the device image capturing section. | 2013-07-18 |
20130181736 | I-V MEASUREMENT SYSTEM FOR PHOTOVOLTAIC MODULES - An apparatus for measuring electrical characteristics of solar panels (photovoltaic modules) wherein the apparatus measures current versus voltage (“I-V”) relationships for both illuminated (“light I-V”) and/or non-illuminated (“dark I-V”) conditions; optionally provides single, dual, or four-quadrant source/sink capability; and measures one or more devices under test (DUTs). The apparatus comprises one or more source measurement units (SMUs), wherein each SMU is connected to one DUT, and optionally includes a positive high-voltage programmable power supply and/or a negative high-voltage programmable power supply. Additionally, the apparatus includes a controller which controls the functions of the SMUs, the high-voltage supplies, and other components of the apparatus, wherein the controller communicates with the SMUs over a signal bus. Finally, the apparatus may include a computer to provide a user interface, communicate with the controller to initiate measurements and record results, analyze resulting data to determine measured parameters, and/or store the measured data. | 2013-07-18 |
20130181737 | TEST SYSTEM AND TEST METHOD FOR PCBA - A test system is provided. A printed circuit board (PCB) includes a plurality of traces and at least one test point. A central processing unit (CPU) socket including a plurality of first pins and a memory module slot including a plurality of second pins are disposed on the PCB. Each of the second pins is coupled to the corresponding first pin of the CPU socket via the corresponding trace. A CPU interposer board is inserted into the CPU socket, and a memory interposer board is inserted into the memory module slot. The traces form a test loop via the CPU interposer board and the memory interposer board. When an automatic test equipment (ATE) provides a test signal to the test loop via the test point, the ATE determines whether the test loop is normal according to a reflectometry result of the test signal. | 2013-07-18 |
20130181738 | SOFT ERROR RESILIENT FPGA - A field programmable gate array (FPGA) includes configuration RAM (CRAM) including at least one non-hardened portion and at least one hardened portion having an SER resilience greater than an SER resilience of the non-hardened portion. | 2013-07-18 |
20130181739 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE CONTROL METHOD - A semiconductor device comprises: reconfigurable logic circuit that includes plurality of resistance change elements; logical configuration of the reconfigurable logic circuit being decided depending on whether each of plurality of resistance change elements is in first resistance state or in second resistance state whose resistance value is lower than resistance value of first resistance state; resistance value monitor circuit that includes resistance change element pre-programmed to the first resistance state; the resistance value monitor circuit detecting whether or not pre-programmed resistance change element retains the first resistance state; and controller that, in case it is detected that resistance change element provided in resistance value monitor circuit doe not retain first resistance state, applies voltage used in programming from second resistance state to first resistance state to resistance change element retaining first resistance states, out of plurality of resistance change elements provided in reconfigurable logic circuit. | 2013-07-18 |
20130181740 | MULTI-THRESHOLD SLEEP CONVENTION LOGIC WITHOUT NSLEEP - A Static Sleep Convention Logic (SSCL) circuit. The circuit improves upon Multi-Threshold NULL Convention Logic (MTNCL), disclosed in U.S. Pat. No. 7,977,972, by utilizing the SECRII architecture along with the Bit-Wise MTNCL technique, to produce a new SSCL gate without an nsleep input, which yields a smaller and faster circuit that utilizes less energy per operation than the patented SMTNCL gate design, while only very slightly increasing leakage power during sleep mode. | 2013-07-18 |
20130181741 | LEVEL SHIFTERS AND INTEGRATED CIRCUITS THEREOF - An integrated circuit including a first level shifter configured to receive a first input signal and a first power supply signal, and to output a first output signal. The integrated circuit further includes a first inverter configured to receive the first output signal, and to output a first inverter signal. The integrated circuit further includes a second level shifter configured to receive a second input signal and a second power supply signal, and to output a second output signal, wherein a voltage level of the second power supply signal is different from a voltage level of the first power supply signal. The integrated circuit further includes a second inverter configure to receive the second output signal, and to output a second inverter signal. The integrated circuit further includes an output buffer configured to receive the first inverter signal and the second inverter signal, and to output a buffer output signal. | 2013-07-18 |
20130181742 | METHOD AND APPARATUS TO SERIALIZE PARALLEL DATA INPUT VALUES - A method includes applying a clock signal having an uneven duty cycle to a control input of at least one selection element of a selection circuit having a tree structure that includes multiple selection elements. The tree structure includes a data input tier and a data output tier. | 2013-07-18 |
20130181743 | Binary Logic Unit and Method to Operate a Binary Logic Unit - A binary logic unit to apply any Boolean operation on two input signals (v | 2013-07-18 |
20130181744 | ANALOG PEAK HOLD CIRCUITS - A peak hold circuit includes an input node configured to receive an input waveform, a peak hold component coupled to the input node and configured to sample and hold a peak value of the input waveform at a peak value node, a reset node configured to receive a reset signal, a reset circuit coupled to the peak hold component and the reset node, the reset circuit configured to reset the peak hold value, and a voltage clamp coupled to the input node, the reset circuit, and the reset node, the voltage clamp configured to clamp the input node in response to the reset signal. | 2013-07-18 |
20130181745 | DIGITAL INPUT WITH VARIABLE IMPEDANCE - A device for sensing a binary signal includes a device configured to measure a signal level of the signal, a device configured to determine whether the measured signal level is “low” or “high”, a device configured to provide a variable input impedance, and a device configured to control the input impedance in response to the measured signal level. The variable input impedance may be provided by way of a transistor and a resistor, and by controlling the duty ratio of the transistor using pulse width modulation. Preferably, the input impedance is controlled to be low for low signal levels and to be high for high signal levels, which results in a more reliable sensing of binary signals. The device may be used for detecting the state of contact transducers suffering from parasitic resistances caused by moist and/or polluted environments. Further, a method of sensing a binary signal is provided. | 2013-07-18 |
20130181746 | CONTINUOUS TIME CROSS-CORRELATOR - There is provided a continuous time cross-correlator comprising: a quantizer for quantizing the incoming signal into discrete levels; a delay line comprising one or more delay units separating a plurality of delay line taps; for each of said delay line taps, a comparator for comparing the signal level of the delay line tap with a correlation value; a continuous time counter for taking the outputs of the plurality of comparators as its inputs, counting the results of the comparisons and outputting the results of the comparisons; and an output comparator for comparing the counter output with a threshold value. The cross-correlator provides for high speed continuous time cross-correlation with low power consumption and a small chip area. Methods of continuous time cross correlation are also provided. | 2013-07-18 |
20130181747 | GATE DRIVING CIRCUIT AND DISPLAY APPARATUS HAVING THE SAME - A gate driving circuit includes a pull-up control part, a pull-up part, a carry part, a first pull-down part and a second pull-down part. The pull-up control part applies a carry signal from a previous stage to a first node. The pull-up part outputs an N-th gate output signal based on a clock signal. The carry part outputs an N-th carry signal based on the clock signal in response to the signal applied to the first node. The first pull-down part includes a plurality of transistors connected to each other in series. The first pull-down part pulls down a signal at the first node to a second off voltage in response to a carry signal of a next stage. The second pull-down part pulls down the N-th gate output signal to a first off voltage in response to the carry signal of the next stage. | 2013-07-18 |
20130181748 | METHOD AND APPARATUS FOR DRIVING A VOLTAGE CONTROLLED POWER SWITCH DEVICE - A driving circuit for at least one voltage controlled power switch device comprises a driver signal generating circuit and a trigger signal generating circuit adapted to generate trigger signals for said voltage controlled power switch device (PT). The trigger signal generating circuit includes a first driving transistor, and at least one energy buffer component coupled between the trigger signal generating circuit and the control electrode of said power switch device (PT). | 2013-07-18 |
20130181749 | DRIVE CIRCUIT FOR SWITCHING ELEMENT - The drive circuit is for turning on and off a switching element having an open/close control terminal, an input terminal and an output terminal by moving electrical charge in the open/close control terminal in accordance with an on-manipulation command and an off-manipulation command received from outside. The drive circuit includes an active gate control means for changing a moving speed of the electrical charge midway between when movement of the electrical charge is started and when the movement is completed, and a determination means for making at least one of a determination on a change timing to change the moving speed and a determination on whether or not a change of the moving speed by the active gate control means should be made. | 2013-07-18 |
20130181750 | ACTIVE GATE DRIVE CIRCUIT - Exemplary embodiments are directed to a gate drive circuit and a method for controlling a gate-controlled component. The gate drive circuit includes a PI controller that receives an input reference signal (v | 2013-07-18 |
20130181751 | SLEW-RATE LIMITED OUTPUT DRIVER WITH OUTPUT-LOAD SENSING FEEDBACK LOOP - Output driver feedback circuitry is configured to sense an amount of output capacitance of an output pad and to adjust the strength of the output driver accordingly. The feedback circuitry adjusts the output driver within a single cycle. A chain of delay reference signals is generated by representative capacitive loads that replicate a range of actual output loads. Adjustments to the output driver are based on a comparison of the delay reference signals with output of the output driver. | 2013-07-18 |
20130181752 | TIMING CONTROL CIRCUIT FOR SWITCHING CAPACITOR DYNAMIC SWITCH AND CONTROL METHOD THEREOF - A timing control circuit for a switching capacitor dynamic switch includes a first time generator and a second time generator. The first generator includes a first capacitor. The first time generator determines a first time by charging to the first capacitor. The second time generator includes a second capacitor. The first time generator is connected to the second time generator. When the first time ends, the second time generator determines a second time by discharging to the second capacitor. | 2013-07-18 |
20130181753 | High Accuracy Sin-Cos Wave and Frequency Generators, and Related Systems and Methods - High accuracy sin-cos wave and frequency generators, and related systems and methods. In non-limiting embodiments disclosed herein, the sin-cos wave generators can provide highly accurate sin-cos values for sin-cos wave generation with low hardware costs and small lookup table requirements. The embodiments disclosed herein may include a circuit to conduct an arithmetic approximation of a sin-cos curve based on a phase input. The circuit may be in communication with a point lookup table and a correction lookup table. The tables may receive the phase input and match the phase input to main sin-cos endpoints associated with the phase, and to a correction value for the phase. These values which are selected based on the phase input, may be communicated to a converter circuit where the arithmetic functions are applied to the values resulting in a sin-cos curve value. | 2013-07-18 |
20130181754 | HIGH JITTER AND FREQUENCY DRIFT TOLERANT CLOCK DATA RECOVERY - In a method for recovery of a dock from a received digital data stream and an apparatus for recovering a clock from a received digital data stream, phase-shifted dock signals are generated from a receiver's dock. After selecting one of the phase-shifted clock signals, two other phase-shifted clock signals are determined. Depending on sample values taken at rising/falling edges of the three selected phase-shifted clock signals, counter values are increased and compared. The selection of phase-shifted clock signals and the steps of sampling the input digital data stream, comparing the values and increasing counter values, if required, are repeatedly performed until the comparison result of the counter values indicates that one of the latter determined phase-shifted clock signals strobes the received digital data stream in the centre of a bit period. | 2013-07-18 |
20130181755 | SYNCHRONIZATION METHOD FOR CURRENT DIFFERENTIAL PROTECTION - A synchronization method for current differential protection comprises: selecting a point on the transmission line protected by the current differential protection; measuring the current and the voltage of each of the terminals of said transmission line; calculating the compensating voltage at the selected point respectively according to the measured current and the voltage of the each terminal; detecting and calculating the synchronization error by comparing all the compensating voltages. | 2013-07-18 |
20130181756 | CONFIGURABLE DIGITAL-ANALOG PHASE LOCKED LOOP - A phase locked loop (PLL) device is configurable in an analog phase locked loop and a hybrid analog-digital phase locked loop. In an analog mode, at least a phase detector, an analog loop filter, and a voltage controlled oscillator (VCO), are connected to form an analog loop. In a digital mode, at least the phase detector, the voltage controlled oscillator (VCO), a time to digital converter (TDC), a digital loop filter and a digital to analog converter (DAC) are connected to form the hybrid digital-analog loop. | 2013-07-18 |
20130181757 | Method and Device for Clock Recovery - A method and a device for processing a signal determine a timing phase over an observation interval of an input signal. A frequency estimation is determined based on the timing phase. A phase correction is determined for the observation interval based on the timing phase and the frequency offset. Then the phase correction is used to adjust the timing of the input signal. Also, a communication system with at least one such device is described. | 2013-07-18 |
20130181758 | Device and Method For Generating Noise Signals and Use Of a Device For Generating Noise Signals - The present invention firstly relates to a device for generating noise signals. Said device comprises at least one avalanche diode which is arranged in such a way that it is reverse-biased during intended operation of the device. Moreover, the invention relates a method for generating a noise signal by means of such a device and to a use of said device and to a method for evaluating a type of an avalanche diode or of an avalanche transistor. | 2013-07-18 |
20130181759 | ON-CHIP COARSE DELAY CALIBRATION - Process, voltage and temperature corners of an on-chip device under calibration are obtained by comparing the outputs of different on-chip components such as active on-chip components and passive-on chip components in response to an input. A first on-chip delay line including a number of active devices, which generate an array of outputs D[ ]) at different stages of the delay. A second on-chip delay line generates a single output (CLK). A DFF array samples the array of outputs (D[ ]) with the single output clock CLK. The different delay variations in different process and temperature corners cause different outputs from the DFF array. The different outputs from the DFF array provide information about the process and temperature corner that can be for rapid calibration of the on-chip device under calibration within one cycle of the CLK. | 2013-07-18 |
20130181760 | METHOD AND APPARATUS FOR GENERATING ON-CHIP CLOCK WITH LOW POWER CONSUMPTION - A fully on-chip clock generator on an integrated circuit (“IC”) includes a frequency detector for receiving a reference current and providing a first voltage; an error integrator for receiving the first voltage from the frequency detector, comparing it with a reference voltage, and providing a control voltage; a voltage controlled oscillator (“VCO”) for receiving the control voltage from the error integrator, and providing an output clock; and a logic controller on the IC, coupled between the VCO and the frequency detector, and generating logic control signals for controlling the frequency detector. The fully on-chip clock generator requires no external crystal, but its power consumption is significantly lower than a relaxation oscillator that generates the same clock frequency. | 2013-07-18 |
20130181761 | TRIMMING OF OPERATIVE PARAMETERS IN ELECTRONIC DEVICES BASED ON CORRECTIONS MAPPINGS - An embodiment of an electronic device having a plurality of operative parameters is provided. The electronic device includes means for applying a plurality of trimming actions to each parameter for causing a corresponding correction of the parameter, for at least one reference parameter, means for measuring the reference parameter responsive to the application of at least part of the trimming actions, and means for forcing the application of the selected trimming action for the reference parameter. For each non-reference parameter different from the at least one reference parameter, the electronic device includes means for selecting one of the trimming actions for the non-reference parameter corresponding to the selected trimming action for the at least one reference parameter, and means for forcing the application of the selected trimming action for each non-reference parameter. | 2013-07-18 |
20130181762 | CURRENT MIRROR MODIFIED LEVEL SHIFTER - A current mirror modified level shifter includes a pair of PMOS including a PMOS (M | 2013-07-18 |
20130181763 | LEVEL SHIFTER - A level shifter includes a resistor R | 2013-07-18 |
20130181764 | SEMICONDUCTOR INTEGRATED CIRCUIT - A constant current source circuit includes one end connected to a second node as sources of third and fourth transistors, and the other end connected to a second power supply node that supplies a second voltage different from a first voltage. The clamp circuit is configured to form a current path between the second node and the second power supply node. It adjusts the potential of the second node to a certain potential when a first external input signal is switched from a first state to a second state. | 2013-07-18 |
20130181765 | DECOUPLING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT - A decoupling circuit includes an inverter. The inverter includes i (i is an integer of 1 or more) PMOS transistors each having a first gate electrode, and j (j is an integer of 0 or more) PMOS transistors each having a second gate electrode. The inverter includes m (m is an integer of 1 or more) NMOS transistors each having a third gate electrode, and n (n is an integer of 0 or more) NMOS transistors each having a fourth gate electrode. The first to fourth gate electrodes are coupled to an input end of the inverter. A total area of the first and second gate electrodes is different from a total area of the third and fourth gate electrodes. | 2013-07-18 |
20130181766 | VOLTAGE GENERATOR - A voltage generator adapted for a flash memory is disclosed. The voltage generator includes a charge pump circuit and a voltage regulator. The charge pump circuit includes at least one charge pump unit having a voltage receiving terminal and a voltage transmitting terminal. The voltage receiving terminal receives a reference voltage and the voltage transmitting terminal generates an output voltage. The charge pump unit includes first and second voltage transmitting channels and first and second capacitors. The first and second voltage transmitting channels are turned on or off according first and second control signals, respectively. The first and second capacitors receive the first and second pump enabling signals, respectively. The voltage regulator outputs a regulated output voltage according to the output voltage. | 2013-07-18 |
20130181767 | SEMICONDUCTOR INTEGRATED CIRCUIT - A power generation block configured to generate internal power by a charge pump circuit and a power supply control block configured to control the power generation block are provided. First and second power supply interconnects individually separated from an external power supply interconnect are connected to the power generation block and the power supply control block, respectively. At least any one of the power supply interconnects is provided with a filter section configured to remove noise propagating through the power supply interconnect. | 2013-07-18 |
20130181768 | 3X INPUT VOLTAGE TOLERANT DEVICE AND CIRCUIT - A voltage tolerant input/output circuit coupled to an input/output pad, and is able to support a voltage overdrive operation of approximately twice an operational voltage, and have an input tolerance of approximately three times the operational voltage. The circuit includes a pull-up driver, a P-shield, an N-shield, a pull-down driver and a cross-control circuit. The pull-up driver is coupled to a power supply. The P-shield has an N-well and is coupled to the pull-up driver at a node C, and coupled to the input/output pad. An N-shield is also coupled to the input/output pad. A pull-down driver is coupled between ground and the N-shield at a node A. A cross-control circuit is configured to detect voltage at: the node A, the node C, and the input/output pad. The cross-control circuit is configured to output control signals to the P-shield and the N-shield based on the detected voltages. | 2013-07-18 |
20130181769 | Data Processing Method and System - For an input signal with a ringing superposed thereon, a ringing-generating filter ( | 2013-07-18 |
20130181770 | PLL CIRCUIT - A PLL circuit, for extracting phase error information from a demodulated signal in which a variance of a phase or an amplitude changes depending on a signal-to-noise power ratio, and providing negative feedback control, to thereby suppress a phase error of the demodulated signal, includes: a phase error detector for producing a phase error signal corresponding to a value of the phase error as the phase error information; a limiter circuit for limiting an expression range of the phase error signal to a constant value or less to produce the limited phase error signal; and a loop filter for producing a control signal based on the limited phase error signal to determine frequency characteristics. | 2013-07-18 |
20130181771 | LIGHT RECEIVING CIRCUIT AND PHOTO-COUPLING TYPE INSULATED CIRCUIT - According to one embodiment, a light receiving circuit includes a light receiving element, an amplifier, and a first compensator. The light receiving element is configured to output an optical current by receiving an optical signal. The amplifier is configured to convert the optical current into a voltage and amplify the voltage. The first compensator is connected to the amplifier and configured to suppress a variation in an opposite direction from a voltage variation of the amplifier when the optical current increases. | 2013-07-18 |
20130181772 | PRIMARY-SIDE FEEDBACK CONTROLLED AC/DC CONVERTER WITH AN IMPROVED ERROR AMPLIFIER - An error amplifier, a controller using the error amplifier, and a primary-side feedback controlled AC/DC converter using the controller are discussed. When the output voltage of the primary-side feedback controlled AC/DC converter according to present invention changes, the alternating current path enjoys a fast response and adjusts the output voltage quickly with a lower precision, avoiding large voltage fluctuate, then the direct current path functions slowly to reduce equivalent output error. In such a way, the output voltage precision is enhanced while the stability of the primary-side feedback controlled AC/DC converter is maintained. | 2013-07-18 |
20130181773 | MULTI-WAY DOHERTY AMPLIFIER - The present disclosure provides a multi-way Doherty amplifier that includes an amplifier input, an amplifier output, a main amplifier having an input connected to the amplifier input, and at least a first and a second peak amplifier. In the Doherty amplifier, an input of the first peak amplifier is connected to the amplifier input or an output of the main amplifier, and an input of the second peak amplifier is connected to the amplifier input, the output of the main amplifier or an output of the first peak amplifier. The Doherty amplifier further comprises a first impedance converter connected between the output of the main amplifier and the amplifier output, a second impedance converter connected between the output of the first peak amplifier and an output of the second peak amplifier, and a third impedance converter connected between the output of the second peak amplifier and the amplifier output. | 2013-07-18 |
20130181774 | ENVELOPE TRACKING WITH VARIABLE COMPRESSION - Radio frequency (RF) transmitter circuitry, which includes an envelope tracking power supply and an RF power amplifier (PA), is disclosed. The RF PA operates in either a first operating mode or a second operating mode, such that selection of the operating mode is based on compression tolerance criteria. During the first operating mode, the RF PA receives and amplifies an RF input signal using a first compression level. During the second operating mode, the RF PA receives and amplifies the RF input signal using a second compression level, which is greater than the first compression level. The envelope tracking power supply provides an envelope power supply signal to the RF PA. The envelope power supply signal provides power for amplification. | 2013-07-18 |
20130181775 | RAIL-TO RAIL INPUT CIRCUIT - A power-efficient, rail-to-rail input circuit includes two differential pairs, one having devices of a first threshold voltage and one having devices of a second, different threshold voltage. In various embodiments, the two differential pairs receive a differential input in parallel and are supplied a tail current, which a control circuit steers between the pairs in accordance with a common-mode level of the input. | 2013-07-18 |
20130181776 | RAIL-TO-RAIL COMPARATOR - The present invention discloses a rail-to-rail comparator. The rail-to-rail comparator includes: a positive voltage rail providing a positive supply voltage, a ground voltage rail providing a ground voltage, an input stage, and an output stage. The input stage includes: a positive and a negative input terminals for receiving a first input signal and a second input signal; a first differential amplifier circuit, which includes a pair of depletion NMOS transistors to generate a first pair of differential currents; and a second differential amplifier circuit, which includes a pair of native NMOS transistors to generate a second pair of differential currents. The output stage is coupled to the first differential amplifier circuit and the second differential amplifier circuit, and generates an output signal related to a difference between the first input signal and the second input signal. | 2013-07-18 |
20130181777 | VOLTAGE REGULATOR - Provided is a voltage regulator capable of reducing an influence of an offset to obtain an accurate output voltage. The voltage regulator includes: a first stage amplifier for amplifying and outputting a difference between a reference voltage and a divided voltage obtained by dividing a voltage output by an output transistor, to thereby control a gate of the output transistor; and a cascode amplifier circuit, in which the first stage amplifier includes: a first high breakdown voltage NMOS transistor as an input transistor; and an NMOS transistor as a tail current source, and in which the cascode amplifier circuit includes a second high breakdown voltage NMOS transistor as a cascode transistor. | 2013-07-18 |
20130181778 | High Fidelity Current Dumping Audio Amplifier With Combined Feedback-Clean Feedback - A high fidelity current dumping audio amplifier in which for achieving the best performance are combined the feedforward error correction and the negative feedback. | 2013-07-18 |
20130181779 | SYSTEMS AND METHODS TO ADJUST THE BIAS OF AN AMPLIFIER - A system and method improve amplifier efficiency of operation relative to that of an amplifying transistor with a fixed bias current. A power level representing a level of transmission power from an amplifier circuit and an indicator of amplifier circuit operation are provided. The indicator is at least one of channel, channel bandwidth, out-of band spectral requirements, spectral mask requirements, error vector magnitude, modulation rate, and modulation type. The amplifying transistor is biased with a bias current that is determined based at least in part on the power level and the indication where the bias current is different for channels at an edge of a channel band than for channels nearer a center of the channel band. | 2013-07-18 |
20130181780 | DIGITAL TO ANALOG CONVERTER FOR PHASE LOCKED LOOP - A digital to analog converter (DAC) that reduces sub-threshold leakage current in PLLsincludes three series connected transistors, a unity gain buffer, and a switch. The system is connected between the voltage-to-current converter and a current-controlled oscillator. The DAC receives and accurately mirrors a current signal generated by a voltage-to-current converter. | 2013-07-18 |
20130181781 | DIFFERENTIAL RING OSCILLATOR AND METHOD FOR CALIBRATING THE DIFFERENTIAL RING OSCILLATOR - A differential ring oscillator includes a plurality of delay stages connected in a ring. At least one of the delay stages includes: a current source, arranged to generate a bias current according to a coarse tuning signal; a latching circuit arranged to generate a differential output signal to a next delay stage according to a differential input signal from a previous delay stage; a capacitive array arranged to provide a first capacitance according to a fine tuning signal; and a varactor device arranged to provide a second capacitance according to a controllable signal for locking an oscillating frequency of the differential ring oscillator to a target frequency. The coarse tuning signal and fine tuning signal are arranged for adjusting the oscillating frequency of the differential ring oscillator to, respectively, reach a predetermined frequency range including the target frequency and to approach the target frequency in the predetermined frequency range. | 2013-07-18 |
20130181782 | OSCILLATOR - An oscillator includes a resonator section structured such that a dielectric is interposed between first and second conductors and such that the first and second conductors are electrically connected to a resonant tunneling diode, a capacitor section structured such that the dielectric is interposed between the first and second conductors, a line section configured to electrically connect the resonator section and the capacitor section in parallel to each other, and a resistor section configured to electrically connect the first and second conductors to each other. A first position of the resonator section and a second position of the capacitor section are connected to each other by the line section so that the first position and the second position are substantially electrically equivalent to each other in a wavelength range larger than a wavelength of an electromagnetic wave that resonates in the resonator section. | 2013-07-18 |
20130181783 | RESONATOR CIRCUIT AND METHOD OF GENERATING A RESONATING OUTPUT SIGNAL - A resonator circuit enabling temperature compensation includes an inductor coupled between a first node and a second node of the resonator circuit; a capacitor circuit coupled between the first node and the second node; and a temperature compensation circuit coupled between the first node and the second node. The temperature compensation circuit comprises a varactor coupled to receive a temperature control signal that sets the capacitance of the varactor. A method of generating a resonating output is also disclosed. | 2013-07-18 |
20130181784 | VARIABLE CAPACITANCE DEVICE - A variable capacitance device including: first and second transistors coupled in parallel between first and second nodes of the capacitive device, a control node of the first transistor being adapted to receive a control signal, and a control node of the second transistor being adapted to receive the inverse of the control signal, wherein the first and second transistors are formed in a same semiconductor well. | 2013-07-18 |
20130181785 | DEVICE OF VARIABLE CAPACITANCE - A variable capacitance device including: first and second transistors coupled in series by their main current nodes between first and second nodes of the device, a control node of the first transistor being adapted to receive a first control signal, and a control node of the second transistor being adapted to receive a second control signal; and control circuitry adapted to generate the first and second control signals from a selection signal. | 2013-07-18 |
20130181786 | CIRCUIT MODULE - A circuit module having reduced magnetic coupling between core isolators. A substrate body includes principal surfaces. A core isolator includes a ferrite, a permanent magnet that applies a DC magnetic field to the ferrite, a first center electrode provided for the ferrite and including one end connected to an input port and another end connected to an output port, and a second center electrode provided for the ferrite so as to intersect the first center electrode insulated from the second center electrode and that includes one end connected to the output port and another end connected to a ground port. The core isolator also includes no yokes preventing leakage of the DC magnetic field to the outside. The core isolators are mounted on the respective principal surfaces such that directions of the DC magnetic fields are parallel or substantially parallel to the principal surface. | 2013-07-18 |
20130181787 | ADAPTIVE IMPEDANCE MATCHING - An embodiment of the present invention provides a method for limiting tuning of a matching network having variable reactive elements coupled to a variable load impedance to at least reduce an undesirable effect caused by an RF signal. Other embodiments are disclosed. | 2013-07-18 |
20130181788 | MATCHING CIRCUIT SYSTEM - A matching circuit system includes a first inductor, a first capacitor, a second inductor, a second capacitor, a third inductor, and a third capacitor. The first inductor has a first terminal and a second terminal. The first capacitor has a first terminal coupled to the first terminal of the first inductor, and a second terminal. The second inductor has a first terminal coupled to the second terminal of the first capacitor, and a second terminal coupled to ground. The second capacitor has a first terminal coupled to the first terminal of the first capacitor, and a second terminal. The third capacitor has a first terminal coupled to the second terminal of the second capacitor, and a second terminal. The third inductor has a first terminal coupled to the first terminal of the second capacitor, and a second terminal coupled to the second terminal of the second capacitor. | 2013-07-18 |
20130181789 | SIGNAL SPLITTER FOR USE IN MOCA/CATV NETWORKS - There is provided a splitter circuit means for use with a CATV network comprising a signal input ( | 2013-07-18 |
20130181790 | CAVITY FILTER WITH TUNING STRUCTURE - A cavity filter includes a housing having a positioning portion, a cover covering on the housing and defining a pair of first positioning holes, a sliding plate movably supported on the positioning portion and mounted between the positioning portion and the cover to be configured to adjust a resonating frequency of the cavity filter, and a tuning structure fixed on the cover and having a pair of first positioning poles. The sliding plate includes a plurality of elastic arms, each of which is made of insulated material and supported by the positioning portion. Each of the pair of first positioning poles extends through the corresponding first positing hole to touch the corresponding one of the plurality of elastic arms of the sliding plate. | 2013-07-18 |
20130181791 | WAVEGUIDE STRUCTURE FOR A CONTACTLESS CONNECTOR - A contactless connector includes a first communication chip configured to at least one of transmit and receive wireless RF signals, a second communication chip configured to at least one of transmit and receive wireless RF signals, and a waveguide structure between the first and second communication chips. The waveguide structure conveys RF signals between the first and second communication chips. | 2013-07-18 |
20130181792 | ATTENUATOR - An attenuator includes, on a substrate: a resistor section; an insulating film covering the resistor section; and connection terminals covering the insulating film and connected in part to the resistor section. A total thickness of the insulating film and the connection terminal in a region where the insulating film and the connection terminal overlap with the resistor section is from 50 μm to 200 μm. | 2013-07-18 |
20130181793 | ELECTRICAL CONTACTOR - Disclosed is an electrical contactor, comprising main contacts and secondary contacts, an armature provided for actuating the main contact bridges and secondary contact bridges, and means for restoring the armature from an intermediate position or end position to an initial position, wherein a precharging coil and a pick-up coil are provided in order to electromagnetically drive the armature. A coil yoke is arranged in such a way that the magnetic force acting on the armature due to the magnetic field produced by the precharging coil is greater in the end position of the armature than in the intermediate position when equal current is provided to the precharging coil, wherein said magnetic force corresponds to the restoring force of the means for restoring the armature to the initial position in the intermediate position of the armature and is greater than the restoring force in the end position of the armature. | 2013-07-18 |
20130181794 | SELECTIVELY BIASED ROBOT MECHANISM PLATFORM FOR A STORAGE LIBRARY - Systems and methods are described for providing selective biasing of a platform in context of one or more modules. While moving in the Z-direction with respect to the modules, the platform travels in an unbiased manner. For example, one or more alignment features on the platform are engaged with one or more alignment features on the modules to allow the platform to substantially float within an X-Y region defined by the alignment features. When the platform reaches its desired Z-location, magnetic features bias the platform into a substantially locked and repeatable X-Y position (e.g., using permanent magnets and/or electromagnets). In some embodiments, the platform is locked into an accurate position to allow a robotic mechanism of a storage library to move around efficiently within the modules while still being able to perform operations that involve accurate positioning (e.g., pick and place operations on media cartridges). | 2013-07-18 |
20130181795 | ELECTROMAGNETIC VALVE - An electromagnetic valve includes a coil that generates a magnetic force, a stator core arranged radially inward of the coil, an armature moved toward the stator core in an axial direction of the coil by the magnetic force, a yoke arranged on radially outward of the coil, a housing axially contacting the yoke and including a slide hole supporting the armature slidably, and a ring-shaped magnetic plate. The ring-shaped magnetic plate faces to the armature on a radially inner side of the magnetic plate, and faces to the yoke via a clearance on a radially outer side of the magnetic plate. The magnetic plate radially contacts the housing on the one side in the axial direction with reference to a position where the yoke contacts the housing, and on a radially outer side of an inner surface of the slide hole. | 2013-07-18 |
20130181796 | TRANSFORMER WINDING - A transformer winding, having at least two multi-layered winding modules, which are connected electrically in series, extend about a common winding axis, and are nested one inside the other hollow-cylindrically, at least one cooling channel, which is arranged along the common winding axis hollow-cylindrically between the winding modules, and a flat electrical shield is provided within the at least one cooling channel at least sectionally along the radial circumference thereof, wherein the electrical shield extends over approximately the entire axial length and through which electrical shield the electrical capacitance distribution in the transformer winding connected electrically in series is influenced. | 2013-07-18 |
20130181797 | COIL APPARATUS HAVING COIL ARRANGEMENT THAT INCLUDES A FERRITE LAYER AND A THERMALLY-CONDUCTIVE SILICONE LAYER - A coil apparatus includes a first housing and a second housing that surroundingly encloses the first housing. The first housing has a coil arrangement disposed therein. The coil arrangement includes a ferrite layer and a thermally-conductive silicone layer that overlies the ferrite layer. A wire conductor surrounds the first housing. A structure is received in a opening defined in the first housing to be in thermal communication with the thermally-conductive silicone layer. Another thermally-conductive silicone layer overlies the first housing and the structure so that the structure is also in thermal communication therewith. A metal layer further overlies the thermally-conductive silicone layer that overlies the first housing. The second housing includes a non-dielectric cover and a dielectric cavity portion that receives the coil arrangement. The coil apparatus is associated with an electrical charging system (ECS) that electrically charges an energy storage device (ESD) disposed on a motorized vehicle. | 2013-07-18 |
20130181798 | POWER SUPPLY APPARATUS AND ITS MANUFACTURING METHOD - A power supply apparatus is configured to supply power to a load mounted on a vehicle. The power supply apparatus includes a case and a transformer disposed inside the case in a fixed manner. The transformer includes a base made of a resin and fixed to the case, a core attached to the base, a winding wound on the core, and a metal terminal attached to the base. The metal terminal has a solder connection portion to which an end portion of the winding is soldered. The base has a resin melted portion adhered, after being melted, to a portion of the metal terminal. | 2013-07-18 |
20130181799 | Inductive Couplers for Use in A Downhole Environment - Inductive couplers for use in a downhole environment are described. An example inductive coupler for use in a downhole environment includes a body defining a cavity and magnetic material positioned in the cavity. The example inductive coupler also includes a coil adjacent the magnetic material, the coil formed with a number of turns of wire, and a first metal cover coupled to the body to enclose the cavity. The metal cover being electrically coupled to the body to form a substantially contiguous electrically conductive surface surrounding the cavity. | 2013-07-18 |
20130181800 | Magnetic Power Converter - A magnetic power converter has a core that has at least a first leg and a second leg. In addition, the magnetic power converter has an output coil positioned around the second leg and a toroid integrated into the first leg, the toroid comprising a permanent magnet and an first input coil, the input coil positioned relative to the permanent magnet, such that when an alternating current (A/C) is applied to the first input coil, permanent magnet magnetic flux produced by the permanent magnet is displaced and travels through the second leg. | 2013-07-18 |
20130181801 | REACTOR - To provide a reactor with which resin can fully be packed between a core and a coil with ease, and in which the core can easily be handled when the reactor is manufactured. | 2013-07-18 |
20130181802 | SOFT MAGNETIC POWDER, GRANULATED POWDER, DUST CORE, ELECTROMAGNETIC COMPONENT, AND METHOD FOR PRODUCING DUST CORE - Provided are a soft magnetic powder for obtaining a dust core having a low iron loss, the dust core, and a method for producing a dust core. The present invention relates to a soft magnetic powder including a plurality of soft magnetic particles, each having an insulating layer. The Vickers hardness HV0.1 of a material constituting the soft magnetic particles is 300 or more, and the insulating layer contains Si, O, and at least one of an alkali metal and Mg. As long as the soft magnetic powder has such features, a material having a high electric resistance, such as an iron-based alloy, can be used. The eddy current loss can be reduced, and it is possible to effectively obtain a dust core having a low iron loss. | 2013-07-18 |
20130181803 | WIDEBAND MULTILAYER TRANSMISSION LINE TRANSFORMER - Embodiments of the invention include transmission line transformers. According to one aspect, a multilayer transmission line transformer (TLT) includes a first set of two conductors forming a first clockwise spiral. The TLT includes a second set of two conductors forming a second counterclockwise spiral that is substantially coaxial with the first spiral. The first and second spirals are arranged to cause a substantial cancellation of common mode currents in the first and second sets of conductors during operation of the TLT | 2013-07-18 |
20130181804 | IRON-BASED SOFT MAGNETIC POWDER AND PRODUCTION METHOD THEREOF - Disclosed is an iron-based soft magnetic powder obtained by preparing an iron-oxide-based soft magnetic powder through water atomization, and thermally reducing the iron-oxide-based soft magnetic powder. The iron-based soft magnetic powder has an average particle size of 100 μm or more and has an interface density of more than 0 μm | 2013-07-18 |
20130181805 | ANTENNA MODULE, COMMUNICATION DEVICE AND METHOD OF MANUFACTURING ANTENNA MODULE - A communication device that, when incorporated in an electronic device, can reduce the size and the thickness of a housing of the electronic device while maintaining communication characteristics. The communication device includes an antenna coil that is arranged on a peripheral part of a housing surface facing a reader-writer of a mobile phone, a magnetic sheet that attracts the magnetic filed transmitted from the reader-writer to the antenna coil, and a communication processing unit that is driven by a current flowing through the antenna coil and communicates with the reader-writer. The magnetic sheet is arranged to be closer to reader-writer than the antenna coil in the central part, and the antenna coil is arranged to be closer to the reader-writer on the outer periphery side, and at least a part of the conductive line of the antenna coil is superimposed in a direction orthogonal to a circuit board. | 2013-07-18 |
20130181806 | FUSE UNIT - A fuse unit includes: a bus bar including a plurality of fusible parts interposed between a power supply side terminal and a plurality of load side terminals; and an insulating resin portion formed by insert molding using the bus bar as an insert component. The insulating resin portion includes: first and second resin portions respectively arranged at peripheries on the sides of the power supply side terminal and the load side terminals with respect to the fusible parts; and a plurality of coupling portions coupling the first resin portion and the second resin portion in a position outside each of the fusible parts. Each of the coupling portions is formed such that a reinforcement portion having a lower heat shrinkage rate than the insulating resin portion and having a higher strength than the insulating resin portion is an insert component. The reinforcement portion is provided using the bus bar. | 2013-07-18 |
20130181807 | CURRENT-SENSING RESISTOR - The invention relates to a current-sensing resistor ( | 2013-07-18 |
20130181808 | METALLIC SILICIDE RESISTIVE THERMAL SENSOR AND METHOD FOR MANUFACTURING THE SAME - A metallic silicide resistive thermal sensor has a body, a conductive wire and multiple electrodes. The body has multiple etching windows formed on the body and a cavity formed under the etching windows. The etching windows separate the body into a suspended part and multiple connection parts. The conductive wire is formed on the suspended part and the connection parts and is made of metallic silicide. The electrodes are formed on the body and are electrically connected to the conductive wire. The metallic silicide is compatible for common CMOS manufacturing processes. The cost for manufacturing the resistive thermal sensor decreases. The metallic silicon is stable at high temperature. Therefore, the performance of the resistive thermal sensor in accordance with the present invention is improved. | 2013-07-18 |
20130181809 | SpaceCube MINI - An on-board space processing system capable of processing data at more than 2500 Million Instructions Per Second on board a spacecraft is disclosed. The system may be a cube, and may include processor card and a hybrid card. The processor card may include a processor that may be programmable and reprogrammable prior to, and during, spaceflight. The hybrid card may include a field programmable gate array module that may program and reprogram the processor prior to, and during, the spaceflight. | 2013-07-18 |
20130181810 | ERGONOMIC REMOTE CONTROL GLOVE - An ergonomic remote control glove for controlling an electronic device in military applications is disclosed. In one embodiment, the ergonomic remote control glove includes at least one motion sensor and a processor communicatively coupled to the at least one motion sensor. Further, the ergonomic remote control glove includes a communication link to connect to the electronic device. The communication link is communicatively coupled to the processor. Furthermore, the ergonomic remote control glove includes a wearable ergonomic glove configured to include the at least one motion sensor, the processor and the communication link. The processor is configured to send one or more control signals to the electronic device via the communication link upon detecting finger motions and/or hand gestures by the motion sensor. | 2013-07-18 |
20130181811 | Magnetometer Accuracy and Use - A parameter related to the Earth's magnetic field can be used to determine accuracy of a magnetometer of a mobile device. In one aspect, a first instance of a parameter related to Earth's magnetic field is determined using data generated by the magnetometer. The magnetometer data can be based in part on a position of the mobile device with respect to the Earth. A second instance of the parameter can be determined using data generated by a model of Earth's magnetic field. The model data can also be based in part on the position of the mobile device with respect to the Earth. The first instance of the parameter can be compared with the second instance of the parameter. An accuracy metric for the magnetometer can be determined based on a result of the comparison. An indication of the accuracy metric can be presented by the mobile device. | 2013-07-18 |
20130181812 | METHODS AND APPARATUS FOR DISPLAYING TRANSMITTED DATA - A reflective LCD, electronic ink or electrophoretic display panel presents a five day weather forecast representative of weather forecast data transmitted to the display location via a commercial paging service from a remote server. The server obtains forecast data from a commercial weather service, reformats selected data into compressed encoded data for efficient transmission in data packets simulcast to remote display devices via the paging network. | 2013-07-18 |
20130181813 | REMOTE COMMISSIONING OF AN ARRAY OF NETWORKED DEVICES - A system and method for identification of a particular one device from an array of networked devices. Each of the devices are individually addressable by a controller on the network, and a technician preferably identifies a particular one device by use of a handheld remote control. Pointing one of transmitter/receiver pair at a device including the complementary component allows remote disambiguation based upon ranging and signal strength, particularly when using a pair of orthogonal antennas to discriminate and confirm which particular device is being pointed to by the remote. Optional confirmation helps improve identification robustness, and then the properly identified device may be configured/commissioned. | 2013-07-18 |
20130181814 | Method and System for Determining an Association of a Set of Radio-Frequency Identification Tags - Devices, methods, and systems comprising one or more shielding elements repositionable, e.g., slidably disposed, along a structure, e.g., a stylus, the structure further comprising a set of one or more radio-frequency identification (RFID) tags, where the one or more shielding elements effect the radio frequency (RF) transmissibility of the set of one or more RFID tags, and a computing device comprising a processor, where the processor is configured to determine an association of a set of received one or more RFID tags with a unique identifier. | 2013-07-18 |
20130181815 | ENCODED INFORMATION READING SYSTEM INCLUDING RFID READING DEVICE HAVING MULTIPLE ANTENNAS - An encoded information reading (EIR) system can comprise a microprocessor, a memory, and at least one RFID reading device, all communicatively coupled to a system bus. The EIR system can further comprise two or more external antennas electrically coupled to a multiplexing circuit. The multiplexing circuit can be configured to electrically couple each antenna to the RFID reading device by using a time division method or a frequency division method. The external antennas can be disposed according to a spatial pattern configured to provide a spatially continuous RFID signal reception within a pre-defined area or volume. The antennas can be configured to receive RFID signals from a plurality of RFID tags attached to a plurality of items and disposed within a radio frequency range of the antennas. The EIR system can be configured to store in its memory a plurality of responses received from the plurality of RFID tags. | 2013-07-18 |
20130181816 | MECHANISM AND METHOD FOR RFID CABLE PATH LABELING, IDENTIFICATION, AND INVENTORY - The present invention relates to the use of RFID technology to identify the specific location of cable ends in a network configuration. An end of a cable has an attached RFID tag capable of storing cable identification information. The cable end is connected to an endpoint adapter having a means for communicating with the identification adapter in the cable end. A database stores the cable identification information read by the communication means within the endpoint adapter. | 2013-07-18 |
20130181817 | Systems and Methods for RFID Security - An RFID system includes an RFID tag, an RFID reader, and a server. The RFID tag communicates to the server via encrypted information. The information may be encrypted with synchronized encryption keys. In this manner, the reader need not decrypt the information from the RFID tag. The effectiveness of malicious readers is thereby reduced, resulting in improved RFID tag security. | 2013-07-18 |
20130181818 | RFID Apparatus - RFID apparatus includes transmission means for transmitting an RF signal; reception means for receiving a modulated RF signal; and demodulation means for demodulating a received modulated signal. The apparatus comprises generating means for generating a RF signal dependent on an incoming RF signal, the incoming RF signal being generated by different apparatus, and the apparatus is arranged to transmit the generated RF signal such that the generated RF signal interferes with the incoming RF signal. The RFID apparatus has both the means to respond to an RF reader device, in tag emulation mode, and means to function as an RF reader device, in reader mode. | 2013-07-18 |
20130181819 | PHYSICAL TAG-BASED SUBSCRIPTION SERVICES - Methods and apparatus are provided for automatically subscribing to a web-based service or resource based on reading a physical tag (e.g., an RFID tag) placed within range of a network device (e.g., a home network router) in a smart home network. The tag may store basic information about the web-based service or resource. When the tag is read, the network device may automatically contact the service or resource provider in an effort to subscribe a user to that service or resource, such that the service or resource may be enabled at that network device. In this manner, the user may quickly and easily subscribe to web-based services and/or resources, without having to configure anything, select any menu choices, type in any information, etc. | 2013-07-18 |
20130181820 | Extending the Read Range of Passive RFID Tags - An embodiment of the present invention improves the efficiency of radio frequency identification (RFID) systems and helps to extend the effective read range for certain configurations of closely spaced RFID tags. Specifically, an embodiment helps to minimize energy losses that result when there is excess energy from the excitation source. Various embodiments are directed toward using only as much of the excitation energy as necessary to power the RFID circuitry. An embodiment may have the benefit of making more of the excitation energy available to power other RFID tags nearby—thereby improving system performance and read range. | 2013-07-18 |
20130181821 | ELECTRONIC APPARATUS AND METHOD AND PROGRAM OF CONTROLLING ELECTRONIC APPARATUS - An electronic apparatus is designed so that a change in state of the operation key leads to a predetermined processing operation. In the electronic apparatus, a first detector detects operation keys being touched among a plurality of operation keys. A second detector detects an operation key being subjected to an operation of changing the state thereof among the operation keys. A device of notification signal generation generates a notification signal for providing the user with an explanation about processing corresponding to the operation key currently touched based on a detection result of the first detector. A first control device brings a hardware module and/or a software module, which corresponds to the operation key subjected to the change of the state thereof to an operation of changing a state is performed, into an execution state. The operation keys may be formed on a remote control transmitter. | 2013-07-18 |
20130181822 | METHOD AND TIMER APPARATUS FOR FOB REMOTE - The present disclosure describes a method and apparatus for actuating one or more wireless FOB remote(s) based on specific user pre-programmed times. The advantage of this device is that it can utilize existing FOBs to automatically lock your vehicle, alarm; close garage without requiring manual intervention after a timer is set. Additionally, the apparatus is compatible with most existing systems without requiring any modifications to them. | 2013-07-18 |