28th week of 2014 patent applcation highlights part 41 |
Patent application number | Title | Published |
20140193927 | PREDICTION OF RECURRENCE FOR BLADDER CANCER BY A PROTEIN SIGNATURE IN TISSUE SAMPLES - The present invention pertains to the field of cancer prediction. Specifically, it relates to a method for predicting the risk of recurrence of bladder cancer in a subject after treatment of bladder cancer comprising the steps of determining the amount of at least one biomarker selected from the biomarkers shown in Table, and comparing the amount of said at least one biomarker with a reference amount for said at least one biomarker, whereby the risk of recurrence of bladder cancer is to be predicted. The present invention also contemplates a method for identifying a subject being in need of a further bladder cancer therapy. Encompassed are, furthermore, diagnostic devices and kits for carrying out said methods. | 2014-07-10 |
20140193928 | CURRENT APPLICATION DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR ELEMENT - Provided is a current application device capable of applying a test current of a magnitude necessary for testing of a semiconductor element without any trouble. A current application device | 2014-07-10 |
20140193929 | Integrated Reflector and Thermal Spreader and Thermal Spray Fabrication Method - A low-cost integrated reflector and heat spreader for high-density high power solid-state (e.g., LED) lighting arrays includes a base structure onto which is applied a sacrificial material. A relatively thick thermal spray coating is applied over the base structure and sacrificial material. The sacrificial material is removed. A channel(s) is thereby provided within the thermal spray coating layer and in physical contact with the base structure. The channel may be filled with a cooling fluid. A pulsating heat pipe heat spreader may thereby be provided. A reflective material may be provided either over another surface of the base structure or alternatively over the thermal spray coating layer to provide a surface for reflecting and directing light emitted from a solid state light source that may be secured to the integrated reflector and heat spreader. | 2014-07-10 |
20140193930 | PROCESSES FOR MANUFACTURING AN LED PACKAGE WITH TOP AND BOTTOM ELECTRODES - An LED package with an extended top electrode and an extended bottom electrode is formed from a first metal and a second metal. An LED is on an inner end of the first metal. An outer end of the first metal has been bent upward twice 90 degrees to form a top flat as an extended top electrode of the package. An outer end of the second metal has been bent downward twice 90 degrees to form a bottom flat as an extended bottom electrode of the package. The LED and a bonding wire may be encapsulated with glue. | 2014-07-10 |
20140193931 | METHOD OF BONDING A SUBSTRATE TO A SEMICONDUCTOR LIGHT EMITTING DEVICE - A method according to embodiments of the invention includes positioning a flexible film ( | 2014-07-10 |
20140193932 | LIGHT-EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a light-emitting device comprises the steps of: providing a first substrate; forming a semiconductor structure on the first substrate, wherein the semiconductor structure comprises a first type semiconductor layer, a second type semiconductor layer, and an active layer between the first type semiconductor layer and the second type semiconductor layer; forming an isolation region through the second type semiconductor and the active layer to separate the semiconductor structure into a first part and a second part on the first substrate; and injecting an electrical current with a current density to the second part to make the second part to be permanently broken-down; wherein after the second part is permanently broken-down, the first part is capable of generating electromagnetic radiation and the second part is incapable of generating electromagnetic radiation. | 2014-07-10 |
20140193933 | METHOD FOR MANUFACTURING SEMICONDUCTOR OPTICAL DEVICE - A method for manufacturing a semiconductor optical device includes the steps of preparing a mold having an imprint pattern; forming a substrate product including a semiconductor layer; forming a first resin layer on the semiconductor layer; forming a diffraction grating pattern having periodic projections and recesses in the first resin layer using the mold, the projection of the diffraction grating pattern having a top portion and a base portion; changing a duty ratio of the diffraction grating pattern by dry-etching the first resin layer; forming a second resin layer on the first resin layer so as to cover the projection and the recess; removing the top portion by etching back the first and second resin layers; and selectively etching the first resin layer so as to have a reverse pattern to the diffraction grating pattern; and etching the semiconductor layer through the first resin layer. | 2014-07-10 |
20140193934 | ORGANIC LIGHT EMITTING DISPLAY AND MANUFACTURING METHOD THEREOF - An organic light emitting display resulting in an improved aperture ratio and a manufacturing method thereof. The organic light emitting display that includes a plurality of pixels arranged between first and second substrates, each of said pixels includes a plurality of thin film transistors, an organic light emitting diode, and a capacitor. The thin film transistors and the organic light emitting diode are formed on the first substrate and the capacitor is formed on the second substrate, and the thin film transistors and the capacitor are electrically connected with each other upon the first substrate being bonded to the second substrate. | 2014-07-10 |
20140193935 | COLLECTIONS OF LATERALLY CRYSTALLIZED SEMICONDUCTOR ISLANDS FOR USE IN THIN FILM TRANSISTORS - Collections of laterally crystallized semiconductor islands for use in thin film transistors and systems and methods for making same are described. A display device includes a plurality of thin film transistors (TFTs) on a substrate, such that the TFTs are spaced apart from each other and each include a channel region that has a crystalline microstructure and a direction along which a channel current flows. The channel region of each of the TFTs contains a crystallographic grain that spans the length of that channel region along its channel direction. Each crystallographic grain in the channel region of each of the TFTs is physically disconnected from and crystallographically uncorrelated with each crystallographic grain in the channel region of each adjacent TFT. | 2014-07-10 |
20140193936 | METHOD FOR FABRICATING ORGANIC LIGHT EMITTING DEVICE - A method of fabricating an organic light emitting device includes forming a first electrode layer on a substrate, surface-treating the first electrode layer with CF | 2014-07-10 |
20140193937 | METHOD AND COMPOUND - A method of forming a layer of an electronic device, for example an organic light-emitting device, the method comprising the step of depositing a precursor layer comprising a compound of formula (I) and reacting the compound of formula (I) in a ring-opening addition reaction: | 2014-07-10 |
20140193938 | CHEMICALLY SENSITIVE SENSOR WITH LIGHTLY DOPED DRAINS - A chemically sensitive sensor with a lightly doped region that affects an overlap capacitance between a gate and an electrode of the chemical sensitive sensor. The lightly doped region extends beneath and adjacent to a gate region of the chemical sensitive sensor. Modifying the gain of the chemically sensitive sensor is achieved by manipulating the lightly doped region under the electrodes. | 2014-07-10 |
20140193939 | METHOD AND SYSTEM FOR FORMING ABSORBER LAYER ON METAL COATED GLASS FOR PHOTOVOLTAIC DEVICES - An apparatus for forming a solar cell includes a housing defining a vacuum chamber, a rotatable substrate support, at least one inner heater and at least one outer heater. The substrate support is inside the vacuum chamber configured to hold a substrate. The at least one inner heater is between a center of the vacuum chamber and the substrate support, and is configured to heat a back surface of a substrate on the substrate support. The at least one outer heater is between an outer surface of the vacuum chamber and the substrate support, and is configured to heat a front surface of a substrate on the substrate support. | 2014-07-10 |
20140193940 | Method and Apparatus for Image Sensor Packaging - Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a BSI sensor device with an application specific integrated circuit (ASIC) are disclosed. A bond pad array may be formed in a bond pad area of a BSI sensor where the bond pad array comprises a plurality of bond pads electrically interconnected, wherein each bond pad of the bond pad array is of a small size which can reduce the dishing effect of a big bond pad. The plurality of bond pads of a bond pad array may be interconnected at the same layer of the pad or at a different metal layer. The BSI sensor may be bonded to an ASIC in a face-to-face fashion where the bond pad arrays are aligned and bonded together. | 2014-07-10 |
20140193941 | METHOD FOR MANUFACTURING SOLAR CELL - A method for manufacturing a solar cell includes forming a first electrode on a substrate, removing a portion of the first electrode to form a first electrode opening, forming a light absorbing layer on the first electrode and in the first electrode opening, and applying a laser beam to the substrate to create an interface reaction between the first electrode and at least the light absorbing layer, thereby removing a portion of the light absorbing layer to form a light absorbing layer opening. | 2014-07-10 |
20140193942 | Systems And Methods For Thermally Managing High-Temperature Processes On Temperature Sensitive Substrates - A method for depositing one or more thin-film layers on a flexible polyimide substrate having opposing front and back outer surfaces includes the following steps: (a) heating the flexible polyimide substrate such that a temperature of the front outer surface of the flexible polyimide substrate is higher than a temperature of the back outer surface of the flexible polyimide substrate, and (b) depositing the one or more thin-film layers on the front outer surface of the flexible polyimide substrate. A deposition zone for executing the method includes (a) one of more physical vapor deposition sources adapted to deposit one or more metallic materials on the front outer surface of the substrate, and (b) one or more radiant zone boundary heaters. | 2014-07-10 |
20140193943 | METHOD FOR FABRICATING Cu-In-Ga-Se FILM SOLAR CELL - A method for fabricating a Cu—In—Ga—Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu—In—Ga—Se absorbing layer on the back electrode by fractional sputtering in a plurality of sputter chambers; c) performing an annealing; d) fabricating an In | 2014-07-10 |
20140193944 | Multilayer Thin-Film Back Contact System For Flexible Photovoltaic Devices On Polymer Substrates - A polymer substrate and back contact structure for a photovoltaic element, and a photovoltaic element include a CIGS photovoltaic structure, a polymer substrate having a device side at which the photovoltaic element can be located and a back side opposite the device side. A layer of dielectric is formed at the back side of the polymer substrate. A metal structure is formed at the device side of the polymer substrate. | 2014-07-10 |
20140193945 | SOLUTION FOR ETCHING A THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is an aqueous alkaline etching solution comprising water and an alkaline material being selected from the group consisting of ammonium hydroxide, ammonium phosphate, ammonium carbonate, quaternary ammonium hydroxide, quaternary ammonium phosphate, quaternary ammonium carbonate, an alkali metal hydroxide, an alkaline earth metal hydroxide, or a combination comprising at least one of the foregoing alkaline materials; the aqueous alkaline solution being operative to etch aluminum oxide at a rate greater than or equal to about 2:1 over a rate at which it etches a metal oxide semiconductor to be protected; wherein the aqueous etching solution has a pH of 8 to 13. | 2014-07-10 |
20140193946 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A first multi-component oxide semiconductor layer is formed over a substrate and a single-component oxide semiconductor layer is formed thereover; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a first multi-component oxide semiconductor layer including single crystal regions and a single-component oxide semiconductor layer including single crystal regions are formed; and a second multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions. | 2014-07-10 |
20140193947 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Oxygen vacancies in an oxide semiconductor film and the vicinity of the oxide semiconductor film are reduced and electric characteristics of a transistor including the oxide semiconductor film are improved. Further, a highly reliable semiconductor device including the transistor including the oxide semiconductor film is provided. In the transistor including the oxide semiconductor film, at least one insulating film in contact with the oxide semiconductor film contains excess oxygen. By the excess oxygen included in the insulating film in contact with the oxide semiconductor film, oxygen vacancies in the oxide semiconductor film and the vicinity of the oxide semiconductor film can be reduced. Note that the insulating film including the excess oxygen has a profile of the excess oxygen concentration having two or more local maximum values in the depth direction. | 2014-07-10 |
20140193948 | INTEGRATED BONDLINE SPACERS FOR WAFER LEVEL PACKAGED CIRCUIT DEVICES - A method of forming a wafer level packaged circuit device includes forming a device wafer, the device wafer including a first group of one or more material layers left remaining in a first region of a substrate of the device wafer; and forming a cap wafer configured to be attached to the device wafer, the cap wafer including a second group of one or more material layers left remaining in a second region of a substrate of the cap wafer; wherein a combined thickness of the first and second groups of one or more material layers defines an integrated bond gap control structure upon bonding of the device wafer and the cap wafer. | 2014-07-10 |
20140193949 | SOCKET TYPE MEMS BONDING - A method for fabricating an integrated circuit device is disclosed. The method includes providing a first substrate; bonding a second substrate to the first substrate, the second substrate including a microeelectromechanical system (MEMS) device; and bonding a third substrate to the first substrate. | 2014-07-10 |
20140193950 | ELECTRONIC DEVICE PACKAGE AND FABRICATION METHOD THEREOF - An electronic device package is disclosed. The package includes at least one semiconductor chip having a first surface and a second surface opposite thereto, in which at least one redistribution layer is disposed on the first surface of the semiconductor chip and is electrically connected to at least one conductive pad structure. At least one abut portion is disposed on the redistribution layer and electrically contacting thereto. A passivation layer covers the first surface of the semiconductor chip and surrounds the abut portion. A substrate is attached onto the second surface of the semiconductor chip. A fabrication method of the electronic device package is also disclosed. | 2014-07-10 |
20140193951 | STACKED SEMICONDUCTOR PACKAGE INCLUDING CONNECTIONS ELECTRICALLY CONNECTING FIRST AND SECOND SEMICONDUCTOR PACKAGES - A stacked semiconductor package has a first semiconductor package including a first package substrate and a first semiconductor chip mounted on the first package substrate, a second semiconductor package including a second package substrate and a second semiconductor chip mounted on the second package substrate, and a plurality of connections electrically connecting the first and second semiconductor packages. The connections are disposed on an outer region of the first package substrate outside the first semiconductor chip. The connections are disposed along opposite first longer sides and opposite shorter second sides of the first package substrate. The heights of those connections disposed along each longer first side gradually vary from a central to an outer region (i.e., the ends) of the longer first side. | 2014-07-10 |
20140193952 | Methods for Metal Bump Die Assembly - Methods for assembling metal bump dies. In an embodiment, a method includes providing an integrated circuit die having a plurality of conductive terminals; depositing solder to form solder depositions on the conductive terminals; providing a substrate having a die attach region on a surface for receiving the integrated circuit die, the substrate having a plurality of conductive traces formed in the die attach region; aligning the integrated circuit die and the substrate and bringing the plurality of conductive terminals and the conductive traces into contact, so that the solder depositions physically contact the conductive traces; and selectively heating the integrated circuit die and the conductive terminals to a temperature sufficient to cause the solder depositions to melt and reflow, forming solder connections between the conductive traces on the substrate and the conductive terminals on the integrated circuit die. Various energy sources are disclosed for the selective heating. | 2014-07-10 |
20140193953 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE MOUNTING STRUCTURE - A semiconductor device mounting structure includes: a substrate with an opening provided therein; a frame member with a frame body and a protruding portion that protrudes from the frame body, the frame body being formed and accommodated in a groove around the opening; a coreless substrate provided above the substrate and supported by the protruding portion of the frame member; and semiconductor elements provided on the coreless substrate. | 2014-07-10 |
20140193954 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - The reliability of a semiconductor device is to be improved. A microcomputer chip (semiconductor chip) having a plurality of pads formed on a main surface thereof is mounted over an upper surface of a wiring substrate in an opposed state of the chip main surface to the substrate upper surface. Pads coupled to a plurality of terminals (bonding leads) formed over the substrate upper surface comprise a plurality of first pads in which a unique electric current different from the electric current flowing through other pads flows and a plurality of second pads in which an electric current common to the pads flows or does not flow. Another first pad of the first pads or one of the second pads are arranged next to the first pad. The first pads are electrically coupled to a plurality of bonding leads respectively via a plurality of bumps (first conductive members), while the second pads are bonded to the terminals via a plurality of bumps (second conductive members). | 2014-07-10 |
20140193955 | Hybrid Fin Field-Effect Transistor Structures and Related Methods - Semiconductor-on-insulator structures facilitate the fabrication of devices, including MOSFETs that are at least partially depleted during operation and FinFETs including bilayer fins and/or crystalline oxide. | 2014-07-10 |
20140193956 | TRANSISTOR AND FABRIATION METHOD - Fabrication methods for junctionless transistor and complementary junctionless transistor are provided. An isolation layer doped with a first-type ion is formed on a semiconductor substrate and an active layer doped with a second-type ion is formed on the isolation layer. The active layer includes a first portion between a second portion and a third portion of the active layer. Portions of the isolation layer under the second and third portions of the active layer are removed to suspend the second and third portions of the active layer. A gate structure is formed on the first portion of the active layer. A source and a drain are formed by doping the second portion and the third portion of the active layer with the second-type ion on both sides of the gate structure. The source and the drain have a same doping type as the first portion of the active layer. | 2014-07-10 |
20140193957 | REDUCING GATE HEIGHT VARIANCE DURING SEMICONDUCTOR DEVICE FORMATION - In general, aspects of the present invention relate to approaches for forming a semiconductor device such as a FET with reduced gate stack height variance. Specifically, when a gate stack height variance is detected/identified between a set of gate stacks, a hard mask layer and sets of spacers are removed from the uneven gate stacks leaving behind (among other things) a set of dummy gates. A liner layer and an inter-layer dielectric are formed over the set of dummy gates. The liner layer is then removed from a top surface (or at least a portion thereof) of the set of dummy gates, and the set of dummy gates are then removed. The result is a set of gate regions having less height variance/disparity. | 2014-07-10 |
20140193958 | TERMINATION DESIGN FOR HIGH VOLTAGE DEVICE - The present disclosure describes a termination structure for a high voltage semiconductor transistor device. The termination structure is composed of at least two termination zones and an electrical disconnection between the body layer and the edge of the device. A first zone is configured to spread the electric field within the device. A second zone is configured to smoothly bring the electric field back up to the top surface of the device. The electrical disconnection prevents the device from short circuiting the edge of the device. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. | 2014-07-10 |
20140193959 | FinFET Body Contact and Method of Making Same - A semiconductor device may include body contacts on a finFET device for ESD protection. The semiconductor device comprises a semiconductor fin, a source/drain region and a body contact. The source/drain region and the body contact are in the semiconductor fin. A portion of the fin is laterally between the source/drain region and the body contact. The semiconductor fin is on a substrate. | 2014-07-10 |
20140193960 | FABRICATION METHOD OF SEMICONDUCTOR DEVICE AND FABRICATION METHOD OF DYNAMIC THRESHOLD TRANSISTOR - A method includes: etching a silicon substrate except for a silicon substrate portion on which a channel region is to be formed to form first and second trenches respectively at a first side and a second side of the silicon substrate portion; filling the first and second trenches by epitaxially growing a semiconductor layer having etching selectivity against silicon and further a silicon layer; removing the semiconductor layer selectivity by a selective etching process to form voids underneath the silicon layer respectively at the first side and the second side of the substrate portion; burying the voids at least partially with a buried insulation film; forming a gate insulation film and a gate electrode on the silicon substrate portion; and forming a source region in the silicon layer at the first side of the silicon substrate portion and a drain region at the second side of the silicon substrate portion. | 2014-07-10 |
20140193961 | METHOD OF FABRICATING METAL-INSULATOR-METAL (MIM) CAPACITOR WITHIN TOPMOST THICK INTER-METAL DIELECTRIC LAYERS - Embodiments of MIM capacitors may be embedded into a thick IMD layer with enough thickness (e.g., 10 KŘ30 KÅ) to get high capacitance, which may be on top of a thinner IMD layer. MIM capacitors may be formed among three adjacent metal layers which have two thick IMD layers separating the three adjacent metal layers. Materials such as TaN or TiN are used as bottom/top electrodes & Cu barrier. The metal layer above the thick IMD layer may act as the top electrode connection. The metal layer under the thick IMD layer may act as the bottom electrode connection. The capacitor may be of different shapes such as cylindrical shape, or a concave shape. Many kinds of materials (Si3N4, ZrO2, HfO2, BST . . . etc.) can be used as the dielectric material. The MIM capacitors are formed by one or two extra masks while forming other non-capacitor logic of the circuit. | 2014-07-10 |
20140193962 | SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME - A method of forming a semiconductor device is provided. The method includes preparing a substrate having a transistor region and an alignment region, forming a first trench and a second trench in the substrate of the transistor region and in the substrate of the alignment region, respectively, forming a drift region in the substrate of the transistor region, forming two third trenches respectively adjacent to two ends of the drift region, and forming an isolation pattern in the first trench, a buried dielectric pattern in the second trench, and dielectric patterns in the two third trenches, respectively. A depth of the first trench is less than a depth of the third trenches, and the depth of the first trench is equal or substantially equal to a depth of the second trench. | 2014-07-10 |
20140193963 | Techniques For Forming 3D Structures - A technique for forming 3D semiconductor structure is disclosed. In one embodiment, a substrate having at least two vertically extending fins is provided. An insulating material is deposited in the trench between the fins. After planarization, an ion implant process is performed to change the properties of the insulating material, specifically, the implanted region has a higher etch rate than the remainder of the insulating material. This higher etch rate region is then removed. This process of implanting and removing can be repeated until the insulating material reaches the desired height. In some embodiments, the substrate may be subjected to an anneal process prior to the removal of the higher etch rate region. The Gaussian implant depth profile may change into a box-like implant depth profile during the anneal process via thermal diffusion. | 2014-07-10 |
20140193964 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - The present invention provides a method of manufacturing a semiconductor device. The method at least comprises the following steps. First, the semiconductor device, which comprises a gate, a gate dielectric layer, an active layer, a source and a drain, is manufactured. However, the semiconductor device has a plurality of defects, and the active layer is a metal oxide thin film. After annealing the semiconductor device, it will be transferred into a chamber. A final step of injecting a supercritical fluid carried with a co-solvent into the chamber is then performed to modify the abovementioned defects. | 2014-07-10 |
20140193965 | REDUCTION OF BASAL PLANE DISLOCATIONS IN EPITAXIAL SiC USING AN IN-SITU ETCH PROCESS - A method of: providing an off-axis 4H—SiC substrate, and etching the surface of the substrate with hydrogen or an inert gas. | 2014-07-10 |
20140193966 | METHODS OF MANUFACTURING VERTICAL SEMICONDUCTOR DEVICES - Methods of manufacturing vertical semiconductor devices may include forming a mold structure including sacrificial layers and insulating interlayers with a first opening formed therethrough. The sacrificial layers and the insulating interlayers may be stacked repeatedly and alternately on a substrate. The first opening may expose the substrate. Blocking layers may be formed by oxidizing portions of the sacrificial layers exposed by the first opening. A first semiconductor layer pattern, a charge trapping layer pattern and a tunnel insulation layer pattern, respectively, may be formed on the sidewall of the first opening. A second semiconductor layer may be formed on the first polysilicon layer pattern and the bottom of the first opening. The sacrificial layers and the insulating interlayers may be partially removed to form a second opening. The sacrificial layers may be removed to form grooves between the insulating interlayers. Control gate electrodes may be formed in the grooves. | 2014-07-10 |
20140193967 | METHOD OF FORMING AN EPITAXIAL LAYER ON A SUBSTRATE, AND APPARATUS AND SYSTEM FOR PERFORMING THE SAME - In a method of forming an epitaxial layer, an etching gas may be decomposed to form decomposed etching gases. A source gas may be decomposed to form decomposed source gases. The decomposed source gases may be applied to a substrate to form the epitaxial layer on the substrate. A portion of the epitaxial layer on a specific region of the substrate may be etched using the decomposed etching gases. Before the etching gas is introduced into the reaction chamber, the etching gas may be previously decomposed. The decomposed etching gases may then be introduced into the reaction chamber to etch the epitaxial layer on the substrate. As a result, the epitaxial layer on the substrate may have a uniform distribution. | 2014-07-10 |
20140193968 | Semiconductor Device and Manufacturing Method of the Same - A method for manufacturing a semiconductor device having a field-effect transistor, including forming a trench in a semiconductor substrate, forming a first insulating film in the trench, forming an intrinsic polycrystalline silicon film over the first insulating film, and introducing first conductive type impurities into the intrinsic polycrystalline silicon film to form a first conductive film. The first conductive film is etched to form a first gate electrode in the trench. Next, a second insulating film is formed in the trench above the first insulating film and the first gate electrode, and | 2014-07-10 |
20140193969 | SEMICONDUCTOR STRUCTURES AND METHODS OF FABRICATION OF SAME - Semiconductor structure including an etch stop material between a substrate and a stack of alternating insulating materials and first conductive materials, wherein the etch stop material comprises an amorphous aluminum oxide on the substrate and a crystalline aluminum oxide on the amorphous aluminum oxide; a channel material extending through the stack; and a second conductive material between the channel material and at least one of the first conductive materials in the stack of alternating insulating materials and first conductive materials, wherein the second conductive material is not between the channel material and the etch stop material. Also disclosed are methods of fabricating such semiconductor structures. | 2014-07-10 |
20140193970 | ISOLATED WIRE STRUCTURES WITH REDUCED STRESS, METHODS OF MANUFACTURING AND DESIGN STRUCTURES - An integrated circuit (IC) including a set of isolated wire structures disposed within a layer of the IC, methods of manufacturing the same and design structures are disclosed. The method includes forming adjacent wiring structures on a same level, with a space therebetween. The method further includes forming a capping layer over the adjacent wiring structures on the same level, including on a surface of a material between the adjacent wiring structures. The method further includes forming a photosensitive material over the capping layer. The method further includes forming an opening in the photosensitive material between the adjacent wiring structures to expose the capping layer. The method further includes removing the exposed capping layer. | 2014-07-10 |
20140193971 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - The semiconductor device includes: a semiconductor substrate; an insulating film provided on a surface of the semiconductor substrate; a porous metal film provided on the insulating film; a protective film provided on the porous metal film, and having an opening portion for defining a pad region; and a wire wire-bonded to the porous metal film in the pad region. The stress generated by the impact of wire-bonding is mostly absorbed in the porous metal film owing to the distortion of the porous metal film, preventing generation of cracks in the insulating film. | 2014-07-10 |
20140193972 | Buried Hard Mask for Embedded Semiconductor Device Patterning - Methods and apparatus for manufacturing semiconductor devices, and such semiconductor devices, are described. According to various aspects of the disclosure, a semiconductor device can be manufactured by forming a core region of the semiconductor device and forming a periphery region of the semiconductor device. A first polysilicon region can then be formed over the core and periphery regions of the semiconductor device. A first mask is formed on the first poly silicon layer and a second polysilicon layer is disposed such that the second polysilicon layer covers the first mask. A second mask can then be formed on the second polysilicon layer. After forming the second mask, portions of the first and second polysilicon layers that are uncovered by either the first or second masks are removed. | 2014-07-10 |
20140193973 | METHOD FOR FORMING INTERLAYER CONNECTORS TO A STACK OF CONDUCTIVE LAYERS - A method forms interlayer connectors extending to conductive layers of a stack of W conductive layers interleaved with dielectric layers. The stack is etched to expose landing areas at W−1 conductive layers using a set of M etch masks. For each etch mask m, m going from 0 to M−1, there is a first etching step, at least one mask trimming step, and a subsequent etching step following each trimming step. The etch mask may cover N | 2014-07-10 |
20140193974 | MULTI-PATTERNING METHOD AND DEVICE FORMED BY THE METHOD - A multi-patterning method includes: patterning at least two first openings in a hard mask layer over a substrate using a first mask; forming spacers within two of the at least two first openings, each spacer having a spacer opening therein for patterning a respective first circuit pattern over the substrate, wherein each spacer defines a pattern-free region adjacent to a respective one of the at least two first circuit patterns, and patterning a second circuit pattern in the hard mask layer using a second mask. The second circuit pattern is located between and excluded from the pattern free regions adjacent the at least two first circuit patterns. | 2014-07-10 |
20140193975 | COMPOSITION FOR FORMING TITANIUM-CONTAINING RESIST UNDERLAYER FILM AND PATTERNING PROCESS - The invention provides a composition for forming a titanium-containing resist underlayer film comprising: as component (A), a silicon-containing compound obtained by hydrolysis and/or condensation of one or more kinds of silicon compounds shown by the following general formula (A-I) and, as component (B), a titanium-containing compound obtained by hydrolysis and/or condensation of one or more kinds of hydrolysable titanium compounds shown by the following general formula (B-I). There can be provided a composition for forming a titanium-containing resist underlayer film to form a resist underlayer film having an excellent adhesiveness in fine patterning and an excellent etching selectivity relative to a conventional organic film and a silicon-containing film. | 2014-07-10 |
20140193976 | METHODS OF FORMING CONTACT HOLES - Methods of forming contact holes include forming a first guide pattern over an etching target layer. The first guide pattern has first openings each extending in a first direction and each first opening arranged in a direction perpendicular to the first direction. A first BCP structure is formed in each first opening. The first BCP structure includes first material layers in the first direction at a first pitch in each of the first openings, and second material layers filling a remaining portion of each first opening. First holes are formed by removing the first material layers. A second guide pattern is formed over the first guide pattern and the second material layers, and the above processes are performed on the second guide pattern to form second holes. Portions of the etching target layer overlapped by the first holes or the second holes are removed to form a desired pattern. | 2014-07-10 |
20140193977 | PLASMA ETCHING METHOD AND PLASMA ETCHING APPARATUS - A plasma etching apparatus includes a processing chamber; a holding unit for holding the substrate within the processing chamber; an electrode plate facing the holding unit; a plurality of supply parts arranged at different radial positions with respect to the substrate for supplying processing gas to a space between the holding unit and the electrode plate; a high frequency power supply that supplies high frequency power to the holding unit and/or the electrode plate to convert the processing gas supplied to the space into plasma; an adjustment unit that adjusts a supply condition for each of the supply parts; and a control unit that controls the adjustment unit to vary the supply condition between a position where an effect of diffusion of processing gas on an active species concentration distribution at the substrate is dominant and a position where an effect of flow of the processing gas is dominant. | 2014-07-10 |
20140193978 | METHOD OF PLASMA PROCESSING AND APPARATUSES USING THE METHOD - A method of operating a plasma processing device includes outputting a first RF power having a first frequency and a first duty ratio, and outputting a second RF power having a second frequency higher than the first frequency and a second duty ratio smaller than the first duty ratio. The outputting of the first RF power and the outputting of the second RF power are synchronized with each other. | 2014-07-10 |
20140193979 | DIRECTIONAL SIO2 ETCH USING PLASMA PRE-TREATMENT AND HIGH-TEMPERATURE ETCHANT DEPOSITION - Methods for processing a substrate are described herein. Methods can include positioning a substrate with an exposed surface comprising a silicon oxide layer in a processing chamber, biasing the substrate, treating the substrate to roughen a portion of the silicon oxide layer, heating the substrate to a first temperature, exposing the exposed surface of the substrate to a plasma comprising ammonium fluoride to form one or more volatile products while maintaining the first temperature, and heating the substrate to a second temperature, which is higher than the first temperature, to sublimate the volatile products. | 2014-07-10 |
20140193980 | PATTERNED LINE END SPACE - One or more techniques or systems for forming a line end space structure are provided herein. In some embodiments, a first patterned second hard mask (HM) region is formed above a first HM region. In some embodiments, a first sacrificial HM region and a second sacrificial HM region are formed above at least one of the first patterned second HM region or the first HM region. Photo resist (PR) is patterned above the second sacrificial HM region, and a spacer region is deposited above the PR and second sacrificial HM region. In some embodiments, at least some of at least one of the spacer region, the PR, or the respective sacrificial HMs is removed. Accordingly, first patterned second hard mask (HM) region is patterned, thus forming the line end space structure associated with an end-to-end space. | 2014-07-10 |
20140193981 | PHOTO RESIST TRIMMED LINE END SPACE - One or more techniques or systems for forming a line end space structure are provided herein. In some embodiments, a first patterned second hard mask (HM) region is formed above a first HM region. Additionally, at least some of the first patterned second HM region is removed. In some embodiments, a first sacrificial HM region and a second sacrificial HM region are formed above at least one of the first patterned second HM region or the first HM region. Photo resist (PR) is patterned above the second sacrificial HM region, and a spacer region is deposited above the patterned PR and second sacrificial HM region. In some embodiments, at least some of at least one of the spacer region, the PR, or the respective sacrificial HMs is removed. In this way, a line end space structure associated with an end-to-end space is formed. | 2014-07-10 |
20140193982 | LOW THERMAL CONDUCTIVITY MATRICES WITH EMBEDDED NANOSTRUCTURES AND METHODS THEREOF - A matrix with at least one embedded array of nanowires and method thereof. The matrix includes nanowires and one or more fill materials located between the nanowires. Each of the nanowires including a first end and a second end. The nanowires are substantially parallel to each other and are fixed in position relative to each other by the one or more fill materials. Each of the one or more fill materials is associated with a thermal conductivity less than 50 Watts per meter per degree Kelvin. And, the matrix is associated with at least a sublimation temperature and a melting temperature, the sublimation temperature and the melting temperature each being above 350° C. | 2014-07-10 |
20140193983 | APPARATUSES AND METHODS FOR DEPOSITING SiC/SiCN FILMS VIA CROSS-METATHESIS REACTIONS WITH ORGANOMETALLIC CO-REACTANTS - Disclosed herein are methods of forming SiC/SiCN film layers on surfaces of semiconductor substrates. The methods may include introducing a silicon-containing film-precursor and an organometallic ligand transfer reagent into a processing chamber, adsorbing the silicon-containing film-precursor, the organometallic ligand transfer reagent, or both onto a surface of a semiconductor substrate under conditions whereby either or both form an adsorption-limited layer, and reacting the silicon-containing film-precursor with the organometallic ligand transfer reagent, after either or both have formed the adsorption-limited layer. The reaction results in the forming of the film layer. In some embodiments, a byproduct is also formed which contains substantially all of the metal of the organometallic ligand transfer reagent, and the methods may further include removing the byproduct from the processing chamber. Also disclosed herein are semiconductor processing apparatuses for forming SiC/SiCN film layers. | 2014-07-10 |
20140193984 | APPARATUS AND METHOD FOR REDUCING RESIDUAL STRESS OF SEMICONDUCTOR - An apparatus for reducing residual stress of a semiconductor includes a stage configured to support a semiconductor wafer having the residual stress generated by a semiconductor manufacturing process. The apparatus includes an intense pulsed light (IPL) irradiation unit configured to irradiate IPL to the semiconductor wafer to reduce the residual stress of the semiconductor wafer, the IPL radiation unit being separated from the stage. The apparatus further includes at least one alignment unit configured to adjust relative positions of the stage and the IPL irradiation unit. | 2014-07-10 |
20140193985 | ELECTRICALLY CONDUCTIVE CONNECTING MEMBER, METHOD OF FORMING AND USING THE SAME - An electrically conductive connecting member includes an electrically insulating elastomer and an electrically conducting elastomer. The conductive connecting member has a Shore Hardness type A from 5 to 90 degrees, water-resistant ability up to 0.1 kgf/cm | 2014-07-10 |
20140193986 | HIGH-VOLTAGE RESISTANCE AND RETENTION OF PRINTED FLEX CIRCUITS - A device includes an electrical connector coupled to the end of a flex circuit. The connector includes interior ribs that engage slots in the flex circuit, with the ribs and slots separating adjacent contact pads on the flex circuit. The contact pads are exposed portions of conductive traces on the flex circuit. Other portions of the conductive traces may be covered by a dielectric material, such as a non-conductive ink. The ribs provide an increased isolation path between the contact pads. | 2014-07-10 |
20140193987 | ELECTRICAL CONTACT DEVICE - The present invention relates to an electrical contact device which comprises an electrically conductive base part, and an electrically conductive protruding part protruding from the electrically conductive base part. The electrical contact device also comprises an electrically conductive coil spring having a diameter that increases from a first end to a second end of the electrically conductive coil spring. The electrically conductive coil spring is arranged around the electrically conductive protruding part in such a manner that the first end of the electrically conductive coil spring faces the electrically conductive base part, and the electrically conductive coil spring extends further from the electrically conductive base part than the electrically conductive protruding part does. | 2014-07-10 |
20140193988 | ELECTRCIAL SOCKET WITH LGA TYPE COIL CONTACTS FOR IC PACKAGE - An electrical socket includes an insulating housing, a plurality of contacts, an upper film permanently attached to the top face and a lower film permanently attached to the bottom face. The insulating housing defines a top face and a bottom face, and a plurality of through holes through the top and bottom faces. The contacts are retained in the insulating housing and the contacts comprise elastic portions received in the through holes, contacting portions and connecting portions. The contacting portions and connecting portions integrally connected with opposite ends of the elastic portions respectively. The contacting portions run through the upper film and the connecting portions run through lower film. | 2014-07-10 |
20140193989 | TERMINAL PULLOUT STRUCTURE OF CONNECTOR - A connector housing includes a terminal receiving chamber and a pair of lances for locking the terminal on both sides of the terminal receiving chamber. A terminal pullout jig inserted into the connector housing displaces the lances to respective unlocking positions, thus pulling out the terminal from the terminal receiving chamber. The connector housing includes a pair of unlocking wall portions configured to be elastically deformed integrally with the pair of lances respectively. The terminal pullout jig includes an unlocking arm portion configured to displace the pair of the lances to the respective unlocking positions, and a terminal pressing portion for pressing the terminal in a terminal pullout direction. | 2014-07-10 |
20140193990 | MANUAL SERVICE DISCONNECTS FOR BATTERY SYSTEMS - A manual service disconnect for a battery system includes a disconnect header having a housing defining a receptacle, a high current terminal connector within the receptacle, a high voltage interlock (HVIL) connector within the receptacle and a control device terminal connector within the receptacle. A disconnect plug is removably coupled to the disconnect header. The disconnect plug has a high current fuse electrically connected to the high current terminal connector and a HVIL shunt terminal electrically connected to the HVIL connector. A current power control device is received in the receptacle and is electrically connected to the control device terminal connector. The current power control device is exposed for servicing when the disconnect plug is removed from the disconnect header and the current power control device is inaccessible when the disconnect plug is coupled to the disconnect header. | 2014-07-10 |
20140193991 | ELECTRICAL CONNECTOR WITH ANTI-ARCING FEATURE - A novel connector pair suppresses arcing during connection and disconnection. In one general aspect of the invention, first and second insulating barriers are configured to extend beyond corresponding first and second contacts, the barriers being arranged to cover a leading end of at least one of the contacts, and to engage with each other when the contacts are separated by a small gap, thereby closing off substantially all through-air arcing paths between them. In another general aspect of the invention, at least one electrical contact in a connector pair is a bimetal contact having a transitional segment made from high resistivity metal. The transitional segment is configured to make first and last contact during the initial phases of mating and un-mating, thereby increasing electrical resistance and significantly lowering the electrical current and the energy available for electrical arcing. | 2014-07-10 |
20140193992 | ELECTRICAL CONNECTOR HAVING IMPROVED SHILEDING PLATE - An electrical connector includes an insulative housing, a plurality of contacts retained in the housing, and a shielding attached to the housing. The housing defines a bottom wall, two opposite side walls, two end walls, and a mating tongue disposed in a mating cavity surrounded by the side walls and end walls. The plurality of contacts is arranged in the mating tongue and includes a grounding contact having a soldering portion thereof. The shielding plate defines a soldering leg having a receiving slot therein, the soldering portion passes through the receiving slot to extend out of the housing, which is propitious to make soldering pads of the electrical connector disposed in a same planar and is suitable for miniaturization. | 2014-07-10 |
20140193993 | PLUG CONNECTOR HAVING A RELEASING MECHANISM - A plug connector to be inserted into a receptacle cage having a latching tab includes a housing and a releasing mechanism mounted on the housing. The housing has a top wall, a bottom wall and two side walls interconnecting the top wall and the bottom wall together. The housing includes a first flange extending a first preselected distance from the top wall and a second flange extending a second preselected distance from the bottom wall. A width of the second flange is larger than a width of the first flange. The releasing mechanism comprises a pair of actuator arms movably attached to the sidewalls along a mating direction of the plug connector and a horizontal portion integrally connected between the actuator arms. | 2014-07-10 |
20140193994 | CARD EDGE CONNECTOR, CARD TYPE MODULE, AND CONNECTOR - A card edge connector includes a connector including a target engagement part, a substrate that can be inserted into and removed from the connector, a fixing part fixed to the substrate, and a lock that secures the substrate to the connector. The lock includes a shaft fixed to the fixing part and configured to slide in the direction of insertion and removal of the substrate and rotate around an axis, an urging part that exerts force on the shaft and biasing the shaft toward the direction of the substrate, and an engagement part provided on the shaft, configured to engage the target engagement part. | 2014-07-10 |
20140193995 | ELECTRICAL CONNECTOR ASSEMBLY WITH HIGH FLOAT BULLET ADAPTER - A high float connector assembly that comprises a first connector that has at least a first contact, a second connector that is configured to mate to the first connector, wherein the second connector has at least a second contact, a high float bullet adapter that is disposed between the first and second connectors, wherein the high float bullet adapter includes a housing that has at least one hole, and at least one high float bullet subassembly is received in the hole of the housing. The high float bullet subassembly has an inner contact, an insulator that supports the inner contact, and an outer ground body that holds the inner contact and the insulator. The insulator has an end with a lead-in geometry. The inner contact engages the first and second contacts of the first and second connectors, respectfully, wherein the high float bullet subassembly provides float between the connectors. | 2014-07-10 |
20140193996 | ELECTRICAL CONNECTOR PLUG WITH KEY TO AVOID CONTACT DAMAGE - Uniquely positioned slots are provided in the receptacle and uniquely positioned bosses are provided in the plug of a connector pair. These features are designed to prevent the plug from being inserted midspan and damaging the exposed contacts of the receptacle. The bosses may be located near outside corners of the plug, and may protrude sufficiently from the face of the plug to prevent the corners of the plug from being inserted into the receptacle, except when the bosses are aligned with the boss-receiving slots in the receptacle. | 2014-07-10 |
20140193997 | METHODS AND APPARATUS RELATED TO RECEPTACLES AND RELEASABLE CONNECTORS - An apparatus can include a support portion of a connector and at least a portion of wire component coupled to a first side of the support portion. The apparatus can include a protrusion portion have a distal portion, a proximal portion, and an opening disposed between the distal portion and the proximal portion. The proximal portion can be coupled to a second side of the support portion, and the protrusion portion can have a width tapering from the proximal portion to the distal portion. A contact can be disposed in the protrusion portion and can have a surface exposed to an ambient environment through the opening. | 2014-07-10 |
20140193998 | Distribution Networks For Safety Sensors and Devices - In distribution networks for safety sensors and devices, aspects of the invention provide routing individualized status signals in parallel to potential safety sensor locations in addition to serially routing safety signals to provide substantially increased protection. A shorting plug that electrically shorts together an individualized status signal to a voltage reference level at a safety sensor location, in addition to electrically shorting together the safety signals for electrical continuity, provides individualized status information for each potential safety sensor location in addition to the serial safety information provided by the safety signals. Another aspect of the invention provides a remote monitoring device coupled to one or more adapter ports, with each adapter port coupled to one or more safety sensors, wherein adapter ports are coupled via cabling with cable endings of the same type, thereby preventing circumvention of a safety sensor simply by coupling together adjacent cables. | 2014-07-10 |
20140193999 | CONNECTOR AND INTEGRALLY MOLDED PRODUCT - A connector made of fiber reinforced resin includes a case and a connector port integrally molded with the case on one surface of the connector. A force by which the connector is warped to a side to the connector port is produced by disorder of orientation of fibers caused by the case and the connector port. A surface opposite to the one surface located between the case and the connector port is provided with a warping prevention part which includes at least one of a concave part and a convex part and extends along the case and the connector port. A force by which the connector is warped to a side opposite to the connector port is produced by disorder of orientation of fibers in the warping prevention part. | 2014-07-10 |
20140194000 | QUICK-DETACHABLE MODULAR JACK AND FACE PANEL MOUNTING STRUCTURE - A quick-detachable modular jack and face panel mounting structure includes a face panel, an inner positioning frame mounted at the back side of the face panel for holding multiple modular jacks in the face panel in a row, a limiter plate vertically movably mounted in the inner positioning frame, and control rods held down in the inner positioning frame by the limiter plate to lock the modular jacks and respectively horizontally movable to unlock the respective modular jacks. | 2014-07-10 |
20140194001 | CONNECTOR - A female connector housing is provided with a plurality of terminal accommodating chambers. Each of the terminal accommodating chambers is provided, on its front face, with a terminal insertion opening through which a male terminal is to be inserted. Each of the terminal accommodating chambers is provided, on its rear face, with a wire withdrawal opening. In the terminal accommodating chamber which is intended to accommodate no terminal, there are provided a first shielding wall which surrounds an erroneous-insertion allowable space allowing the male terminal to be inserted erroneously and shields the interior of the erroneous-insertion allowable space and a second shielding wall for shielding the wire withdrawal opening. | 2014-07-10 |
20140194002 | CONNECTOR TERMINAL AND CONNECTING STRUCTURE - A connector terminal ( | 2014-07-10 |
20140194003 | CONNECTOR TERMINAL - A connector terminal includes a barrel part capable of attaching thereto a conductor exposed from an outer skin of an electric wire to cause to conduct and connect, and a terminal part caused to conduct to a mating terminal. The barrel part and an end of the electric wire are covered with a waterproof case made of resin to be made waterproof. The waterproof case is made of divided two case members, and is formed of the same material as the outer skin of the electric wire. | 2014-07-10 |
20140194004 | GROUNDING STRUCTURES FOR A RECEPTACLE ASSEMBLY - A receptacle assembly includes a contact module including a holder having a first side and an opposite second side. The holder holds a plurality of contacts. The contacts extend from the holder for electrical termination. A first ground shield is coupled to the first side. The first ground shield has grounding beams extending forward of the holder for electrical connection to a header assembly. The first ground shield has ground skewers extending into the holder. A second ground shield is coupled to the second side. The second ground shield has grounding beams extending forward of the holder for electrical connection to the header assembly. The second ground shield has ground skewers extending into the holder and the frame assembly. The ground skewers of the second ground shield engage and electrically connect to corresponding ground skewers of the first ground shield. | 2014-07-10 |
20140194005 | ELECTRICAL CONNECTOR WITH SHIELDINGTHEREOF - An electrical connector for mating with a plug and mounting to a printed circuit board, includes an insulative housing with a forwardly extending mating tongue thereof. A terminal module includes an insulator associated with a plurality of contacts commonly assembled into the housing. Those contacts are categorized with the differential pairs, the grounding contacts and the power contacts while each of the contacts includes a front contacting section exposed upon the mating tongue, a middle retention section retained to the insulator, and a rear tail section extending out of the housing. A metallic shielding/reinforcement plate associated with the terminal module is assembled into the housing, and includes a front region inserted into the mating tongue, a middle region with a spring tang to mechanically and electrically connected to the selected grounding contact, and a rear tail section extending out of the housing. | 2014-07-10 |
20140194006 | LOWER PROFILE CARD EDGE CONNECTOR - A card edge connector for being retained into a notch of a print circuit board includes an insulative housing defining a central slot extending along a longitudinal direction, a first wall and a second wall located on the opposite sides of the central slot and a fitting portion extending downwardly into the notch from a bottom portion of the first wall, the fitting portion defining a plurality of first terminal slots and the second wall defining a plurality of second terminal slots. A plurality of first terminals are received in the first terminal slots, and a plurality of second terminals are received in the second terminal slots. Each first terminal defines a first retaining portion received in the first terminal slot and a first soldering portion extending out of the housing forwardly, each second terminal defines a second soldering portion rearwardly extending out of the housing. | 2014-07-10 |
20140194007 | MODULAR CONTROL APPARATUS - A control apparatus has a module having first and second module parts, which can be mechanically and electrically combined to form a combined arrangement. The first and second module parts each comprise a housing having a boundary surface opposite one another in the combined arrangement that define a boundary plane. The first and second module parts are combined by a pivoting movement about a pivot axis arranged perpendicular to the boundary plane. One of the module parts has a number of contacts comprising a first electrical contact, and the other module part has a number of mating contacts comprising a first electrical mating contact. In the combined arrangement, each electrical contact makes contact with its corresponding mating contact for electrical connection between the first and second module parts. The contacts comprise conductor tracks on a nonconductive board such that a printed circuit board is formed. | 2014-07-10 |
20140194008 | COMBINATION POWER AND DATA CONNECTOR - An aspect provides a combination power and data connector, including: a dedicated power connector element; and a combination data connector element separate from the dedicated power connector element, the combination data connector element providing a combination of pins for two data transmission protocols. Other aspects are described and claimed. | 2014-07-10 |
20140194009 | MODULAR JACK HAVING INLINED PRINTED CIRCUIT BOARD - A modular jack ( | 2014-07-10 |
20140194010 | CONTACT CONSTRUCTION OF ELECTRICAL RECEPTACLE - An electrical contact is provided for an electrical receptacle. The contact includes a main body, a first segment that is an extension of the main body and substantially parallel to the main body, a second segment substantially perpendicular to the main body and the first segment, a third segment substantially perpendicular to the second segment and substantially parallel to the main body and the first segment, a first wipe that extends from the first segment, a second wipe that extends from the second segment, and a third wipe that extends from the third segment. | 2014-07-10 |
20140194011 | DUAL CONTACT POGO PIN ASSEMBLY - A contact assembly includes a base and a pair of electrical contacts supported by the base. A first end of the first electrical contact corresponds to a first end of the base and is configured to engage a first external conductive circuit element. A first end of the second electrical contact also corresponds to the first end of the base and is configured to engage a second external conductive circuit element. The first contact and the second contact are electrically isolated from one another and configured to compress when engaging an external connector element. The base includes an aperture positioned on a second end of the base outboard of a second end of the first and second electrical contacts. The aperture presents a narrowing shape with a wide mouth distal the electrical contacts and a narrow internal through-hole proximate the electrical contacts. | 2014-07-10 |
20140194012 | CONNECTOR | 2014-07-10 |
20140194013 | CONNECTOR UNIT - A first connector housing of a first connector includes a fitting concave having an inner wall portion extended in a fitting direction X and formed in substantially a circular shape, and the inner wall portion has a first step portion extended perpendicular to the fitting direction X and projected inward. A second connector housing of a second connector includes a fitting convex having an outer wall portion extended in the fitting direction X and formed in substantially a columnar shape, and the outer wall portion has a second step portion indented inward corresponding to the first step portion. A spacer is projected from at least two positions of a part of the outer wall portion and the second step portion in a temporary locking position, and is sunken in the outer wall portion or arranged in the same plane as the outer wall portion in a regular locking position. | 2014-07-10 |
20140194014 | ELECTRIC WIRE CONNECTION STRUCTURE - The present invention has an object of providing an electric wire connection structure for providing sufficiently high electric characteristics by welding and fixing a terminal and core wires, for providing the terminal with a strength sufficiently high to withstand the pressure at the time of welding, and for improving the adhesiveness of the core wires to the terminal by preventing the core wires from escaping at the time of welding. The electric wire connection structure is for connecting core wires ( | 2014-07-10 |
20140194015 | METHOD FOR IMPROVING THE TRANSITION RESISTANCE IN AN ELECTRICAL CONNECTION BETWEEN TWO CONTACT ELEMENTS AND COMPONENT HAVING AN ELECTRICAL CONNECTION BETWEEN TWO CONTACT ELEMENTS - The invention relates to a method for improving the transition resistance in an electrical connection, in particular a pressure connection, between two contact elements. With repeated mechanical or thermal loads, such connections, in particular connections having a small cross-section or comprising soft material, have a transition resistance which increases over time. According to the invention, the transition resistance is improved by there being applied to at least one contact face of a contact element a chemically reducing substance which activates the contact face and consequently increases the conductivity and the cold welding density. | 2014-07-10 |
20140194016 | FEMALE TERMINAL - A female terminal includes a terminal connection portion for a male terminal to be inserted and an electric wire connection portion connecting with an electric wire to be electrically connected to the male terminal. The terminal connection portion includes a male terminal entrance for the male terminal to be inserted and a male terminal exit for a tip of the male terminal passing through the male terminal entrance to be inserted. At least one of the male terminal entrance or the male terminal exit includes a support portion configured to contact with the male terminal to support the male terminal. | 2014-07-10 |
20140194017 | Liquid-Resistant Connectors and Covers for Equipment Using the Same - A water-resistant connector for use with fabric and sheet-like material comprises two plates stitched to each other on either side of and through the fabric or sheet-like material with at least one gasket made of an elastomeric material such as neoprene being placed between one of the plates and the fabric or sheet-like material. The gasket is stitched through and compressed between the plates so as to press against the stitching for water resistance. A suitable elastomeric material is a sheet of elastomeric compound adhered to either side of a reinforcing scrim. | 2014-07-10 |
20140194018 | CARBON FIBER COMPOSITE MATERIAL - The present invention relates to a carbon fiber composite material containing carbon fibers coated with amorphous carbon, and a matrix resin. | 2014-07-10 |
20140194019 | Silicone Composition, Silicone Adhesive, Coated and Laminated Substrates - A silicone composition and more particularly to a silicone composition comprising at least one organosilicon compound having an average of at least two silicon-bonded hydrogen atoms per molecule, at least one silicone resin having the formula (R | 2014-07-10 |
20140194020 | GLASS MAT FOR ROOFING PRODUCTS - A glass mat includes an assembly of glass fibers, a binder composition and an asphaltic coating. The binder composition includes an organic resin and an adhesion promoter. The glass mat has an at least 2% increase in tear strength as measured using the methods specified in ASTM D3462, compared to an asphaltic coated glass mat having a binder composition without the adhesion promoter. Further provided is an asphalt roofing product including the glass mat and a method of increasing tear strength in an asphalt roofing product. | 2014-07-10 |
20140194021 | PROCESS FOR PRODUCING POLYESTER FIBER - The present invention relates to polyester fiber that can be used as fabric for an airbag. In particular, the present invention relates to a process for producing polyester fiber comprising conducting an esterification reaction of a dicarboxylic acid composition and glycol in a predetermined ratio; conducting a polycondensation reaction of the oligomer produced by the esterification reaction; conducting a solid state polymerization of the polymer produced by the polycondensation; and melt spinning and drawing the polyester chip produced by the solid state polymerization, fiber for an airbag produced thereby, and fabric for an airbag comprising the same. | 2014-07-10 |
20140194022 | ROOFTOP CANVAS - Rooftop canvas includes a twill texture layer having a plurality of flat warp strips extending in a longitudinal direction and a plurality of flat weft strips extending in a lateral direction perpendicular to the longitudinal direction. An imaginary line passing through an intersection of one of the flat weft strips and one of the flat warp strips and an intersection of another flat weft strip adjacent to the flat weft strip and another flat warp strip adjacent to the flat warp strip is inclined relative to the longitudinal direction and the lateral direction. The twill texture layer is superimposed on a first covering layer. The rooftop canvas can further include a second covering layer, with the first covering layer sandwiched between the twill texture layer and the second covering layer. | 2014-07-10 |
20140194023 | LAMINATES WITH FLUOROPOLYMER CLOTH - A laminate includes a first layer of a first fluoropolymer. The laminate can further include a second layer of at least one ply of a fluoropolymer fabric overlying the first layer. The laminate can further include a third layer of a second fluoropolymer overlying the second layer opposite to the first layer. The laminate can have a strain of not more than 50% at a stress of 15 MPa as measured by DIN EN ISO 527 with a sample width of about 1 inch, at a clamp distance of about 50 mm, and a speed of about 50 mm/min. Embodiments of such laminates can find applications, for example, as diaphragm membranes, solenoid valves, conveyor belts, or bearings. | 2014-07-10 |
20140194024 | Barrier Films - Various polymeric barrier compositions are described which when formed into films, are useful in reducing transmission of odors. The films can be incorporated into a wide range of products such as multilayer barrier films used in medical applications and particularly in ostomy appliances. In certain versions, the films include semi-crystalline cyclic olefin copolymers. | 2014-07-10 |
20140194025 | Production of Highly Concentrated Solutions of Self-Assembling Proteins - The present invention concerns stable aqueous protein dispersions comprising in an aqueous phase at least one self-assembling protein in dispersed form and also at least one specific dispersant for the self-assembling protein; processes for producing such stable aqueous dispersions; processes for electrospinning self-assembling proteins using such stable aqueous dispersions; processes for producing fibrous sheet bodies or fibers from such aqueous dispersions; the use of such aqueous dispersions for coating surfaces; the use of the materials produced by electrospinning in the manufacture of medical devices, hygiene articles and textiles; and also fibrous or fibrous sheet bodies produced by an electrospinning process of the present invention. | 2014-07-10 |
20140194026 | MANUFACTURING METHOD OF MAIN METAL FITTING FOR SPARK PLUG AND MANUFACTURING METHOD OF SPARK PLUG - A metallic shell extends in the direction of an axial line and has a threaded portion on its outer circumferential surface for threading engagement with a mounting hole of a combustion apparatus. A process of manufacturing the metallic shell includes a step of forming a metallic shell tubular intermediate having the first tubular portion and the second tubular portion and a rolling step of forming the threaded portion on the metallic shell tubular intermediate. In the rolling step, a bearing member is inserted into the metallic shell tubular intermediate for nipping the metallic shell tubular intermediate in cooperation with working surfaces of the rolling dies, and rolling is performed simultaneously on at least the first tubular portion and the second tubular portion. | 2014-07-10 |