| 27th week of 2012 patent applcation highlights part 32 |
| Patent application number | Title | Published |
|---|
| 20120170371 | PROGRAMMING METHOD OF NON-VOLATILE MEMORY DEVICE - A programming method of a non-volatile memory device that includes a string of memory cells with a plurality of floating gates and a plurality of control gates disposed alternately, wherein each of the memory cells includes one floating gate and two control gates disposed adjacent to the floating gate and two neighboring memory cells share one control gate. The programming method includes applying a first program voltage to a first control gate of a selected memory cell and a second program voltage that is higher than the first program voltage to a second control gate of the selected memory cell, and applying a first pass voltage to a third control gate disposed adjacent to the first control gate and a second pass voltage that is lower than the first pass voltage to a fourth control gate disposed adjacent to the second control gate. | 2012-07-05 |
| 20120170372 | MEMORY DEVICE BIASING METHOD AND APPARATUS - Memory devices and methods are disclosed, such as those facilitating data line shielding by way of capacitive coupling with data lines coupled to a memory string source line. For example, alternating data lines are sensed while adjacent data lines are coupled to a common source line of the data lines being sensed. Data line shielding methods and apparatus disclosed can reduce effects of source line bounce occurring during a sense operation of a memory device. | 2012-07-05 |
| 20120170373 | SEMICONDUCTOR MEMORY DEVICE AND PROGRAM METHODS THEREOF - Programming a semiconductor memory device includes: performing a program loop using a blind program operation until the selected cell threshold voltages reach a first verification level; upon detecting a cell having the threshold voltage reaching the first verification level, verifying whether a cell having the threshold voltage reached a second verification level higher than the first verification level; upon verifying a cell having the threshold voltage reaching the second verification level, continuously performing program loops on cells having the first verification level as a target level and on cells having the second verification level as a target level; and upon verifying no cell having the threshold voltage reaching the second verification level, performing a program loop on memory cells having a target level higher than the first verification level, after programming the memory cells having the first verification level as the target level. | 2012-07-05 |
| 20120170374 | NONVOLATILE MEMORY DEVICE AND RELATED PROGRAMMING METHOD - A nonvolatile memory device programs a memory cell by performing a plurality of program loops each comprising a program operation and a program verifying operation. Where the program verifying operation in one program loop determines that the memory cell has been successfully programmed to a target state, a soft-programming operation is performed in a subsequent program loop to determine whether the memory cell has retained the target state, and if not, increases the threshold voltage of the memory cell. | 2012-07-05 |
| 20120170375 | Vertical Nonvolatile Memory Devices and Methods of Operating Same - Integrated circuit memory devices include a plurality of vertically-stacked strings of nonvolatile memory cells having respective vertically-arranged channel regions therein electrically coupled to an underlying substrate. A control circuit is provided, which is configured to drive the vertical channel regions with an erase voltage that is ramped from a first voltage level to a higher second voltage level during an erase time interval. This ramping of the erase voltage promotes time efficient erasure of vertically stacked nonvolatile memory cells with reduced susceptibility to inadvertent programming of ground and string selection transistors (GST, SST). | 2012-07-05 |
| 20120170376 | SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF - A semiconductor memory device includes a plurality of memory cells, including an N well formed within a P type region and a P well formed within the N well, a peripheral circuit configured to perform a program, program verify, read, erase, or erase verify operation on memory cells selected from among the memory cells, a voltage supply circuit configured to generate a positive voltage and a negative voltage for the program, program verify, read, erase, or erase verify operation, and a control circuit configured to control the peripheral circuit and the voltage supply circuit so that the program, program verify, read, erase, or erase verify operation is performed and, when the program verify and read operations are performed, different voltage is supplied to the P well and the N well. | 2012-07-05 |
| 20120170377 | LOCAL WORD LINE DRIVER AND FLASH MEMORY ARRAY DEVICE THEREOF - In a local word line driver of an NOR flash memory and its flash memory array device, the local word line driver is provided for driving a local word line in a sector of a memory array, and the local word line driver has two transistors including a first transistor and a second transistors, and the first and second transistors are NMOS transistors, and thus achieving the effects of reducing the area occupied by circuits on the local word line driver and the die size, and saving the area for the use by memory units. | 2012-07-05 |
| 20120170378 | READ METHODS OF SEMICONDUCTOR MEMORY DEVICE - A read method of a semiconductor memory device includes performing a read operation on target cells by using a first read voltage, terminating the read operation on the target cells if, as a result of the read operation on the target cells, error correction is feasible, performing a read operation on first cells next to the target cells along a first direction if, as a result of the read operation on the target cells, error correction is unfeasible, performing the read operation again on the target cells by selecting one of a plurality of read voltages in response to a result of the read operation on the first cells and by using the selected read voltage for reading data of the target cells, and terminating the read operation on the target cells if error correction is feasible. | 2012-07-05 |
| 20120170379 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A semiconductor memory device according to an aspect of the present disclosure includes a first page buffer coupled to a first even bit line and a first odd bit line, a second page buffer coupled to a second even bit line and a second odd bit line, and a controller configured to control the first and the second page buffers so that the second page buffer sets the second even bit line in a floating state such that the voltage of the second even bit line is changed according to a shift in the voltage of the first odd bit line, when a read operation for memory cells coupled to the first odd bit line is performed, and the second page buffer stores data corresponding to the level of threshold voltages of the memory cells by detecting a shift in the voltage of the second even bit line. | 2012-07-05 |
| 20120170380 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device includes a memory cell array, a first detecting circuit, a second detecting circuit, a switching circuit and a recovery control circuit. The first detecting circuit outputs a first detection signal which shows whether an externally supplied external power supply is equal to or more than a first voltage. The second detecting circuit outputs, at a higher speed than the first detecting circuit, a second detection signal which shows whether the external power supply is equal to or more than the first voltage. In a write operation, the switching circuit outputs the second detection signal output from the second detecting circuit. In an operation other than the write operation, the switching circuit outputs the first detection signal output from the first detecting circuit. The recovery control circuit terminates the write operation according to the second detection signal output from the switching circuit. | 2012-07-05 |
| 20120170381 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell transistor, a word line, a row decoder, a sense amplifier which determines the data in the memory cell transistor via the bit line, a first bit line clamp transistor connected in series between the bit line and the sense amplifier, a second bit line clamp transistor connected in parallel to the first bit line clamp transistor and having a current driving capability higher than that of the first bit line clamp transistor, and a bit line control circuit which turns on the first bit line clamp transistor and the second bit line clamp transistor using a common gate voltage during a predetermined period from a start of charge of the bit line, and turns off only the second bit line clamp transistor when the predetermined period has elapsed. | 2012-07-05 |
| 20120170382 | SEMICONDUCTOR MEMORY DEVICE, TEST CIRCUIT, AND TEST OPERATION METHOD THEREOF - A semiconductor memory device includes a plurality of banks, each including a plurality of first memory cells and a plurality of second memory cells, a first input/output unit configured to transfer first data between the first memory cells and a plurality of first data pads, a second input/output unit configured to transfer second data between the second memory cells and a plurality of second data pads, a path selection unit configured to transfer the first data which are input through the first data pads, to both the first and second memory cells, during a test mode, and a test mode control unit configured to compare the first data of the first and second memory cells, and to control the first data pads to denote a fail status based on a comparison result, during the test mode. | 2012-07-05 |
| 20120170383 | INTEGRATED CIRCUIT, SYSTEM INCLUDING THE SAME, MEMORY, AND MEMORY SYSTEM - A system includes integrated circuit chip including a first buffer configured to receive signals and a second buffer configured to receive signals, wherein the first buffer receives signals of a higher frequency than the second buffer, a controller chip configured to control the integrated circuit chip, an I/O channel formed between the controller chip and the integrated circuit chip to transfer a first signal and a second speed signal, wherein the first signal has a higher frequency than the second signal, and a status channel formed between the controller chip and the integrated circuit chip to transfer at least one status signal, wherein the integrated circuit chip is configured to select one of the first buffer and the second buffer and actives the selected buffer in response to the at least one status signal and receive a signal transferred through the I/O channel. | 2012-07-05 |
| 20120170384 | INTEGRATED CIRCUIT, MEMORY SYSTEM, AND OPERATION METHOD THEREOF - An integrated circuit includes an input pad configured to receive a low-speed signal and a high-speed signal, a high-speed buffer coupled to the input pad, a low-speed buffer coupled to the input pad, a strobe input unit configured to receive a strobe signal for indicating an input of the high-speed signal to the input pad, and a buffer control unit configured to control an activation of the high-speed buffer in response to the strobe signal. | 2012-07-05 |
| 20120170385 | OUTPUT DRIVER AND ELECTRONIC SYSTEM COMPRISING SAME - An output driver comprises a pull-up circuit that pulls up an output node to a supply voltage in N successive intervals in response to N pull-up control signals having different phases and a pull-down circuit that pulls down the output node to a ground voltage in M successive intervals in response to M pull-down control signals having different phases. | 2012-07-05 |
| 20120170386 | Hybrid Read Scheme for Multi-Level Data - Some aspects of the present disclosure relate to a read circuit that uses a hybrid read scheme as set forth herein. In this hybrid read scheme, a state machine, at a first time in the read operation, sets a reference signal S | 2012-07-05 |
| 20120170387 | DEVICE FOR GENERATING A TEST PATTERN OF A MEMORY CHIP AND METHOD THEREOF - A method of generating a test pattern of a memory chip includes generating and outputting a pattern enabling signal according to a first pattern signal and a second pattern signal, generating and outputting a first pre-input-output signal and a second pre-input-output signal according to a memory bank signal, a section signal, and the pattern enabling signal, executing an exclusive-OR logic operation on a third input-output signal and the second pattern signal to generate and output a first enabling signal, generating and outputting a first input-output signal and a second input-output signal according to the first enabling signal, the first pre-input-output signal and the second pre-input-output signal, and writing a predetermined logic voltage to each memory cell of the memory chip according to the first input-output signal and the second input-output signal. | 2012-07-05 |
| 20120170388 | SRAM INCLUDING WRITE ASSIST CIRCUIT AND METHOD OF OPERATING SAME - A static random access memory (SRAM) is described and includes; a bit cell connected with a word line, connected between a bit line and a complementary bit line, and receiving an internal voltage from a write assist circuit. The write assist circuit includes a power control circuit that charges/discharges an internal voltage line to provide the internal voltage in response to at least one control signal, and a compensation circuit that controls a level of the internal voltage. | 2012-07-05 |
| 20120170389 | MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMS - A memory controller for strobe-based memory systems is disclosed. The memory controller comprises a circuit to generate a control signal having a predetermined timing relationship with respect to a first clock signal, a circuit to receive the control signal, and a receiver to sample the read data in response to the qualified read strobe signal. The receiving circuit comprises an input to receive an external read strobe signal transmitted by a semiconductor memory device, circuitry to synchronize the control signal and the received read strobe signal to have a common timing relationship with respect to each other, and circuitry to gate the read strobe signal based on the synchronized control signal. | 2012-07-05 |
| 20120170390 | Read stability of a semiconductor memory - A semiconductor memory storage device is disclosed. The memory comprises a plurality of storage cells for storing data each storage cell comprising an access control device for providing the storage cell with access to or isolation from a data access port in response to an access control signal, access control circuitry for transmitting the access control signal along an access control line to control a plurality of the access control devices connected to the access control line. The access control circuitry responds to a data access request signal by increasing a voltage level supplied to the access control line to a first voltage level at a first average rate and then in response to receipt of a further signal increasing the voltage level supplied to the access control line to the predetermined higher voltage level, in such a way that a further average rate of increase of the voltage level from the first to the predetermined higher voltage level is lower than the first average rate of increase to the first level. | 2012-07-05 |
| 20120170391 | MEMORY DEVICE WITH BOOST COMPENSATION - A memory circuit includes a memory cell configured to be re-writable. A write enable circuit is configured to enable writing a signal via a pair of bit lines to the memory cell depending on a write signal. A charge supply circuit is configured to supply a charge to at least one of the pair of bit lines. A charge supply controller is configured to control the charge supply circuit to supply the charge dependent on at least one of the temperature of the memory circuit and the potential difference supply of the memory circuit. | 2012-07-05 |
| 20120170392 | INTERNAL VOLTAGE GENERATION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes first and second bank groups, a first internal voltage control unit configured to generate a first enable pulse which is enabled when a first read operation or a first write operation is performed for banks included in the first bank group, and a first internal voltage generation unit configured to generate and supply a first internal voltage to the first bank group in response to the first enable pulse, wherein an enable period of the first enable pulse is set to be longer in the first write operation than in the first read operation. | 2012-07-05 |
| 20120170393 | PROGRAMMABLE DELAY INTRODUCING CIRCUIT IN SELF-TIMED MEMORY - Delays are introduced in self-timed memories by introducing a capacitance on the path of a signal to be delayed. The capacitances are realized by using idle-lying metal layers in the circuitry. The signal to be delayed is connected to the idle-lying capacitances via programmable switches. The amount of delay introduced depends on the capacitance introduced in the path of signal, which in turn depends on state of the switches. The state of the switches is controlled by delay codes provided externally to the delay introducing circuitry. Since idle-lying metal capacitances are utilized, the circuitry can be implemented using a minimum amount of additional hardware. Also, the delay provided by the circuitry is a function of memory cell SPICE characteristics and core parasitic capacitances. | 2012-07-05 |
| 20120170394 | COLUMN ADDRESS CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE AND METHOD OF GENERATING COLUMN ADDRESSES - The column address circuit of a semiconductor memory device according to an aspect of the present disclosure includes a column address generation circuit configured to generate an internal dummy clock in response to a data output enable signal, generate an internal clock in response to a read enable signal, generate first count addresses in response to the internal dummy clock, and generate normal count addresses in response to the internal clock after the generation of the first count addresses, where the read enable signal is activated later than the data output enable signal, and a column address output circuit configured to store the first count addresses and the normal addresses and to generate column addresses by synchronizing the first count addresses and the normal addresses with output clocks, respectively. | 2012-07-05 |
| 20120170395 | Data Flow Control in Multiple Independent Port - A system includes a memory controller and a plurality of memory devices connected in-series that communicate with the memory controller. Each of the memory devices has multiple independent serial ports for receiving and transmitting data. The memory controller a device address (DA) or ID number for designating a device that executes a command. Data contained in the command sent by the memory controller is captured by an individual link control circuit, in response to internally generated clock with appropriate latencies. The captured data is written into a corresponding memory bank. The data stored in one of a plurality of memory banks of one memory device is read in accordance with the addresses issued by the memory controller. The read data is propagated from the memory device through the series-connected memory devices to the memory controller. | 2012-07-05 |
| 20120170396 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a temperature sensor configured to generate a low-temperature signal which is enabled at below first set temperature and a high-temperature signal which is enabled at above second set temperature; a start signal generator configured to receive a refresh command and generate a start signal according to the low-temperature signal; and an address counter configured to count refresh addresses in response to the start signal. | 2012-07-05 |
| 20120170397 | SENSOR NODE ENABLED TO MANAGE POWER INDIVIDUALLY - A sensor node is provided. The sensor node regulates the power supplied to memories of a memory unit individually and the power supplied to a transmitter and a receiver of an RF transceiver individually. Thus, the sensor node can minimize its power consumption. | 2012-07-05 |
| 20120170398 | COLUMN ADDRESS COUNTER CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE - The column address counter circuit of a semiconductor memory device includes at least one lower bit counter unit configured to generate a first bit of a column address by counting an internal clock, where the first bit is not a most significant bit of the column address, and a most significant counter unit configured to generate the most significant bit of the column address in response to a mask clock, where the mask clock is toggled when the internal clock is toggled by a set number of times. | 2012-07-05 |
| 20120170399 | MULTI-COLUMN ADDRESSING MODE MEMORY SYSTEM INCLUDING AN INTEGRATED CIRCUIT MEMORY DEVICE - A memory system includes a master device, such as a graphics controller or processor, and an integrated circuit memory device operable in a dual column addressing mode. The integrated circuit memory device includes an interface and column decoder to access a row of storage cells or a page in a memory bank. During a first mode, a first row of storage cells in a first memory bank is accessible in response to a first column address. During a second mode, a first plurality of storage cells in the first row of storage cells is accessible in response to a second column address during a column cycle time interval. A second plurality of storage cells in the first row of storage cells is accessible in response to a third column address during the column cycle time interval. The first and second pluralities of storage cells are concurrently accessible from the interface. | 2012-07-05 |
| 20120170400 | MEMORY DEVICES AND ACCESSING METHODS THEREOF - A memory device is provided. The memory device comprises a plurality of memory chips. The plurality of memory chips receive an input address code and alternately operate in an active mode. Each memory chip receives a selection signal and operates according to an internal address counter code. For each memory chip, the respective internal address counter code is initially set according to the input address code and the respective selection signal. | 2012-07-05 |
| 20120170401 | LOW EMISSION ENERGY EFFICIENT 100 PERCENT RAP CAPABLE ASPHALT PLANT - An HMA plant which uses combination direct exhaust heated and indirectly steam heated pre-heating drum in combination with a sealed indirect hot oil heated rotary shaft mixer, where the steam given off from the heated HMA is maintained, separated from the sulfur containing exhaust of a hot oil heater, so as to minimize the production of acid in liquid form. | 2012-07-05 |
| 20120170402 | METERING APPARATUS AND METHOD FOR INTRODUCING A POWDERY MEDIUM INTO A FLUID - The application relates to a metering apparatus for introducing a powdery medium into a fluid, comprising a guide device for guiding the fluid and a metering device, said metering device being arranged above the guide device such that the powdery medium released by the metering unit is scattered onto the surface of the fluid. | 2012-07-05 |
| 20120170403 | SLURRY DISTRIBUTOR, SYSTEM AND METHOD FOR USING SAME - A slurry distribution system can include a feed conduit and a distribution conduit in fluid communication therewith. The feed conduit can include a first feed inlet and a second feed inlet disposed in spaced relationship thereto. The distribution conduit can extend generally along a longitudinal axis and include an entry portion and a distribution outlet in fluid communication therewith. The entry portion is in fluid communication with the first and second feed inlets of the feed conduit. The distribution outlet extends a predetermined distance along a transverse axis, which is substantially perpendicular to the longitudinal axis. The slurry distribution system can be placed in fluid communication with a gypsum slurry mixer adapted to agitate water and calcined gypsum to form an aqueous calcined gypsum slurry. | 2012-07-05 |
| 20120170404 | MIXING BOWL LINER AND LID - A bowl liner for a mixing bowl of a stand mixer includes a shell and a rim secured an upper end of the shell. The shell is sized to be received in the mixing bowl, and is formed from an elastomeric material. The shell has a mixing chamber defined therein. The rim includes an outer perimeter surface that has a keyed surface section to locate the liner relative to the stand mixer. | 2012-07-05 |
| 20120170405 | METHOD FOR A MUD CAKE THICKNESS DETERMINATION - The method of a mud cake thickness determination provides sending short high-frequency signals into a formation from at least two positions located at different distances from the mud cake and recording arrival times of reflected echo signals. The mud cake thickness is determined based on the time measured. | 2012-07-05 |
| 20120170406 | Early Kick Detection in an Oil and Gas Well - An apparatus, method and compute-readable medium for detecting a gas influx event in a borehole fluid during a drilling operation is disclosed. A measurement of an acoustic velocity of the borehole fluid is obtained at an acoustic sensor disposed in a borehole. A measurement of temperature of the borehole fluid is obtained at a temperature sensor disposed in the borehole. A process compares the measurement of the acoustic velocity of the borehole fluid to the measurement of the temperature of the borehole fluid to detect the gas influx event. | 2012-07-05 |
| 20120170407 | SYSTEMS AND METHODS FOR IMPROVING BANDWIDTH OF WIRELESS NETWORKS - Systems and methods for seismic data acquisition with location aware network nodes. Based on location information of the nodes of the network, a multiplexing signature may be provided for the node. The location information may be used in conjunction with other information (e.g., location information of other nodes in the network and transmission ranges for nodes in the network) to determine collision domains. A multiplexing signature may be assigned to a node based on information regarding a collision domain to which the node belongs. As such, the assigned multiplexing signature may be used to avoid data collisions. | 2012-07-05 |
| 20120170408 | SYSTEMS AND METHODS FOR SEISMIC DATA ACQUISITION - Systems and methods for seismic data acquisition utilizing wireless modules to perform real time data read out. The wireless modules may be assigned a shared multiplexing sequence through which each module advances in successive transmission periods. Wireless modules belonging to a shared collision domain may be operated out of phase from one another with respect to the shared multiplexing signature sequence. As such, a dynamic multiplexing regime may be implemented. The shared multiplexing signature sequence may include, among others, a plurality of different frequencies, a plurality of different codes, or a plurality of different discrete time periods. | 2012-07-05 |
| 20120170409 | Determining the Order of Devices in a Downhole String - A string of subs includes a controller sub. The controller sub includes a first end, a second end, a controller, a first controller bus coupled to the controller, the first controller bus exiting at the first end of the controller sub, and a second controller bus coupled to the controller, the second controller bus being separate from the first controller bus, the second controller bus exiting at the second end of the controller sub. The string of subs also includes a first measuring sub and a second measuring sub. A process, running on a computer, discovers that the first measuring sub is connected to the first controller bus, discovers that the second measuring sub is connected to the first controller bus, determines that the first measuring sub is physically closer to the controller sub than the second measuring sub, and use the fact that the first measuring sub is physically closer to the controller sub than the second measuring sub in controlling the operation of the string of subs. | 2012-07-05 |
| 20120170410 | PIPING COMMUNICATION - Apparatus, systems, and methods may operate to communicate, by an information-bearing signal across a mechanical interface, between a pair of electromechanical transducer elements when the pair is compressively loaded. Compressive loading may occur after coupling a male portion of a pipe joint to a female portion of the pipe joint to form the pipe joint. A first one of the pair of electromechanical transducer elements may be included in the male portion, and a second one of the pair may be included in the female portion. Additional apparatus, systems, and methods are disclosed. | 2012-07-05 |
| 20120170411 | OBSTACLE DETECTION DEVICE - An obstacle detection device includes one or more emitter ultrasonic sensors, each emitting an ultrasonic wave toward an obstacle, and one or more detection ultrasonic sensors for reception, each detecting a reflected wave from the obstacle. A control unit drives a specific one of the emitter ultrasonic sensors to cause it to emit an ultrasonic wave, stops the emission of the ultrasonic wave by the specific emitter ultrasonic sensor at the time that one of the detection ultrasonic sensors detects a reflected wave from the obstacle, and carries out detection of the obstacle and measurement of the distance to the obstacle from the time that the control unit stops the emission of the ultrasonic wave by the emitter ultrasonic sensor and the time that the reflected wave cannot be detected anymore. | 2012-07-05 |
| 20120170412 | Systems and methods including audio download and/or noise incident identification features - Systems and methods are disclosed that detect weapon firing/noise incidents in a region and/or include other related features. According to one or more embodiments, an exemplary method may include detecting acoustic signals from the region by one or more sensors, processing the detected acoustic signals to generate a processed signal, storing the detected acoustic signals with each sensor, and processing the processed signal associated with each sensor to determine if a weapon firing incident occurred. Moreover, exemplary methods may include, if unable to determine whether a weapon firing incident occurred, performing further processing of the acoustic signals and/or determining if a weapon firing incident occurred based upon the stored detected acoustic signals. | 2012-07-05 |
| 20120170413 | HIGHLY PORTABLE SYSTEM FOR ACOUSTIC EVENT DETECTION - A man wearable acoustic sensor for use with a gunshot detection system. In a preferred embodiment the inventive sensor includes: a housing configured to be man wearable, a microphone; a processor housed within the housing and in communication with the microphone to detect an acoustic event and determine a time of arrival for the acoustic event; a GPS receiver for providing position information to said processor; a network; and a display for displaying information concerning acoustic events to a user. Man wearable describes a sensor which is either integrated into a piece of equipment normally carried by a soldier or integrated into an article of clothing or configured to securely attach to such equipment or clothing. | 2012-07-05 |
| 20120170414 | ACOUSTIC SIGNAL DETECTOR - Disclosed is an acoustic signal detector for detecting a target with moving in water. The acoustic signal detector may include a body having a front portion, the front portion having a cross section which becomes gradually narrow and an end formed to have a plane. The plane may be perpendicular to a moving direction of the acoustic signal detector. The acoustic signal detector may further include a plurality of sensor arrays configured to generate sound and detect sound returned by being reflected by a target. The plurality of sensor arrays may be mounted on a side surface of the front portion and on the plane. | 2012-07-05 |
| 20120170415 | UNDERWATER COMMUNICATIONS - An environmental monitoring system including at least one underwater measurement device and a transmitter for transmitting data from the measurement device to an above water station using a magnetically coupled antenna. | 2012-07-05 |
| 20120170416 | UNDERWATER COMMUNICATIONS - An environmental monitoring system including at least one underwater measurement device and a transmitter for transmitting data from the measurement device to an above water station using a magnetically coupled antenna. | 2012-07-05 |
| 20120170417 | UNDERWATER COMMUNICATIONS - An environmental monitoring system including at least one underwater measurement device and a transmitter for transmitting data from the measurement device to an above water station using a magnetically coupled antenna. | 2012-07-05 |
| 20120170418 | UNDERWATER COMMUNICATIONS - An environmental monitoring system including at least one underwater measurement device and a transmitter for transmitting data from the measurement device to an above water station using a magnetically coupled antenna. | 2012-07-05 |
| 20120170419 | UNDERWATER COMMUNICATIONS - An environmental monitoring system including at least one underwater measurement device and a transmitter for transmitting data from the measurement device to an above water station using a magnetically coupled antenna. | 2012-07-05 |
| 20120170420 | UNDERWATER COMMUNICATIONS - An environmental monitoring system including at least one underwater measurement device and a transmitter for transmitting data from the measurement device to an above water station using a magnetically coupled antenna. | 2012-07-05 |
| 20120170421 | UNDERWATER COMMUNICATIONS - An environmental monitoring system including at least one underwater measurement device and a transmitter for transmitting data from the measurement device to an above water station using a magnetically coupled antenna. | 2012-07-05 |
| 20120170422 | HYDROPHONE AND PRESSURE BALACING DEVICE FOR USING FOR HYDROPHONE - A sound sensor, a hydrophone including the sound sensor, and a pressure balancing device for using for the hydrophone are provided. The hydrophone includes: a sensor including a sensing part and a pressure balancing part; a printed circuit board (PCB) that is electrically connected to the sensor; a case that houses the sensor and the PCB and that has an opening at one side thereof; an elastic membrane that covers the opening of the case; and a signal line that is electrically connected to the PCB to be extended to the outside of the case. The pressure balancing part includes a diaphragm of a thin film and a support that supports the diaphragm. A pressure balancing hole is formed at one side of the pressure balancing part, and at the inside of the pressure balancing part, a channel that is connected to the pressure balancing hole is formed, and a compressible gas is filled in the channel. | 2012-07-05 |
| 20120170423 | Timepiece With A Wireless Function - A timepiece with a radio function assures both a good appearance and antenna performance. The GPS wristwatch | 2012-07-05 |
| 20120170424 | CLOCK SHOWER HEAD (AMENDED) - The present invention is provided with a clock shower head, which includes a hollow body, a hydroelectric generator, a storage battery, a clock processor, a clock displayer and a main control circuit; the hydroelectric generator, the storage battery, the clock processor and the main control circuit are disposed inside the sealing zone of the hollow body. The clock shower head have both the illuminating and time display function. People can watch the time when enjoying the shower, solving the problem of the clock dead zone when showering and enhancing the enjoyment of showering. | 2012-07-05 |
| 20120170425 | Timekeeping Device and Satellite Signal Reception Method for a Timekeeping Device - A timekeeping device has a reception unit that receives a satellite signal transmitted from a positioning information satellite, a time information generating unit that generates time information based on the received satellite signal, a time display unit that displays the time information, and a reception control unit that controls the reception unit. The reception control unit includes a signal condition detection unit that detects a signal condition of the received satellite signal, and a reception setting unit that sets the reception unit to a single satellite mode or a multi-satellite mode based on the detected signal condition. | 2012-07-05 |
| 20120170426 | Analogue electronic timepiece - A stepping motor for driving time hands, a stepping motor for driving a calendar, and a stepping motor for driving chronograph hands are all housed in a bottom plate of a movement of an analogue electronic timepiece. The stepping motor for driving chronograph hands is connected to a battery can via a battery pressing piece. The stepping motor for driving chronograph hands is arranged such that a larger amount of external magnetic field passes that stepping motor than the other stepping motors via the battery can and the battery pressing piece. The rotational drive of the stepping motor for driving chronograph hands can be made stable even under the presence of the external magnetic field by setting a drive force of the stepping motor for driving chronograph hands larger than the drive forces of the other stepping motors. | 2012-07-05 |
| 20120170427 | Systems and methods for timing athletic events - Improved systems and methods for timing athletic events. A radio-based starter unit and a radio based timer unit communicate wirelessly via radio. Push buttons/switches and lights and a speaker in the units provide an intuitive, easy to use interface. Handshaking occurs between the starter unit and the timer unit, and lights indicate that the event is ready to start. Real time clocks in the units are synchronized. Upon detection of race or other event start, such as from a starter's pistol, information indicative of the race start time is transmitted from the start unit to the timer unit. A camera in communication with the timer unit provides video frames, and the timer unit encodes and inserts elapsed time information in the video frames, which are then output from the timer unit for review and analysis on a computer. | 2012-07-05 |
| 20120170428 | Adaptor to wear a pocket watch on a wrist - A device (adaptor) for wearing a pocket watch on the wrist is disclosed. | 2012-07-05 |
| 20120170429 | APPARATUS FOR INCREASING DATA RATES IN A MAGNETIC HEAD - In accordance with certain embodiments, a magnetic head has a coil, which has a lead coil turn positioned between a yoke and an air-bearing surface. In certain embodiments, a magnetic head has a coil, which has a lead coil turn minimally spaced from a main write pole. | 2012-07-05 |
| 20120170430 | INFORMATION RECORDING MEDIUM, INFORMATION RECORDING APPARATUS, AND INFORMATION REPRODUCING APPARATUS - An information recording medium ( | 2012-07-05 |
| 20120170431 | OPTICAL HEAD DEVICE, OPTICAL INFORMATION DEVICE AND INFORMATION PROCESSING DEVICE - An optical head device includes a light blocking region ( | 2012-07-05 |
| 20120170432 | READ POWER CONTROL - Techniques are provided for controlling the reading of micro-holograms from a holographic disk based on a target data layer to be read in the disk. Reading a target data layer which is relatively deeper in the disk (e.g., farther from an optical head emitting a reading beam) may involve using a higher power reading beam to compensate for power attenuation of the returned reading beam. For example, a power adjustment module may be used to dynamically adjust a reading laser emitting the reading beam, based on the dynamically changing target data layer. By compensating for power attenuation in deeper target data layers, the variance of power in the returned reading beams may be decreased, possibly improving the bit error rate in micro-hologram reading techniques. | 2012-07-05 |
| 20120170433 | RECORDING MEDIUM AND RECORDING/REPRODUCING APPARATUS THEREFOR - The present invention provides a recording medium and a recording/reproducing apparatus which enable the number of data units of recording pulse information to be reduced by dividing the recording pulse information into | 2012-07-05 |
| 20120170434 | INFORMATION RECORDER, INFORMATION REPRODUCER, RECORDING MEDIA MANUFACTURING SYSTEM, AND INFORMATION RECORDING MEDIA, METHOD AND PROGRAM - The present invention provides an information recording configuration that achieves both difficulty in reading and highly accurate reading. Highly confidential additional information such as encryption key is recorded in a groove signal. During recording of the additional information, a groove signal is recorded that has an amplitude offset setting commensurate with the bit value. During reading of the additional information, a signal R | 2012-07-05 |
| 20120170435 | DATA STORAGE DEVICE INCLUDING SELF-TEST FEATURES - The application discloses a data storage device including one or more data storage media adapted to store data. The data storage device is connected to and powered by a power source of the host system. In the event of a loss of power from the host system, an auxiliary power source is used to power components of the data storage device. For example, an illustrative auxiliary power source uses back electromotive force EMF from a spindle motor of the data storage device. As disclosed, the device includes test circuitry to test a capacity of the auxiliary power source to store data in the event of the loss of power from the host system. | 2012-07-05 |
| 20120170436 | LASER POWER CONTROL METHOD AND LASER POWER CONTROL APPARATUS - With a large capacity of an optical disk and high-speed recording, a frequency of a recording signal is increased and a pulse width is narrowed. In the case that a laser is driven by a signal having the short pulse width, unfortunately the high-speed recording is hardly performed to an optical disk when a rise time and a fall time of the optical pulse are lengthened. | 2012-07-05 |
| 20120170437 | NON-BINARY HOLOGRAMS FOR INCREASED CAPACITY - Techniques are provided for increasing storage capacity in a holographic storage system. While typical holographic storage systems involve binary storage for each data position in a holographic disk, present techniques involve storing data such that more than two data levels may be recorded in each data position. In some embodiments, a recording beam directed to the disk may be adjusted to different power levels depending on the data level to be recorded. Furthermore, the recording time at a data position may be adjusted to increase the energy directed to the data position by increasing the amount of time the recording beam is impinged on the data position. Embodiments are suitable for different types of holographic storage, including dye-based medium. | 2012-07-05 |
| 20120170438 | SERVO STRUCTURE IN SINGLE-BIT HOLOGRAPHIC VOLUME RECORDING AND READOUT - Methods and systems are provided for recording micro-holograms in a holographic disk. Disk tilting or disk imperfections may cause counter-propagating recording and reference beams to deviate from the target data position in the disk. In some embodiments, a tracking beam is directed to a tracking position in the disk, and deviation of the tracking beam from the tracking position may indicate tracking and/or focusing errors of the recording and/or reference beams. A detector may generate an error signal in response to such errors. A first servo-mechanical system may actuate a first optical head (e.g., transmitting the reference and tracking beams) to compensate for such errors, and a second servo-mechanical system may actuate a second optical head (e.g., transmitting the recording beam) to follow the actuation of the first servo system, such that an interference of the reference beam and the recording beam may be maintained in the target data position. | 2012-07-05 |
| 20120170439 | Objective Lens Element - An objective lens element having excellent compatibility with optical discs having different base material thicknesses is provided. The objective lens element has optically functional surfaces on an incident side and an exit side. At least either one of the optically functional surfaces on the incident side and the exit side includes a diffraction portion which satisfies at least either one of the following formulas (1) and (2): | 2012-07-05 |
| 20120170440 | ELECTROMAGNETIC ACTUATOR OF OPTICAL PICKUP HEAD - An electromagnetic actuator is provided, including a movable part and a base part. The movable part further includes at least an object lens, an object lens holder, a wire set, a first focus coil set, a second focus coil, a tilt coil set, and a track coil set. The object lens is placed inside object lens holder. One end of the wire set is fixed to object lens holder, and the other end is fixed to the base part so that the wire set is like a suspending wire set for hanging the object lens holder. The base part further includes a focus magnet set, a track magnet set and a tilt and focus shared magnet. The first focus coil set is located to correspond to focus magnet set, and the track coil set is located to correspond to the track magnet set, a second focus coil and a tile coil set in side-by-side layout are located to correspond to the tilt and focus shared magnet. When the current runs through the coils, the interaction of the poles of the magnets will cause the movable part to move in three different directions. | 2012-07-05 |
| 20120170441 | OPTICAL PICKUP APPARATUS - An optical pickup apparatus includes an objective lens having a numeric aperture and an incident face. An antireflection coating is formed on the incident face. A collimating lens converts laser light from a laser diode into parallel light, and causes the parallel light to be made incident on the incident face through the antireflection coating. The thickness of the antireflection coating causes a transmittance of laser light that enters the objective lens to be: set at a first predetermined transmittance value, when the numeric aperture is between zero and a first predetermined numeric aperture value; set to correlate linearly with the numeric aperture when the numeric aperture is between the first predetermined numeric aperture value and a second predetermined numeric aperture value; and set at a second predetermined transmittance value, when the numeric aperture is between the second predetermined numeric aperture value and a third predetermined numeric aperture value. | 2012-07-05 |
| 20120170442 | System and Method for Transceiver Design - A method for operating a controller of a multiple input, multiple output communications system includes formulating an objective function according to a resource allocation for a user equipment (UE) and a mean square error expression, and updating the objective function to generate an updated resource allocation for the UE, a transmit beamforming vector to precode a transmission to the UE, and a receive beamforming vector to adjust a receiver to receive the precoded transmission. The method also includes transmitting allocation information about the resource allocation for the UE and the transmit beamforming vector to a communications controller serving the UE. | 2012-07-05 |
| 20120170443 | ULTRA-WIDE BANDWIDTH SYSTEM AND METHOD FOR IN-PREMISES WIRELESS NETWORKING - An IS-OFDM system for ultra-wideband (UWB) wireless communications that suppresses narrow-band interference, comprising an in-premises base station (IBS) is described. The IBS further comprises an IS-OFDM transceiver for communicating with a plurality of in-premises terminals (ITs) without creating interference outside an in-premises perimeter. Further, a method for operating an IS-OFDM system for ultra-wideband (UWB) wireless communications that suppresses narrow-band interference and provides local area networking services, in-premises distribution of broadcast cable channels and in-premises wireless access and routing to external networks is described, without creating interference outside an in-premises perimeter. | 2012-07-05 |
| 20120170444 | TERMINAL STATION APPARATUS, BASE STATION APPARATUS, TRANSMISSION METHOD AND CONTROL METHOD - A terminal apparatus is disclosed wherein even in a case of applying SU-MIMO and MU-MIMO at the same time, the inter-sequence interference in a plurality of pilot signals used by the same terminal can be suppressed to a low value, while the inter-sequence interference in pilot signal between terminals can be reduced. In this terminal apparatus ( | 2012-07-05 |
| 20120170445 | EFFICIENT APPLICATION-LAYER AUTOMATIC REPEAT REQUEST RETRANSMISSION METHOD FOR RELIABLE REAL-TIME DATA STREAMING IN NETWORKS - A method and apparatus are described including buffering data to be transmitted, transmitting data retrieved from a buffer via a datagram protocol, receiving a request for retransmission of data, determining if the requested data is in the buffer and retransmitting the requested data via a protocol that provides end-to-end acknowledgement of data and error recovery. | 2012-07-05 |
| 20120170446 | Method and Inquiring Device for Implementing Switching in Network Fault - A method for implementing switching when the network is faulted is disclosed, and the method includes: establishing a quick detection mechanism between non-querier and querier; the non-querier using the detection mechanism for performing a real-time detection on the querier and downlink of the querier; switching the non-querier to be the querier when the non-querier detects that the querier or the downlink of the querier is faulted. A querier is further disclosed. With the method, it can complete a quick switching of the querier and a quick transmission of a multicast flow when the querier or the downlink thereof is faulted, thereby reducing the interrupt time of users receiving the multicast flow, implementing a quick protection of a multicast service, and improving the service experience for the user. | 2012-07-05 |
| 20120170447 | METHOD OF AGGREGATING CONVENTIONAL RESOURCES UPON LOSING CONNECTIVITY TO A MASTER SYSTEM SITE - Communication systems and methods are presented for aggregating sites when connectivity to a core and zone controller therein is lost. A local controller provides multicast control to sub-sites within a locally aggregated network after detecting loss of connectivity to the core. The local controller assigns different multicast addresses than multicast addresses assigned by the zone controller. A sparse and dense mode protocol is used for multicast traffic outside and within the locally aggregated network, respectively. Conventional resources, but not trunked resources, are assigned addresses and groups. An isolated site is able to connect to the network in the event of core failure so that conventional multicast traffic traverses a direct link between each isolated site and the network, thereby extending the locally aggregated network. Multicast addresses available to be assigned by a local controller within any locally aggregated networks can be the same as those assigned by other local controllers. | 2012-07-05 |
| 20120170448 | Method and Network System for Implementing User Port Orientation in Multi-Machine Backup Scenario of Broadband Remote Access Server - A method and network system for implementing user port locating in multi-machine backup scenario of broadband remote access server (BRAS) are disclosed. The method comprises: configuring master port in each backup group as user access port and synchronizing information of taking the maser port as user access port to the backup port in the backup group; a remote authentication dial in user service (RADIUS) server configuring access port information, which is set as the master port in the backup group, for the user; processing master-backup switch if the master port is abnormal and the user accessing the line from the corresponding backup port; the BRAS corresponding to the backup port encapsulating the authentication message including the access line information about digital subscriber line access multiplexer of the user access and taking the maser port as the user access port, and sending the authentication message to the RADIUS server. | 2012-07-05 |
| 20120170449 | TECHNIQUE FOR PROTECTING COMMUNICATION TRAFFIC IN A CONNECTION HAVING REDUNDANCY - A technique for protecting traffic in a Layer 2 (L2) communication network between a first and a second local nodes (CE | 2012-07-05 |
| 20120170450 | HIERARCHICAL PACKET POLICER - Embodiments of the invention include a method performed in a packet processor core for policing a packet through a hierarchical policer coupled to one or more policing requestors. The hierarchical policer has a plurality of meter levels including an initial level and one or more subsequent levels. The hierarchical policer creates a meter result at the meter of each meter level using packet characteristics and a meter state for that meter level. The hierarchical policer generates meter level outputs that classify the packet for each meter level and for at least one of the subsequent levels the meter level output is based on the meter level output from a previous meter level. The hierarchical policer performs a meter combine operation that produces a final packet output attribute from the combination of the meter level outputs. The hierarchical policer returns the final packet output attribute to a policing requestor. | 2012-07-05 |
| 20120170451 | SYSTEM AND METHOD FOR COMMUNICATING DATA BETWEEN AN APPLICATION SERVER AND AN M2M DEVICE - Systems and methods for communication data between an application server and at least one machine-to-machine (M2M) device via an internet network and a network are provided. An example system includes a network element configured to schedule delivery of the data between the application server and at least one M2M device based on network information. The network element is located on a boundary between the network and the intern et network to which the application server communicates with the at least one M2M device. | 2012-07-05 |
| 20120170452 | HIERARCHICAL PACKET POLICER - Embodiments of the invention a method for policing a packet at line rate. A hierarchical policer receives a policer request comprising packet characteristics and identifying request configuration information. The hierarchical policer retrieves meter states specified by the request configuration information. The hierarchical policer processes packet characteristics through meters to generate a meter result. The hierarchical policer generates a hierarchical policer table lookup address using a plurality of meter types, a plurality of input color controls, one or more of the packet characteristics, the meter results, and a plurality of coupling algorithm identifiers. The hierarchical policer reads a hierarchical meter result from a hierarchical policer result table, containing at least a final output packet attribute that classifies the packet. The hierarchical policer updates one or more of the meter states based on the plurality of meter state results. The hierarchical policer returns the final packet output to a policing requestor. | 2012-07-05 |
| 20120170453 | APPARATUSES AND METHODS FOR ACCESS POINT NAME (APN) BASED CONGESTION CONTROL DURING A PACKET DATA PROTOCOL (PDP) CONTEXT ACTIVATION PROCEDURE - A mobile communication device wirelessly connected to a service network with a default Packet Data Protocol (PDP) context active for an Access Point Name (APN) is provided. In the mobile communication device, a wireless module performs wireless transmissions and receptions to and from a service network, and a controller module transmits a request message for activating a secondary PDP context associated with the APN to the service network via the wireless module. Also, the controller module receives a rejection message indicating no resource available or congestion for the APN and a value of a back-off timer from the service network via the wireless module, and retransmits the request message to the service network via the wireless module in response to the value of the back-off timer being zero. | 2012-07-05 |
| 20120170454 | COMMUNICATION SYSTEM AND COMMUNICATION CONTROL METHOD - A node on a core network, in accordance with a connection state of a terminal, releases a transmission path resource which is made unnecessary due to LIPA (Local IP access) or SIPTO (Selected IP traffic offload) connection configuration. | 2012-07-05 |
| 20120170455 | Client Balancing in Wireless Networks - Herein, a method directed to receiving, by a network device, client density data of a first access node in a plurality of access nodes in a network. Also, the network device receives client density data of a second access node in the plurality of access nodes. The network device determines whether the client density data of the first access node overlaps with the client density data of the second access node. In response to the received client density data of the first access node overlapping with the received client density data of the second access node, the network device identifies the first access node and the second access node as members of a virtual radio frequency (RF) neighborhood, wherein the virtual RF neighborhood comprises a subset of a RF neighborhood. Each member of the virtual RF neighborhood is capable of receiving beacons from other members of the virtual RF neighborhood. | 2012-07-05 |
| 20120170456 | APPARATUS AND METHOD FOR OPTIONALLY USING SECONDARY FREQUENCY ASSIGNMENT IN A WIRELESS COMMUNICATION SYSTEM USING MULTIPLE BANDS - Methods for operating a Base Station (BS) and a User Equipment (UE) in a wireless communication system using a primary frequency and one or more secondary frequencies, and apparatuses for the BS and UE for carry out the methods, are provided. The method for operating the BS includes determining whether to activate or deactivate at least one of the one or more secondary frequencies, and transmitting a message comprising a bitmap indicating the activation or deactivation of the at least one of the one or more secondary frequencies to the UE. The method for operating the US includes receiving a message comprising a bitmap indicating activation or deactivation of at least one of the one or more secondary frequencies from the BS, and activating or deactivating the at least one of the one or more secondary frequencies based on the received message. | 2012-07-05 |
| 20120170457 | METHOD FOR SUPPORTING ADMISSION CONTROL AND/OR PATH SELECTION IN A COMMUNICATION NETWORK AND COMMUNICATION NETWORK - A method for supporting admission control and/or path selection in a communication network, the network including a plurality of wireless communication links, possibly of different link technologies, established between a plurality of network nodes, includes the steps of partitioning the communication links of the network into groups of communication links—link groups—, assigning each link group an associated link group controller that is configured to observe and/or measure the performance and/or quality of the link group, based on the observations and/or measurements, computing estimates of metrics for the capacity of the respective link group and the costs for using each of the communication links of the respective link group, and transmitting the estimates to at least one resource management entity being configured to take admission control and/or path selection decisions on the basis of the estimates. A communication network with admission control and/or path selection supporting functionality is described. | 2012-07-05 |
| 20120170458 | LTE Cell Specific Reference Signal Bandwidth Reduction - A method and an arrangement for transmitting reference signals in a radio frame in a cellular communication system comprising at least one network node having a measurement bandwidth γ, which is more narrow than a full downlink bandwidth β of said network node. Subframes only carrying reference signals, which are to be transmitted from said network node may be transmitted over a temporarily reduced transmission bandwidth α, which is at least equally wide as the measurement bandwidth Y provided by the network node, and more narrow than the full downlink bandwidth β of the network node. The use of a reduced transmission bandwidth leads to that less reference signals are transmitted, and thereby transmission power will be saved. | 2012-07-05 |
| 20120170459 | SIMPLE LOW-JITTER SCHEDULER - A method for managing packets, including identifying a first packet source having a first weight and second packet source having a second weight, where the first weight exceeds the second weight; assembling a first regular subsequence of packets using a first packet from the second packet source and a first set of packets from the first packet source having a cardinality equal to a first weight ratio; assembling a first augmented subsequence of packets using a second packet from the second packet source and a second set of packets from the first packet source having a cardinality equal to the first weight ratio plus one; and forwarding a first sequence of packets including a first set of regular subsequences, which includes the first regular subsequence, and a first set of augmented subsequences, which includes the first augmented subsequence and has a cardinality based on the first augmented subsequence factor. | 2012-07-05 |
| 20120170460 | SYSTEM AND METHOD FOR REMOVING TEST PACKETS - Embodiments of the invention include a system for preventing a packet of a test pattern from being communicated over a network. In one embodiment, a communications management system is disclosed that includes a network interface configured to enable the communications management system to communicate with a plurality of network nodes over a network. The communications management system further includes a processor configured to execute instructions to determine whether one or more portions of the network are congested, and generate and transmit a message to at least one of the network nodes to terminate communication of test packets in response to a determination that one or more portions of the network is congested. | 2012-07-05 |
| 20120170461 | PSEUDOWIRE SETUP METHOD AND NODE DEVICE - Embodiments of the present invention provide a pseudowire setup method and a node device. The method includes: receiving, by a node, a label mapping message which carries a bandwidth required by a service and a service level of the service; judging, by the node, whether the LSP in which the node is located supports the service level of the service and the bandwidth of the service, according to bandwidth supporting information, which is stored in the node, of a Label Switching Path (LSP) in which the node is located, and the bandwidth required by the service and the service level of the service which are carried in the label mapping message; and using the LSP as an LSP which bears a pseudowire when judging that the LSP supports the service level of the service and the bandwidth of the service. In this way, the Quality of Service (QoS) of the established pseudowire is ensured. | 2012-07-05 |
| 20120170462 | TRAFFIC FLOW CONTROL BASED ON VLAN AND PRIORITY - A method for controlling traffic flow at a traffic routing device of a network comprises a plurality of operations. An operation is performed for determining an instance of traffic flow congestion for traffic of a particular VLAN (virtual local area network) flow control group and having a particular priority. The particular VLAN flow control group and the particular priority jointly define a particular prioritized VLAN flow control group. An operation is performed for issuing traffic flow instructions for causing flow of the traffic of the particular prioritized VLAN flow control group to be temporarily inhibited. Thereafter, an operation is performed for inhibiting transmission of traffic for the particular prioritized VLAN flow control group at a particular traffic routing device in response to the particular traffic routing device receiving the traffic flow instructions. | 2012-07-05 |
| 20120170463 | Communication Terminal - A communication terminal optimally switches between the use of multicast reception and unicast reception, in consideration of the mobile radio environment of each terminal. For example, received signal strength indicator information is acquired at a received signal strength indicator information acquisition time calculated using a content reception time. Either multicast reception or unicast reception is selected according to the acquired received signal strength indicator information and content reception is performed. An optimal reception system can be selected and reception failure can be reduced. In addition, by performing a dynamic switching of reception methods as such, the base station-end can perform multicast delivery rather than unicast delivery when possible to communication terminals in favorable mobile radio environments, thereby significantly reducing the traffic load placed on communication paths. | 2012-07-05 |
| 20120170464 | Method and Apparatus for Monitoring a Status of Nodes of a Communication Network - The present invention relates to a method and apparatus for monitoring a status of nodes of a communication network. The method determines first node status data at a first node by diagnosing the own status of the first node and the status of at least one second node, sends the first node status data to at least one second node, receives second node status data from at least one second node, and determines node status evaluation data at the first node based on the determined first node status data and the received second node status data. Furthermore, improvements are proposed for the sake of efficiency and/or robustness of the method. | 2012-07-05 |
| 20120170465 | VALIDATING ETHERNET VIRTUAL CONNECTION SERVICE - A network element in an Ethernet network comprises circuitry configured for providing a plurality of different functionalities. A first portion of the circuitry is configured for providing traffic generator functionality is provided. A second portion of the circuitry is configured for providing traffic analyzer functionality. A third portion of the circuitry is providing traffic loop-back functionality. The various portion of the circuitry (i.e., the circuitries) are operable for selectively enabling the network element to support a unidirectional test mode and a bi-directional test mode and for enabling the network element to be selectively operated as a local network element and a remote network element. | 2012-07-05 |
| 20120170466 | JOINT SUBCARRIER USAGE RATIO AND POWER ALLOCATION METHOD, SYSTEM USING THE SAME, BASE STATION AND CONTROLLER USING THE SAME - A joint subcarrier usage ratio and power allocation method, the system and base station, and a controller using the same are proposed. The method is adapted for a femtocell base station using OFDMA technology to jointly select transmission power and subcarrier usage ratio. The method includes a first adjustment process, which simultaneously, dynamically and jointly adjusts the transmission power and the subcarrier usage ratio so as to quickly satisfy capacity requirement and link reliability requirement. The method also includes a second adjustment process for slowly adjusting the transmission power and the subcarrier usage ratio after the capacity requirement and the link reliability requirement are both met in the first adjustment process for stability duration. The second adjustment process helps the femtocell base station achieve maximal power efficiency. An outer-loop control might be used in the method to relax the capacity requirement of one femtocell for quickly achieving a stable situation. | 2012-07-05 |
| 20120170467 | METHOD AND APPARATUS FOR PROVIDING VIRTUAL CIRCUIT PROTECTION AND TRAFFIC VALIDATION - An approach provides virtual circuit protection. Traffic is received at a network interface device configured to interface an Ethernet virtual circuit of a service provider transport network over a user network interface (UNI). The network interface device is configured as a demarcation point between a customer network and the service provider transport network. Circuit replication is performed over the virtual circuit to create a plurality of communication paths over the virtual circuit by assigning respective tags for independently switching the traffic over the communication paths. One of the communication paths is designated as a standby communication path. | 2012-07-05 |
| 20120170468 | POWER MANAGEMENT IN A WIRELESS AD HOC NETWORK - In a wireless ad hoc network ( | 2012-07-05 |
| 20120170469 | METHODS AND APPARATUSES FOR FACILITATING DETERMINATION OF A STATE OF A RECEIVER BUFFER - Methods and apparatuses are provided for facilitating determination of a state of a receiver buffer. A method may include receiving, at a first time, a data packet of a data stream transmitted by a sending apparatus. The method may further include generating, at a second time, a periodically generated receiver reporting message. The method may additionally include determining an interval time defining an interval between the first time and the second time. The method may also comprise causing an indication of the interval time to be sent to the sending apparatus. Corresponding apparatuses are also provided. | 2012-07-05 |
| 20120170470 | CORRELATING COMMUNICATION TRANSACTIONS ACROSS COMMUNICATION NETWORKS - A system for correlating communication packets across different communication networks includes a first monitoring agent in a first network for collecting local identifying information of a communication packet at a communication node. The first monitoring agent pairs the local identifying information with a public identifying information of the packet for a second network. The first monitoring agent further adds a timestamp to the collected information. A second monitoring agent in the second network receives a communication packet from the communication node and collects public identifying information of the packet. The second monitoring agent adds a time-stamp to the collected information. A third monitoring agent in the second network receives the information collected by the first and the second monitoring agents and correlates packets based on the received information. The third monitoring agent determines when specific packets captured from the first network and the second network are related to each other. | 2012-07-05 |
