27th week of 2009 patent applcation highlights part 23 |
Patent application number | Title | Published |
20090167387 | DELAY-LOCKED LOOP FOR TIMING CONTROL AND DELAY METHOD THEREOF - A delay-locked loop for timing control, includes a voltage-controlled delay line that delays a reference clock to generate a multi-phase clock comprising a plurality of delayed phase clocks; and an up/down controller that receives one of the delayed phase clocks as a feedback clock and generates a frequency up/down control signal based on whether a rising edge of the feedback clock coincides with a falling edge of the reference clock. The delay-locked loop further includes a charge pump that charges or discharges a loop filter connected to the voltage-controlled delay line according to a frequency up/down control signal from the up/down controller; and a harmonic lock detector that compares phases of multiple ones of the delayed phase clocks with a phase of the reference clock, and operates such that the multi-phase clock is locked within a first cycle of the reference clock. | 2009-07-02 |
20090167388 | DELAY LOCKED LOOP CIRCUIT AND CONTROL METHOD OF THE SAME - A delay locked loop capable of preventing delay locking time from being increased, even if the operational environment fluctuates. The delay locked loop circuit includes a delay line for delaying and outputting a reference clock signal, a phase detection unit for detecting a phase difference between the reference clock signal and an output signal of the delay line and then outputting a phase detection signal and a first delay mode decision signal, a control unit for outputting a delay control signal to control the delay line according to the phase detection signal and a second delay mode decision signal, and an error decision unit for detecting an error of the first delay mode decision signal according to the delay control signal and the output signal of the delay line and outputting the second delay mode decision signal according to a result of the error detection. | 2009-07-02 |
20090167389 | Voltage-Controlled Oscillator - The present invention discloses a calibration circuit for a voltage-controlled oscillator ( | 2009-07-02 |
20090167390 | Data transfer device and electronic camera - A data transfer device can adjust a phase of a clock signal with a simple configuration in a short period of time when transferring a digital data signal in synchronization with the clock signal. Accordingly, the data transfer device includes a data transfer line serially transferring the data signal, a clock transfer line transferring the clock signal, a decision unit deciding an adjustment amount by which the phase of the clock signal accompanying the data signal is shifted, the adjustment amount being used when transferring the data signal in synchronization with the clock signal, and a phase adjusting unit shifting the phase of the clock signal in accordance with the adjustment amount decided by the decision unit while keeping a frequency of the clock signal fixed. | 2009-07-02 |
20090167391 | QUARTER CYCLE DELAY CLOCK GENERATOR - Embodiments relate to a quarter cycle delay clock generator. According to embodiments, a quarter cycle delay clock generator may include a reference clock generator to generate a reference clock signal, a first logic circuit to catch a first input signal input thereto at a rising edge of the reference clock signal and outputting a first input signal as a first output signal until a next rising edge of the reference clock signal, and a second logic circuit to catch a second input signal input thereto and outputting the second input signal as a second output signal. The first output signal may be inverted and input to the first logic circuit as the first input signal, and the second logic circuit may receive the first output signal from the first logic circuit as the second input signal. | 2009-07-02 |
20090167392 | NARROW PULSE GENERATOR - A pulse generator is provided that includes: a current source, a source follower whose output controls the gate of a FET and a differential stage whose input voltage consists of inverting square waves and its output voltage consists of extremely narrow pulses widths, for example, of 30 to 40 ps and amplitude of 1.5 Volts. | 2009-07-02 |
20090167393 | POWER CONVERSION CONTROL CIRCUIT, POWER CONVERSION CONTROL LSI, DIFFERENTIAL DETECTION CIRCUIT, AND PULSE WIDTH CONTROL SIGNAL GENERATION CIRCUIT - The control accuracy equal with the case controlled according to a reference signal with a high clock frequency when the electric power is converted is obtained according to a reference signal with a low clock frequency. | 2009-07-02 |
20090167394 | INTEGRATED CIRCUITS HAVING DEVICES IN ADJACENT STANDARD CELLS COUPLED BY THE GATE ELECTRODE LAYER - An integrated circuit ( | 2009-07-02 |
20090167395 | HIGH PERFORMANCE LATCHES - An integrated circuit includes at least one latch circuit ( | 2009-07-02 |
20090167396 | HIGH PERFORMANCE CLOCKED LATCHES AND DEVICES THEREFROM - An integrated circuit ( | 2009-07-02 |
20090167397 | Delay device for adjusting phase SMIA standard - A delay device for adjusting phase under a SMIA (Standard Mobile Imaging Architecture) standard is provided. More particularly, the delay device is used to adjust a phase of a clock signal, which carries data, under the SMIA standard. The delay device includes plural delay cells, which are disposed on a circuit board by means of APR (Automated Placement and Routing) method, and one or more delay multiplexers (MUX) connected with the delay cells. Through selective pins controlling the route selection in the delay multiplexer, the delay device can produce plural delay times to adjust the phase relationship between data and clock, as supposed to using PLL. | 2009-07-02 |
20090167398 | PULSE SIGNAL DELAY CIRCUIT AND LED DRIVE CIRCUIT - A pulse signal delay circuit comprises: a first pulse edge delay circuit for generating a first delay timing signal for sequentially outputting a first edge detection delay timing gained by detecting the rising edge of an input pulse signal and delaying the detection timing by a constant delay time a predetermined number of times; a second pulse edge delay circuit for generating a second delay timing signal for sequentially outputting a second edge detection delay timing gained by detecting the falling edge of the input pulse signal and delaying the detection timing by the delay time the number of times; and a delay pulse signal generating circuit for generating and outputting delay pulse signals rising and falling according to the first and second edge detection delay timings, respectively, from the first and second delay timing signals, the first and second edge detection delay timings delayed the same number of times. | 2009-07-02 |
20090167399 | SIGNAL DELAY CIRCUIT - A signal delay circuit including a capacitive load element is described. The capacitive load element has a first input end, a second input end, and a third input end. The first input end receives a first signal, the second input end receives a second signal inverted to the first signal, and the third input end receives a control signal. The capacitance of the capacitive load element changes with the control signal. | 2009-07-02 |
20090167400 | DEVICE AND METHOD FOR GENERATING CLOCK SIGNAL - In a device for generating a clock signal having a desired phase from input multi-phase clock signals, an intermediate clock generator generates, by using one of the input multi-phase clock signals as a reference clock signal, multi-phase intermediate clock signals in which one cycle is equal to a plurality of cycles of the reference clock signal. A first phase selector selects one of the multi-phase intermediate clock signals. A second phase selector selects one of the multi-phase clock signals. A latch circuit latches the intermediate clock signal selected by the first phase selector with the clock signal selected by the second phase selector. | 2009-07-02 |
20090167401 | Timing Signal Generator Providing Synchronized Timing Signals At Non-Integer Clock Multiples Adjustable By More Than One Period - A system for providing a plurality of synchronous timing signals having period values that are not even multiples of the clock period including a plurality of local edge generators receiving the clock signals, each local generator including local programmable means to record an absolute time at which to generate a timing signal in the current or future period and the means to generate that timing signal at a synchronous even sub-division of the clock period resolution. A separate time value is maintained allowing generated timing signals to be delayed by more than one period. An output delay circuit generates the timing signal responsive to a future time value and a phase offset. The phase offset can be provided using a clock multiplier and serial parallel converter to simplify hardware realizations. | 2009-07-02 |
20090167402 | Dual barrel receiver equalization architecture - Methods and apparatus relating to dual barrel receiver equalization architectures are described. In an embodiment, a receiver logic may include an amplifier and two comparators to equalize frequency components of a received signal. The receiver logic may further include offset adjustment (or cancelation) logic to generate an offset adjustment (or cancelation) signal coupled to the amplifier. Other embodiments are also described. | 2009-07-02 |
20090167403 | AGC method using digital gain control - An attenuator system includes a first adjustable impedance component on a first current path between a input component and a output component, and a second adjustable impedance component between the first current path and ground, wherein each of the first and second adjustable impedance components include a plurality of selectable, discrete legs, each leg having an impedance. | 2009-07-02 |
20090167404 | Semiconductor Device, Electronic Device Having the Same, and Driving Method of the Same - A digital circuit which can operate normally regardless of binary potentials of an input signal is provided. A semiconductor device comprising a correcting unit and one or a plurality of circuit elements, the correcting unit including a first capacitor, a second capacitor, a first switch, and a second switch, wherein the first electrode of the first capacitor is connected to an input terminal, the supply of a first potential to the second electrode of the first capacitor is controlled by the first switch, the supply of a second potential to the second electrode of the second capacitor is controlled by the second switch, and a potential of the second electrode of the first capacitor or a potential of the second electrode of the second capacitor is supplied to the one or the plurality of circuit elements. | 2009-07-02 |
20090167405 | Reduced Leakage Voltage Level Shifting Circuit - A level shifting circuit includes a first stage and a second stage. The first stage and second stage are operatively coupled to a first and second power supply. The first stage translates a differential input voltage into an intermediate differential voltage. The second stage translates the intermediate differential voltage into a differential output voltage and provides feedback to the first stage in response to translating the intermediate differential voltage. The first stage reduces current flow between the first and second power supply through the second stage in response to the feedback. | 2009-07-02 |
20090167406 | Read circuit, variable resistive element device, and imaging device - A read circuit includes: an integration circuit section configured to perform an integral operation and whose input is connected to an integration node; and a bias circuit connected between a connection node to which a variable resistive element is connected and the integration node. The bias circuit includes: an integration transistor whose source and drain are respectively connected to the connection node and the integration node; an operational amplifier whose output is connected to a gate of the integration transistor, to whose first input a bias voltage is supplied, and whose second input is connected to the source of the integration transistor; and a current switching circuit configured to provide or shut off a first current path. The first current path is a current path through which a current flowing between the drain and source of the integration transistor flows without passing through the connection node. | 2009-07-02 |
20090167407 | Operational amplifier and integrating circuit - An operational amplifier in accordance with one embodiment of the present invention includes a differential amplifier circuit to perform differential amplification of an input signal with respect to a reference potential Vbias, an output circuit to output a signal amplified by the differential amplifier circuit, a phase compensation capacitance connected between the output of the differential amplifier circuit and the output of the output circuit to compensate the phase of the signal output from the output circuit, and a diode connected in parallel with the phase compensation capacitance. | 2009-07-02 |
20090167408 | POWER SWITCH ASSEMBLY FOR CAPACITIVE LOAD - A power switch assembly for a capacitive load | 2009-07-02 |
20090167409 | LEVEL SHIFTING SWITCH DRIVER ON GAAS PHEMPT - A radio frequency semiconductor switching device (S) is formed on an MMIC structure (C) including a switching circuit element ( | 2009-07-02 |
20090167410 | POWER SUPPLY SWITCHING CIRCUIT - Provided is a power supply switching circuit capable of efficiently supplying a desired voltage among a plurality of voltages to a load. In the case of a P-type semiconductor substrate, N-type MOS transistors are provided between a load and an AC adapter and between the load and a battery, and hence no parasitic diode exists between the load and the AC adapter or the battery, resulting in no current path due to the parasitic diode. Thus, when the AC adapter and the battery are connected to the power supply switching circuit, the N-type MOS transistor is turned off, whereby the current path between the battery and the load is cut off completely and the N-type MOS transistor is turned on. Accordingly, the battery cannot supply a voltage to the load while only the AC adapter can supply a voltage to the load. | 2009-07-02 |
20090167411 | NORMALLY-OFF ELECTRONIC SWITCHING DEVICE - A device capable of bidirectional on-off switching control of an electric circuit. Included is a normally-on HEMT connected between a pair of terminals of the device. A normally-off MOSFET of relatively low antivoltage strength is connected between the HEMT and one of the pair of terminals, and another similar MOSFET between the HEMT and the other of the terminal pair. A diode is connected in inverse parallel with each MOSFET, and two other diodes are connected between the gate of the HEMT and the pair of terminals respectively. The switching device as a whole is normally off. | 2009-07-02 |
20090167412 | GATE-CHARGE RETAINING SWITCH - The present invention discloses MOSFET or IGBT switch drive circuitry that uses the gate capacitance and the inherently high gate resistance of such switch devices to provide essentially bistable switching. Gate-charge is injected to enhance the switch device(s), invoking an ON state. Gate-charge is removed to deplete the switch device(s), invoking an OFF state. Circuitry is provided to effect charge removal immediately following charge injection, enabling relatively large switch devices to operate efficiently at several MHz. An arrangement for bipolar switch operation is provided. | 2009-07-02 |
20090167413 | SEMICONDUCTOR DEVICE AND DATA OUTPUTTING METHOD OF THE SAME - Semiconductor device and data outputting method of the same includes an on die thermal sensor (ODTS) configured to output temperature information by detecting an internal temperature of the semiconductor device and an output driver configured to control a slew rate depending on the temperature information and output data. | 2009-07-02 |
20090167414 | TEMPERATURE DETECTION FOR A SEMICONDUCTOR COMPONENT - Temperature detection for a semiconductor component is disclosed. One embodiment includes a circuit arrangement for measuring a junction temperature of a semiconductor component that has a gate electrode and a control terminal being connected to the gate electrode and receiving a control signal for charging and discharging the gate electrode, where the gate electrode is internally connected to the control terminal via an internal gate resistor. The circuit arrangement includes: a measuring bridge circuit including the internal gate resistor and providing a measuring voltage which is dependent on the temperature dependent resistance of the internal gate resistor; an evaluation circuit receiving the measuring voltage and providing an output signal dependent on the junction temperature; a pulse generator providing a pulse signal including pulses for partially charging or discharging the gate electrode via the internal gate resistor. | 2009-07-02 |
20090167415 | Skew signal generator and semiconductor memory device - A skew signal generator is provided which comprises a fuse signal generating unit for generating a plurality of fuse signals, and an encoder for generating skew signals including skew information of a wafer by encoding the fuse signals. | 2009-07-02 |
20090167416 | CURRENT CONSUMPTION PREVENTION APPARATUS OF A HIGH VOLTAGE GENERATOR - A current consumption prevention apparatus includes a first current supply unit for transferring charges from a capacitor connected to a first inverter group to a capacitor connected to a second inverter group, and a second current supply unit for transferring charges of the capacitor connected to the second inverter group to the capacitor connected to the first inverter group. The current supply units are operated complementarily. | 2009-07-02 |
20090167417 | CHARGE PUMPING CIRCUIT WITH DECREASED CURRENT CONSUMPTION - A charge pumping circuit consumes less current by reducing the number of charge pumps operating simultaneously. The charge pumping circuit includes a voltage sensor that detects a level of a high voltage and outputs a control signal based on the detection result. An oscillator provides an oscillating clock signal in response to the control signal of the voltage sensor, and the oscillator sequentially outputs the clock signal as a plurality of clock signals having shifted phases A plurality of high-voltage pumps are disposed in a plurality of regions to pump the high voltage in response to the clock signals and a different phase is designated for each region. | 2009-07-02 |
20090167418 | Supply Regulated Charge Pump System - An apparatus and a method for maintaining an output voltage of a charge pump circuit near a target voltage is disclosed. A regulated supply voltage is generated based on the output voltage of the charge pump. The regulated supply voltage is applied to a voltage input to the charge pump circuit and to a voltage input of a clock driver that provides a regulated clock signal to the charge pump circuit. | 2009-07-02 |
20090167419 | Voltage converting circuit - Leakage current flowing into load is prevented when a charge pump circuit operation is halted. The charge pump circuit converts supply voltage, supplied to a supply-voltage input terminal, to an output signal having desired voltage value and outputs the signal to an output terminal. A first bypass circuit, connected between the supply-voltage input terminal and a supply node of the charge pump circuit, forms a bypass between the supply-voltage input terminal and the supply node only when a voltage value at the supply node is low compared with a supply voltage value supplied to the supply-voltage input terminal. A second bypass circuit connected between the output terminal and the supply node, forms a bypass between the output terminal and the supply node only when the voltage value at the supply node is low compared with the voltage value at the output terminal. | 2009-07-02 |
20090167420 | DESIGN STRUCTURE FOR REGULATING THRESHOLD VOLTAGE IN TRANSISTOR DEVICES - A circuit and a design structure including the circuit embodied in a machine readable medium are disclosed. The circuit is for regulating a desired value of threshold voltage, Vt, for a given FET transistor device. The circuit is coupled to the FET for regulating the desired value of Vt, by providing a device body voltage, and, that additionally enables control of the voltage at the drain of the FET device independent of the applied body bias voltage. The coupled circuit includes an operational amplifier, or, a second MOS transistor, or, a Zener diode. | 2009-07-02 |
20090167421 | Step-down circuit, semiconductor device, and step-down circuit controlling method - A step-down circuit is connected between a power supply node for supplying a supply voltage and an internal power supply line for supplying a power to the object circuit and steps-down the supply voltage, and supplies the stepped-down voltage to the object circuit through the internal power supply line. The step-down circuit includes a comparison circuit that compares a reference voltage with the voltage of the internal power supply line, and a driver that adjusts a current flowing between the internal power supply line and the power supply node according to the comparison result of the comparison circuit. The activity level of the driver is controlled so as to rise in a predetermined rising period synchronously with an activated operation of the object circuit and to fall in a predetermined falling period that comes after the rising period. | 2009-07-02 |
20090167422 | TRANSISTOR OUTPUT CIRCUIT AND METHOD - A transistor circuit is provided. The transistor circuit includes a first output transistor, a second output transistor, and a switch arrangement. The first and second output transistors are arranged for providing an output signal to a common output of the transistor circuit. The switch arrangement couples an output of the first output transistor and the output of the second output transistor to the common output in sequence. The first and second output transistors are controlled to provide the same steady state output. The switch arrangement is adapted such that when the output of the first output transistor is coupled to the common output, changes in drive conditions voltage of the first output transistor are isolated from the second output transistor. | 2009-07-02 |
20090167423 | CPU CORE VOLTAGE SUPPLY CIRCUIT - A CPU core voltage supply circuit includes a reference voltage generator, a differential operation amplifier, a power element, a feedback circuit and a first capacitor. The reference voltage generator outputs a first reference voltage. The differential operation amplifier has a positive input end, a negative input end and an output end. The positive input end is connected to the reference voltage generator for receiving the first reference voltage. The power element has a receiving terminal and a current output terminal. The receiving terminal is connected to the output end of the differential operation amplifier. The feedback circuit is connected to the current output terminal and outputs a feedback voltage to the negative input end of the differential operation amplifier. The first capacitor has an end connected to the current output terminal of the power element and the other end receiving a first voltage, thereby providing a CPU core voltage. | 2009-07-02 |
20090167424 | CURRENT CELL CIRCUIT IN DIGITAL-ANALOG CONVERTER - Embodiments relate to a current cell circuit in a digital-analog converter. According to embodiments, a current cell circuit in a digital-analog converter may include a current source connected to a power voltage terminal to generate current having a predetermined magnitude, a first current switch transferring current provided from the current source to a first output terminal, a first current generator detecting output voltage from the first output terminal and generating the amount of reduced current from the detected voltage, and a first current supplier supplying the amount of current generated from the first current generator to the first current switch. According to embodiments, current variations at a constant output voltage may be minimized. This may make it possible to obtain more stable frequency characteristics. | 2009-07-02 |
20090167425 | SEMICONDUCTOR MEMORY DEVICE HAVING BACK-BIAS VOLTAGE IN STABLE RANGE - A back-bias voltage generating circuit controls the back-bias voltage in a predetermined range by detecting the back-bias voltage in case the back-bias voltage level decreases below a predetermined target level. The circuit includes first and second detecting units outputting respective detection signals, which detect a voltage level of the terminal based on respective higher first and lower second target levels. An oscillator generates an oscillation signal that oscillates at a predetermined frequency, in response to a detection signal of the first voltage detecting unit. A charge pumping unit drives the terminal by performing charge pumping in response to the oscillation signal. A voltage level control unit controls the voltage level of the terminal in response to the detection signals, whereby the terminal's voltage level is lower than the first target level and higher than the second target level. | 2009-07-02 |
20090167426 | INTEGRATED CIRCUIT INCLUDING FILTER CIRCUIT ARRANGEMENT - An integrated circuit includes a filter circuit that has at least one active device, wherein the active device has adjustable transconductance. | 2009-07-02 |
20090167427 | Power circuit and power amplifier and base station device using the same - Disclosed are a high-efficiency power amplifier and base station device with respect to high-speed, broadband radio communication method. A broadband power supply circuit includes a linear voltage amplifier to which an input signal is applied, a resistor connected to an output side of the linear voltage amplifier, a switching regulator amplifying the voltage difference between both ends of the resistor to convert the amplified voltage difference into current, and a high frequency amplifier. The high frequency amplifier is designed to exhibit high efficiency at a frequency band where the efficiency of the switching regulator starts to be deteriorated, or at a high frequency band where the operation of the linear amplifier is dominant. In this case, the amplification of low frequency components are performed by the switching regulator, and the amplification of high frequency components are performed by the linear amplifier and the high frequency amplifier. | 2009-07-02 |
20090167428 | Combined Phase-Locked Loop and Amplitude-Locked Loop Module for Switching FM Signals - A combined PLL and ALL module for switching FM signals includes a PLL unit and an ALL unit electrically connected therewith. The PLL unit is used to initially process FM signals received from a co-channel. Outputs of the PLL unit are sent to the ALL unit and processed therein. The PLL unit and the ALL unit are controlled to process the FM signals by adjusting the ratio of second amplitude to first amplitude to closely approach a predetermined value such that the two FM signals are switched. | 2009-07-02 |
20090167429 | METHODOLOGY FOR ASSESSING DEGRADATION DUE TO RADIO FREQUENCY EXCITATION OF TRANSISTORS - One embodiment relates to an on-chip power amplifier (PA) test circuit. In one embodiment, a PA test circuit comprises a controllable oscillator (CO) configured to generate a radio frequency (RF) signal, a parallel resonant circuit tuned to the radio frequency, a pre-power amplifier (PPA) coupled to the CO and the parallel resonant circuit, the PPA configured to amplify and drive the RF signal from an output of the PPA into a load. The test circuit may further comprise a first transmission gate configured to couple the RF signal from the CO to an input of the PPA. One testing methodology for a PA test circuit comprises stressing the PPA with an RF signal, measuring a characteristic of the PPA, determining stress degradation from the characteristic measurements, and repeating the stressing and characteristic measurements until a maximum stress degradation is achieved or a maximum stress has been applied. | 2009-07-02 |
20090167430 | Switched-Capacitor Amplifier Arrangement and Method - A switched-capacitor amplifier arrangement and a method to amplify a signal are presented. A forward path has at least one switched capacitor ( | 2009-07-02 |
20090167431 | Class D Amplifier Having PWM Circuit with Look-up Table - A class D amplifier includes a noise-shaping modulator, a pulse width modulator, and a pulse amplifier. The noise-shaping modulator receive a pulse code modulated (PCM) signal and produces an oversampled PCM signal. The pulse width modulator produce a pulse width modulated (PWM) signal from the oversampled PCM signal. The pulse amplifier amplifies the PWM signal to produce an amplified PWM signal. The PWM uses a lookup table to convert from PCM to PWM. A compensation circuit optimizes amplifier performance. An optional demodulator filter converts the amplified PWM signal to an analog signal. The amplifier is ideal for integrated audio applications. | 2009-07-02 |
20090167432 | INSTRUMENTATION AMPLIFICATION WITH INPUT OFFSET ADJUSTMENT - In a single-ended or differential instrument amplifier, an input offset may be adjusted by driving current into the impedance of a feedback network of the amplifier. The amplifier may be provided with programmable gain capability. The impedance does not change with different gain settings, such that the input offset adjustment is equal for all gains. The amplifier may receive the output of a sensor such as, for example, a gas detector such as a thermal conductivity detector. The gas detector may be utilized to measure a gas flowing from a gas source such as, for example, a chromatographic column. | 2009-07-02 |
20090167433 | AUDIO APPARATUS - An audio apparatus includes an input, a first resistor, a first capacitor, an amplifier, a second resistor, a second capacitor, and an output. The input is used for inputting audio signals. The first resistor and the amplifier are serially connected to the input; wherein the first resistor is connected to the inverting input of the amplifier and the non-inverting input of the amplifier is connected to ground. The first capacitor has one end connected to a node between the first resistor and the inverting input of the amplifier, the other end connected to ground. The second resistor has one end connected to a node between the first resistor and the inverting input of the amplifier, the other end connected to the output of the amplifier. The second capacitor is connected between the inverting input and the output of the amplifier. The output is connected to the output of the amplifier, for outputting the audio signals after processing. | 2009-07-02 |
20090167434 | DEVICE, SYSTEM, AND METHOD OF SEMI-DOHERTY OUTPHASING AMPLIFICATION - Device, system, and method of semi-Doherty outphasing amplification. For example, an apparatus includes: a first circuit path comprising a first switching amplifier connected in parallel through a first quarter-wave transmission line to a second switching amplifier; and a second circuit path comprising a third switching amplifier connected in parallel through a second quarter-wave transmission line to a fourth switching amplifier, wherein the first circuit path is connected to a circuit node through a third quarter-wave transmission line, and wherein the second circuit path is connected to said circuit node through a fourth quarter-wave transmission line. | 2009-07-02 |
20090167435 | POWER CONTROL CIRCUIT AND POWER CONTROL METHOD - A power control circuit includes: a fine adjustment variable amplifying unit configured to amplify the input signal in accordance with a first gain set value; a coarse adjustment variable amplifying unit configured to amplify the input signal in accordance with a second gain set value; a branching unit configured to branch an output signal into a feedback signal; a comparing unit configured to compare a gain value between the input signal and the output signal with the required gain set value; a control unit configured to determine the first gain set value and the second gain set value based on the required gain set value; and an adjusting unit configured to adjust the first gain set value and the second gain set value so that the power value of the feedback signal becomes a power value corresponding to the required gain set value. | 2009-07-02 |
20090167436 | HIGH-EFFICIENCY SWITCHING POWER AMPLIFIERS WITH LOW HARMONIC DISTORTION - In one embodiment, a switching power amplifier is provided that includes: a power switch coupled between a power supply node and ground, wherein the power switch is configured to be cycled on and off responsive to an input signal voltage; and a matching network coupled between a terminal of the power switch and an output node, wherein the matching network includes: a first capacitor coupled between the terminal of the power switch and ground; a second capacitor having a first terminal and an opposing second terminal, the second terminal being coupled to ground, the second capacitor having a greater capacitance than the first capacitor; and a second switch coupled between the first terminal of the second capacitor and the terminal of the power switch, the second switch being configured to be cycled on and off responsive to a switching signal voltage such that the second switch is turned on before the power switch is turned off and such that the second switch is turned off after a current through the power switch is substantially zero responsive to the turning off of the power switch. | 2009-07-02 |
20090167437 | COMMON MODE FEEDBACK CIRCUIT SUPPORTING DUAL DATA RATE, PROGRAMMABLE GAIN AMPLIFIER HAVING THE SAME, AND IMAGE SENSOR HAVING THE PROGRAMMABLE GAIN AMPLIFIER - A common mode feedback circuit includes a first capacitor connected between a common mode feedback terminal and a first output terminal, a second capacitor connected between the common mode feedback terminal and a second output terminal, a first cell having a third capacitor sharing charges with the first capacitor and a fourth capacitor sharing charges with the second capacitor in response to a first clock control signal, and a second cell having a fifth capacitor sharing charges with the first capacitor and a sixth capacitor sharing charges with the second capacitor in response to a second clock control signal. The first clock control signal and the second clock control signal have respective logic states that do not overlap in time. | 2009-07-02 |
20090167438 | HARMONIC TUNED DOHERTY AMPLIFIER - Disclosed is a Doherty amplifier which includes a carrier amplifier for always performing a signal amplification operation regardless of a level of an input signal, a peaking amplifier for performing an amplification operation, starting from a high power output where a level of an input signal is equal to or greater than a predetermined level, an output combination circuit for combining and outputting outputs of the carrier amplifier and the peaking amplifier, and an input division circuit for dividing an input signal into the carrier amplifier and the peaking amplifier, the Doherty amplifier including a carrier amplifier output harmonic impedance tuning network which is installed at a rear end of the carrier amplifier so as to tune an output harmonic impedance of the carrier amplifier, and a peaking amplifier output harmonic impedance tuning network which is installed at a rear end of the peaking amplifier so as to tune an output harmonic impedance of the peaking amplifier. | 2009-07-02 |
20090167439 | AMPLIFIER AND THE METHOD THEREOF - An amplifier amplifying an input signal and the method thereof. The amplifier comprises an impedance matching network and a transconductor amplifier. The impedance matching network receives the input signal to perform impedance matching thereon, and comprises a first resistor, a first transistor, and a second resistor. The first resistor, receives the input signal to generate a matched signal. The first transistor coupled to the first resistor, has a channel thermal noise to establish a first noise voltage. The second resistor coupled to the first resistor and transistor, receives the channel thermal noise to establish a second noise voltage. The transconductor amplifier coupled to the impedance matching network, comprises first and second transconductor circuits. The first transconductor circuit with first transconductance, coupled to the first resistor and transistor, receives the first noise voltage to generate a first noise current. The second transconductor circuit with second transconductance, coupled in parallel to the first transconductor circuit and in series to the load, receives the second noise voltage to generate a second noise current such that the first and second noise currents cancel each other out to reduce a noise component in the output current to the load when summing up together. The first and second transconductance have the opposite signs. | 2009-07-02 |
20090167440 | Low Noise Amplifier - The invention teaches an amplifier ( | 2009-07-02 |
20090167441 | Injection locking clock generator and clock synchronization circuit using the same - An injection locking clock generator can vary the free running frequency of an injection locking oscillator to broaden an operating frequency range of an oscillation signal injected to itself, thereby performing an injection locking with respect to all frequencies of an operating frequency range. The clock generator includes a main oscillator configured to generate oscillation signals of a frequency corresponding to a control voltage, and an injection locking oscillator configured to generate division signals synchronized with the oscillation signals by dividing the oscillation signals, wherein a free running frequency of the injection locking oscillator is set according to the frequency of the oscillation signals. | 2009-07-02 |
20090167442 | LOW NOISE WIDE RANGE VOLTAGE-CONTROLLED OSCILLATOR WITH TRANSISTOR FEEDBACK - An integrated circuit, a voltage controlled oscillator (VCO) and a phase-locked loop (PLL). In one embodiment, the VCO includes: (1) a voltage tune line configured to receive a tuning voltage for the VCO and (2) an odd number of ring-coupled delay elements. Each of the delay elements includes: (2A) an inverter having a power supply line being coupled to the voltage tune line and (2B) a feedback path having a gain-attenuating transistor with a gate thereof being coupled to the voltage tune line. | 2009-07-02 |
20090167443 | Digitally compensated highly stable holdover clock generation techniques using adaptive filtering - A system and method for generating a highly stable holdover clock utilizing an integrated circuit and an external OCXO is presented. The integrated circuit comprises an input reference clock receiver, a phase and frequency detector that generates an error signal between the input reference clock signal and a feedback clock signal, a data storage block that stores model parameters to predict frequency variations of the OCXO, an adaptive filtering module that includes a digital loop filter and algorithms for updating the model parameters and predicting frequency variations based on the model, a switch that enables the system to operate in normal or holdover mode, a digitally controlled oscillator, and a feedback divider. | 2009-07-02 |
20090167444 | Inductor and Capacitor-Based Clock Generator and Timing/Frequency Reference - In various embodiments, the invention provides a clock generator and/or a timing and frequency reference comprising an LC oscillator with a frequency controller to control and provide a stable resonant frequency. Such stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the oscillator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages. | 2009-07-02 |
20090167445 | RING OSCILLATORS FOR NMOS AND PMOS SOURCE TO DRAIN LEAKAGE AND GATE LEAKAGE - A ring oscillator circuit using only NMOS or only PMOS transistors is described. The ring oscillator circuit uses the equivalent of three transistors to form an oscillator stage, which may be a main component to the ring oscillator: A load transistor, an enable transistor, and a switch transistor. A source of the load transistor may be coupled to a drain of the enable transistor and a source of the enable transistor coupled to a drain of the switch transistor. The load transistor can have three different configurations: 1) a reference circuit with a gate and a drain of the load transistor coupled together; 2) a source to drain leakage monitor circuit with a gate and a source of the load transistor coupled together; and 3) a gate leakage monitor circuit with a drain and the source of the load transistor coupled together. An odd plurality of oscillator stages can be coupled together with an input circuit and an output circuit to form a ring oscillator. Other embodiments are described. | 2009-07-02 |
20090167446 | VOLTAGE CONTROLLED RING OSCILLATOR - There is provided a voltage controlled ring oscillator having a plurality of ring-connected amplifiers ( | 2009-07-02 |
20090167447 | System and Method for Providing Temperature Correction in a Crystal Oscillator - A system and method for providing temperature compensation in a oscillator component (such as a crystal oscillator component) that includes a closely-located temperature sensing device. The crystal oscillator component in example systems and methods is exposed to a temperature profile during a calibration procedure. Temperature and frequency data are collected and applied to coefficient generating function according to a temperature compensation model to generate a set of coefficients that are used in the temperature compensation model in an application device. The generated coefficients are stored in a coefficient memory accessible to an application device during operation. | 2009-07-02 |
20090167448 | SURFACE-MOUNT TYPE CRYSTAL OSCILLATOR - A surface-mount type crystal oscillator comprises: a crystal blank; an IC chip on which at least an oscillation circuit using the crystal blank is integrated; a container that accommodates the crystal blank and the IC chip; a pair of inspection terminals provided on an outer surface of the container and electrically connected to the crystal blank, and used for inspecting characteristics of the crystal blank; a communication terminal provided on the outer surface of the container; and first switching means for switchably and electrically connecting and disconnecting the inspection terminals to and from the crystal blank in accordance with a selecting signal supplied from the communication terminal. | 2009-07-02 |
20090167449 | Wireless Power Transfer using Magneto Mechanical Systems - Wireless power transfer is received using a magneto mechanical system. Movement of the magneto mechanical system is converted to electric power. | 2009-07-02 |
20090167450 | Oscillating current converter - [Problem] To provide an oscillating current converter fabricated by utilizing the MEMS technology making it possible to further decrease the size yet improving the conversion efficiency. | 2009-07-02 |
20090167451 | Frequency Controller for a Monolithic Clock Generator and Timing/Frequency Reference - In various embodiments, the invention provides a frequency controller to control and provide a stable resonant frequency of a clock generator and/or a timing and frequency reference. Such stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor adapted to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller adapted to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the resonator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages. | 2009-07-02 |
20090167452 | TRANSMISSION CHARACTERISTIC ADJUSTMENT DEVICE, CIRCUIT SUBSTRATE, AND TRANSMISSION CHARACTERISTIC ADJUSTMENT METHOD - A transmission characteristic adjustment device and the like that can carry out circuit adjustment before an error occurs, and has a transmission characteristic with high reliability without generating an error are provided. | 2009-07-02 |
20090167453 | METHOD AND APPARATUS FOR DIGITAL SYNTHESIS OF MICROWAVES THROUGH BALANCED TRANSMISSION LINE STRUCTURES - Conductor segments are positioned within a transmission line structure in order to generate microwave pulses. The conductor segments are switchably coupled to one or the other of the transmission lines or to each other, in parallel with the transmission line structure. Microwave pulses will be induced in the transmission line by closing the switches in a controlled manner to discharge successive segments or successive groups of segments into the transmission lines. The induced waves travel uninterrupted along the transmission lines in a desired direction. | 2009-07-02 |
20090167454 | Non-Reciprocal Circuit Device - A non-reciprocal circuit device comprising a first inductance element disposed between a first input/output port and a second input/output port; a second inductance element disposed between the second input/output port and the ground; a first capacitance element constituting a first parallel resonance circuit with the first inductance element; a resistance element parallel-connected to the first parallel resonance circuit; a third inductance element series-connected between the second inductance element and the ground; and a second capacitance element constituting a second parallel resonance circuit with the second and third inductance elements. | 2009-07-02 |
20090167455 | Semiconductor Device Having Balanced Band-Pass Filter Implemented with LC Resonator - A band-pass filter has a plurality of frequency band channels each including a first inductor having a first terminal coupled to a first balanced port and a second terminal coupled to a second balanced port. A first capacitor is coupled between the first and second terminals of the first inductor. A second inductor has a first terminal coupled to a first unbalanced port and a second terminal coupled to a second unbalanced port. The second inductor is disposed within a first distance of the first inductor to induce magnetic coupling. A second capacitor is coupled between the first and second terminals of the second inductor. A third inductor is disposed within a second distance of the first inductor and within a third distance of the second inductor to induce magnetic coupling. A second capacitor is coupled between first and second terminals of the third inductor. | 2009-07-02 |
20090167456 | HIGH SPEED WIDEBAND DIFFERENTIAL SIGNAL DISTRIBUTION - An exemplary device that operates as a differential splitter includes a plurality of differential signal conductors. Each of the conductors is coupled to at least one other of the conductors by a connector and a resistor. The coupled conductors are impedance matched by a combination of a spacing between the connector and the resistor, an impedance of the conductors and a resistive value of the resistor. An input is associated with two of the differential signal conductors. A plurality of outputs are each associated with a respective two of the differential conductors. | 2009-07-02 |
20090167457 | APPARATUS AND METHOD OF SELECTING COMPONENTS FOR A RECONFIGURABLE IMPEDANCE MATCH CIRCUIT - A method of selecting component values for an analog circuit includes identifying a cost function that evaluates similarity between an approximate frequency response function and a preferred frequency response function for at least one characteristic of the functions, determining the approximate frequency response function of the analog circuit based on an approximate component value, and changing the approximate component value based on a determined magnitude of similarity between the preferred frequency response function and the approximate frequency response function for the at least one characteristic. An impedance matching apparatus includes a mismatch detection circuit that produces a difference between source and load impedances, a match network controller that produces a control value based on the difference, and a reconfigurable varactor match network including at least one stub mounted varactor having a capacitance controlled by the control value to match the source and load impedances. | 2009-07-02 |
20090167458 | MATCHING CIRCUIT - The present invention has for its object to provide a matching circuit with multiband capability which can be reduced in size, even if the number of handled frequency bands rises. The matching circuit of the present invention comprises a load having frequency-dependent characteristics, a first matching block connected with one end to the load with frequency-dependent characteristics, and a second matching block formed by lumped elements connected in series to the first matching block. And then, when a certain frequency band is used, matching is obtained with the series impedance of the first matching block and the second matching block. When a separate frequency band is used, a π-type circuit is constituted by connecting auxiliary matching blocks to both sides of the second matching block. Next, at the same frequency, by taking the combined impedance of this π-type circuit and a load whose characteristics do not depend on the frequency to be Z | 2009-07-02 |
20090167459 | DUPLEXER - A duplexer is described herein. The duplexer includes a transmission branch configured to allow passage of signals in a transmission band. The duplexer also includes a reception branch configured to allow passage of signals in a reception band. The duplexer also includes a band rejection filter in the transmission branch configured to produce a short circuit to an electrical ground in a stopband. The stopband at least partially overlaps the reception band. | 2009-07-02 |
20090167460 | SUPERCONDUCTING TUNABLE FILTER - A superconducting tunable filter is disclosed that has a center frequency and a bandwidth able to be adjusted separately. The superconducting tunable filter includes a superconducting resonator filter pattern formed on a dielectric substrate; a dielectric or magnetic plate above the resonator filter pattern and having a through-hole; a dielectric or magnetic rod inserted in the through-hole; and a position controller which separately controls the position of the dielectric or magnetic plate and the position of the dielectric or magnetic rod relative to the resonator filter pattern. | 2009-07-02 |
20090167461 | Noise Eliminating Wire Harness - There is provided a noise eliminating wire harness capable of enhancing a noise elimination performance. In the wire harness | 2009-07-02 |
20090167462 | Band Pass Filter - A band pass filter includes partial filters, each of which has a pass band. Pass bands of different ones of the partial filters have center frequencies that are different. A partial filter with a lowest center frequency has a pass band with a first low-frequency edge and a first high-frequency edge. The first low-frequency edge is steeper than first high-frequency edge. A partial filter with a highest center frequency has a pass band with a second low-frequency edge and a second high-frequency edge. The second high-frequency edge is steeper than the second low-frequency edge. | 2009-07-02 |
20090167463 | Dielectric Filter - A dielectric filter having inner-conductor holes penetrating through a dielectric block from a first surface to a second surface thereof. An outer conductor and input/output electrodes are formed on an outer surface of the dielectric block. A side of each of the input/output electrodes facing the first surface is substantially in parallel to the first surface, and an intersection of a side facing the second surface and a side facing a sixth surface is tapered. With such a configuration, an attenuation characteristic at an attenuation band is improved by making the attenuation characteristic less likely to receive an influence of a TE mode. | 2009-07-02 |
20090167464 | Cavity Filter, An Isolation Device, And A Node In A Mobile Communications Network - The invention relates to a cavity filter comprising at least one tuning conductor ( | 2009-07-02 |
20090167465 | APPARATUS AND SYSTEMS FOR ELECTRICALLY ISOLATING AND TRANSMITTING RF SIGNALS BETWEEN TWO DEVICES - Various embodiments of apparatus and systems are provided for electrically isolating two devices while transferring power and RF signals therebetween. An electrical isolation apparatus includes an isolation transformer that operates to transfer electrical power between first and second devices. The electrical isolation apparatus also includes a decoupling device that transfers radio frequency (RF) signals between the first and second devices. The isolation transformer and the opto-isolator cooperatively operate to electrically isolate the first device from the second device. | 2009-07-02 |
20090167466 | TUNABLE HIGH QUALITY FACTOR INDUCTOR - An inductor circuit with high quality (Q) factor includes a primary inductor and a compensation sub-circuit. The compensation sub-circuit is electrically isolated from the primary inductor. The compensation sub-circuit is magnetically coupled with the primary inductor to compensate the loss in the primary inductor. | 2009-07-02 |
20090167467 | DOUBLE-TUNING CIRCUIT OF TELEVISION TUNER - In a double-tuning circuit including a primary tuning circuit having a first inductor and a first variable capacitive element connected in parallel and a secondary tuning circuit having a second inductor and a second variable capacitive element connected in parallel, a fixed part of a copper-foil pattern is connected to a connection point at which the double-tuning circuit is connected to an input terminal of a frequency mixing circuit, and a tip part of the copper-foil pattern extends to near the first inductor, whereby a trap circuit for attenuating an image frequency component is formed. A pattern is formed between a ground-side terminal of the first inductor and the ground, and a capacitor is connected between a connection point at which the first inductor is connected to one terminal of the pattern and a ground-side terminal of the second variable capacitive element. | 2009-07-02 |
20090167468 | ELECTRICAL CIRCUIT BREAKER HAVING A PROTECTIVE FUNCTION - An actuating unit or actuating mechanism and release for a circuit breaker. The magnetic mechanism of the release includes a magnet armature, which can move linearly in a magnet coil, is in the form of a tripping plunger and can be moved towards a permanent magnet counter to the force of a storage compression spring and is held fixedly by said permanent magnet in the case of a magnet coil through which no current is flowing. The tripping unit is in the form of a mechanical force store. After a tripping action, the mechanical force store needs to be reset manually again. For this purpose, a rotary movement of the drive shaft with an angular displacement of from 20 to 30 degrees takes place in the opposite direction to the ON switching rotary movement. | 2009-07-02 |
20090167469 | ELECTROMAGNETIC RELAY - The present invention provides an electromagnetic relay that can achieve desired operation characteristics by simple and inexpensive construction even if it has a small thickness. Therefore, a movable iron piece | 2009-07-02 |
20090167470 | ELECTRIC SWITCH - Electric switch which comprises a general structure ( | 2009-07-02 |
20090167471 | MAGNETICALLY LATCHED MINIATURE SWITCH - A magnetic latch for switches is provided. | 2009-07-02 |
20090167472 | HINGE ASSEMBLY AND PORTABLE ELECTRONIC DEVICES USING SAME - A hinge assembly ( | 2009-07-02 |
20090167473 | TRANSFORMER STRUCTURE - The present invention discloses a transformer structure, which has a winding reel. The winding reel has an iron-core frame. A first primary winding, a second primary winding and at least one secondary winding are wound on the iron-core frame. The first primary winding is electrically connected to the second primary winding. The secondary winding is arranged in between the first primary winding and the second primary winding. In the present invention, a plurality of the secondary windings may be arranged in between the first primary winding and the second primary winding and surrounded by the first primary winding and the second primary winding so that the transformer can drive a plurality of loads. | 2009-07-02 |
20090167474 | TRANSFORMER IMPROVED IN LEAKAGE INDUCTANCE - There is provided a transformer improved in leakage inductance including: a core having first, second and third legs electromagnetically coupled to one another; a primary winding formed of a conductor having one end and another end receiving power from the outside and dividedly wound around the first, second and third legs; and a secondary winding wound around at least one of the first, second and third legs and receiving induced power by electromagnetic induction with the primary winding. | 2009-07-02 |
20090167475 | Winding Method and Coil Unit - A rectangular coil unit is manufactured in such a manner that two wires are simultaneously regularly wound on four outer surfaces of a bobbin having a rectangular section so that the wires advance obliquely together for a lane change corresponding to 0.5 wire on one (a lower surface side) of a pair of parallel surfaces of the four outer surfaces of the bobbin and for a lane change corresponding to 1.5 wires on the other one (an upper surface side) of the parallel surfaces. | 2009-07-02 |
20090167476 | INDUCTOR STRUCTURE - An inductor structure disposed over a substrate and including a coil layer is provided. The coil layer has a plurality of coil turns electrically connected with each other. An innermost coil turn of the coil layer has a portion with a narrower width in a region with a higher magnetic flux density than that in the other region with lower magnetic flux density. | 2009-07-02 |
20090167477 | Compact Inductive Power Electronics Package - An inductive power electronics package is disclosed. It has a circuit substrate with power inductor attached atop. The power inductor has inductor core of closed magnetic loop with an interior window. The closed magnetic loop can include air gap for inductance adjustment. The circuit substrate has bottom half-coil forming elements constituting a bottom half-coil beneath the inductor core. Also provided are top half-coil forming elements interconnected with the bottom half-coil forming elements to form an inductive coil enclosing the inductor core. An inner connection chip can be added in the interior window for interconnecting bottom half-coil forming elements with top half-coil forming elements. An outer connection chip can be added about the inductor core for interconnecting bottom half-coil forming elements with top half-coil forming elements outside the inductor core. A power Integrated Circuit can be attached to the top side of the circuit substrate as well. | 2009-07-02 |
20090167478 | DEVICE FOR IMPROVING EDDY CURRENT LOSS OF TRANSFORMER AND CONTROLLING METHOD THEREOF - The configurations of a device diminishing the eddy current loss for a transformer having a gap are provided in the present invention. The proposed device includes a conductive case having an eddy current diminishing opening opposite to the air-gap and an insulator disposed between the eddy current diminishing opening and the transformer. | 2009-07-02 |
20090167479 | Fuse Cutout Assembly - A fuse cutout assembly having enhanced safety features to aid in both removal and replacement of fuse tubes. The inventive assembly can be produced by making modifications to standard fuse cutout assemblies. The modifications include lengthening the trunnions of the lower contact assembly and adding reflectors as a further visual aid for positioning the lower contact portion of the fuse tube within the trunnion sockets. Additionally, a molded plastic guide placed proximate the lower contact area of the fuseholder of the cutout promotes “self guiding” of the fuseholder during replacement. Also, the pull ring is modified by the addition of protruding arcuate sections extending from a standard pull ring, the sections allowing the technician to engage the pull down ring without aiming the hook stick through the ring. Additional reflectors are strategically placed to facilitate replacement of the fuseholder. | 2009-07-02 |
20090167480 | Manufacturability of SMD and Through-Hole Fuses Using Laser Process - The invention relates to a method of manufacturing a circuit protector and to a circuit protector. The method comprises the steps of providing a substrate having opposing end portions, coupling an element layer to the top surface of the substrate, and laser machining the element layer to shape the element layer into a predetermined geometry. The circuit protector comprises a substrate having opposing end portions, termination pads coupled to the top surface at opposing end portions of the substrate, a fuse element disposed across a space between the termination pads and electrically connecting the termination pads, the fuse element having a predetermined geometry; the predetermined geometry having the narrowest width of about 0.025 to about 0.050 millimeters, a cover coupling the top surface and suffusing the substrate, the fuse element and the termination pads, and end terminations in electrical contact with the termination pads at the opposing end portions. | 2009-07-02 |
20090167481 | Electrical PTC Thermistor Component, and Method for the Production Thereof - An electrical PTC thermistor component includes a base that includes a peripheral surface, first and second faces on different sides of the component, and first and second conductive layers, each of which is on at least one of the first and second faces. The first conductive layer is not on the peripheral surface. The second conductive layer includes a cap that covers, and overlaps edges of, the at least one of the first and second faces. | 2009-07-02 |
20090167482 | SURFACE-MOUNT NEGATIVE-CHARACTERISTIC THERMISTOR - A surface-mount negative-characteristic thermistor includes a ceramic body composed of a semiconductor ceramic material including at least one of Mn, Ni, and Ti; external electrodes disposed on surfaces of the ceramic body; and plating films disposed on surfaces of the external electrodes. When the molar quantity of Mn in the semiconductor ceramic material is represented by a and when the molar quantity of Ni in the semiconductor ceramic material is represented by b, the molar ratio of Mn to Ni is in the range of 55/45≦a/b≦90/10, and when the total molar quantity of Mn and Ni in the semiconductor ceramic material is defined as 100 parts by mole, the content of Ti is in the range of about 0.5 parts by mole to about 25 parts by mole. | 2009-07-02 |
20090167483 | LIGHTING SYSTEM AND CONTROL METHOD THEREOF - The present invention is related to a method, system and apparatus, in particular, a lighting system and method of controlling the lighting system, comprising a computer readable medium and a programmable device capable of controlling and manipulating individually addressable lights to realize a visual display at a pixel level. | 2009-07-02 |
20090167484 | RFID ENABLED LIGHT SWITCHES - An embodiment of the invention relates to a for remote control of an electrical circuit, comprising an RFID source, a remotely-mounted switch operatively coupled to an RFID tag, and an RFID receiver operatively coupled to an electrical circuit, wherein a change in state of the remotely-mounted switch is detected by the RFID tag and transmitted to the RFID receiver to control the electrical circuit. | 2009-07-02 |
20090167485 | CONTROLLER PROVIDING SHARED DEVICE ACCESS FOR ACCESS CONTROL SYSTEMS - An access control system and method for controlling access to secured areas includes a plurality of local readers connected to corresponding local control devices for reading portable access devices. A system reader reads the portable access devices, and a system control device is electrically connected to the local control devices. The system control device controls access to a common secure area using the system reader by validating the portable access devices using one of the local control devices. The system control device locally stores information from the portable access device and the associated local control device which may include validation or authentication data received from the associated local control device, so that repeat validation of the portable access device can be communicated from the associated local control device. | 2009-07-02 |
20090167486 | SECURE ASSOCIATION BETWEEN DEVICES - Methods and apparatus relating to secure association between devices are described. In one embodiment, devices capable of communicating via a wireless channel may be authenticated via a different channel established by signal generators and/or sensors present on the devices. Other embodiments are also disclosed. | 2009-07-02 |