25th week of 2011 patent applcation highlights part 37 |
Patent application number | Title | Published |
20110149570 | MINIATURE TROUBLE LAMP - A trouble lamp has a generally transparent, cylindrical tube, a top end cap and an opposite bottom end cap disposed over the tube ends. A hanger has a stem inserted into the top end cap and a hook generally extending from the tube and the top end cap. An electrical cord extends from the bottom end cap to a plug configured to insert into a vehicle accessory socket. Magnets disposed at least partially within the tube top are configured to attach the trouble lamp to a ferrous metal surface. The hanger is configured to attach the trouble lamp to engine framework or wiring. An LED array disposed along the length of the tube is in communications with the cord so as to illuminate LEDs when the plug is inserted into the accessory socket. | 2011-06-23 |
20110149571 | LIGHT TRANSMISSIBLE DISPLAY APPARATUS - A light transmissible display apparatus includes a first light transmissible substrate and at least one light-emitting diode (LED) light bar disposed on the first light transmissible substrate. The light transmissible display apparatus makes people who live or work inside a building enjoy natural light from outside, and further saves the labor hour in processes of manufacturing the display apparatus. | 2011-06-23 |
20110149572 | ROPE LIGHT - A rope light including an inner layer having first and second ends; an outer layer, wherein the outer layer covers an outer surface of the inner layer; at least one aperture positioned in the interior of the inner layer; at least one LED light positioned within the aperture; at least one bus connector having at least one of a positive electrode and a negative electrode, wherein the bus connector is placed along the direction of the aperture; and at least one rectifying diode is placed at each positive and negative end of the LED light that is positioned inside the aperture. | 2011-06-23 |
20110149573 | LIGHT GUIDE MEMBER AND KEYPAD ASSEMBLY USING THE SAME - Disclosed are a light guide member and a keypad assembly including the same. The light guide member includes a light guide plate for guiding light propagated inside, and at least one recess formed in a direction perpendicular to a direction of guidance of light coupled to the inside of the light guide plate so that light guided by the light guide plate is reflected to the light guide plate. The keypad assembly includes a keypad having at least one key button and an elastic sheet fixing the key button, a light guide member positioned beneath the keypad, the light guide member having a light guide plate for guiding light coupled to an inside and at least one recess for reflecting light guided by the light guide plate to the light guide plate, and a switch pad positioned beneath the light guide member so as to establish an electric contact when the key button is pressed. | 2011-06-23 |
20110149574 | ILLUMINATION SYSTEM - An illumination system including a light source and a magneto-optical device is provided. The light source is adapted to emit a beam, and at least a part of the beam is polarized. The magneto-optical device is disposed in a transmission path of the beam and includes a plurality of magneto-optical material units. The magneto-optical material units are adapted to be disposed in the transmission path of the beam, and at least a part of the magneto-optical material units has different optical rotation. The magneto-optical device is adapted to move so as to make the magneto-optical material units move with respect to the beam. | 2011-06-23 |
20110149575 | Stage -Lighting Apparatus And Method For Controlling The Orientation Of A Light Beam Emitted By Said Apparatus - A stage-lighting apparatus is provided with: a light source adapted to generate a light beam; means for orienting the light beam; a remote driving station, which is located at a distance from the means for orienting the light beam and from the light source and has a driving handlebar, which is able to turn about a first axis and a second axis that are orthogonal to one another; a control unit, which is connected to the means for orienting the beam and to the remote driving station and is configured for controlling the means for orienting the light beam in such a way as to determine a movement of the light beam on the basis of a movement imparted to the driving handlebar. | 2011-06-23 |
20110149576 | ILLUMINATING DEVICE - An illuminating device includes a case, a heat sink block, an LED array, two waterproof plastic sheets and two covers. The case has a fluid inlet, a fluid outlet and two partition grooves. The heat sink block has a carrying platform and a fluid channel. The fluid channel is conformally disposed in the partition grooves and communicated with the fluid inlet and the fluid outlet. The LED array is located on the carrying platform. The waterproof plastic sheets respectively overlay the fluid inlet and the fluid outlet. The waterproof plastic sheets have a first opening communicated with the fluid channel. The covers respectively overlay the waterproof plastic sheet and a part of the case and have a second opening corresponding to the first opening. A fluid flows through the fluid channel via the second openings and the first openings so as to discharge heat from the LED array. | 2011-06-23 |
20110149577 | LIGHT SOURCE FOR LIGHTING - A light source used for illumination provides favorable heat dissipation properties while suppressing the lowering of the efficiency of light emission. The light source includes a mount substrate, an LED | 2011-06-23 |
20110149578 | LIGHT-EMITTING DEVICE - Disclosed is a heat-resistant light-emitting device wherein luminance is increased by increasing the light emission area. A light-emitting device | 2011-06-23 |
20110149579 | Electromagnetic Interference Preventing Module - Disclosed herein are a light source module and an electronic device using the same. The light source module is disposed in a housing component of the electronic device and includes a light source and a light guide element having a light-entering surface, a light-departing curved surface and a light-reflecting curved surface. The light-entering surface receives the light from the light source. The normal line directions of the light-departing curved surface are approximately perpendicular to the normal line direction of the light-entering surface. The light is reflected by the light-reflecting curved surface and then leaves the light guide element in the normal line directions of the light-departing curved surface. | 2011-06-23 |
20110149580 | LED UNIT - An LED unit includes a printed circuit board, an LED mounted on the printed circuit board, and a lens covering the LED and fixed on the printed circuit board. The lens includes a pedestal and an optical element connected to the pedestal. The lens has a light-incident face formed in an interior thereof for receiving light emitted from the LED into the lens, and a light-emergent face formed on an outside thereof for refracting the light out of the lens. The optical element has two opposite sides longer than the other two opposite sides thereof so that the light pattern modulated by the optical element has two opposite ends wider than a middle thereof. | 2011-06-23 |
20110149581 | TOTAL INTERNAL REFLECTION LENS WITH INTEGRATED LAMP COVER - A total internal reflection (TIR) lens has an integrated lamp cover adapted to a lamp of a desired form factor (e.g., PAR-38). The size and shape of the TIR lens can be adapted to optimize the light output of the lamp with little regard to the desired form factor. The integrated lamp cover can extend the front surface of the TIR lens in a direction transverse from the optical axis. | 2011-06-23 |
20110149582 | APPARATUS, METHOD, AND SYSTEM FOR ADJUSTABLY AFFIXING LIGHTING FIXTURES TO STRUCTURES - Disclosed herein are apparatus, methods, and systems for adjustably affixing an object to a structure via an armature which includes a pivotable knuckle. The armature comprises two assembly components with a set of friction plates compressed therebetween. Said armature is designed to be lightweight (compared to the object), low cost (compared to state of the art adjustable armatures), suitable for outdoor use, and adaptable so to accommodate objects of varying weights, sizes, and form factors without adding significant weight or cost to the overall system. | 2011-06-23 |
20110149583 | LENS MODULE SOCKET - A lens module socket for receiving a lens module having a base portion includes an insulating housing, a plurality of conductive terminals and a shielding shell. The insulating housing has a bottom wall and side walls extended upwardly from the bottom wall to surround a receiving chamber therebetween for receiving the lens module. Two opposite side walls each defines at least one through hole thereon and a latch member disposed in the through hole. The latch member includes an arm portion extended upwardly from a bottom of the through hole and a hook portion projected into the receiving chamber from an upper position of the arm portion for buckling the lens module without gap formed between the bottom wall and a bottom of the lens module. The hook portion has an inclined guide surface for guiding the lens module during the lens module is assembled to the insulating housing. | 2011-06-23 |
20110149584 | LIGHT MODULE FOR A MOTOR VEHICLE - A light module ( | 2011-06-23 |
20110149585 | VEHICLE SIGNALLING DEVICE WITH A THREE-DIMENSIONAL OPTICAL EFFECT - A light signalling device, particularly designed for motor vehicles. The device has a reflector with a reflecting surface and a screen arranged opposite the reflector and having a semi-reflecting zone. The screen being arranged away from the reflector and forming a cavity with the reflector. The light rays of the source penetrate the cavity; and some of these rays are transmitted by the semi-reflecting zone, and others of these rays are reflected by the semi-reflecting zone, then by the reflector into the cavity in such a way as to generate a repetitive visual or three-dimensional effect of depth. The screen is configured and arranged in relation to the direction of emission of the light source in such a way that another part of the light rays leaves the cavity at the level of the screen without meeting the semi-reflecting zone. | 2011-06-23 |
20110149586 | LAMP ASSEMBLY - It is provided a lamp assembly ( | 2011-06-23 |
20110149587 | FRONT PORTION STRUCTURE OF SADDLE-RIDE TYPE VEHICLE - To provide a front portion structure of a saddle-ride type vehicle which is constructed to install a combination lamp on a front cowl and improves visibility of a blinker of one of left and right sides of the vehicle from the other side. Lens-side recess portions are formed as concavities which are recessed to the rear of the vehicle and extend in a vertical direction in front of the blinker lamps as well as on the inner side of a vehicle width direction. | 2011-06-23 |
20110149588 | LIGHTING DEVICE OF A MOTOR VEHICLE - A light module ( | 2011-06-23 |
20110149589 | OPTICAL DEVICE HAVING FLUOROCARBON POLYMER LAYER - Embodiments of the invention are directed to an optical device, such as an optical device for use in a laser system. One embodiment of the optical device includes first and second components. A fluorocarbon polymer layer is between the first and second components. Embodiments of the fluorocarbon polymer layer comprise a fluorocarbon polymer in the form of an adhesive, an oil, a lubricant or a paste. In one embodiment, the fluorocarbon polymer layer is in the form of an adhesive that bonds the first and second components together. | 2011-06-23 |
20110149590 | Linear light source - A linear light source, in which an LED is arranged at an end portion of an approximately cylindrical light guiding member configured so that an upper portion, which has an approximately circular portion and which includes a light emitting face, a flat lower portion, which includes a light reflection face formed so as to face the upper portion, and side portions which connect the upper portion and the lower portion to each other, are arranged to extend in a longitudinal direction, respectively, and a light diffusion and reflection member provided outside of the light guiding member. | 2011-06-23 |
20110149591 | Enhanced LED illuminator - An ophthalmic illuminator is disclosed, one embodiment comprising: an illumination source and an optical fiber for transmitting a combined light beam from the illumination source to a site, such as a surgical site within an eye, wherein the illumination source comprises a plurality of light emitting diode (LED) chips optically coupled to a corresponding plurality of light pipes, the LED chips and light pipes arranged in a configuration such that the light pipes converge together at their distal ends to form a cubic box having five sides formed by the distal ends of the light guides and an open side from which the combined light beam, composed of light from a plurality of light beams generated by the LED chips and transmitted to the cubic box by the light guides, is emitted. The luminance of the combined light beam has a luminance greater than the luminance of any one of the plurality of LED chips. | 2011-06-23 |
20110149592 | LIGHT COLLECTOR FOR A WHITE LIGHT LED ILLUMINATOR - A white light source includes a light-emitting diode (LED) configured to emit white light in an angular distribution. The white light source further includes a light guide and a light collector configured to collect light across the angular distribution. The light collected by the light collector contributes to a total luminous flux of the white light coupled into the light guide. | 2011-06-23 |
20110149593 | FIBRE OPTIC LIGHTING SYSTEM FOR DRINK TAPS - The invention relates to a fiber optic lighting system for drink taps. The inventive system consists of an external light-emitting core from which light is conveyed by means of fiber optic into a drink tap comprising a rigid plate to which the fiber optic is fixed. The aforementioned plate is placed inside a structure which is made from a light-diffusing material and which is covered with a light-refracting resin. The external light-emitting core is formed by a ventilator ( | 2011-06-23 |
20110149594 | Light-emitting device, light source and method of manufacturing the same - A light-emitting device includes a light source including an element mounting substrate, an LED element mounted thereon by flip-chip connection and a sealing portion for sealing the LED element on the element mounting substrate, and a light guide plate including a housing hole for housing the light source. The housing hole extends from one surface side to another surface side of the light guide plate and an area of an inner surface thereof on which light is incident from the light source is parallel to a thickness direction of the light guide plate. The light source is housed in the housing hole so that the element mounting substrate is located on the other surface side of the light guide plate, emits light toward the one surface side of the light guide plate in the housing hole and the inner surface side of the housing hole, and has an optical axis parallel to the thickness direction of the light guide plate. A solid angle of the inner surface of the housing hole with respect to the center of an upper surface of the light source is not less than 4.44 steradians. | 2011-06-23 |
20110149595 | LIGHT GUIDE PLATE, BACKLIGHT MODULE AND METHOD OF GUIDING LIGHT - A light guide plate, backlight module installed with the same and method of guiding light utilizing the same are provided. The light guide plate has a bottom surface, a light outlet surface opposite to the bottom surface, and a light inlet surface at least connected with the light outlet surface. A light is introduced to the light inlet surface and transmitted in the light guide plate. The light guide plate comprises a light transmissive substrate installed with at least one through hole, and a first slot installed on the light transmissive substrate and arranged at the periphery of the through hole. | 2011-06-23 |
20110149596 | LED LAMP HAVING LIGHT GUIDE - An LED lamp includes a frame, a bracket connected to the frame, two LED modules and driving modules received between the frame and the bracket, and a backplate, a reflective plate, a light guide, a diffusion plate and a cover sequentially sandwiched between the frame and the bracket. The LED modules are oriented towards two opposite lateral sides of the light guide. The light guide has a large amount of scattering dots formed on a back face thereof. The scattering dots are arranged in multiple columns. The sizes of the dots in each column are identical to each other, and the sizes of the dots in different columns gradually increase from two opposite sides towards a middle of the light guide. | 2011-06-23 |
20110149597 | LIGHT SOURCE MODULE - A light source module includes a casing, at least one reflective layer, a light bar, and at least one light source. The casing has a first side wall and a second side wall, and the first side wall and the second side wall define an opening. The opening faces a light incident surface of a light guide plate, and the first side wall and the second side wall are respectively positioned on two opposite sides of the opening. The reflective layer is formed inside the casing and adjacent to one of the first side wall and the second side wall. The light bar is disposed inside the casing and forms an angle with the light incident surface of the light guide plate. | 2011-06-23 |
20110149598 | SUPPORTER OF DIFFUSER PLATE IN BACKLIGHT UNIT - Disclosed is a diffuser plate supporter of a backlight unit. The diffuser plate supporter functions to support a diffuser plate and includes: a frame positioned on the lower side of the diffuser plate supporter; a supporting member which is formed by an injection molding process and a portion of which penetrates through the frame; and a cap damper which is formed by an injection molding process and a portion of which penetrates through the inside of the supporting member. | 2011-06-23 |
20110149599 | Illuminated Housing Cover for Mobile Communication Device - An illuminated housing cover includes a light guide and light source sandwiched between an outer light transmissive layer and an inner layer. The light source is disposed at one end of the light guide and arranged so that the emitted light enters one end of the light guide. A light mask is disposed between the light guide and the outer light transmissive layer to generate a desired lighting effect or light pattern. The housing cover can be manufactured using a two-step molding process. | 2011-06-23 |
20110149600 | LIGHT EMITTING DEVICE AND LIGHT UNIT USING THE SAME - Provided is a light emitting device and light unit using the same. The light emitting device comprises: a body including a horizontal surface; an insulating layer over at least a portion of the horizontal surface; an electrode over at least a portion of the insulating layer; a heat radiation member formed within the body and protruding from the horizontal surface, the heat radiation member comprising two or more surfaces that are inclined with respect to the horizontal surface; and two or more light emitting diodes, wherein each of the two or more light emitting diodes is mounted on a respective one of the two or more inclined surfaces, and wherein each of the two or more light emitting diodes is electrically connected to the electrode. | 2011-06-23 |
20110149601 | LIGHT EMITTING DEVICE AND LIGHT UNIT USING THE SAME - Provided is a light emitting device and light unit using the same. The light emitting device comprises: a body that includes a horizontal surface; an electrode at least partially disposed in the body; two or more mounting parts protruding from the horizontal surface, wherein the two or more mounting parts are separated from each other by a space, and wherein each of the at least two or more mounting parts includes a surface that is inclined relative to the horizontal surface; and two or more light emitting diodes, each mounted on the inclined surface of a corresponding one of the two or more mounting parts and electrically connected to the electrode. | 2011-06-23 |
20110149602 | BACKLIGHT UNIT - Disclosed is a backlight unit. The backlight unit includes:
| 2011-06-23 |
20110149603 | DEVICE FOR COLLIMATING, MAKING UNIFORM AND EXTRACTING LIGHT FOR LIGHTING A DISPLAY DEVICE - Lighting system for a data display device ( | 2011-06-23 |
20110149604 | ENCAPSULANT PROFILE FOR LIGHT EMITTING DIODES - A light emitting packaged diode ids disclosed that includes a light emitting diode mounted in a reflective package in which the surfaces adjacent the diode are near Lambertian reflectors. An encapsulant in the package is bordered by the Lambertian reflectors and a phosphor in the encapsulant converts frequencies emitted by the LED chip and, together with the frequencies emitted by the LED chip, produces white light. A substantially flat meniscus formed by the encapsulant defines the emitting surface of the packaged diode. | 2011-06-23 |
20110149605 | LIGHT GUIDE SHEET AND KEY SHEET USING THE SAME - There is provided a light guide sheet and a key sheet using said light guide sheet, said light guide provided at the rear surface side of a key top configured with a plurality of key buttons, said light guide sheet guiding light beam from a light source for lighting up said plurality of key buttons from their back surface side, comprising: a light guide portion having a plate-like shape; a periphery portion formed integrally around said light guide portion, said periphery portion whose thickness is thinner than that of said light guide portion, in which a surface facing the rear surface of said key top has a flat surface, and a side surface is a receiving surface of the light beam outputted by said light source, wherein said periphery portion maintains a distance between the rear surface of said key top and the front surface of said light guide portion in a certain distance when said flat surface of said periphery portion contacts the rear surface of said key top. | 2011-06-23 |
20110149606 | AC-TO-DC CONVERTING CIRCUIT APPLICABLE TO POWER-CHARGING MODULE - The AC power generated by AC utility has been successfully transferred from AC-to-DC by means of an AC-to-DC converting circuit. This disclosure provides an AC-to-DC converting circuit applicable to a power-charging module, and the AC-to-DC converting circuit comprises two parts such as a first stage being a low-frequency AC to high-frequency AC converter comprising an input full-bridge rectifier, a full-bridge inverter and an immittance conversion circuit and a second stage being an AC-to-DC converter comprising a single-phase transformer and a full-bridge rectifier, where the inverter in the first stage is switched at high frequencies so as to reduce the size of the transformer in the second stage. Additionally, the immittance conversion circuit is further characterized in voltage to current conversion so as to simplify the control mechanism of the power-charging module, reduce the number of current measuring elements and the cost thereof. | 2011-06-23 |
20110149607 | Controller for a Power Converter - A power converter employing a controller configured to increase a dead time between conduction periods of first and second power switches therein and method of operating the same. In one embodiment, the power converter includes first and second power switches coupled to an input thereof, and a sensor configured to provide a sensed signal representative of at least one of a current level and a power level of the power converter. The power converter also includes a controller configured to increase a dead time between conduction periods of the first and second power switches when the sensed signal indicates a decrease of at least one of the current level and the power level of the power converter. | 2011-06-23 |
20110149608 | ELECTRICAL POWER CONVERTERS AND METHODS OF OPERATION - An electrical power converter includes a transformer ( | 2011-06-23 |
20110149609 | BIDIRECTIONAL SIGNAL CONVERSION - An embodiment of a controller for a multidirectional signal converter is operable to cause the converter to regulate a first signal at a first converter node, and to have a switch timing that is independent of a direction of power transfer between the first converter node and a second converter node. For example, in an embodiment, such a controller may be part of a bidirectional voltage converter that handles power transfer between two loads. Such a voltage converter may have improved conversion efficiency and a smaller size and lower component count as compared to a conventional multidirectional voltage converter. Furthermore, such a voltage converter may be operable with a common switching scheme regardless of the direction of power transfer, and without the need for an indicator of the instantaneous direction of power flow. | 2011-06-23 |
20110149610 | BIDIRECTIONAL SIGNAL CONVERSION - An embodiment of a multidirectional signal converter includes first and second converter nodes, a transformer, and first and second stages. The transformer includes first and second windings, and the first stage is coupled between the first converter node and the first winding of the transformer. The second stage includes a first node coupled to the second converter node, a second node coupled to a node of the second winding of the transformer, and a filter node, is operable as a boost converter while current is flowing out from the second converter node, and is operable as a buck converter while current is flowing out from the first converter node. For example, in an embodiment, such a multidirectional signal converter may be a bidirectional voltage converter that handles power transfer between two loads. Such a voltage converter may have improved conversion efficiency and a smaller size and lower component count as compared to a conventional multidirectional voltage converter. Furthermore, such a voltage converter may be operable with a common switching scheme regardless of the direction of power transfer, and without the need for an indicator of the instantaneous direction of power flow. | 2011-06-23 |
20110149611 | BIDIRECTIONAL SIGNAL CONVERSION - An embodiment includes coupling a first intermediate node between a first inductor and a first winding of a transformer to a reference node during a first portion of a first switching cycle, uncoupling the first intermediate node from the reference node and coupling the first intermediate node to a signal-storage element during a second portion of the first switching cycle, coupling a second winding of the transformer between the reference node and a second converter node during the second portion of the first switching cycle, and regulating a signal at the second converter node by controlling a duration of one of the first and second portions of the first switching cycle. For example, in an embodiment, bidirectional signal converter may perform the above steps to handle power transfer between two loads. Such a voltage converter may have improved conversion efficiency and a smaller size and lower component count as compared to a conventional bidirectional voltage converter. Furthermore, such a voltage converter may be operable with a common switching scheme regardless of the direction of power transfer, and without the need for an indicator of the instantaneous direction of power flow. | 2011-06-23 |
20110149612 | Control Method and Controller with constant output current control - Control method and related controller, applicable to a power supply with a switch and an inductive device. The inductive current through the inductive device is sensed. An operating frequency of the switch is controlled to make an average of the inductive current substantially equal to a predetermined portion of the peak of the inductive current and to make the inductive device operated in continuous conduction mode. | 2011-06-23 |
20110149613 | FLYBACK CONVERTER UTILIZING BOOST INDUCTOR BETWEEN AC SOURCE AND BRIDGE RECTIFIER - A flyback converter utilizes a boost inductor coupled between a source of AC power and a bridge rectifier to provide power factor correction. A primary winding of the flyback transformer is coupled in series with a storage capacitor across the output of the bridge rectifier. A circuit, which includes a switching transistor, is also coupled across the output of the bridge rectifier to provide a low resistance path when the switch is closed. The cores of the boost inductor and the transformer are loaded with energy when the switch is closed. When the switch opens, the energy stored in the magnetic cores is transferred to the output via the transformer secondary winding and rectification circuitry. | 2011-06-23 |
20110149614 | DUAL MODE FLYBACK CONVERTER AND METHOD OF OPERATING IT - A DC-DC converter includes a power switching device and a mode control logic circuit to control the power switching device and generate an ON-pulse. A flip-flop is configured to be set by the mode control logic circuit. A current mode comparator is configured to reset the flip-flop and to compare a signal based upon current flowing through the power switching device with a signal based upon an output voltage of the dual mode flyback DC-DC converter. A transformer is driven by the current mode comparator. The mode control logic circuit includes a timer starting when a gate driver control signal applied to the power switching device turns the power switching device off and configured to generate a pulse when an off time interval elapses, a zero current detector circuit configured to sense a voltage on the transformer and generate a pulse when the voltage drops below a trigger threshold, and a combinatory logic circuit configured to compare pulse signals generated by the timer and the zero current detector circuit and generate the ON-pulse based thereupon. | 2011-06-23 |
20110149615 | METHOD AND APPARATUS FOR LIMITING MAXIMUM OUTPUT POWER OF A POWER CONVERTER - An example power converter includes an energy transfer element, a switch, a controller, and a current offset circuit. The controller is coupled to switch the switch between an ON state and an OFF state to regulate the output of the power converter. The controller is also adapted to terminate the ON state of the switch in response to a switch current flowing through the switch reaching a switch current threshold. An auxiliary winding of the energy transfer element is adapted to generate an auxiliary winding voltage that is representative of an input voltage of the power converter only during the ON state of the switch. The current offset circuit is coupled to the auxiliary winding to generate an offset current to flow through the switch in response to the auxiliary winding voltage, where an input current of the power converter is adjusted in response to the offset current. | 2011-06-23 |
20110149616 | DRIVE CIRCUIT FOR A SYNCHRONOUS RECTIFIER AND A METHOD FOR CONTROLLING IT - A pulsed drive signal without a dead band can be achieved by a drive circuit arranged to receive opposite pulsed input signals (PWM drive A, PWM drive B), having a dead band between them,—a transformer arranged to receive the input signals (PWM drive A, PWM drive B) and output intermediary signals (A′, B′),—time delay circuitry (RA, DA, RB, DB) arranged to receive the intermediary signals, and to provide buffer input signals (A′, B′), corresponding to the intermediary signals, but with a ramped up transition from low to high signal,—a first and a second buffer stage arranged to receive the first and second buffer input signals, respectively, and produce the first and the second drive output signal corresponding to the first and second pulsed input signal but with the transition from high to low signal delayed to reduce the dead band. | 2011-06-23 |
20110149617 | AC/AC CONVERSION POWER SUPPLY DEVICE - Provided is an AC/AC conversion power supply device including: n(n≧2) rectification circuits (D | 2011-06-23 |
20110149618 | Current Waveform Construction to Generate AC Power with Low Harmonic Distortion from Localized Energy Sources - Methods and apparatus to provide low harmonic distortion AC power for distribution by converting energy from natural or renewable sources into electrical form, and constructing a current waveform on a primary winding of a transformer by recapturing inductive energy previously stored in the transformer so as to transform the converted electrical energy into substantially sinusoidal AC voltage at a secondary winding of the transformer. For example, AC power may be supplied to a utility power grid from raw electrical energy from renewable energy sources (e.g., solar cells). An inverter may construct the primary winding current waveform using two unidirectional switches. On each half cycle, one of the switches first applies energy previously recaptured from primary winding inductance, and then applies the raw energy to the transformer primary winding at the utility power grid frequency. Accordingly, the constructed primary winding current may exhibit substantially improved total harmonic distortion. | 2011-06-23 |
20110149619 | METHOD AND APPARATUS FOR VARYING CURRENT LIMIT TO LIMIT AN OUTPUT POWER OF A POWER SUPPLY - A power supply controller is disclosed. An example power supply controller includes an input voltage sense input coupled to sense an input voltage sense signal representative of an input voltage of a power supply. An output voltage sense input is coupled to sense an output voltage sense signal representative of an output voltage of the power supply. A current limit circuit is coupled to generate a current limit signal. The current limit signal is varied relative to a first ratio representative of a ratio of a product of the input voltage and a scaled output voltage of the power supply, to a sum of the input voltage and the scaled output voltage of the power supply. A drive signal generator is coupled to generate a drive signal in response to the current limit signal to drive the power switch of the power supply to limit an output power of the power supply in response to the input voltage. | 2011-06-23 |
20110149620 | Device and Method for Limiting Drain-Source Voltage of Transformer-Coupled Push Pull Power Conversion Circuit - A circuit is proposed for limiting maximum switching FET drain-source voltage (VDS) of a transformer-coupled push pull power converter with maximum DC supply voltage V | 2011-06-23 |
20110149621 | Method and device for optimizing a space vector pulse width modulation - In a method for optimizing a space vector pulse width modulation, a voltage is connected to a load, by combining discrete switching states of a plurality of switches to control the load, the load being switched to zero potential by two of the switching states. In the case the maximum degree of control is increased, during a pulse width modulation period, at least one of the switching states, that switches to zero potential, is omitted. | 2011-06-23 |
20110149622 | Interleaved Bridgeless Power Factor Corrector and Controlling Method thereof - In an interleaved bridgeless power factor corrector and a controlling method thereof, the interleaved bridgeless power factor corrector includes an AC input power supply, two input inductors, four active components, two passive components, an output capacitor, and an output resistor, wherein the four active components are cascaded in a full bridge form to act as control switches and rectifying switches having different phases; besides, the interleaved bridgeless power factor corrector is connected to a control signal processor and a control circuit, which can output complementary switch signals to control the interleaved bridgeless power factor corrector, thereby achieving output/input ripple cancellation and frequency multiplication. | 2011-06-23 |
20110149623 | ACTIVE PARASITE POWER CIRCUIT - A circuit is provided that includes a parasitic power circuit that powers a parasitic circuit. The parasitic power circuit derives a supply voltage from an external AC or other signal suitable for use as a communications signal. A PMOS transistor or transistors is utilized to enable a supply voltage capacitor to charge substantially to the same voltage as the channel voltage of the communications signal. | 2011-06-23 |
20110149624 | POWER CONVERSION APPARATUS - A power conversion apparatus includes two power conversion circuits, two direct-current inductors, and a pulse-width-modulation control circuit. One of the two power conversion circuits is connected in parallel to a direct-current load or a single-phase alternating-current load, and the other of the two power conversion circuits is connected in parallel to a three-phase alternating-current load. The two power conversion circuits are connected in reverse polarity to each other via the two direct-current inductors. The pulse-width-modulation control circuit pulse-width-modulates the two power conversion circuits, allows switching between the two power conversion circuits, and realizes a bidirectional step-up/down operation between the direct-current load or single-phase alternating-current load and the three-phase alternating-current load. | 2011-06-23 |
20110149625 | Capacitor Module, Power Converter, Vehicle-Mounted Electrical-Mechanical System - A capacitor module in which the structure of a connecting portion is highly resistant against vibration and has a low inductance. The capacitor module includes a plurality of capacitors and a laminate made up of a first wide conductor and a second wide conductor joined in a layered form with an insulation sheet interposed between the first and second wide conductors. The laminate comprises a first flat portion including the plurality of capacitors which are supported thereon and electrically connected thereto, a second flat portion continuously extending from the first flat portion while being bent, and connecting portions formed at ends of the first flat portion and the second flat portion and electrically connected to the exterior. | 2011-06-23 |
20110149626 | BIDIRECTIONAL INVERTER FOR NEW RENEWABLE ENERGY STORAGE SYSTEM - A bidirectional inverter is provided for a renewable energy storage system which may simplify the circuitry and lower manufacturing cost by reducing the numbers of switches and control signals. The bidirectional inverter includes a pulse-width-modulation (PWM) signal provider for providing a PWM signal, a push-pull inverter coupled to the PWM signal provider and a direct current (DC) link, and an offset voltage provider coupled to the push-pull inverter and the electric power system. Accordingly, the bidirectional inverter converts DC power from the DC link into AC power or AC power from the electric power system into DC power. | 2011-06-23 |
20110149627 | NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A nonvolatile memory device comprises a voltage detector for generating a detection signal when the external power supply voltage is higher than a set voltage and memory chips, each comprising a memory cell unit and a content-addressable memory (CAM) cell unit and performing internal operations in response to the detection signal. | 2011-06-23 |
20110149628 | Programming Phase Change Memories Using Ovonic Threshold Switches - A phase change memory using an ovonic threshold switch selection device may be programmed from one state to another by first turning on the ovonic threshold switch. After the voltage across the cell has fallen, the cell may then be biased to program the cell to the desired state. | 2011-06-23 |
20110149629 | Semiconductor Memory Apparatus and Method of Operating the Same - A semiconductor memory apparatus comprises first and second memory blocks each comprising semiconductor elements coupled to first and second local line groups, a first switching circuit configured to couple a first global line group to the first local line group of the first memory block in response to a block selection signal, a second switching circuit configured to couple a second global line group to the second local line groups of the first and second memory blocks in response to the block selection signal, and a third switching circuit configured to couple the first global line group to the first local line group of the second memory block in response to the block selection signal. | 2011-06-23 |
20110149630 | HIGH READ SPEED ELECTRONIC MEMORY WITH SERIAL ARRAY TRANSISTORS - Providing a serial array semiconductor architecture achieving fast program, erase and read times is disclosed herein. By way of example, a memory architecture can comprise a serial array of semiconductors coupled to a metal bitline of an electronic memory device at one end of the array, and a gate of a pass transistor at an opposite end of the array. Furthermore, a second metal bitline is coupled to a drain of the pass transistor. A sensing circuit that measures current or voltage at the second metal bitline, which is modulated by a gate potential of the pass transistor, can determine a state of transistors of the serial array. Because of low capacitance of the pass transistor, the serial array can charge or discharge the gate of the pass transistor quickly, resulting in read times that are significantly reduced as compared with conventional serial semiconductor array devices. | 2011-06-23 |
20110149631 | Rewritable Memory Device with Multi-Level, Write-Once Memory Cells - The embodiments described herein are directed to a memory device with multi-level, write-once memory cells. In one embodiment, a memory device has a memory array comprising a plurality of multi-level write-once memory cells, wherein each memory cell is programmable to one of a plurality of resistivity levels. The memory device also contains circuitry configured to select a group of memory cells from the memory array, and read a set of flag bits associated with the group of memory cells. The set of flag bits indicate a number of times the group of memory cells has been written to. The circuitry is also configured to select a threshold read level appropriate for the number of times the group of memory cells has been written to, and for each memory cell in the group, read the memory cell as an unprogrammed single-bit memory cell or as a programmed single-bit memory cell based on the selected threshold read level. | 2011-06-23 |
20110149632 | MULTILEVEL FREQUENCY ADDRESSABLE FIELD DRIVEN MRAM - A three-dimensional nonvolatile memory array device includes a plurality of memory elements and a memory controller. The plurality of memory elements each have a stack of a plurality of bits, which in turn each include a magnetic free layer, a magnetic pinned layer, and a non-magnetic layer. The magnetic free layer is configured to alternate its magnetization orientation based on a radio frequency current being at a resonant frequency of the magnetic free layer and on a magnetic field being applied to the magnetic free layer. The magnetic pinned layer has a specific magnetization orientation. The non-magnetic layer is located in between the magnetic free layer and the magnetic pinned layer. The memory controller is in communication with each of the plurality of memory elements, and configured to write data to and read data from the plurality of bits in the memory elements. | 2011-06-23 |
20110149633 | Memory devices and methods of operating the same - Memory devices and methods of operating the same. A memory cell of a memory device may include a ferroelectric layer and a semiconductor layer bonded to each other. The ferroelectric layer may be of a p-type and the semiconductor layer may be of an n-type. The memory cell may have a switching characteristic due to a depletion region that exists in a junction between the ferroelectric layer and the semiconductor layer. The memory device may be a device writing data using a polarization change of the ferroelectric layer. | 2011-06-23 |
20110149634 | Non-volatile memory device ion barrier - An ion barrier layer made from a dielectric material in contact with an electronically insulating layer is operative to prevent mobile ions transported into the electronically insulating layer from passing through the ion barrier layer and into adjacent layers during data operations on a non-volatile memory cell. A conductive oxide layer in contact with the electronically insulating layer is the source of the mobile ions. A programming data operation is operative to transport a portion of the mobile ions into the electronically insulating layer and an erase data operation is operative to transport the mobile ions back into the conductive oxide layer. When the portion is positioned in the electronically insulating layer the memory cell stores data as a programmed conductivity profile and when a substantial majority of the mobile ions are positioned in the conductive oxide layer the memory cell stores data as an erased conductivity profile. | 2011-06-23 |
20110149635 | STORAGE DEVICE AND INFORMATION RERECORDING METHOD - A storage device capable of decreasing the number of voltages necessitating control and decreasing peripheral circuit size is provided. A first pulse voltage (VBLR) is supplied from a first power source through a bit line BLR to an electrode of a variable resistive element. A second pulse voltage (VWL) for selecting a cell is supplied from a second power source through a word line WL to a control terminal of a transistor. A third pulse voltage (VBLT) is supplied from a third power source though a bit line BLT to a second input/output terminal of the transistor. At the time of rewriting information, the voltage value (VBLT) of the third power source is adjusted by an adjustment circuit. Thereby, a cell voltage and a cell current are changed (decreased or increased). | 2011-06-23 |
20110149636 | Ion barrier cap - An ion barrier layer made from a dielectric material in contact with an electronically insulating layer is operative to prevent mobile ions transported into the electronically insulating layer from passing through the ion barrier layer and into adjacent layers during data operations on a non-volatile memory cell. A conductive oxide layer in contact with the electronically insulating layer is the source of the mobile ions. A programming data operation is operative to transport a portion of the mobile ions into the electronically insulating layer and an erase data operation is operative to transport the mobile ions back into the conductive oxide layer. When the portion is positioned in the electronically insulating layer the memory cell stores data as a programmed conductivity profile and when a substantial majority of the mobile ions are positioned in the conductive oxide layer the memory cell stores data as an erased conductivity profile. | 2011-06-23 |
20110149637 | METHOD AND APPARATUS PROVIDING HIGH DENSITY CHALCOGENIDE-BASED DATA STORAGE - A data storage device and methods for storing and reading data are provided. The data storage device includes a data storage medium and second device. The data storage medium has an insulating layer, a first electrode layer over the insulating layer and at least one layer of resistance variable material over the first electrode layer. The second device includes a substrate and at least one conductive point configured to electrically contact the data storage medium. | 2011-06-23 |
20110149638 | NONVOLATILE MEMORY DEVICE AND INFORMATION RECORDING METHOD - According to one embodiment, a nonvolatile memory device includes a memory layer and a driver section. The memory layer has a first state having a first resistance under application of a first voltage, a second state having a second resistance higher than the first resistance under application of a second voltage higher than the first voltage, and a third state having a third resistance between the first resistance and the second resistance under application of a third voltage between the first voltage and the second voltage. The driver section is configured to apply at least one of the first voltage, the second voltage and the third voltage to the memory layer to record information in the memory layer. | 2011-06-23 |
20110149639 | Non-Volatile Memory Cell with Multiple Resistive Sense Elements Sharing a Common Switching Device - A non-volatile memory cell array and associated method of use. In accordance with various embodiments, the array includes a plurality of programmable resistive sense elements (RSEs) coupled to a shared switching device. The switching device has a common source region and multiple drain regions, each drain region connected to an associated RSE from said plurality of RSEs. | 2011-06-23 |
20110149640 | MAGNETIC STORAGE DEVICE - A magnetic storage device includes a plurality of MRAM memory cells connected to a data transfer line, a clamp transistor connected between the data transfer line and a reading signal line and configured to fixedly hold the potential of the data transfer line, and a reading circuit which is connected to the reading signal line and which reads the storage information of the memory cell. The reading circuit includes a hold switch connected between the reading signal line and a reading node N and configured to hold the potential of the node N, a capacitor connected between the node N and a ground end, a precharging switch connected between the node N and a power source and configured to charge the capacitor, and an inverter to which the potential of the node N is input to generate a digital signal. | 2011-06-23 |
20110149641 | Static Magnetic Field Assisted Resistive Sense Element - Apparatus and associated method for writing data to a non-volatile memory cell, such as spin-torque transfer random access memory (STRAM). In accordance with some embodiments, a resistive sense element (RSE) has a heat assist region, magnetic tunneling junction (MTJ), and pinned region. When a first logical state is written to the MTJ with a spin polarized current, the pinned and heat assist regions each have a substantially zero net magnetic moment. When a second logical state is written to the MTJ with a static magnetic field, the pinned region has a substantially zero net magnetic moment and the heat assist region has a non-zero net magnetic moment. | 2011-06-23 |
20110149642 | Static Magnetic Field Assisted Resistive Sense Element - Apparatus and associated method for writing data to a non-volatile memory cell, such as spin-torque transfer random access memory (STRAM). In accordance with some embodiments, a resistive sense element (RSE) has a heat assist region, magnetic tunneling junction (MTJ), and pinned region. When a first logical state is written to the MTJ with a spin polarized current, the pinned and heat assist regions each have a substantially zero net magnetic moment. When a second logical state is written to the MTJ with a static magnetic field, the pinned region has a substantially zero net magnetic moment and the heat assist region has a non-zero net magnetic moment. | 2011-06-23 |
20110149643 | PHASE CHANGE MEMORY APPARATUS HAVING GLOBAL BIT LINE AND METHOD FOR DRIVING THE SAME - A phase change memory apparatus includes a global bit line and an internal power generation circuit. The global bit line is configured to integratedly control a plurality of bit lines. The internal power generation circuit is configured to supply an internal voltage while the global bit line is discharged and configured to control the internal voltage after the global bit line is discharged, when a deep power down mode signal is enabled. | 2011-06-23 |
20110149644 | VOLTAGE CONTROL CIRCUIT FOR PHASE CHANGE MEMORY - The present invention relates to a voltage control circuit, semiconductor memory device, and method of controlling a voltage in a phase-change memory, wherein the voltage control circuit generates a controlled voltage which can be above the logic supply voltage. This voltage can limit the bit line voltage in a phase-change memory to allow the use of smaller transistors in the memory cells and in the program current part of the circuit. This results in smaller memory cells and modules. | 2011-06-23 |
20110149645 | MULTI-LEVEL PROGRAMMABLE PCRAM MEMORY - A series of phase change material layers sandwiched between a bottom electrode and a top electrode may have different phase change temperatures selected to provide a memory device having three or more discrete resistance levels, and thus three or more discrete logic levels. The non-volatile memory may form part of a logic device and/or a memory array device, as well as other devices and systems. The phase change material layers may be formed using physical deposition methods, chemical deposition methods, or using atomic layer deposition. Atomic layer deposition may reduce the overall device thermal exposure and provide improved layer thickness uniformity and sharp material boundaries at the interface of different phase change materials, thus providing improved resistance level accuracy. | 2011-06-23 |
20110149646 | TRANSIENT HEAT ASSISTED STTRAM CELL FOR LOWER PROGRAMMING CURRENT - A memory cell including magnetic materials and heating materials, and methods of programming the memory cell are provided. The memory cell includes a free region, a pinned region, and a heating region configured to generate and transfer heat to the free region when a programming current is directed to the cell. The heat transferred from the heating region increases the temperature of the free region, which decreases the magnetization and the critical switching current density of the free region. In some embodiments, the heating region may also provide a current path to the free region, and the magnetization of the free region may be switched according to the spin polarity of the programming current, programming the memory cell to a high resistance state or a low resistance state. | 2011-06-23 |
20110149647 | Perpendicular magnetic tunnel junctions, magnetic devices including the same and method of manufacturing a perpendicular magnetic tunnel junction - Provided are a perpendicular magnetic tunnel junction (MTJ), a magnetic device including the same, and a method of manufacturing the MTJ, the perpendicular MTJ includes a lower magnetic layer; a tunnelling layer on the lower magnetic layer; and an upper magnetic layer on the tunnelling layer. One of the upper and lower magnetic layers includes a free magnetic layer that exhibits perpendicular magnetic anisotropy, wherein the magnetizing direction of the free magnetic layer is changed by a spin polarization current. A polarization enhancing layer (PEL) and an exchange blocking layer (EBL) are stacked between the tunnelling layer and the free magnetic layer. | 2011-06-23 |
20110149648 | PROGRAMMABLE DEVICE - A programmable device including a source-drain-gate structure. The device includes two programming electrodes and an antiferromagnetic multiferroic material between the two programming electrodes for switching the spontaneous polarization between a first spontaneous polarization direction and a second spontaneous polarization direction. The programmable device further includes a ferromagnetic material, which is in immediate contact with the multiferroic material. Magnetization of the ferromagnetic material is switchable by a transition between the first switching state and the second switching state of the multiferroic material by an exchange coupling between electronic states of the multiferroic material and the ferromagnetic material. The programmable device also includes means for determining a direction of the magnetization of the ferromagnetic material. A spin valve effect is used for causing an electrical resistance between the source and the drain electrode. | 2011-06-23 |
20110149649 | Magnetic memory devices and methods of operating the same - A magnetic memory device includes: a free layer for storing information; and a reference layer disposed on a first surface of the free layer. The reference layer includes at least two magnetic domains and a magnetic domain wall between the at least two magnetic domains. The reference layer extends past both ends of the free layer. The magnetic memory device further includes a switching element connected to a second surface of the free layer. Another magnetic memory device includes: a first reference layer having a first magnetic domain wall; a second reference layer having a second magnetic domain wall; and a memory structure between the first and second reference layers. The memory structure includes: a first free layer adjacent to the first reference layer; a second free layer adjacent to the second reference layer; and a switching element between the first and second free layers. | 2011-06-23 |
20110149650 | Data Transfer Flows for On-Chip Folding - A memory system and methods of its operation are presented. The memory system includes a volatile buffer memory and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. When writing data to the non-volatile memory, the data is received from a host, stored in the buffer memory, transferred from the buffer memory to into read/write registers of the non-volatile memory circuit, and then written from the read/write registers to the first section of the non-volatile memory circuit using a binary write operation. Portions of the data and then subsequently folded from the first section of the non-volatile memory to the second section of the non-volatile memory, where a folding operation includes reading the portions of the data from multiple locations in the first section into the read/write registers and performing a multi-state programming operation of the potions of the data from the read/write registers into a location the second section of the non-volatile memory. The multi-state programming operations include a first phase and a second phase and one or more of the binary write operations are performed between the phases of the multi-state programming operations. | 2011-06-23 |
20110149651 | Non-Volatile Memory And Method With Atomic Program Sequence And Write Abort Detection - A program operation in a non-volatile memory is segmented at predefined junctures into smaller segments for execution over different times. The predefined junctures are such that they allow unambiguous identification when restarting the operation in a next segment so that the operation can continue without having to restart from the very beginning of the operation. This is accomplished by requiring the programming sequence of each segment to be atomic, that is, to only terminate at a predetermined type of programming step. In a next segment, the terminating programming step is identified by detecting a predetermined pattern of ECC errors across a group of programmed wordlines. | 2011-06-23 |
20110149652 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A semiconductor memory device comprises memory blocks having a plurality of memory cells coupled to a plurality of bit lines, a first latch group coupled to a sense node and configured to store data to be programmed into memory cells, where the memory cells are coupled to the bit lines and the sense node is coupled to at least one of the bit lines, a second latch group coupled to the sense node and configured to receive data of the first latch group, and a sense node voltage control circuit configured to control a voltage of the sense node according to data stored in the first latch group. | 2011-06-23 |
20110149653 | NAND FLASH MEMORY - A NAND flash memory, in a read operation, a p-type semiconductor substrate is set at a ground potential, a bit line is charged to a first voltage, a source line, a n-type well and a p-type well are charged to a second voltage, which lies between a ground potential and a first voltage, and in a block not selected by said row decoder, said drain-side select gate line and said source-side select gate line are charged to a third voltage, which is higher than said ground potential and is equal to or lower than said second voltage. | 2011-06-23 |
20110149654 | NAND Programming Technique - A NAND memory array is programmed applying a programming voltage Vpgm as a double pulse programming pulse if a data pattern associated with memory cells that are to be programmed form a two-sided column-stripe (CS | 2011-06-23 |
20110149655 | Non-volatile memory cell array - A non-volatile microelectronic memory that has a memory cell array, which includes memory cell string pairs that share a bitline contact, that have separate source lines, and that have at least two transistors within each memory cell string that may be programming for sharing the bitline contact. | 2011-06-23 |
20110149656 | MULTI-CELL VERTICAL MEMORY NODES - Embodiments of the invention pertain to vertical memory structures. Embodiments of the invention describe memory nodes comprising two memory cells on opposing sides of a vertical channel separating a source region and a drain region. Embodiments of the invention may utilize floating gate NAND memory cells, polysilicon diodes, MiM diodes, or MiiM diodes. Embodiments of the invention may be used to form flash memory, RRAM, Memristor RAM, Oxide Ram or OTPROM. | 2011-06-23 |
20110149657 | Methods and Apparatus for Write-Side Intercell Interference Mitigation in Flash Memories - Methods and apparatus are provided for write-side intercell interference mitigation in flash memories. A flash memory device is written by obtaining program data to be written to at least one target cell in the flash memory; obtaining one or more bits of program data for at least one aggressor cell to be programmed later than the target cell: and precompensating for intercell interference for the target cell by generating precompensated program values. The aggressor cells comprise one or more cells adjacent to the target cell, such as adjacent cells in a same wordline as the target cell and/or cells in an upper or lower adjacent wordline to the target cell. The precompensated program values for the target cell are optionally provided to the flash memory. | 2011-06-23 |
20110149658 | METHOD, APPARATUS, AND SYSTEM FOR IMPROVED READ OPERATION IN MEMORY - Various embodiments include methods, apparatus, and systems for reading an adjacent cell of a memory array in an electronic device to determine a threshold voltage value of the adjacent cell, the adjacent cell being adjacent a target cell, and reading the target cell of the memory array using a wordline voltage value based on the threshold voltage value of the adjacent cell. Additional apparatus, systems, and methods are described. | 2011-06-23 |
20110149659 | ERASE OPERATIONS AND APPARATUS FOR A MEMORY DEVICE - Erase operations and apparatus configured to perform the erase operations are suitable for non-volatile memory devices having memory cells arranged in strings. One such method includes biasing select gate control lines of a string of memory cells to a first bias potential, biasing access lines of a pair of the memory cells to a second bias potential and biasing access lines of one or more remaining memory cells to a third potential. A ramping bias potential is applied to channel regions of the string of memory cells substantially concurrently with or subsequent to biasing the select gate control lines and the access lines, and floating the select gate control lines in response to the ramping bias potential reaching a release bias potential between an initial bias potential of the ramping bias potential and a target bias potential of the ramping bias potential. | 2011-06-23 |
20110149660 | SENSING FOR MEMORY READ AND PROGRAM VERIFY OPERATIONS IN A NON-VOLATILE MEMORY DEVICE - Methods for sensing in a memory device and a memory device are disclosed. In one such sensing method, a single read operation with multiple sense amplifier circuit comparisons to a reference threshold level are performed to determine a state of a selected memory cell. A ramped voltage turns on the selected memory cell when the ramped voltage reaches the threshold voltage to which the selected memory cell is programmed. In one embodiment, the turned on memory cell discharges its respective bit line. | 2011-06-23 |
20110149661 | MEMORY ARRAY HAVING EXTENDED WRITE OPERATION - In some embodiments, an apparatus comprising a memory array of static random access memory (SRAM) cells arranged in a plurality of rows and a plurality of columns and configured to receive a clock signal having a plurality of clock cycles; a plurality of word-lines associated with the plurality of rows of the SRAM cells; and a selected word-line driver configured during an extended write operation to drive a selected one of the plurality of word-lines with a write word-line signal having an extended duration. Other embodiments may be described and claimed. | 2011-06-23 |
20110149662 | MEMORY DEVICE AND METHOD OF WRITING DATA TO A MEMORY DEVICE - A memory device includes bitlines, wordlines and a matrix of memory cells arranged in rows and columns. Each of the bitlines is electrically connected to memory cells in one of the columns. Each of the wordlines is electrically connected to memory cells in one of the rows. A bitline write voltage is applied to a first bitline. A wordline voltage is applied to a first wordline for writing data to a first memory cell connected to the first wordline and the first bitline. The first bitline and the second bitline are electrically connected for charge sharing between the first bitline and the second bitline. A predetermined time after electrically connecting the first bitline and the second bitline, the first and the second bitline are electrically disconnected and the bitline write voltage is applied to the second bitline. The wordline voltage is applied to a second wordline for writing data to a second memory cell connected to the second wordline and the second bitline. | 2011-06-23 |
20110149663 | Semiconductor device and semiconductor memory device - A semiconductor device comprises a memory cell array including memory cells, a first bit line transmitting data stored in a selected memory cells, a single-ended first sense amplifier amplifying a signal voltage of the first bit line and converting the voltage into an output current, a second bit line selectively connected to the first bit line via the first sense amplifier, a second sense amplifier determining a level of the signal voltage, and a sense amplifier control circuit detecting a temperature of the memory cell array during an operation and controlling an end of an activation period of the first and/or second sense amplifiers in accordance with a detection result of the temperature. In the semiconductor device, the sense amplifier control circuit controls to delay the end of the activation period at least at a predetermined high temperature indicated by the detection result relative to at an ordinary temperature. | 2011-06-23 |
20110149664 | WORD LINE BLOCK/SELECT CIRCUIT WITH REPAIR ADDRESS DECISION UNIT - A word line block select circuit includes a dummy repair logic unit including a dummy logic circuit to output a first control signal and having a delay path for a repair address decision, and a word line activation unit for activating a word line in response to the first control signal and an active command signal. | 2011-06-23 |
20110149665 | CIRCUIT FOR CONTROLLING REDUNDANCY IN SEMICONDUCTOR MEMORY APPARATUS - Disclosed are a circuit and a method for controlling redundancy in a semiconductor memory apparatus. The circuit includes a peripheral circuit redundancy control block and a memory bank redundancy control block. The peripheral circuit redundancy control block buffers and latches an external command to generate an internal command. The peripheral circuit redundancy control block also buffers and latches an external address to generate a global address by comparing the external address with a predetermined output signal of a fuse circuit. The memory bank redundancy control block receives the global address corresponding to the internal command to selectively activate a redundancy word line or a main word line, such that the fuse circuit is provided in the peripheral circuit redundancy control block. | 2011-06-23 |
20110149666 | BITLINE FLOATING DURING NON-ACCESS MODE FOR MEMORY ARRAYS - Techniques are disclosed that allow for power conservation in integrated circuit memories, such as SRAM. The techniques can be embodied in circuitry that allows for floating of bitlines to eliminate or otherwise reduce power leakage associated with precharging bitlines. For instance, the techniques can be embodied in a bitline floating circuit having a single logic gate for qualifying the precharge control signal with a wake signal, so that precharging of the bitline does not occur if the wake signal is not in an active state. The techniques further allow for the elimination or reduction of unnecessary power consumption by the I/O circuitry or the memory array, such as when the memory array is not being accessed or when the array or a portion thereof is permanently disabled for yield recovery. | 2011-06-23 |
20110149667 | REDUCED AREA MEMORY ARRAY BY USING SENSE AMPLIFIER AS WRITE DRIVER - Techniques are disclosed for reducing area needed for implementing a memory array, such as SRAM arrays. The techniques may be embodied, for example, in a memory array design that includes a sense amplifier configured to operate in a reading mode for readout of memory cells and a writing mode for writing to memory cells. In addition, a common column multiplexer can be used for both read and write functions (as opposed to having separate multiplexers for reading and writing). | 2011-06-23 |
20110149668 | MEMORY DEVICE AND METHOD OF OPERATION THEREOF - Memory devices and methods of operating a memory cell are disclosed in which a bitline can be grounded after charge sharing with an electrically floating ground line and before writing data to the memory cell. An electric potential of an upper power supply node of a memory cell can be lowered and an electric potential of a lower power supply node of the memory cell can be raised before writing data to the memory cell. | 2011-06-23 |
20110149669 | Sense Amplifier and Data Sensing Method Thereof - A data sensing method for sensing storage data stored in a memory cell includes the steps of: biasing a sensing node and a reference node to a first voltage in response to a first control signal; discharging the sensing node and the reference node via the memory cell and a reference memory cell, respectively; enabling a latch circuit to amplify a voltage difference between the sensing node and the reference node. | 2011-06-23 |