25th week of 2011 patent applcation highlights part 18 |
Patent application number | Title | Published |
20110147669 | Self-Composite Comprised of Nanocrystalline Diamond and a Non-Diamond Component Useful for Thermoelectric Applications - One provides nanocrystalline diamond material that comprises a plurality of substantially ordered diamond crystallites that are sized no larger than about 10 nanometers. One then disposes a non-diamond component within the nanocrystalline diamond material. By one approach this non-diamond component comprises an electrical conductor that is formed at the grain boundaries that separate the diamond crystallites from one another. The resultant nanowire is then able to exhibit a desired increase with respect to its ability to conduct electricity while also preserving the thermal conductivity behavior of the nanocrystalline diamond material. | 2011-06-23 |
20110147670 | COMPOSITE MATERIALS WITH BLEND OF THERMOPLASTIC PARTICLES - Pre-impregnated composite material (prepreg) is provided that can be cured to form composite parts that have high levels of damage tolerance. The matrix resin includes a thermoplastic particle component that is a blend of particles that have a melting point above the curing temperature and particles that have a melting point at or below the curing temperature. | 2011-06-23 |
20110147671 | SYNTHESIS OF LIFEPO4 UNDER HYDROTHERMAL CONDITIONS - The present invention relates to a process for the preparation of compounds of general Formula (I) L | 2011-06-23 |
20110147672 | THIXOTROPIC CONDUCTIVE COMPOSITION - The presence of a rheology modifier in a conductive composition of metal coated core particles improves both rheology and conductivity. In preferred embodiments the rheology modifier is selected from the group consisting of fumed silica, carbon nano-tubes, and graphite. In further embodiments the metal coated particles are silver coated glass or copper particles. | 2011-06-23 |
20110147673 | METHOD OF MANUFACTURING COMPOSITE CONDUCTING FIBRES, FIBRES OBTAINED BY THE METHOD, AND USE OF SUCH FIBRES - The invention relates to a method of manufacturing fibres made of a composite based on a thermoplastic polymer and conducting or semiconducting particles, which includes a heat treatment, said heat treatment consisting in heating the composite, by progressively raising the temperature, having the effect of improving the conducting properties of the fibres obtained or of making the initially insulating fibres conducting. The invention also relates to the conducting fibres thus obtained and in particular to polyamide fibres and carbon nanotubes. | 2011-06-23 |
20110147674 | PREPREG AND CARBON FIBER REINFORCED COMPOSITE MATERIALS - A prepreg containing a carbon fiber [A] and a thermosetting resin [B], and in addition, satisfying at least one of the following (1) and (2).
| 2011-06-23 |
20110147675 | ANTISTATIC OR ELECTRONICALLY CONDUCTIVE POLYURETHANES, AND METHOD FOR THE PRODUCTION THEREOF - The present invention relates to an antistatic or electrically conductive, thermoset polyurethane obtained by reacting A) an organic polyisocyanate; B) a compound comprising NCO-reactive groups; and C) optionally a catalyst, a blowing agent, an auxiliary, an additive, or mixtures thereof; and wherein, the polyurethane comprises a carbon nanotube present in an amount of from 0.1 to 15% by weight based on the total weight of the polyurethane. | 2011-06-23 |
20110147676 | OXIDE EVAPORATION MATERIAL AND HIGH-REFRACTIVE-INDEX TRANSPARENT FILM - An oxide evaporation material in the present invention comprises a sintered body containing indium oxide as a main component thereof and cerium with the Ce/In atomic ratio of more than 0.110 and equal to or less than 0.538, and has an L* value of 62 to 95 in the CIE 1976 color space. The oxide evaporation material with the L* value of 62 to 95 has an optimal oxygen amount. Accordingly, even when a small amount of oxygen gas is introduced into a film-formation vacuum chamber, a high-refractive-index transparent film having a refractive index of 2.15 to 2.51 at a wavelength of 550 nm, a low resistance, and a high transmittance in the visible to near-infrared region is formed by vacuum deposition methods. Since the introduced oxygen gas amount is small, the difference in composition between the film and the evaporation material is made small. | 2011-06-23 |
20110147677 | GLASS COMPOSITIONS USED IN CONDUCTORS FOR PHOTOVOLTAIC CELLS - The invention relates to zinc-containing glass compositions useful in conductive pastes for silicon semiconductor devices and photovoltaic cells. | 2011-06-23 |
20110147678 | PASTE FOR SOLAR CELL ELECTRODE AND SOLAR CELL USING THE SAME - A paste for solar cell electrodes includes conductive particles, a glass frit, an organic vehicle, and lead oxide. The lead oxide may be added in an amount of about 0.05 to about 1.5 wt % with respect to a total weight of the paste. | 2011-06-23 |
20110147679 | METHOD FOR RECOVERING OXIDE-CONTAINING BATTERY MATERIAL FROM WASTE BATTERY MATERIAL - The present invention provides a method for recovering an oxide-containing battery material from a waste battery material. The recovery method includes steps (1) and (2) in this order: (1) a step of immersing a base taken out of the waste battery material and the base having an oxide-containing battery material, in a solvent that does not substantially dissolve the oxide, and stripping the battery material from the base thereby, and (2) a step of separating the battery material from the base. | 2011-06-23 |
20110147680 | THERMOPLASTIC ELECTROCHROMIC MATERIALS - Disclosed are electrochromic materials containing a film-forming polymer with a T | 2011-06-23 |
20110147681 | Photochromic Polymer and Composition Comprising Photochromic Polymer - A photochromic polymer comprising at least one siloxane oligomer and at least two photochromic groups covalently linked to one or both terminuses of the siloxane oligomer and compositions containing photochromic siloxane polymers with narrow polydispersity. The photochromic polymer enhances switching speed in rigid host polymers. | 2011-06-23 |
20110147682 | MAGNESIUM HYDROXIDE - A method of making magnesium hydroxide may include calcining a mineral source of magnesium carbonate to form magnesium oxide, and slaking the magnesium oxide in water. When the mineral source of magnesium carbonate further includes a mineral source of calcium carbonate, the calcination may be carried out such that less than about 20 wt % calcium oxide is formed following calcining and prior to slaking in water. | 2011-06-23 |
20110147683 | PULLER WITH ADJUSTABLE HOOK HEAD - A puller with an adjustable hook head comprises a hook head including an axial rotating extension rotably disposed on one end thereof, and including a plurality of toothed engaging recesses continuously arranged around an arcuate outer periphery thereof; a plate assembly including a first plate part and a second plate part, the first and the second plate parts including two connection ends disposed on one sides thereof respectively and being folded together to form a closed cavity, and the cavity including an aperture secured therein; a controlling member received in the cavity and including a driving block fixed on a top end thereof, including a retaining projection disposed on one side thereof in response to the engaging recesses of the hook head. | 2011-06-23 |
20110147684 | TRACTION WINCH - This invention relates to a traction winch for a cable ( | 2011-06-23 |
20110147685 | LIFTING MECHANISM WITH SELF-LOCKING FUNCTION - A lifting mechanism with self-locking function, including an ascending/descending seat, a rocking member pivotally connected with the ascending/descending seat, a guide section and a prestressing section. The rocking member serves to convert a horizontal force provided by a power source into a vertical force to up and down reciprocally move the ascending/descending seat in the direction of Z-axis. The guide section includes guide members, which can be cross roller ways for guiding the ascending/descending seat to ascend/descend. The prestressing section can be adjusted to change the gaps between fixed guide rails and movable guide rails of the cross roller ways. Accordingly, the sliding friction between the fixed guide rails and the movable guide rails can be adjusted to provide auxiliary locking force for locating the ascending/descending seat. | 2011-06-23 |
20110147686 | LIFTING DEVICE - The present invention relates to a device ( | 2011-06-23 |
20110147687 | EXTENDABLE BALUSTER ASSEMBLY - There is provided an extendable baluster assembly for use with a handrail, the extendable baluster assembly comprising a baluster comprising an inner member and an outer member circumscribing a portion of the inner member in a telescopic relation, the outer member being fixable to the inner member; and a railing connector having a tubular body defining a cavity for receiving a top end of the baluster. There is also provided an extendable baluster assembly for use with a handrail, the extendable baluster assembly comprising a telescopic baluster; a ground connector adapted to be attached to a ground surface; a railing connector adapted to be attached to a handrail; and rotational joints between the baluster and the railing connector, and between the baluster and the ground connector, whereby the baluster is rotatable. | 2011-06-23 |
20110147688 | FENCE SYSTEM WITH INSECT BARRIER - A fence system including a fence post and a rail inserted into and supported by the fence post. The rail being an elongated member having a channel or U-shaped cross section defined by a web member and parallel leg members attached to the web member. The rail is inserted into an aperture located in a sidewall of the post. The aperture having a shape or configuration that is substantially the same as the cross-sectional shape of the rail. Accordingly, any gaps between the opening or aperture in the post and the rail, once the rail is inserted into the post, are minimized. | 2011-06-23 |
20110147689 | PHASE CHANGE MEMORY DEVICE CAPABLE OF REDUCING DISTURBANCE AND FABRICATION METHOD THEREOF - A phase change memory device capable of reducing disturbances between adjacent PRAM memory cells and a fabrication method are presented. The phase change memory device includes word lines, heating electrodes, an interlayer insulating layer, and a phase change lines. The word lines are formed on a semiconductor substrate and extend in parallel with a constant space. The heating electrodes are electrically connected to the plurality of word lines. The interlayer insulating layer insulates the heating electrodes. The phase change lines extend in a direction orthogonal to the word line and are electrically connected to the heating electrodes. Curves are formed on a surface of the interlayer insulating layer between the word lines such that the effective length of the phase change layer between adjacent heating electrodes is larger than the physical distance between the adjacent heating electrodes. | 2011-06-23 |
20110147690 | PHASE CHANGE MEMORY DEVICE HAVING 3 DIMENSIONAL STACK STRUCTURE AND FABRICATION METHOD THEREOF - A phase change memory device having a 3-D stack structure and a fabrication method for making the same are presented. The phase change memory device includes a semiconductor substrate, a word line structure and one or more phase change structures. The word line structure extends in one first direction on the semiconductor substrate. The one or more phase change structures extend mutually in parallel from one sidewall of the word line structure. The, the memory cell including a switching device, one side of the switching device contacted with the one sidewall of the word line structure, a heating electrode formed on the other side portion of the switching device, and a phase change pattern, one sidewall of the phase change pattern contacted with the heating electrode. | 2011-06-23 |
20110147691 | SEMICONDUCTOR MEMORY DEVICE USING VARIABLE RESISTANCE ELEMENT OR PHASE-CHANGE ELEMENT AS MEMORY DEVICE - A semiconductor memory device includes a first conductive line, a second conductive line, a cell unit, a silicon nitride film and a double-sidewall film. The first conductive line extends in a first direction. The second conductive line extends in a second direction crossing the first direction. The cell unit includes a phase-change film and a rectifier element connected in series with each other between the first conductive line and the second conductive line. The silicon nitride film is formed on a side surface of the phase-change film. The double-sidewall film includes a silicon oxide film and the silicon nitride film formed on a side surface of the rectifier element. | 2011-06-23 |
20110147692 | VARIABLE RESISTANCE MEMORY DEVICE AND METHOD OF FORMING THE SAME - Provided are a variable resistance memory device and a method of forming the same. The variable resistance memory device may include a substrate, a plurality of bottom electrodes on the substrate, and a first interlayer insulating layer including a trench formed therein. The trench exposes the bottom electrodes and extends in a first direction. The variable resistance memory device further includes a top electrode provided on the first interlayer insulating layer and extending in a second direction crossing the first direction and a plurality of variable resistance patterns provided in the trench and having sidewalls aligned with a sidewall of the top electrode. | 2011-06-23 |
20110147693 | MEMORY CELL THAT EMPLOYS A SELECTIVELY GROWN REVERSIBLE RESISTANCE-SWITCHING ELEMENT AND METHODS OF FORMING THE SAME - In some aspects, a memory cell is provided that includes (1) a steering element above a substrate; and (2) a reversible resistance-switching element coupled to the steering element, wherein the reversible resistance-switching element is selectively formed by: (a) forming a material layer on the substrate; (b) etching the material layer; and (c) oxidizing the etched material layer to form a reversible resistance-switching material. Numerous other aspects are provided. | 2011-06-23 |
20110147694 | RESISTIVE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME - A resistive memory device includes a plurality of resistive units, each resistive unit including: a lower electrode formed over a substrate; a resistive layer formed over the lower electrode; and an upper electrode formed over the resistive layer, wherein edge parts of the lower and upper electrodes, which come in contact with the resistive layer, is formed with a rounding shape. | 2011-06-23 |
20110147695 | FABRICATING CURRENT-CONFINING STRUCTURES IN PHASE CHANGE MEMORY SWITCH CELLS - In one or more embodiments, methods of fabricating current-confining stack structures in a phase change memory switch (PCMS) cell are provided. One embodiment shows a method of fabricating a PCMS cell with current in an upper chalcogenide confined in the row and column directions. In one embodiment, methods of fabricating a PCMS cell with sub-lithographic critical dimension memory chalcogenide are shown. In another embodiment, methods of fabricating a PCMS cell with sub-lithographic critical dimension middle electrode heaters are disclosed. | 2011-06-23 |
20110147696 | Resistive random access memory devices and resistive random access memory arrays having the same - A resistive random access memory (RRAM) devices and resistive random access memory (RRAM) arrays are provided, the RRAM devices include a first electrode layer, a variable resistance material layer formed of an oxide of a metallic material having a plurality of oxidation states, an intermediate electrode layer on the variable resistance material layer and formed of a conductive material having a lower reactivity with oxygen than the metallic material, and a second electrode layer on the intermediate electrode layer. The RRAM arrays include at least one of the aforementioned RRAM devices. | 2011-06-23 |
20110147697 | Isolation for nanowire devices - The present disclosure relates to the field of fabricating microelectronic devices. In at least one embodiment, the present disclosure relates to forming an isolated nanowire, wherein isolation structure adjacent the nanowire provides a substantially level surface for the formation of microelectronic structures thereon. | 2011-06-23 |
20110147698 | FIELD EMISSION DEVICE AND METHOD OF FORMING THE SAME - A field emission device is provided. The field emission device includes a first substrate including a gate electrode including gate lines respectively extending in first, second, and third direction and a cathode electrode including cathode lines respectively extending in the first, second, and third directions; a second substrate facing the first substrate and including an anode electrode; and a space between the first and second substrates. | 2011-06-23 |
20110147699 | Auger Rate Suppression in Confined Structures - The present invention is generally directed to a method of suppressing the Auger rate in confined structures, comprising replacing an abrupt confinement potential with either a smooth confinement potential or a confinement potential of a certain size found by increasing the confinement potential width until the Auger recombination rate undergoes strong oscillations and establishes a periodic minima. In addition, the present invention provides for the design of structures with high quantum efficiency. | 2011-06-23 |
20110147700 | LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE, METHOD OF MANUFACTURING LIGHT EMITTING DEVICE AND LIGHTING SYSTEM - A light emitting device may include a first conductive semiconductor layer, an active layer adjacent to the first conductive semiconductor layer and a second conductive semiconductor layer adjacent to the active layer. The active layer may include a first quantum well layer, a second quantum well layer and a barrier layer between the first quantum well layer and the second quantum well layer. The first quantum well layer may include a first plurality of sub-barrier layers and a first plurality of sub-quantum well layers, and the second quantum well layer may include a second plurality of sub-barrier layers and a second plurality of sub-quantum well layers. A bandgap of the first quantum well layer may be different than a bandgap of the second quantum well layer. | 2011-06-23 |
20110147701 | IMAGE DISPLAY DEVICE - An image display device includes a display surface constituted of a plurality of pixels, each of the pixels having a light-emitting layer, a front panel arranged at the ambient light entering side relative to the light-emitting layer, and a structure layer arranged between the light-emitting layer and the front panel. The structure layer has a structure containing particles arranged in a surrounding region and showing a refractive index distribution in a plane parallel to the display surface, each of the particles being constituted of a core and a shell forming an outer peripheral region relative to the core. The core, the shell, and the front panel and/or the surrounding region have different respective refractive indexes satisfying the requirement of N | 2011-06-23 |
20110147702 | NITRIDE BASED QUANTUM WELL LIGHT-EMITTING DEVICES HAVING IMPROVED CURRENT INJECTION EFFICIENCY - A III-nitride based device provides improved current injection efficiency by reducing thermionic carrier escape at high current density. The device includes a quantum well active layer and a pair of multi-layer barrier layers arranged symmetrically about the active layer. Each multi-layer barrier layer includes an inner layer abutting the active layer; and an outer layer abutting the inner layer. The inner barrier layer has a bandgap greater than that of the outer barrier layer. Both the inner and the outer barrier layer have bandgaps greater than that of the active layer. InGaN may be employed in the active layer, AlInN, AlInGaN or AlGaN may be employed in the inner barrier layer, and GaN may be employed in the outer barrier layer. Preferably, the inner layer is thin relative to the other layers. In one embodiment the inner barrier and active layers are 15 Å and 24 Å thick, respectively. | 2011-06-23 |
20110147703 | ABBREVIATED EPITAXIAL GROWTH MODE (AGM) METHOD FOR REDUCING COST AND IMPROVING QUALITY OF LEDs AND LASERS - The use of an abbreviated GaN growth mode on nano-patterned AGOG sapphire substrates, which utilizes a process of using 15 nm low temperature GaN buffer and bypassing etch-back and recovery processes during epitaxy, enables the growth of high-quality GaN template on nano-patterned AGOG sapphire. The GaN template grown on nano-patterned AGOG sapphire by employing abbreviated growth mode has two orders of magnitude lower threading dislocation density than that of conventional GaN template grown on planar sapphire. The use of abbreviated growth mode also leads to significant reduction in cost of the epitaxy. The growths and characteristics of InGaN quantum wells (QWs) light emitting diodes (LEDs) on both templates were compared. The InGaN QWs LEDs grown on the nano-patterned AGOG sapphire demonstrated at least a 24% enhancement of output power enhancement over that of LEDs grown on conventional GaN templates. | 2011-06-23 |
20110147704 | SEMICONDUCTOR LIGHT-EMITTING DEVICE WITH PASSIVATION LAYER - A light-emitting device and method for the fabrication thereof. The device includes a substrate, a first doped semiconductor layer situated above the substrate, a second doped semiconductor layer situated above the first doped semiconductor layer, and a multi-quantum-well (MQW) situated between the first and the second doped semiconductor layer. The device also includes a first electrode coupled to the first doped semiconductor layer and a second electrode coupled to the second doped semiconductor layer. The device further includes a first passivation layer which substantially covers the sidewalls of the first and second doped semiconductor layers, the MQW active layer, and the part of the horizontal surface of the second doped semiconductor layer which is not covered by the second electrode. The first passivation layer is formed through an oxidation technique. The device further includes a second passivation layer overlaying the first passivation layer. | 2011-06-23 |
20110147705 | SEMICONDUCTOR LIGHT-EMITTING DEVICE WITH SILICONE PROTECTIVE LAYER - One embodiment of the present invention provides a semiconductor light-emitting device which includes: a substrate, a first doped semiconductor layer situated above the substrate, a second doped semiconductor layer situated above the first doped semiconductor layer, a multi-quantum-well (MQW) active layer situated between the first and the second doped semiconductor layers. The device further includes a first electrode coupled to the first doped semiconductor layer, a second electrode coupled to the second doped semiconductor layer, and a silicone protective layer which substantially covers the sidewalls of the first and second doped semiconductor layers, the MQW active layer, and part of the horizontal surface of the second doped semiconductor layer which is not covered by the second electrode. | 2011-06-23 |
20110147706 | TECHNIQUES AND CONFIGURATIONS TO IMPART STRAIN TO INTEGRATED CIRCUIT DEVICES - Embodiments of the present disclosure describe techniques and configurations to impart strain to integrated circuit devices such as horizontal field effect transistors. An integrated circuit device includes a semiconductor substrate, a first barrier layer coupled with the semiconductor substrate, a quantum well channel coupled to the first barrier layer, the quantum well channel comprising a first material having a first lattice constant, and a source structure coupled to the quantum well channel, the source structure comprising a second material having a second lattice constant, wherein the second lattice constant is different than the first lattice constant to impart a strain on the quantum well channel. Other embodiments may be described and/or claimed. | 2011-06-23 |
20110147707 | DETECTION DEVICE, PHOTODIODE ARRAY, AND METHOD FOR MANUFACTURING THE SAME - The present invention provides an image pickup device used to capture an image of an object by receiving light in a near infrared region reflected from the object. The image pickup device includes semiconductor light-receiving elements each having a light-receiving layer with a band gap wavelength of 1.65 to 3.0 μm. | 2011-06-23 |
20110147708 | INCREASING CARRIER INJECTION VELOCITY FOR INTEGRATED CIRCUIT DEVICES - Embodiments of the present disclosure describe structures and techniques to increase carrier injection velocity for integrated circuit devices. An integrated circuit device includes a semiconductor substrate, a first barrier film coupled with the semiconductor substrate, a quantum well channel coupled to the first barrier film, the quantum well channel comprising a first material having a first bandgap energy, and a source structure coupled to launch mobile charge carriers into the quantum well channel, the source structure comprising a second material having a second bandgap energy, wherein the second bandgap energy is greater than the first bandgap energy. Other embodiments may be described and/or claimed. | 2011-06-23 |
20110147709 | SIGNAL CONTROL ELEMENTS IN FERROMAGNETIC LOGIC - A chain of field coupled nanomagnets includes at least one elements having substantially different anisotropy energy from that of the other nanomagnets. A signal can propagate from a first input nanomagnet having a relatively high anisotropy energy through the chain to an output nanomagnet. The output nanomagnet may have a relatively lower anisotropy energy than the other nanomagnets. Signal flow direction thus can be controlled. The higher anisotropy energy nanomagnet may be attained by use of a ferromagnet material having a higher anisotropy constant and/or configured with a larger volume than the other elements. The lower anisotropy energy magnet may be attained by use of a ferromagnet material having a lower anisotropy constant and/or configured with a smaller volume than the other elements. Logic signal flow control can also be attained making use of three dimensional geometries of nanomagnets with two different orientations. | 2011-06-23 |
20110147710 | DUAL LAYER GATE DIELECTRICS FOR NON-SILICON SEMICONDUCTOR DEVICES - Non-silicon metal-insulator-semiconductor (MIS) devices and methods of forming the same. The non-silicon MIS device includes a gate dielectric stack which comprises at least two layers of non-native oxide or nitride material. The first material layer of the gate dielectric forms an interface with the non-silicon semiconductor surface and has a lower dielectric constant than a second material layer of the gate dielectric. In an embodiment, a dual layer including a first metal silicate layer and a second oxide layer provides both a good quality oxide-semiconductor interface and a high effective gate dielectric constant. | 2011-06-23 |
20110147711 | NON-PLANAR GERMANIUM QUANTUM WELL DEVICES - Techniques are disclosed for forming a non-planar germanium quantum well structure. In particular, the quantum well structure can be implemented with group IV or III-V semiconductor materials and includes a germanium fin structure. In one example case, a non-planar quantum well device is provided, which includes a quantum well structure having a substrate (e.g. SiGe or GaAs buffer on silicon), a IV or III-V material barrier layer (e.g., SiGe or GaAs or AlGaAs), a doping layer (e.g., delta/modulation doped), and an undoped germanium quantum well layer. An undoped germanium fin structure is formed in the quantum well structure, and a top barrier layer deposited over the fin structure. A gate metal can be deposited across the fin structure. Drain/source regions can be formed at respective ends of the fin structure. | 2011-06-23 |
20110147712 | QUANTUM WELL TRANSISTORS WITH REMOTE COUNTER DOPING - A quantum well device and a method for manufacturing the same are disclosed. In an embodiment, a quantum well structure comprises a quantum well region overlying a substrate and a remote counter doping comprising dopants of conductivity opposite to the conductivity of the charge carriers of the quantum well region. The remote counter doping is incorporated in a vicinity of the quantum well region for exchange mobile carriers with the quantum well channel, reducing the off-state leakage current. In another embodiment, a quantum well device comprises a quantum well structure including a remote counter doping, a gate region overlying a portion of the quantum well structure, and a source and drain region adjacent to the gate region. The quantum well device can also comprise a remote delta doping comprising dopants of the same conductivity as the quantum well channel. | 2011-06-23 |
20110147713 | TECHNIQUES FOR FORMING CONTACTS TO QUANTUM WELL TRANSISTORS - Techniques are disclosed for providing a low resistance self-aligned contacts to devices formed in a semiconductor heterostructure. The techniques can be used, for example, for forming contacts to the gate, source and drain regions of a quantum well transistor fabricated in III-V and SiGe/Ge material systems. Unlike conventional contact process flows which result in a relatively large space between the source/drain contacts to gate, the resulting source and drain contacts provided by the techniques described herein are self-aligned, in that each contact is aligned to the gate electrode and isolated therefrom via spacer material. | 2011-06-23 |
20110147714 | FIELD-EFFECT TRANSISTOR AND SENSOR BASED ON THE SAME - A field-effect transistor has at least one electrode disposed independently of source and drain electrodes and in direct contact with the surface of a semiconductor channel to form a schottky barrier, so that it is possible to easily control the schottky barrier. | 2011-06-23 |
20110147715 | Medium Scale Carbon Nanotube Thin Film Integrated Circuits on Flexible Plastic Substrates - The present invention provides device components geometries and fabrication strategies for enhancing the electronic performance of electronic devices based on thin films of randomly oriented or partially aligned semiconducting nanotubes. In certain aspects, devices and methods of the present invention incorporate a patterned layer of randomly oriented or partially aligned carbon nanotubes, such as one or more interconnected SWNT networks, providing a semiconductor channel exhibiting improved electronic properties relative to conventional nanotubes-based electronic systems. | 2011-06-23 |
20110147716 | OLED WITH HIGH EFFICIENCY BLUE LIGHT-EMITTING LAYER - The invention provides an OLED device comprising an anode, a cathode and a light-emitting layer located therebetween, said light-emitting layer comprising an anthracene host and a styrylamine blue light-emitting compound; and, located between the said light-emitting layer and the cathode, a first electron-transporting layer that is greater than 0.5 nm and less than 5 nm thick; and a second electron-transporting layer consisting essentially of an anthracene located between the first electron-transporting layer and the cathode. The first electron-transporting layer includes a compound with a less negative LUMO level than the anthracene in the second electron-transporting layer. Devices of the invention provide improvement in features such as efficiency. | 2011-06-23 |
20110147717 | DEUTERATED COMPOUNDS FOR LUMINESCENT APPLICATIONS - This invention relates to deuterated compounds that are useful in electroluminescent applications. It also relates to electronic devices in which the active layer includes such a deuterated compound. | 2011-06-23 |
20110147718 | ELECTROACTIVE COMPOSITION AND ELECTRONIC DEVICE MADE WITH THE COMPOSITION - There is provided an electroactive composition including: a deuterated first host material and an electroluminescent dopant material. The first host is a compound having Formula I: | 2011-06-23 |
20110147719 | ELECTRICALLY CONDUCTIVE POLYMER COMPOSITIONS - The present invention relates to electrically conductive compositions, and their use in electronic devices. The composition includes either (1) a deuterated electrically conductive polymer doped with a highly-fluorinated acid polymer; or (2) (a) a deuterated electrically conductive polymer doped with a non-fluorinated polymeric acid and (b) at least one highly-fluorinated acid polymer. | 2011-06-23 |
20110147720 | Novel Quinoxaline Derivatives and Their Use in Organic Light-Emitting Diode Device - The present invention relates to novel quinoxaline derivatives and their use in an organic light-emitting diode device. The quinoxaline derivative is of luminescence and rigidity, can increase glass transition temperature (Tg) and has better thermal stability, and thus can be used as a hole transporting layer, a host or guest of an emitting layer or an electron transporting layer of an organic light-emitting diode device. | 2011-06-23 |
20110147721 | POLARIZING FILM FOR DISPLAY DEVICE AND ORGANIC LIGHT EMITTING DIODE (OLED) DISPLAY DEVICE INCLUDING THE SAME - A polarizing film includes an anti-glare layer that has a haze of 10 to 50%. An OLED display device includes a display panel including a device substrate on which one or more OLEDs are formed, and a polarizing film disposed at a viewing surface of the display panel. The polarizing film includes an anti-glare layer having a haze of 10 to 50%. | 2011-06-23 |
20110147722 | SEMICONDUCTOR LIGHT EMITTING DEVICE COMPRISING HIGH PERFORMANCE RESINS - A semiconductor light emitting device comprising curable polyorganosiloxane compositions is provided where the compositions contain a 13 | 2011-06-23 |
20110147723 | ENHANCED E-FIELD SENSING USING NEGATIVE CAPACITANCE FET SUBTHRESHOLD SLOPE ENHANCEMENT - In certain embodiments, a field effect transistor (FET) can include a substrate, a source electrode, a drain electrode, a ferroelectric material layer, a first gate electrode, and a second gate electrode to maintain an optimal polarization state of the ferroelectric material layer. In other embodiments, a FET can include a film, first and second gates on the film, a ferroelectric material layer covering the film and gates, an insulating layer substantially covering the ferroelectric material layer, a source and a drain on the insulating layer, and a pentacene layer. | 2011-06-23 |
20110147724 | ORGANIC THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - There is provided an organic thin film transistor and a method of manufacturing the same. The organic thin film transistor includes: an insulating substrate on which a plurality of barrier ribs and a plurality of grooves partitioned by the barrier ribs are formed; source and drain electrodes each formed on the grooves spaced apart from each other among the plurality of grooves; a gate electrode formed on the groove between the source and drain electrodes; an opening formed by etching the barrier ribs between the source electrode and the gate electrode and between the gate electrode and the drain electrode; a gate insulating film formed on the opening; and an organic semiconductor layer formed on the gate insulating film. The organic thin film transistor is capable of mass production and has excellent electrical characteristics. | 2011-06-23 |
20110147725 | SULFONATED POLYTHIOPHENES COMPRISING FUSED RING REPEAT UNITS - A sulfonated polymer comprising a 3-substituted fused thienothiophene repeat unit, a composition comprising the polymer, a method of making the polymer, and a device comprising the polymer. The polymers can be used in hole injection or hole transport layers, or other applications in organic electronic devices. | 2011-06-23 |
20110147726 | ORGANIC THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING THE SAME, DISPLAY MEMBER USING THE ORGANIC THIN FILM TRANSISTOR, AND DISPLAY - An object of the present invention is to provide an organic thin film transistor a gate insulating film of which can be formed at a low temperature. The organic thin film transistor of the present invention includes a source electrode, a drain electrode, an organic semiconductor layer which becomes a current path between the source electrode and the drain electrode, a gate electrode which controls an electric current passing through the current path, and an insulating layer which insulates the organic semiconductor layer from the gate electrode, wherein the insulating layer is formed of a cured substance of a composition containing a first compound having, in the molecule, two or more groups that produce a functional group which reacts with an active hydrogen group by electromagnetic radiations or heat, and a second compound having two or more active hydrogen groups in the molecule, where at least one of the first compound and the second compound is a polymer compound. | 2011-06-23 |
20110147727 | OLEDS DOPED WITH PHOSPHORESCENT COMPOUNDS - Organic light emitting devices are disclosed which are comprised of a heterostructure for producing electroluminescence wherein the heterostructure is comprised of an emissive layer containing a phosphorescent dopant compound. For example, the phosphorescent dopant compound may be comprised of platinum octaethylporphine (PtOEP), which is a compound having the chemical structure with the formula: | 2011-06-23 |
20110147728 | SPIROFLUORENE DERIVATIVE, MATERIAL FOR LIGHT-EMITTING ELEMENT, LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, AND ELECTRONIC DEVICE - It is an object of the present invention to provide a material having a high Tg and a wide energy gap. The present invention provides a spirofluorene derivative represented by General Formula 1. (In the formula, R | 2011-06-23 |
20110147729 | Stilbene Derivatives, Light-Emitting Element and Light-Emitting Device - The present invention provides a novel substance having an excellent color purity of blue, a light-emitting element and a light-emitting device using the novel substance. A stilbene derivative has a structure shown by the general formula (1). In the general formula (1), R | 2011-06-23 |
20110147730 | CARBAZOLE DERIVATIVE, AND LIGHT EMITTING ELEMENT AND LIGHT EMITTING DEVICE USING THE CARBAZOLE DERIVATIVE - It is an object of the present invention to provide a material which is excellent in a hole injecting property and a hole transporting property, and to provide a light emitting element and a light emitting device using a material which is excellent in a hole injecting property and a hole transporting property. The present invention provides a carbazole derivative represented by a general formula (1). The carbazole derivative according to the present invention is excellent in the hole injecting property. By using the carbazole derivative according to the present invention as a hole injecting material for a hole injecting layer of a light emitting element, a driving voltage can be reduced. In addition, a lower driving voltage, improvement of the luminous efficiency, a longer life time, and higher reliability can be realized by applying the material to a light emitting element or a light emitting device. | 2011-06-23 |
20110147731 | CONDENSED RING AROMATIC COMPOUND FOR ORGANIC LIGHT-EMITTING DEVICE AND ORGANIC LIGHT-EMITTING DEVICE HAVING THE SAME - Provided are a condensed ring aromatic compound for an organic light-emitting device, and an organic light-emitting device having optical output with high efficiency and high luminescence and having durability. An organic light-emitting device including an anode and a cathode, and a layer made of an organic compound interposed between the anode and the cathode, wherein at least one layer of the layers made of the organic compound contains a condensed ring aromatic compound shown in the following general formula [1]: | 2011-06-23 |
20110147732 | BENZOFLUORANTHENE DERIVATIVE AND ORGANIC ELECTROLUMINESCENCE ELEMENT COMPRISING SAME - A benzofluoranthene derivative represented by the following formula (1): | 2011-06-23 |
20110147733 | SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device structure on a substrate and a manufacture method thereof is provided. The semiconductor device structure includes an oxide semiconductor transistor and a passivation layer containing free hydrogen. The semiconductor device structure is formed by following steps. A gate electrode is formed on the substrate. A gate dielectric layer covers the gate electrode. A source electrode is formed on the gate dielectric layer. A drain electrode is formed on the gate dielectric layer and separated from the source electrode and thereby forming a channel distance. An oxide semiconductor layer is formed on the gate dielectric layer, the source electrode and the drain electrode and between the source electrode and the drain electrode. The oxide semiconductor layer is further electrically connected with the source electrode and the drain electrode. A passivation layer covers the oxide semiconductor layer, the source electrode and the drain electrode. The passivation layer has a groove formed therein, and the groove surrounds the oxide semiconductor layer. | 2011-06-23 |
20110147734 | Transistor, method of manufacturing transistor, and electronic device including transistor - Provided are a transistor, a method of manufacturing the transistor, and an electronic device including the transistor. The transistor may include a gate insulator of which at least one surface is treated with plasma. The surface of the gate insulator may be an interface that contacts a channel layer. The interface may be treated with plasma by using a fluorine (F)-containing gas, and thus may include fluorine (F). The interface treated with plasma may suppress the characteristic variations of the transistor due to light. | 2011-06-23 |
20110147735 | THIN FILM TRANSISTOR AND METHOD OF FORMING THE SAME - Provided are a thin film transistor and a method of forming the same. The thin film transistor includes: a substrate; a source electrode and a drain electrode on the substrate; an oxide active layer between the source electrode and the drain electrode; a gate electrode on one side of the oxide active layer; a gate dielectric layer between the gate electrode and the oxide active layer; and a buffer layer between the gate dielectric layer and the oxide active layer. | 2011-06-23 |
20110147736 | SEMICONDUCTOR DEVICE, MEASUREMENT APPARATUS, AND MEASUREMENT METHOD OF RELATIVE PERMITTIVITY - The field of an oxide semiconductor has been attracted attention in recent years. Therefore, the correlation between electric characteristics of a transistor including an oxide semiconductor layer and physical properties of the oxide semiconductor layer has not been clear yet. Thus, a first object is to improve electric characteristics of the transistor by control of physical properties of the oxide semiconductor layer. A semiconductor device including at least a gate electrode, an oxide semiconductor layer, and a gate insulating layer sandwiched between the gate electrode and the oxide semiconductor layer, where the oxide semiconductor layer has the relative permittivity of equal to or higher than 13 (or equal to or higher than 14), is provided. | 2011-06-23 |
20110147737 | SEMICONDUCTOR DEVICE - A first transistor including a channel formation region, a first gate insulating layer, a first gate electrode, and a first source electrode and a first drain electrode; a second transistor including an oxide semiconductor layer, a second source electrode and a second drain electrode, a second gate insulating layer, and a second gate electrode; and a capacitor including one of the second source electrode and the second drain electrode, the second gate insulating layer, and an electrode provided to overlap with one of the second source electrode and the second drain electrode over the second gate insulating layer are provided. The first gate electrode and one of the second source electrode and the second drain electrode are electrically connected to each other. | 2011-06-23 |
20110147738 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A transistor including an oxide semiconductor, which has good on-state characteristics, and a high-performance semiconductor device including a transistor capable of high-speed response and high-speed operation. In the transistor including an oxide semiconductor, oxygen-defect-inducing factors are introduced (added) into an oxide semiconductor layer, whereby the resistance of a source and drain regions are selectively reduced. Oxygen-defect-inducing factors are introduced into the oxide semiconductor layer, whereby oxygen defects serving as donors can be effectively formed in the oxide semiconductor layer. The introduced oxygen-defect-inducing factors are one or more selected from titanium, tungsten, and molybdenum, and are introduced by an ion implantation method. | 2011-06-23 |
20110147739 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A single-component oxide semiconductor layer is formed over a substrate; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a single-component oxide semiconductor layer including single crystal regions is formed; and a multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions. | 2011-06-23 |
20110147740 | DISPLAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME - The present invention discloses a thin film transistor (TFT), a method for manufacturing the TFT, and a display substrate using the TFT that may prevent degradation of the characteristics of an oxide semiconductor contained in the TFT by blocking external light from entering a channel region of the oxide semiconductor. The TFT comprises an oxide semiconductor layer; a protective layer disposed on the oxide semiconductor layer and overlapping a channel region of the oxide semiconductor layer; an opaque layer disposed between the oxide semiconductor layer and the protective layer; a source electrode contacting a first side of the oxide semiconductor layer; a drain electrode contacting a second side of the oxide semiconductor layer and facing the source electrode with the channel region disposed between the drain electrode and the source electrode; a gate electrode to apply an electric field to the oxide semiconductor layer; and a gate insulating layer disposed between the gate electrode and the oxide semiconductor layer. | 2011-06-23 |
20110147741 | X-RAY DETECTOR - An X-ray detector constructed as an exemplary embodiment of the present invention includes a semiconductor layer, a data line including a source electrode covering a first portion of the semiconductor layer, a drain electrode disposed opposite to the source electrode, a first lower electrode formed on the upper portion of a second portion of the semiconductor layer and a gate insulating layer and elongated from the drain electrode, and a passivation layer formed on the upper portion of one part of the lower electrode including the drain electrode. Further, the second lower electrode is formed approaching the gate electrode. The X-ray detector constructed as the exemplary embodiment of the present invention includes a second lower electrode formed on the passivation layer and placed approaching a gate electrode. The area in which a diode is disposed may be maximized, and the amount of leakage current may be reduced. | 2011-06-23 |
20110147742 | Thin Film Field Effect Transistor with Dual Semiconductor Layers - A thin film field effect transistor is disclosed which provides improved time-based channel stability. The field effect transistor includes first and second disordered semiconductor layers separated by an insulator. In an embodiment a carrier injection terminal is provided in a thin semiconductor layer closest to the gate terminal. An electric field is established in the thin semiconductor layer. At sufficient field strength, the electric field extends into the second semiconductor layer, which is in contact with the source and drain terminals. At sufficient field strength a channel is established in the second semiconductor layer, permitting current to flow between source and drain terminals. Above a certain gate voltage, there is sufficient free charge is induced in the first semiconductor layer so that the field does not extend into the second semiconductor, effectively shutting off current between source and drain. Single-device transition detection (as well as other applications) may be obtained. | 2011-06-23 |
20110147743 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD FOR FABRICATING THE SAME - The present invention relates to a thin film transistor substrate and a method for fabricating the same, which can shorten a process time, prevent a scratch from taking place at an alignment film, and increase black luminance. The thin film transistor substrate includes a thin film transistor formed on a substrate, a protective film formed to flatten a step of the thin film transistor and have an uneven surface with repetitive projected patterns and recessed patterns, a pixel electrode formed on the protective film to maintain an uneven shape of the protective film, and an alignment film formed both on the protective film and the pixel electrode to maintain the uneven shapes of the protective film and the pixel electrode. | 2011-06-23 |
20110147744 | THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME - An object is to increase the on-state current of a thin film transistor. A solution is to provide a projection in a back-channel portion of the thin film transistor. The projection is provided so as to be off a tangent in the back-channel portion between a source or a drain and a channel formation region. With the projection, a portion where electric charge is trapped and a path of the on-state current can be apart from each other, so that the on-state current can be increased. The shape of a side surface of the back-channel portion may be curved, or may be represented as straight lines in a cross section. Further, a method for forming such a shape by performing one etching step is provided. | 2011-06-23 |
20110147745 | THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF - An embodiment is a thin film transistor which includes a gate electrode layer, a gate insulating layer provided so as to cover the gate electrode layer; a first semiconductor layer entirely overlapped with the gate electrode layer; a second semiconductor layer provided over and in contact with the first semiconductor layer and having a lower carrier mobility than the first semiconductor layer; an impurity semiconductor layer provided in contact with the second semiconductor layer; a sidewall insulating layer provided so as to cover at least a sidewall of the first semiconductor layer; and a source and drain electrode layers provided in contact with at least the impurity semiconductor layer. The second semiconductor layer may consist of parts which are apart from each other over the first semiconductor layer. | 2011-06-23 |
20110147746 | TOUCH SCREEN SUBSTRATE, METHOD OF MANUFACTURING THE SAME, AND DISPLAY PANEL INCLUDING THE TOUCH SCREEN SUBSTRATE - A touch screen substrate includes a base substrate, a first switching element and a first sensing element which senses infrared light. The first switching element includes a first switching gate electrode, a first active pattern disposed on the first switching gate electrode, a first switching source electrode disposed on the first active pattern and a first switching drain electrode disposed apart from the first switching source electrode. The first sensing element includes a first sensing drain electrode connected to the first switching source electrode, a first sensing source electrode disposed apart from the first sensing drain electrode, a second active pattern disposed below the first sensing drain electrode and the first sensing source electrode and including a first amorphous layer, a doped amorphous layer and a second amorphous layer, and a first sensing gate electrode disposed on the first sensing drain electrode and the first sensing source electrode. | 2011-06-23 |
20110147747 | Display Device and Method of Manufacturing the Same - A display device includes a flexible panel and a cover member. The flexible panel includes a first substrate and a second substrate. The first substrate includes a first support layer in which an organic insulation layer and an inorganic insulation layer are stacked thereon, and a thin-film transistor and a pixel electrode disposed on the first support layer. The second substrate is opposite to the first substrate. The second substrate includes an organic insulation layer and a second support layer on which the inorganic insulation layer is deposited. The cover member covers an outer surface of the flexible panel. Thus, a display device is manufactured by using a support layer on which an organic insulation layer and an inorganic insulation layer are coated as a base substrate, so that defects generated in a manufacturing process may be prevented. | 2011-06-23 |
20110147748 | DISPLAY DEVICE AND MANUFACTURING METHOD OF THE SAME - A display device and a fabricating method of the same are disclosed. The display device includes a first substrate comprising a display region defined in a center thereof and a non-display region defined in an outer area thereof, the display region comprising a thin film layer transistor array and the non-display region comprising a pad electrode; an IC substrate opposed to a predetermined area of the non-display region; a circuit pad electrode formed on the IC substrate; a step pattern formed on the circuit pad electrode, the step pattern made of an organic dielectric layer; a circuit pad contact hole formed in the step pattern the to partially expose the circuit pad electrode; a transparent circuit pad electrode formed on the step pattern including the circuit pad contact hole; and a conductive adhesive formed between the first substrate and the IC substrate, the conductive adhesive comprising conductive balls to electrically connect the transparent circuit pad electrode and the pad electrode with each other. | 2011-06-23 |
20110147749 | TRANSFLECTIVE LIQUID CRYSTAL DISPLAY PANEL AND MANUFACTURING METHOD THEREOF - A method for manufacturing a transflective liquid crystal display panel includes providing an array substrate having a plurality of pixel regions, each of the pixel regions includes a device region, a transmission region and a reflection region defined therein; forming a first metal layer on the array substrate; patterning the first metal layer to simultaneously form a gate electrode in the device region and a plurality of metal bumps in the reflection region; forming a first insulating layer having a rough surface and covering the gate electrode and the metal bumps on the array substrate; forming a patterned semiconductor layer on the gate electrode; forming a reflective layer covering the first insulating layer and having a rough surface in the reflection region; and sequentially forming a patterned second insulating layer and a transparent pixel electrode on the array substrate. | 2011-06-23 |
20110147750 | DISPLAY DEVICE - A resin material having a small relative dielectric constant is used as a layer insulation film | 2011-06-23 |
20110147751 | DISPLAY PANEL SUBSTRATE, DISPLAY PANEL, METHOD FOR MANUFACTURING DISPLAY PANEL SUBSTRATE, AND METHOD FOR MANUFACTURING DISPLAY PANEL - A display panel substrate in which the width of a trace can be reduced without impairing a signal transfer capability of the trace. A display panel substrate ( | 2011-06-23 |
20110147752 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A means of forming unevenness for preventing specular reflection of a pixel electrode, without increasing the number of process steps, is provided. In a method of manufacturing a reflecting type liquid crystal display device, the formation of unevenness (having a radius of curvature r in a convex portion) in the surface of a pixel electrode is performed by the same photomask as that used for forming a channel etch type TFT, in which the convex portion is formed in order to provide unevenness to the surface of the pixel electrode and give light scattering characteristics. | 2011-06-23 |
20110147753 | DISPLAY DEVICE, COPPER ALLOY FILM FOR USE THEREIN, AND COPPER ALLOY SPUTTERING TARGET - Disclosed is a Cu alloy film for a display device that has high adhesion to a glass substrate while maintaining a low electric resistance characteristic of Cu-based materials. The Cu alloy film is wiring in direct contact with a glass substrate on a board and contains 0.1 to 10.0 atomic % in total of one or more elements selected from the group consisting of Ti, Al, and Mg. Also disclosed is a display device comprising a thin-film transistor that comprises the Cu alloy film. In a preferred embodiment of the display device, the thin-film transistor has a bottom gate-type structure, and a gate electrode and scanning lines in the thin-film transistor comprise the Cu alloy film and are in direct contact with the glass substrate. | 2011-06-23 |
20110147754 | THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF - Disclosed is a thin film transistor including: a gate insulating layer covering a gate electrode; a microcrystalline semiconductor region over the gate insulating layer; a pair of amorphous semiconductor region over the microcrystalline semiconductor; a pair of impurity semiconductor layers over the amorphous semiconductor regions; and wirings over the impurity semiconductor layers. The microcrystalline semiconductor region has a surface having a projection and depression on the gate insulating layer side. The microcrystalline semiconductor region includes a first microcrystalline semiconductor region which is not covered with the amorphous regions and a second microcrystalline semiconductor region which is in contact with the amorphous semiconductor regions. A thickness d | 2011-06-23 |
20110147755 | THIN FILM TRANSISTOR - A thin film transistor having favorable electric characteristics with high productively is provided. The thin film transistor includes a gate insulating layer covering a gate electrode, a semiconductor layer in contact with the gate insulating layer, an impurity semiconductor layer which is in contact with part of the semiconductor layer and functions as a source region and a drain region, and a wiring in contact with the impurity semiconductor layer. The semiconductor layer includes a microcrystalline semiconductor region having a concave-convex shape, which is formed on the gate insulating layer side, and an amorphous semiconductor region in contact with the microcrystalline semiconductor region. A barrier region is provided between the semiconductor layer and the wiring. | 2011-06-23 |
20110147756 | SEMICONDUCTOR DEVICE - A semiconductor device | 2011-06-23 |
20110147757 | ARRAY SUBSTRATE OF DISPLAY DEVICE - An array substrate of a display device, the array substrate: a substrate having a first region and a second region spaced apart from the first region; a blocking layer located on the substrate; a first electrode located on the blocking layer in the second region; an insulating film located on the blocking layer to cover the first electrode; a second electrode located on the insulating film to overlap the first electrode; and a third electrode overlapping the first electrode between the substrate and the blocking layer. Accordingly, it is possible to reduce an area that is occupied by a storage capacitor in a pixel region and to achieve high luminance by increasing the aperture ratio, by providing a structure and method of increasing a storage capacitance of the same area. | 2011-06-23 |
20110147758 | ACTIVE MATRIX LIQUID CRYSTAL DISPLAY DEVICE - An conductive coating serves as a light shield film and is kept at a give voltage. A metal interconnection is located in the same layer as a source line and connected to the drain of a thin-film transistor. An interlayer insulating film is constituted of at least lower and upper insulating layers and formed between the conductive coating and the source line. According to one aspect of the invention, an auxiliary capacitor is formed by the metal interconnection and the conductive coating serving as both electrodes and at least the lower insulating layer film serving as a dielectric. The auxiliary capacitor is formed in a region of the interlayer insulating film in which the upper insulating layer has been removed by etching. According to another aspect of the invention, the conductive coating has a portion that is in contact with the lower insulating layer in a region where the conductive coating coextends with the metal interconnection. | 2011-06-23 |
20110147759 | GROUP III NITRIDE SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD OF THE SAME - A Group III nitride semiconductor substrate is provided, with diameter of 25 mm or more and thickness of 250 μm or more, wherein in at least an outer edge side part of an outer edge part within 5 mm from an outer edge of the group III nitride semiconductor substrate, stress within a main surface of the group III nitride semiconductor substrate works as a tensile stress, with the tensile stress becoming relatively greater compared to that of a center side part from the outer edge side part of the group III nitride semiconductor substrate. | 2011-06-23 |
20110147760 | Semiconductor apparatus with thin semiconductor film - A semiconductor apparatus includes a substrate having at least one terminal, a thin semiconductor film including at least one semiconductor device, the thin semiconductor film being disposed and bonded on the substrate; and an individual interconnecting line formed as a thin conductive film extending from the semiconductor device in the thin semiconductor film to the terminal in the substrate, electrically connecting the semiconductor device to the terminal. Compared with conventional semiconductor apparatus, the invented apparatus is smaller and has a reduced material cost. | 2011-06-23 |
20110147761 | TWO-TERMINAL SWITCHING DEVICES AND THEIR METHODS OF FABRICATION - Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points. | 2011-06-23 |
20110147762 | Integrated Nitride and Silicon Carbide-Based Devices - Monolithic electronic devices are providing including a high bandgap layer. A first type of nitride device is provided on a first portion of the high bandgap layer, the first nitride device including first and second implanted regions respectively defining source and drain regions of the first type of nitride device. A second type of nitride device, different from the first type of nitride device, is provided on a second portion of the high bandgap layer, the second type of nitride device including an implanted highly conductive region. At least a portion of the implanted highly conductive region of the second type of nitride device is coplanar with at least a portion of both the first and second implanted regions of the first type of nitride device. | 2011-06-23 |
20110147763 | GROUP III NITRIDE SEMICONDUCTOR MULTILAYER STRUCTURE AND PRODUCTION METHOD THEREOF - According to the present invention, an AlN crystal film seed layer having high crystallinity is combined with selective/lateral growth, whereby a Group III nitride semiconductor multilayer structure more enhanced in crystallinity can be obtained. The Group III nitride semiconductor multilayer structure of the present invention is a Group III nitride semiconductor multilayer structure where an AlN crystal film having a crystal grain boundary interval of 200 nm or more is formed as a seed layer on a C-plane sapphire substrate surface by a sputtering method and an underlying layer, an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer, each composed of a Group III nitride semiconductor, are further stacked, wherein regions in which the seed layer is present and is absent are formed on the C-plane sapphire substrate surface and/or regions capable of epitaxial growth and incapable of epitaxial growth are formed in the underlying layer. | 2011-06-23 |
20110147764 | TRANSISTORS WITH A DIELECTRIC CHANNEL DEPLETION LAYER AND RELATED FABRICATION METHODS - A metal-insulator-semiconductor field-effect transistor (MISFET) includes a semiconductor layer with source and drain regions of a first conductivity type spaced apart therein. A channel region of a first conductivity type extends between the source and drain regions. A gate contact is on the channel region. A dielectric channel depletion layer is between the gate contact and the channel region. The dielectric channel depletion layer provides a net charge having the same polarity as the first conductivity type charge carriers, and which may deplete the first conductivity type charge carriers from an adjacent portion of the channel region when no voltage is applied to the gate contact. | 2011-06-23 |
20110147765 | DUMMY STRUCTURE FOR ISOLATING DEVICES IN INTEGRATED CIRCUITS - The present disclosure provides an integrated circuit. The integrated circuit includes a first operational device having a first transistor of a first composition; a second operational device having a second transistor of the first composition; and an isolation transistor disposed between the first and second transistors, the isolation transistor having a second composition different from the first composition. | 2011-06-23 |
20110147766 | METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE - A method of manufacturing a silicon carbide semiconductor device is provided that includes a step of forming in a surface of a silicon carbide wafer of first conductivity type a first region of second conductivity type having a predetermined space thereinside by ion-implanting aluminum as a first impurity and boron as a second impurity; a step of forming a JTE region in the surface of the silicon carbide wafer from the first region by diffusing the boron ion-implanted in the first region toward its neighboring zones by an activation annealing treatment; a step of forming a first electrode on the surface of the silicon carbide wafer at the space inside the first region and at an inner part of the first region; and a step of forming a second electrode on the opposite surface of the silicon carbide wafer. Thereby, a JTE region can be formed that has a wide range of impurity concentration and a desired breakdown voltage without increasing the number of steps of the manufacturing process. | 2011-06-23 |
20110147767 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - There is provided a semiconductor device including an ohmic junction layer which is excellent in surface flatness and uniformity of composition in an interface with a semiconductor substrate and thus can give a sufficiently high adhesiveness with a Schottky junction layer. Such a semiconductor device includes an n type SiC semiconductor substrate ( | 2011-06-23 |
20110147768 | ORGANIC LIGHT EMITTING DEVICE CONNECTION METHODS - A light panel includes a light source having a generally planar, light emitting surface and a perimeter edge. A backsheet is disposed in substantially parallel relation with the light emitting surface, and an electrical feed-through region extends through the backsheet at a location spaced inwardly from the perimeter. A generally planar, flexible connector cable extends over the backsheet from the perimeter to the electrical feed-through region for establishing electrical connection with the light source. Openings in conductive pads provided in the flexible cable permit a conductive material to be inserted there through and mechanically and electrically interconnect the cable and the light panel. | 2011-06-23 |