25th week of 2009 patent applcation highlights part 18 |
Patent application number | Title | Published |
20090153186 | On-die-termination control circuit and method - On-die-termination control circuit includes a clock generator configured to generate shift clocks in response to an on/off control signal; and a shift register configured to delay the on/off control signal in synchronization with the shift clocks to control on/off timing of an ODT operation. | 2009-06-18 |
20090153187 | Monolithically integrated interface circuit - The invention relates to integrated circuits comprising a monolithically integrated logic IC and a monolithically integrated interface circuit that is conductively connected to the logic IC. The electrical properties of said interface circuit are programmable. The interface circuit also has a lower integration density than the logic IC, and comprises monitoring modules for monitoring the logic ICs. | 2009-06-18 |
20090153188 | PROCESS FOR AUTOMATIC DYNAMIC RELOADING OF DATA FLOW PROCESSORS (DFPs) AND UNITS WITH TWO- OR THREE-DIMENSIONAL PROGRAMMABLE CELL ARCHITECTURES (FPGAs, DPGAs AND THE LIKE) - In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes spatially separate first and second memory areas and that is connected via a bus to the plurality of configurable coarse-granular elements, the first result data may be subsequently read out from the memory, and the first result data may be subsequently processed using the plurality of configurable coarse-granular elements. In a first configuration, the first memory area may be configured as a write memory, and the second memory area may be configured as a read memory. Subsequent to writing to and reading from the memory in accordance with the first configuration, the first memory area may be configured as a read memory, and the second memory area may be configured as a write memory. | 2009-06-18 |
20090153189 | UNIVERSAL SERIAL BUS WAKEUP CIRCUIT - A circuit is attached in parallel to a universal serial bus interface of a data processing system. A capacitor in the circuit is charged by receiving power from a power pin of the universal serial bus interface while the data processing system is not in a reduced power state. A vibration sensor is unpowered while the data processing system is not in a reduced power state. The vibration sensor is disconnected from a data pin of the universal serial bus interface while the data processing system is not in a reduced power state. When the data processing system enters a reduced power state, the capacitor provides power to the vibration sensor. When a vibration is detected by the vibration sensor, a switch connects the vibration sensor to the data pin of the universal serial bus interface, providing a wake up signal to the data processing system. | 2009-06-18 |
20090153190 | Voltage Control - A circuit for converting a lower voltage logical signal to a higher voltage. The circuit comprises a current mirror structure having first and second branches, each comprising at least a first transistor of a first kind, an input transistor of a second kind, and a second transistor of the first kind coupled between them. The first transistors are arranged as a current mirror. The input transistors are driven using a logical signal at the lower voltage, controlling the current mirror structure to output a corresponding logical signal at the higher voltage. The second transistors are driven by an intermediate reference voltage so as to reduce the operating voltage of the third transistors. The first kind is tolerant of a higher operating voltage than the second kind. | 2009-06-18 |
20090153191 | PRE-DRIVER LOGIC - At least one of the disclosed systems includes driver logic that is capable of driving a device and pre-driver logic coupled to the driver logic and that drives the driver logic. If the pre-driver logic receives an input signal of a first type, the pre-driver logic activates a first transistor such that the pre-driver logic provides an output signal. If the pre-driver logic receives an input signal of a second type, the pre-driver logic activates a second transistor and a third transistor that together cause the pre-driver logic to provide a different output signal. If the third transistor is not activated, the pre-driver logic provides the output signal. | 2009-06-18 |
20090153192 | BI-DIRECTIONAL BUFFER FOR OPEN-DRAIN OR OPEN-COLLECTOR BUS - Provided herein are bi-directional buffers, and methods for providing bi-directional buffering. In an embodiment, a bi-directional buffer includes a differential input/differential output amplifier that includes a first input/output node and a second/input output node. The differential input/differential output amplifier is configurable in a first configuration and a second configuration. When in the first configuration, the second input/output node follows the first input/output node. When in the second configuration, the first input/output node follows the second input/output node. | 2009-06-18 |
20090153193 | BI-DIRECTIONAL BUFFER WITH LEVEL SHIFTING - A bi-directional buffer is connected between a first node and a second node, wherein the first node is connected by a first pull-up resistor to a first voltage supply rail, and the second node is connected by a second pull-up resistor to a second voltage supply rail. In an embodiment, the bi-directional buffer is enabled when a voltage of the first node does not exceed a first threshold voltage, and/or a voltage of the second node does not exceed a second threshold voltage. However, when the voltage of the first node exceeds the first threshold voltage, and the voltage of the second node exceeds the second threshold voltage, the bi-directional buffer is disabled, which disconnects the first and second nodes. This allows the first node to be pulled up to the first voltage supply rail, and the second node to be pulled up to the second voltage supply rail. | 2009-06-18 |
20090153194 | CLOCK CIRCUITRY - A circuit comprising: clock circuitry for supplying a first faster clock signal to a first circuit portion and a second slower clock signal to a second circuit portion, and varying the relative frequency of the first and second clock signals. Synchronisation logic generates pulses which indicate when to transfer data between the first and second circuit portions. The clock circuitry generates a first control signal at a predetermined time in each cycle of the first clock signal prior to a predetermined edge, and a second control signal at a predetermined time in each cycle of the second clock signal prior to a predetermined edge. A change in the relative frequency is conditional on a coincidence of the first and second control signals. The synchronisation generates the pulses such that there is at least one cycle of the first clock signal between those pulses, and such that there is only one of those pulses per cycle of the second clock signal. | 2009-06-18 |
20090153195 | COMPARATOR MODULE - A comparator module applied to a voltage level clamping circuit which can be implemented in an integrated circuit (IC) is provided. The IC includes a parasitic diode coupled between a first voltage source and a second voltage source. The voltage level clamping circuit includes a switch module and a comparator module. The comparator module has an output terminal, a first input terminal coupled to a first voltage source, and a second input terminal coupled to a second voltage source. The comparator module includes a current source module, a first voltage level adjusting circuit module, a second voltage level adjusting circuit module, and a comparing circuit module. | 2009-06-18 |
20090153196 | VOLTAGE COMPARATOR HAVING IMPROVED KICKBACK AND JITTER CHARACTERISTICS - A comparator apparatus for comparing a first and a second voltage input includes a pair of cross-coupled inverter devices, including a pull up device and a pull down device, with output nodes defined between the pull up and pull down devices. A first switching device is coupled to the first input and a second switching device is coupled to the second input, with control circuitry configured for selective switching between a reset mode and a compare mode. In the reset mode, the first and second voltage inputs are coupled to respective output nodes so as to develop a differential signal thereacross, and the pull down devices in each inverter are isolated from the pull up devices. In the compare mode, the voltage inputs are isolated from the output nodes, and the pull down devices in each inverter are coupled to the pull up devices to latch the output nodes. | 2009-06-18 |
20090153197 | METHOD OF TRANSMITTING AUDIO AND VIDEO SIGNALS USING ONE CONNECTOR AND ELECTRONIC DEVICE USING SAME - An electronic device includes a connector, at least two kinds of signal transmitting circuits, and a selecting system. The connector is capable of transmitting audio and video signals when connected to a peripheral device. The selecting system includes a detecting module, a memory module, a comparing module, and a connecting module. The detecting module is capable of detecting and measuring the voltage of a signal line of the connector. The memory module is capable of storing predetermined voltage ranges corresponding to different kinds of peripheral devices. The comparing module is capable of comparing the voltage of the signal line measured by the detecting module to the predetermined voltage ranges and determining what kind of peripheral device is connected to the connector. The connecting module is capable of connecting the connector to one of the signal transmitting circuits according to the comparing module. | 2009-06-18 |
20090153198 | LOW-LEAKAGE SWITCH FOR SAMPLE AND HOLD - An integrated electronic device includes a sample and hold stage. The sample and hold stage has a sampling capacitor (C) for an input voltage at an input node (Vin), a first switch (S | 2009-06-18 |
20090153199 | Operational comparator, differential output circuit, and semiconductor integrated circuit - An operational comparator | 2009-06-18 |
20090153200 | LOAD DRIVE CIRCUIT - A load drive circuit which can operate at high speed with low consumption current while performing the gate-to-source over voltage protection for its load driving field-effect transistor. A Zener function device is connected between the gate and the source of the load driving field-effect transistor, and an on/off-switch circuit to supply either on-potential or off-potential to the gate of the field effect transistor is provided. The current flowing through the Zener function device when the load driving field-effect transistor is conductive is limited by the on/off-switch circuit. | 2009-06-18 |
20090153201 | DIFFERENTIAL MULTIPHASE FREQUENCY DIVIDER - A multiphase divider comprises several differential latches connected in a ring. The number of latches in the ring is equal to the number of phases produced and the divisor applied to the input clock. The differential Q-outputs of one latch stage are connected to the corresponding differential D-inputs of the next latch stage. For even numbers of latch stages, the differential clock inputs of each are connected together and alternately to the divider clock input and its complement. The last differential Q-output is returned and cross-connected to the differential D-inputs of the first latch stage. For odd numbers of latch stages, the differential clock inputs of each are respectively connected in parallel to the divider clock input and its complement. The last differential Q-output is returned and straight-connected to the differential D-inputs of the first latch stage. | 2009-06-18 |
20090153202 | SYNCHRONIZATION CIRCUIT - A synchronization circuit includes a first flip-flop circuit to hold an input signal which is asynchronous to a clock signal by the clock signal, and output an output signal, a second flip-flop circuit to hold the input signal by a signal of an opposite phase to the clock signal and output a signal, a comparing unit to compare the input signal and the output signal of the first flip-flop circuit and output a signal with a high or low level depending on whether the input signal and the output signal of the first flip-flop circuit have the same level, a selection unit to select one of the output signal of the first flip-flop circuit and the output signal of the second flip-flop circuit depending on the level of the signal outputted by the comparing unit, and a third flip-flop circuit to output the output signal selected by the selection unit. | 2009-06-18 |
20090153203 | PLL CIRCUIT - A PLL comprises a current-controlled oscillator ( | 2009-06-18 |
20090153204 | PHASE LOCKED LOOP CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE USING THE SAME - To provide a phase locked loop circuit that is capable of performing an automatic adjustment that satisfies a desired characteristic not depending on a process variation and an environmental variation. The phase locked loop circuit has a phase frequency comparator, a charge pump, a loop filter, a frequency divider, a selector, and a voltage controlled oscillator. The frequency divider inputs an output signal and a reference signal, divides the output signal, and outputs a feedback signal, and also outputs a select signal, a trimming signal, and a limit signal from the output signal. The voltage controlled oscillator inputs the control voltage, the base voltage, the trimming signal, and the limit signal, changes the output signal frequency according to the control voltage so as to limit the upper limit frequency of the output signal. Also, the voltage controlled oscillator is capable of changing the frequency sensitivity of the output signal that is outputted with respect to the control voltage according to the trimming signal, and the upper limit frequency of the output signal according to the limit signal. | 2009-06-18 |
20090153205 | METHODS, DEVICES, AND SYSTEMS FOR A DELAY LOCKED LOOP HAVING A FREQUENCY DIVIDED FEEDBACK CLOCK - Methods, devices, and systems are disclosed for a delay locked loop. A delay locked loop may comprise a delay line configured to receive a reference clock signal and output a delayed clock signal. The delay locked loop may also comprise a feedback loop including a frequency divider operably coupled to the delayed clock signal and configured to generate a frequency divided clock signal. Furthermore, the delay locked loop may include a phase detector configured to receive the reference clock signal and the frequency divided clock signal having a frequency less than that of the reference clock signal. Additionally, the phase detector may be configured to measure a phase difference of the reference clock signal and the frequency divided clock signal upon receipt of an active edge of the frequency divided clock signal. | 2009-06-18 |
20090153206 | OPTICAL DRIVER INCLUDING A MULTIPHASE CLOCK GENERATOR HAVING A DELAY LOCKED LOOP (DLL), OPTIMIZED FOR GIGAHERTZ FREQUENCIES - An optical (disc) driving system including the DLL based multiphase clock generator circuit capable of generating 32 different phases from input clock having a frequency of 800 MHz or greater. The multiphase clock generator includes on a delay locked loop (DLL) having a frequency divider for outputting an N-divided clock to a first set of M voltage-controlled delay cells within a feedback loop, and further including an identical set of M voltage-controlled delay cells outside of the feedback loop for delaying the undivided clock and for outputting M multiphase clocks. | 2009-06-18 |
20090153207 | METHOD OF FORMING A PWM CONTROLLER AND STRUCTURE THEREFOR - In one embodiment, a PWM controller is configured to inhibit forming a drive signal responsively to an overload sense signal having a value that is no greater than a first value for a first time interval and to form a first duration of the first time interval responsively to the overload sense signal. | 2009-06-18 |
20090153208 | Pulse Width Modulation Driver for Electroactive Lens - An electroactive lens driver generates a variable root-mean-square drive voltage for controlling an electroactive lens by controlling the duty cycle of a modified square wave. | 2009-06-18 |
20090153209 | Programmable high-speed cable with printed circuit board and boost device - An HDMI cable carries high speed encoded data which are transmitted differentially over data channels, along with a clock. High-frequency loss and differential skew within a differential signal may be compensated by analog circuits embedded in the cable. These embedded circuits are tuned at production for best performance by observing the quality of the recovered analog signal. The embedded circuits are powered by a combination of power sources, both carried within the cable, and harvested from the high-speed signals themselves. Methods are provided for deskewing, equalizing, and boosting the differential signals in the embedded circuits that are mounted on a PCB. | 2009-06-18 |
20090153210 | Maintaining output I/O signals within an integrated circuit with multiple power domains - An integrated circuit is provided with a power domain PD | 2009-06-18 |
20090153211 | Integrated circuit device core power down independent of peripheral device operation - In an integrated circuit device, a circuit for maintaining asserted values on an input output pin of the device when a functional block of the device is placed in a sleep mode. The circuit includes an interface for coupling a functional block of a processor to an input and output pin and an output storage element coupled to the interface for storing a current value of the input output pin. The circuit further includes a sleep mode enable for controlling the output storage element to store the current value of the input output pin prior to the functional block being entering a sleep mode and cause the current value of the input output pin to remain asserted after the functional block is in sleep mode. The sleep mode enable is also to deactivate the storage element when the sleep mode is exited. | 2009-06-18 |
20090153212 | Clock generators for generation of in-phase and quadrature clock signals - Clock generator embodiments are provided to generate half-rate I and Q clock signals. The generators are configured to insure fan-out limitations, to insure correct phasing at startup, to reduce the number of signal inverters in a critical path, and to reduce the total number of inverter structures to thereby substantially extend generator operational frequency. An exemplary generator embodiment requires only two tri-state inverters and four inverters. These clock generators are particularly suited for variety of electronic systems such as high speed data serializers. | 2009-06-18 |
20090153213 | METHOD FOR REDUCING DELAY DIFFERENCE OF DIFFERENTIAL TRANSMISSION AND SYSTEM THEREOF - The present invention discloses a system and method for reducing delay difference of differential transmission, a certain delay difference between waveforms of the P signal and N signal is generated through controlling delay adjustment to P signal or N signal of the differential signals and controlling delay adjustment value simultaneously, to compensate for the delay difference of differential transmission due to the channels. Therefore, the present invention can reduce the delay difference of differential transmission due to property discrepancy of board materials and delay inconsistency among pins of the connectors, and at same time simplify the scheme design. | 2009-06-18 |
20090153214 | DELAY ELEMENT, VARIABLE DELAY LINE, AND VOLTAGE CONTROLLED OSCILLATOR, AS WELL AS DISPLAY DEVICE AND SYSTEM COMPRISING THE SAME - To provide, with a simple structure, a voltage controlled oscillator, etc., whose center oscillation frequency is stable even if there is a change in the temperature. A delay element includes: a delay generating part which adds a delay amount to an input signal to generate an output signal; and a delay control part which controls the delay. The delay control part has a delay adjusting circuit which outputs a first control signal for adjusting the delay amount, and a temperature compensating circuit which outputs a second control signal for compensating property changes caused by the temperature. The delay control part outputs a third control signal obtained by synthesizing the first control signal and the second control signal to the delay generating part to control the delay amount. The delay control part obtains the third control signal by having the delay adjusting circuit and the temperature compensating circuit connected in series. | 2009-06-18 |
20090153215 | Clock Distribution Circuit - A circuit includes a clock generator to provide a clock signal, and a clock distribution circuit coupled to the clock generator and a plurality of pairs of outputs. The clock distribution circuit includes a plurality of adjustment circuits to generate a plurality of pairs of clock signals in accordance with the clock signal. A respective adjustment circuit in the plurality of adjustment circuits is to provide a respective pair of clock signals in the plurality of pairs of clock signals to a respective pair of outputs in the plurality of pairs of outputs. The respective pair of clock signals includes a first clock signal and a second clock signal. The first clock signal is a complement of the second clock signal and duty-cycle and skew errors in the first clock signal and the second clock signal are less than corresponding pre-determined values. | 2009-06-18 |
20090153216 | IO DRIVER CIRCUIT WITH OUTPUT STAGE CONFIGURABLE AS A THEVENIN TERMINATOR - An IO driver circuit incorporates an output stage control circuit that selectively configures an output stage for the IO driver circuit to operate as a thevenin termination whenever the IO driver circuit is receiving a signal from an input/output node to which the IO driver circuit is coupled. The output stage may include a plurality of branches, with each branch having a pull-up device and a pull-down device, and the output stage control circuit selectively activates the pull-up devices in a first subset of branches in the output stage while concurrently activating the pull-down devices in a second subset of branches, as well as while leaving the pull-up devices in the second subset of branches and the pull-down devices in the first subset of branches deactivated. | 2009-06-18 |
20090153217 | Active Clamp Switching Circuit - An active clamp switching circuit includes a transformer having a primary winding and a secondary winding, a first switch, a capacitor, an impedance device, a second switch and a rectifier. The capacitor, the impedance device and the second switch form a reset loop for the primary winding so that the impedance device lowers the electric current going through the second switch, preventing burnout of the second switch. | 2009-06-18 |
20090153218 | LEVEL SHIFT CIRCUIT WITH POWER SEQUENCE CONTROL - A level shift circuit for providing predictable outputs when VDDH is powering up and minimizing DC current when VDDL is powering up. The level shift circuit may have a control circuit that includes a first inverter with an input coupled to VDDL, one or more diodes coupled between the first inverter and its powering voltage supply, a second inverter coupled to an output of the first inverter (optionally coupled to its voltage supply via one or more diodes), a third inverter coupled to an output of the second control inverter, an NMOS transistor coupled to an output of the third inverter that forces the output of the level shift circuit to the ground voltage when enabled, and a PMOS transistor coupled to an output of the third inverter that disconnects a portion of the level shift circuit, and thus the output of the level shift circuit, from VDDH when disabled. | 2009-06-18 |
20090153219 | Replica bias circuit for high speed low voltage common mode driver - A transmitter provides fast settling times, slew rate control, and power efficiency while reducing the need for large external capacitors. The transmitter typically includes a pre-driver, driver, and replica circuit. The pre-driver can shift the voltage level of an input signal to produce a shifted signal. The pre-driver can shift the voltage level in response to a selectable load resistance circuit and a voltage regulation feedback signal. The driver receives the shifted signal and generates a driver output signal in response to the received shifted signal. The replica circuit can be a scaled replica of the pre-driver and the driver using scaled components from the pre-driver and driver circuits. The scaled components can be used to generate the voltage regulation feedback signal. The generated voltage regulation feedback signal represents, for example, whether the output voltage of the driver output is above a reference voltage. | 2009-06-18 |
20090153220 | SOURCE DRIVER AND POWER DOWN DETECTOR THEREOF - The present invention discloses a source driver powered by a power supply comprising at least one channel, at least one output pad coupled to the channel, at least one switch connected between the output pad and a predetermined voltage, and a power down detector for detecting whether a first supply voltage from the power supply is insufficient and generating a reset signal to turn on the switch if yes. | 2009-06-18 |
20090153221 | POLYPHONIC SOUND GENERATING METHOD - Method of driving an acoustic piezoelectric transducer ( | 2009-06-18 |
20090153222 | Non-reflective MPNT switch - A non-reflective ring topology MPNT switching device comprises at least two poles, at least four throws, plural main switches, and plural bridge switches. The bridge switches enable all throws to be non-reflective throughout a wide frequency range. Each main switch is connected between one of the poles and one of the throws. Each bridge switch is connected between two of the throws, and each throw is connected to at least M+1 of the bridge switches, M being the pole count. In operation, each of M of the main switches has a first (ON) state and is connected to one of M active throws. For each active throw, each bridge switch connected to the active throw has a second (OFF) state. For each non-active throw, one bridge switch connected to the non-active throw has the first (ON) state and each other connected bridge switch has the second (OFF) state. | 2009-06-18 |
20090153223 | IGBT-DRIVER CIRCUIT FOR DESATURATED TURN-OFF WITH HIGH DESATURATION LEVEL - A driver circuit comprising an insulated gate bipolar transistor having a collector coupled to a voltage supply, an emitter coupled to a source of reference potential, and a gate configured to receive a control signal from a driver circuit, and a desaturation circuit conductively coupled between an insulated gate and a collector of the insulated gate bipolar transistor to desaturate the insulated gate. The desaturation circuit includes a series coupled bias voltage source, uni-directionally conducting element and switch. | 2009-06-18 |
20090153224 | CIRCUIT FOR TURNING ON MOTHERBOARD - An exemplary circuit for turning on a motherboard comprises a first switch module comprising a first terminal arranged to receive a standby power and connected to a sixth terminal of a computer front panel header, a second terminal arranged to receive the standby power, and a control terminal; a timing circuit charged by a system power; and a second switch module comprising a first terminal connected to the control terminal of the first switch module via the timing circuit, a second terminal arranged to receive the standby power, and a control terminal arranged to receive the system power, wherein, when the system power is lost, the second switch module discharges the timing circuit for turning on the first switch module after a discharge time, and the motherboard is turned on when the first switch module is turned on to ground the sixth terminal of the computer front panel header. | 2009-06-18 |
20090153225 | Load Driving Device - A load driving device according to an aspect of the invention may includes an output transistor connected between a power supply line and an output terminal, a load connected between the output terminal and a first ground line, a control circuit connected between a gate of the output transistor and a second ground line, the control circuit controlling turning on/off of the output transistor, and a compensation transistor that turns on when a potential of the second ground line assumes a predetermined value or higher, thereby maintaining an off state of the output transistor. | 2009-06-18 |
20090153226 | HIGH-SIDE DRIVER FOR PROVIDING AN OFF-STATE IN CASE OF GROUND LOSS - An electronic device has circuitry for driving a high side switch. The circuitry has a high side driver including a first switch and a second switch being coupled to each other by a driver output node. The driver output node is adapted to be coupled to a control input of the high side switch. The first switch is coupled to a driver high voltage level and the second switch is coupled to ground for alternately pulling the driver output node to either the driver high voltage level or to ground so as to turn the high side switch on and off. A diode element is coupled between the driver output node and the second switch in a forward direction from the driver output node to the switch. | 2009-06-18 |
20090153227 | TEMPERATURE SENSOR CIRCUIT - A temperature sensor circuit is provided that facilitates preventing a too-high overshooting voltage from occurring at an output terminal when a power supply is connected to the temperature sensor circuit. The temperature sensor circuit includes a short-circuiting device, disposed in parallel to depletion mode NMOS, that short-circuits the drain and source of depletion mode NMOS when a power supply is connected; and delay device that transmits a signal for short-circuiting the drain and source of depletion mode NMOS for a certain period from the time point of power supply connection to short-circuiting device for preventing the voltage at output terminal of temperature sensor circuit from overshooting. | 2009-06-18 |
20090153228 | STRUCTURE FOR IMPROVING FUSE STATE DETECTION AND YIELD IN SEMICONDUCTOR APPLICATIONS - Disclosed is a design structure of an apparatus incorporating a detection circuit adapted for determining the state of selected fuses and a programming circuit for blowing selected fuses on demand. Also, disclosed are embodiments of an associated method. The detection circuit comprises a plurality of fuses in identical signal and reference legs in order to increase the signal margin for detecting blown fuses and/or current sources configured to pass offset currents through the signal and reference legs in order to set the trip point for detecting blown fuses between the un-blown and the minimum blown resistances. Thus, the invention provides the flexibility of single-sided fuse state detection devices with even greater sensitivity than both single-sided and differential fuse state detection device. | 2009-06-18 |
20090153229 | Method for Signal Transmission between Semiconductor Substrates, and Semiconductor Component Comprising Such Semiconductor Substrates - An AC voltage signal is transmitted between a semiconductor substrate and a further semiconductor substrate arranged on the first semiconductor substrate by means of an electromagnetic field through one of the two semiconductor substrates by virtue of each semiconductor substrate having a circuit element that serves for transmission. Both circuit elements are directly electrically decoupled. | 2009-06-18 |
20090153230 | Low Voltage Charge Pump with Regulation - Techniques of providing a low output voltage, high current capability charge pump are given. The charge pump has multiple capacitors along with switching circuitry. In an initialization phase, the first plate of each of the capacitors is connected to receive a regulator voltage and the second plate of each capacitor is connected to ground. In a transfer phase, the capacitors are connected in series, where, for each capacitor after the first, the second plate is connected to the first plate of the preceding capacitor in the series. The output voltage of the pump is from the first plate of the last capacitor in the series. Regulation circuitry generates the regulator voltage from a reference voltage to have a value responsive to the output voltage level of the pump. | 2009-06-18 |
20090153231 | Diode Connected Regulation of Charge Pumps - A circuit including a charge pump and regulation circuitry is described. The output of the charge pump is connected to provide a first output signal that is connectable to drive a load. A diode is connected to provide a second output signal of lower voltage from the first output signal. The regulation circuitry is connected to the second output level and is connectable to the charge pump to regulate its output. The circuit also includes a current source connectable from the second line to ground, where control circuitry connects the current source to the second line when the first line is connected to the load. | 2009-06-18 |
20090153232 | Low voltage charge pump - A single pump stage of a multi-stage charge pump couples a first low-voltage NMOS transistor in series with a first low-voltage PMOS transistor between charge transfer capacitors. A second low-voltage NMOS transistor is coupled between the gate and the source of the first NMOS transistor. A second low-voltage PMOS transistor is coupled between the gate and the source of the first PMOS transistor. Respective boost voltages are applied to gates of the first NMOS transistor and the second PMOS transistor to minimize threshold voltage losses. A stabilizing capacitor is connected between the first NMOS transistor and the second PMOS transistor. | 2009-06-18 |
20090153233 | BIAS CIRCUIT - A gm compensation current source controls current that runs through a current source transistor, source-grounded transistors that determine a gain so that mutual conductance gm of the source-grounded transistors is compensated and the gain is compensated. A 1/r current source runs current inversely proportional to variation of load resistors of an amplifier so that gate bias points of gate-grounded transistors that are connected to the source-grounded transistors remain constant, and deterioration of linearity at a drain terminal of a gate-grounded transistor is suppressed. | 2009-06-18 |
20090153234 | CURRENT MIRROR DEVICE AND METHOD - In an embodiment, a circuit is disclosed that includes a current mirror including a first transistor pair and a second transistor pair. The first transistor pair includes a first transistor and a second transistor. The second transistor pair includes cascode transistors. The circuit also includes an operational amplifier having an output coupled to both the first transistor and the second transistor. | 2009-06-18 |
20090153235 | LOAD CONTROLLER - A load controller includes: a first input circuit which detects that a drive instruction signal by an operation of a drive instructing unit is less or equal to a first input threshold value; a first constant current source activated in accordance with the detection; a PWM signal supply unit that is activated by the first constant current source and supplies a PWM signal having a prescribed frequency and a duty ratio; a constant control signal supply unit that supplies a constant control signal during failure of the first input circuit or the first constant current source; a drive control unit that generates a PWM drive control signal in accordance with the PWM signal and generates a constant drive control signal in accordance with the constant control signal; and a load driving element that is controlled by the PWM drive or constant drive control signal to drive a load. | 2009-06-18 |
20090153236 | POWER CONTROL CIRCUIT WITH LOW POWER CONSUMPTION - The available battery power on autonomously powered mobile electronic devices, in particular smartcards, is very small but requires a very long shelf life. Thus, even very small rest currents are a big power issue. The invention discloses a power save circuit and method, where a single power switch, e.g. a FET or a MEM switch, can be used to detach the power supply (?) from the whole system and allow the lowest current possible. Further, a combination with a double action button and integration of the power switch provides a solution with a minimum number of components and interconnects. An option for “system wake-up at any button” enables additional power saving during use, without inconvenience to the user. | 2009-06-18 |
20090153237 | COMPENSATION CAPACITOR NETWORK FOR DIVIDED DIFFUSED RESISTORS FOR A VOLTAGE DIVIDER - A voltage divider of a voltage regulator system is disclosed utilizing divided diffused resistors. In one embodiment, a feed-forward capacitor network is connected across the resistors and the voltage divider output. The feed-forward capacitor network allows the output to rise and fall quickly with a change in the voltage divider input. Accordingly, an improved frequency response should be obtained utilizing divided diffused resistors. | 2009-06-18 |
20090153238 | METHOD AND SYSTEM FOR REDUCING A DYNAMIC OFFSET DURING THE PROCESSING OF ASYMMETRIC SIGNAL STRINGS - The invention relates to a method and a system for reducing a dynamic offset during the processing of asymmetric signal strings. The aim of the invention is to provide a method and a system for reducing a dynamic offset which allows to reduce any disturbing influence on subsequent process steps. According to the invention, this aim is achieved by a discharge of the capacity in every no-pulse period by a value depending on the value of the amplitude of the voltage of the high-pass structure on the input side. | 2009-06-18 |
20090153239 | VARIABLE-IMPEDANCE GATED DECOUPLING CELL - Embodiments of the present invention provide a system that controls noise in a power system that includes a power rail and a ground rail. The system includes a MOS transistor coupled in series with a decoupling capacitor between the power rail and the ground rail and an inductive packaging connection coupled to the power rail in parallel with the MOS transistor and the decoupling capacitor. The combination of MOS transistor, decoupling capacitor, and inductive packaging connection form a resonant circuit. During operation, the system determines if there is noise in a V | 2009-06-18 |
20090153240 | COMPARATOR WITH SENSITIVITY CONTROL - A comparator has a differential input stage, a current source coupled to the differential input stage for providing a tail current to one side of the differential input stage, and a differential load coupled to the differential pair and having at least one diode coupled load transistor per differential side. A load current through either one of the at least one diode coupled load transistor on either differential side is mirrored with a current mirror configuration to provide a current be fed to a respective node, each node being coupled to a respective variable biasing current source and a respective other side of the differential input stage, so as to provide a variable positive feedback to the differential input stage. | 2009-06-18 |
20090153241 | Simultaneous filtering and compensation circuitry and method in chopping amplifier - A chopper-stabilized amplifier ( | 2009-06-18 |
20090153242 | METHOD AND APPARATUS FOR DIRECT DIGITAL TO RADIO FREQUENCY CONVERSION - A method and apparatus for direct conversion of digital data to high power RF signals, known as DDRF. The method and apparatus receive a digital signal, create a digital modulated signal therefrom, and amplify the modulated signal with an H-bridge Power Amplifier for transmission. DDRF uses a multi-level H-bridge amplification circuit to establish a more power efficient digital transmitter. | 2009-06-18 |
20090153243 | CLASS D AMPLIFIER - A single-end-output class D amplifier is provided that handles a load such as stereo headphones without using an expensive part such as a crystal resonator or transformer. Class D amplifier | 2009-06-18 |
20090153244 | LOW NOISE AND LOW INPUT CAPACITANCE DIFFERENTIAL MDS LNA - A differential low noise amplifier (LNA) involves two main amplifying transistors biased in saturation, and two cancel transistors biased in sub-threshold. In one example, the gates of the cancel transistors are coupled to the drains of main transistors, in a symmetrical and cross-coupled fashion. The main transistors are source degenerated. Because the gates of cancel transistors are not coupled to the differential input leads of the LNA, the input capacitance of the LNA is reduced. Noise introduced into the LNA output due to the cancel transistors being biased in the sub-threshold region is reduced because there are two stages. The first stage involves the main transistors, and the second stage involves the cancel transistors. By increasing the gain of the first stage and decreasing the gain of the second stage, overall LNA gain is maintained while reducing the noise that the sub-threshold biased transistors contribute to the LNA output. | 2009-06-18 |
20090153245 | VARIABLE-GAIN WIDE-DYNAMIC-RANGE AMPLIFIER - A variable-gain wide-dynamic-range amplifier including an amplifier module, a control unit, and an output current regulating circuit is provided. The amplifier module amplifies an input signal. The amplifier module includes several amplifier units coupled to each other in parallel. The gains of the amplifier units are different. The control unit enables at least one of the amplifier units according to a gain control signal. The at least one of the amplifier units which is enabled is for outputting a current signal in response to the input signal. The output regulating circuit is for receiving the current signal and outputting an output signal accordingly by regulating the magnitude of the current signal under the control of the control unit. Each of the amplifier units is coupled to the output current regulating circuit in series. The control unit is for controlling the output current regulating circuit according to the gain control signal. | 2009-06-18 |
20090153246 | Method and system for varying gain exponentially with respect to a control signal - A method for varying gain exponentially with respect to a control signal is provided. The method includes receiving a primary control signal. A secondary control signal is generated based on the primary control signal. The secondary control signal is provided to a variable gain amplifier and is operable to exponentially vary a gain for the variable gain amplifier with respect to the primary control signal. | 2009-06-18 |
20090153247 | HIGH-SPEED, MULTI-STAGE CLASS AB AMPLIFIERS - A multi-stage Class AB amplifier system comprises a first Class AB amplifier circuit that receives an input signal. A bias circuit receives an output of the first Class AB amplifier circuit. A second Class AB amplifier circuit having an input that communicates with an output of the bias circuit and that generates an output signal. A common-mode feedback circuit generates a feedback signal to the first Class AB amplifier circuit based on the output signal. | 2009-06-18 |
20090153248 | AMPLIFIER WITH DYNAMIC BIAS - Techniques are provided for dynamically biasing an amplifier to extend the amplifier's operating range while conserving power. In an embodiment, a detector is provided to measure the amplifier output to determine an operating region of the amplifier. The output of the detector may be input to a bias adjuster, which outputs a dynamic voltage level supplied to at least one bias transistor in the amplifier. Multiple embodiments of the detector and bias adjuster are disclosed. | 2009-06-18 |
20090153249 | RAIL TO RAIL BUFFER AMPLIFIER - A buffer amplifier having a wide output voltage range includes a first source follower circuit having a first current source and a first transistor, and a second source follower circuit having a second current source and a second transistor. The first source follower circuit has an output terminal connected to a gate of a third transistor and a source of a fourth transistor. The second source follower circuit has an output terminal connected to a gate of a fifth transistor and a source of a sixth transistor. First and second voltages are respectively supplied to the gates of the fourth and sixth transistors. The sixth transistor is operated in place of the fifth transistor in a low voltage range, and the fourth transistor is operated in place of the third transistor in a high voltage range. | 2009-06-18 |
20090153250 | METHOD AND SYSTEM FOR SCALING SUPPLY, DEVICE SIZE, AND LOAD OF A POWER AMPLIFIER - Aspects of a method and system for scaling supply, device size, and load of a power amplifier (PA) are provided. In this regard parameters of a PA, and a voltage, a current, and/or a load of the PA may be configured based on a determined amplitude of a baseband signal and based on a transmit power of the PA. In this regard, the PA may be configured by configuring device size of and/or selecting one or more transistors within the PA. The load may be a transformer and may be configured by adjusting a windings ratio. The PA may comprise one or more differential pairs. In this regard, device size of the differential pair(s) may be configured based on the determined amplitude of the baseband signal and based on a transmit power of the PA. | 2009-06-18 |
20090153251 | VOLTAGE DETECTION TYPE OVERCURRENT PROTECTION DEVICE FOR CLASS-D AMPLIFIER - The present invention discloses a voltage detection type overcurrent protection device, which applies to the output stage of a CMOS Class-D audio amplifier. Generally, a Class-D audio amplifier is used to drive a high-load loudspeaker; therefore, it needs a high-current driver. When there is a short circuit in the load, the high current will burn out the driver stage. The present invention detects the output voltage to indirectly monitor whether the output current is too large. Once an overcurrent is detected, the output-stage transistor is turned off to stop high current lest the circuit be burned out. | 2009-06-18 |
20090153252 | MULTI-BAND VOLTAGE CONTROLLED OSCILLATOR CONTROLLING MODULE, PHASE LOCKED LOOP UTILIZING WHICH AND RELATED METHOD THEREOF - A multi-band VCO module includes a multi-band VCO and a controlling module. The multi-band VCO is for selecting a specific band from a plurality of bands according to a band selecting signal, and for outputting an oscillating signal according to a predetermined voltage and the specific band. The controlling module, coupled to the multi-band VCO, is for setting the band selecting signal according to a reference frequency of the reference signal and an oscillating frequency of the oscillating signal. A related method and a PLL circuit utilizing the multi-band VCO module are also disclosed. | 2009-06-18 |
20090153253 | SYSTEM AND METHOD FOR REDUCING LOCK TIME IN A PHASE-LOCKED LOOP - Increasing loop gain is a common practice for reducing lock time of phase locked loops. Very high loop gains, however, often result in increasing the lock time or causing loop instability. For very high loop gains, delaying the feedback clock signal along the feedback path of a phase locked loop decreases lock time and prevents instability. A delay circuit may be used at any location along the feedback path of the phase locked loop. | 2009-06-18 |
20090153254 | PHASE LOCKED LOOP CIRCUIT PERFORMING TWO POINT MODULATION AND GAIN CALIBRATION METHOD THEREOF - A PLL circuit for two point modulation includes a first loop filter, a second loop filter, a plurality of switching devices, and a calibration module. The first loop filter filters an output voltage of a charge pump during a gain calibration operation. The second loop filter filters the output voltage of the charge pump during a normal operation. The first loop filter has a bandwidth wider than that of the second loop filter to perform a fast calibration by reducing a lock time. The operation of the first loop filter, the operation of the second loop filter, and the opening of the first loop filter are determined by the switching operations of the switching devices. The calibration module adjusts a gain of analog modulation data based on a frequency error accumulated in the first loop filter after the first loop filter is open during the gain calibration operation. | 2009-06-18 |
20090153255 | ALL DIGITAL PHASE LOCK LOOP AND METHOD FOR CONTROLLING PHASE LOCK LOOP - An all digital phase lock loop is disclosed, including a digitally controlled oscillator, a phase detector, and a loop filter. The digitally controlled oscillator is controlled by an oscillator tuning word to generate a variable signal. The oscillator tuning word includes a first tuning word and a second tuning word, where the frequency range of the digitally controlled oscillator, capable to be adjusted by the second tuning word, is broader than that capable to be adjusted by the first tuning word. The phase detector detects a phase error between the variable signal and a reference signal. The phase error is received by the loop filter to output the oscillator tuning word. The loop filter has several stages of the low pass filters and a modification circuit. The modification circuit detects two filter outputs from two low pass filters among the filters and accordingly adjusts the second tuning word. | 2009-06-18 |
20090153256 | FREQUENCY GENERATOR - There is provided a feedback circuit including: an oscillator generating an oscillation frequency signal; a mixer unit having an input terminal, a feedback terminal, and an output terminal and outputting a frequency signal through the output terminal, the frequency signal obtained by adding or subtracting frequency of a feedback signal, input through the feedback terminal, to or from frequency of the oscillation frequency signal input through the input terminal from the oscillator; a first frequency divider dividing the frequency signal output from the mixer unit at a division ratio of N (N is a multiple of 2) to generate an output signal; and a feedback circuit adjusting the output signal of the first frequency divider for the first frequency divider to output a frequency signal in a desired band and feeding back the adjusted signal to the feedback terminal of the mixer unit. | 2009-06-18 |
20090153257 | PIEZOELECTRIC OSCILLATOR AND METHOD FOR MANUFACTURING THE SAME - A piezoelectric oscillator includes: a piezoelectric resonator including a container, the container containing a piezoelectric resonator element: and a semiconductor device including an oscillation circuit for vibrating the piezoelectric resonator. The semiconductor device is bonded to a surface of the container. The container has an external coupling terminal and a cut-off part, the external coupling terminal being coupled to the semiconductor device, the cut-off part being disposed on a side surface of the container. The external coupling terminal is disposed in an area of the container, the area being opposed to the semiconductor device, and in the cut-off part. The semiconductor device has a coupling terminal on a surface thereof, the surface being opposed to the container. The coupling terminal of the semiconductor device and the external coupling terminal of the container are coupled with a conductive material. | 2009-06-18 |
20090153258 | MEMS resonator array structure and method of operating and using same - Each one of resonators arranged in an N×M MEMS array structure includes substantially straight elongated beam sections connected by curved/rounded sections and is mechanically coupled to at least one adjacent resonator of the array via a coupling section, each elongated beam section connected to another elongated beam section at a distal end via the curved/rounded sections forming a geometric shape (e.g., a rounded square), and the coupling sections disposed between elongated beam sections of adjacent resonators. The resonators, when induced, oscillate at substantially the same frequency, in combined elongating/breathing and bending modes, i.e., beam sections exhibiting elongating/breathing-like and bending-like motions. One or more of the array structure's resonators may include one or more nodal points (i.e., that are substantially stationary and/or experience little movement), which are suitable and/or preferable locations to anchor the resonator/array to the substrate, in one or more areas of the structure's curved sections. | 2009-06-18 |
20090153259 | DIGITALLY CONTROLLED OSCILLATOR (DCO) - A digitally controlled oscillator (DCO) includes a current generator which generates an electric current having a magnitude corresponding to an input signal, and a digitally controlled oscillating unit which generates an oscillating frequency based on an inductance which varies according to the magnitude of the electric current generated by the current generator. | 2009-06-18 |
20090153260 | METHOD AND SYSTEM FOR A CONFIGURABLE TRANSFORMER INTEGRATED ON CHIP - Aspects of a method and system for a configurable transformer integrated on-chip are provided. In this regard, an integrated circuit may comprise a transformer with a configurable windings ratio, and the windings ratio may be configured to enable transmitting and/or receiving signals via an antenna communicatively coupled to said transformer. The windings ratio may be configured based on an impedance of the antenna, a transmitter communicatively coupled to the transformer, a receiver communicatively coupled to the transformer, and/or a power level or transmitted and/or received signals. The windings ratio may be configured via one or more switching elements which may be active devices integrated on-chip. The transformer may comprise a plurality of loops fabricated on a corresponding plurality of metal layers in said integrated circuit and the loops may be coupled with one or more vias. The IC may also comprise ferrimanetic and/or ferromagnetic materials. | 2009-06-18 |
20090153261 | METHOD AND SYSTEM FOR MATCHING NETWORKS EMBEDDED IN AN INTEGRATED CIRCUIT PACKAGE - Methods and systems for matching networks embedded in an integrated circuit package are disclosed and may include controlling impedance within an integrated circuit via one or more impedance matching networks. The impedance matching networks may be embedded within a multi-layer package bonded to the integrated circuit. The impedance of one or more devices within the integrated circuit may be configured utilizing the impedance matching networks. The multi-layer package may include one or more impedance matching networks. The impedance matching networks may provide impedance matching between devices internal to the integrated circuit and external devices. The impedance matching networks may be embedded within the multi-layer package, and may include transmission lines, inductors, capacitors, transformers and/or surface mount devices. The impedance matching networks may be deposited on top of and/or on bottom of the multi-layer package. The integrated circuit may be flip-chip bonded to the multi-layer package. | 2009-06-18 |
20090153262 | Repeater of global input/output line - A repeater of a global input/output line includes a data transmitter including first and second drivers for outputting data signals of the global input/output line through different transmission routes in response to a transmission direction control signal, and a third driver for driving the global input/output line in response to an output signal of the data transmitter. | 2009-06-18 |
20090153263 | Modulized wave filter - A wave filter is installed in a multimedia wideband router, and includes a circuit board having a first low-pass wave-filtering circuit, and a band-pass wave-filtering circuit; the band-pass wave-filtering circuit consists of a high-pass wave-filtering circuit and a second low-pass wave-filtering circuit; the first low-pass wave-filtering circuit is connected to the high-pass wave-filtering circuit; the circuit board further includes an input terminal, and a first switching component, which is movable to such a position as to electrically connect the input terminal and a joint between the first low-pass wave-filtering circuit and the high-pass wave-filtering circuit; the circuit board further includes two output terminals, which are connected to the first and the second low-pass wave-filtering circuits respectively; a second switching component is provided on the circuit board, which is movable to such a position as to electrically connect the high-pass wave-filtering circuit and the second low-pass wave-filtering circuit. | 2009-06-18 |
20090153264 | FILTER HAVING SWITCH FUNCTION AND BAND PASS FILTER - The filter has a switch function of selectively transmitting a transmission signal through one of first and second branch waveguides branching from a primary waveguide. The filter includes resonators disposed in the first and second branch waveguides. The resonator includes a space formed inside a metal cover, a central conductor disposed inside the space, and a short-circuiting plate. The central conductor has one end grounded to an outer conductor. The short-circuiting plate allows the neighborhood of an open end of the central conductor to be selectively conducted to the outer conductor. The filter performs a selection from the first and second branch waveguides by switching electrical conductivity in a region between the neighborhood of the open end of the central conductor and the outer conductor. | 2009-06-18 |
20090153265 | METHOD AND SYSTEM FOR CONTROLLING MEMS SWITCHES IN AN INTEGRATED CIRCUIT PACKAGE - Methods and systems for controlling MEMS switches in an integrated circuit package are disclosed and may include controlling one or more arrays of MEMS switches utilizing a control chip. The arrays of MEMS switches and one or more circuit components may be integrated in and/or on a multi-layer package. The control chip may be bonded to the multi-layer package. The circuit components may be coupled to the arrays of MEMS switches via electrical traces embedded in and/or deposited on the multi-layer package. The control chip may be flip-chip bonded to the multi-layer package. The MEMS switches may be actuated electrostatically or magnetically. The circuit components may include integrated circuits, inductors, capacitors, surface mount devices, and/or transformers. | 2009-06-18 |
20090153266 | Modulized wave filter - A wave filter includes a circuit board, and a shell housing the circuit board; the circuit board includes a band-pass wave-filtering circuit, and a low-pass wave-filtering circuit; the shell has an input end and an output terminal thereon, which are connected to the band-pass wave-filtering circuit of the circuit board; the shell further has an output end thereon, which is connected to the low-pass wave-filtering circuit; thus, the wave filter is modulized; the wave filter is fitted in a multimedia wideband router, and in turn it is not necessary to change wave filters in order for allowing the multimedia wideband router to be connected to and used with televisions or various digital multimedia equipments. | 2009-06-18 |
20090153267 | MEMS resonator structure and method - A microelectromechanical resonator may include one or more resonator masses that oscillates in a bulk mode and that includes a first plurality of regions each having a density, and a second plurality of regions each having a density, the density of each of the second plurality of regions differing from the density of each of the first plurality of regions. The second plurality of regions may be disposed in a non-uniform arrangement. The oscillation may include a first state in which the resonator mass is contracted, at least in part, in a first and/or a second direction, and expanded, at least in part, in a third and/or a fourth direction, the second direction being opposite the first direction, the fourth direction being opposite the third direction. | 2009-06-18 |
20090153268 | THIN-FILM BULK-ACOUSTIC WAVE (BAW) RESONATORS - A thin-film bulk acoustic wave (BAW) resonator, such as SBAR or FBAR, for use in RF selectivity filters operating at frequencies of the order of 1 GHz. The BAW resonator comprises a piezoelectric layer ( | 2009-06-18 |
20090153269 | ACOUSTIC WAVE FILTER - An acoustic wave filter includes: a first acoustic wave filter having a first group of multimode filters connected, a first unbalanced input node and two first balanced output nodes, a first multimode filter among the first group of multimode filters being connected to the two first balanced output nodes; and a second acoustic wave filter having a second group of multimode filters, a second unbalanced input node and two second balanced output nodes, a second multimode filter among the second group of multimode filters having an aperture length different from that of the first multimode filter and a connection with the two second balanced output nodes, the first and second multimode filters having different pass bands. One of the two first balanced output nodes and one of the two second balanced output nodes are unified, and the other first balanced output node and the other second balanced output node are unified. | 2009-06-18 |
20090153270 | High-pass filter - The invention relates to a high-pass filter comprising a signal line with several capacitors connected in series as well as a ground line, wherein several inductors are connected between the signal line and the ground line. In order to configure the high-pass filter as a coaxial construction it is suggested in accordance with the invention that the signal line form an inner conductor and the ground line an outer conductor of a coaxial conductor, between which an insulation layer is arranged, and that the inductors be designed as discrete components which are arranged at a distance to one another and between which at least one impedor is connected. | 2009-06-18 |
20090153271 | VARIABLE RADIO FREQUENCY BAND FILTER - A variable radio frequency band filter capable of varying the resonance frequency band comprises a housing having a support; a number of resonator rods arranged along the longitudinal direction of the housing; at least one tuning rod positioned on top of the resonator rods; a tuning support extending through the respective tuning rods along the longitudinal direction of the housing and adapted to slide on top of the respective resonator rods to vary the position of the tuning rods; and a frequency variation unit positioned on a lateral surface of the housing. The frequency variation unit being coupled to an end of the tuning support and adapted to vary the position of the tuning rods, as the tuning support is slid, according to the frequency band. | 2009-06-18 |
20090153272 | Waveguide Bandstop Filter - In a bandstop filter having an input port ( | 2009-06-18 |
20090153273 | ENERGY TRANSFERRING SYSTEM AND METHOD THEREOF - An energy transferring system including a source-side resonator, an intermediate resonant module, and a device-side resonator is provided. The three resonators substantially have the same resonant frequency for generating resonance. The energy on the source-side resonator is coupled to the intermediate resonant module, such that non-radiative energy transfer is performed between the source-side resonator and the intermediate resonant module. The energy coupled to the intermediate resonant module is further coupled to the device-side resonator, such that non-radiative energy transfer is performed between the intermediate resonant module and the device-side resonator to achieve energy transfer between the source-side resonator and the device-side resonator. The coupling coefficient between the intermediate resonant module and its two adjacent resonators is larger than the coupling coefficient between the source-side resonator and the device-side resonator. The invention has the advantages of high transmission efficiency, small volume, low cost. | 2009-06-18 |
20090153274 | THERMAL EXPANSION COMPENSATION ASSEMBLIES - Filter and manifold compensation assemblies for thermal compensation of a filter cavity and a manifold which include at least one a lever element pivotally coupled to the filter or manifold at a first pivot point, an anchoring element pivotally coupled to the lever element at the second pivot point and secured to the housing of the filter or manifold, and a thermal expansion element having a lower coefficient of thermal expansion than the filter cavity or manifold and pivotally coupled to the lever element. The relative thermal expansion of the thermal expansion element in comparison with the thermal expansion of the filter or manifold causes the lever element to articulate and to displace the housing for thermal compensation. The degree of each displacement is proportional to the ratio between the distance between the second and first pivot points and the distance between the second and the third pivot points. | 2009-06-18 |
20090153275 | TUNABLE MAGNETIC FIELD AMPLIFYING DEVICE - Provided is a tunable magnetic field amplifying device capable of easily adjusting resonance frequencies and tuning usable bands by using discrete elements to vary electric properties of elements that are used for amplifying a magnetic field of a specific microwave band. The tunable magnetic field amplifying device includes a Swiss roll formed by winding a metal sheet coated with a dielectric in a spiral cylinder shape once or several times; and a tunable capacitor connected between an inner sheet of and an outer sheet of the metal sheet for tuning a resonance frequency. | 2009-06-18 |
20090153276 | Current trip unit for circuit breaker - A trip unit having a current carrying element, an anchor having an up and a down position, and an oscillator having a first position and a second position. The oscillator in the first position permits the anchor to move into the down position, and the oscillator in the second position blocks the anchor from moving into the down position. Additionally, a magnetic yoke surrounds the current carrying element and the anchor. A magnetic flux flowing through the magnetic yoke moves the anchor into the down position. A magnetic yoke surrounding the current carrying element and the oscillator provides a magnetic flux flowing through the magnetic yoke moves the oscillator into the first position, or into the second position. | 2009-06-18 |
20090153277 | RELAY WITH OVERTRAVEL ADJUSTMENT - An electromagnetic relay has an overtravel adjustment to set the gap in the contact arrangement. The armature is actuated by a relay coil and linked to a pusher to drive the pusher to operate the contact system. The pusher includes a rotary dial disposed in a slot on the pusher adjacent to the armature. The rotary adjustment increases or decreases a gap of the contacts to provide an over-travel adjustment. The pusher includes bifurcated tines defining the slot for receiving an armature linkage and the rotary adjustment. The rotary adjustment includes a head and a post depending from the head. The post is disposed within the slot and the head portion in contact with the armature linkage portion. The rotary adjustment sets the distance between the forward edge and the armature to achieve the desired overtravel for the contact arrangement. | 2009-06-18 |
20090153278 | VEHICLE SWITCH - A vehicle switch has a case, a movable body, a spring, a magnet, a detector, and an operating shaft. The movable body is reciprocably accommodated in the case. The spring pushes the movable body in a direction away from an internal bottom of the case. The magnet is attached to the movable body. The detector detects a magnetic flux density generated from the magnet. A lower end of the operating shaft is in contact with the movable body. The movable body has a press contact portion with which the operating shaft is in contact at a point or along a line. | 2009-06-18 |
20090153279 | SINGLE DRIVE BETATRON - A betatron includes a betatron magnet with a first guide magnet having a first pole face and a second guide magnet having a second pole face. Both the first and the second guide magnet have a centrally disposed aperture and the first pole face is separated from the second pole face by a guide magnet gap. A core is disposed within the centrally disposed apertures in an abutting relationship with both guide magnets. The core has at least one core gap. A drive coil is wound around both guide magnet pole faces. An orbit control coil has a contraction coil portion wound around the core gap and a bias control portion wound around the guide magnet pole faces. The contraction coil portion and the bias control portion are connected but in opposite polarity. Magnet fluxes in the core and guide magnets return through peripheral portions of the betatron magnet. | 2009-06-18 |
20090153280 | STRUCTURE OF TRANSFORMER - A transformer includes a first bobbin piece, a second bobbin piece, a first pin, a second pin and a magnetic core assembly. The first bobbin piece has a first channel therein and a covering element, and a primary winding coil is wound on the first bobbin piece. The second bobbin piece includes a first secondary side plate, a second secondary side plate, a plurality of partition plates, a wall portion, and a secondary base, and a secondary winding coil is wound on the second bobbin piece. The second pin includes a wire-arranging part, an insertion part and an intermediate part, wherein the wire-arranging part is protruded from the second secondary side plate, the intermediate part is buried in the wall portion, and the insertion part is protruded from the bottom surface of the secondary base. The magnetic core assembly is partially embedded within said first channel of said first bobbin piece and said second channel of said second bobbin piece. A first terminal of the secondary winding coil is fixed on the first pin and a second terminal of the secondary winding coil is fixed on the wire-arranging part of the second pin. At least parts of the second bobbin piece are received in the covering element of the first bobbin piece, and the covering element has an insulating partition for isolating the magnetic core assembly from the primary winding coil and the secondary winding coil. | 2009-06-18 |
20090153281 | METHOD AND SYSTEM FOR AN INTEGRATED CIRCUIT PACKAGE WITH FERRI/FERROMAGNETIC LAYERS - Methods and systems for an integrated circuit package with ferri/ferromagnetic layers are disclosed and may include processing a received signal via a hybrid including an integrated circuit bonded to a multi-layer package including integrated layers of ferrimagnetic material and/or ferromagnetic material, metal interconnect materials and insulating materials. The received signal may be filtered, amplified, and/or impedance matched via the integrated layers of ferrimagnetic material and/or ferromagnetic material. The integrated circuit may be hybridized to the multi-layer package utilizing a flip-chip bonding technique. The hybridized multi-layer package and integrated circuit may be coupled to a printed circuit board utilizing a flip-chip bonding technique. The ferromagnetic material and/or ferrimagnetic material may be deposited on the multi-layer package. The magnetic material may be deposited on the multi-layer package using an ink printing technique and/or a spin-on technique. One or more surface mount devices may be coupled to the multi-layer package. | 2009-06-18 |
20090153282 | ELECTRONIC COMPONENT AND PRODUCTION METHOD THEREOF - There is provided an electronic component formed by adopting an adhesion reinforcement structure to an external electrode or the like, which is embedded in a protecting section made of a resin and part of which is exposed. Even when an external force is applied through the external electrode, the external force can be broadly dispersed all over a connecting section with the protecting section due to the adhesion reinforcement structure, to suppress an influence of the external force on a wiring, and whereby it is possible to omit a substrate that has been one of constitutional elements of a conventional electronic component, so as to realize reduction in height of the electronic component by the height of the substrate. | 2009-06-18 |
20090153283 | MINIATURE TRANSFORMERS ADAPTED FOR USE IN GALVANIC ISOLATORS AND THE LIKE - A component coil for constructing transformers and the transformer constructed therefrom are disclosed. The component coil includes a substrate having an insulating layer of material having top and bottom surfaces. First and second traces are included on the top and bottom surfaces. Each trace includes a spiral conductor. The inner ends of the spiral conductors are connected by a conductor that passes through the insulating layer. The first and second spiral conductors are oriented such that magnetic fields generated by the first and second spiral conductors have components perpendicular to the top surface and in the same direction. The component coils can be used to construct a power transformer or a galvanic isolator. | 2009-06-18 |
20090153284 | INDUCTOR PACKAGING FOR POWER CONVERTERS - A vehicular power converter includes switches and first and second inductive components. The first and second inductive components have substantially adjacent portions and are coupled to the plurality of switches such that when current flows from the plurality of switches and through the first and second inductive components, flux generated by the current flowing through the adjacent portions of the first and second inductive components and located between the adjacent portions is oriented in substantially opposite directions. | 2009-06-18 |
20090153285 | METHOD AND APPARATUS FOR TRANSFERRING ENERGY IN A POWER CONVERTER CIRCUIT - A reduced cost energy transfer element for power converter circuits. In one embodiment, an energy transfer element according to an embodiment of the present invention includes a magnetic element having an external surface with at least a first winding and a second winding wound around the external surface of the magnetic element without a bobbin. As such, energy to be received from a power converter circuit input is to be transferred from the first winding to the second winding through a magnetic coupling provided by the magnetic element to a power converter circuit output. | 2009-06-18 |