| 23rd week of 2016 patent applcation highlights part 71 |
| Patent application number | Title | Published |
|---|
| 20160164426 | A Frequency Converter - A frequency converter ( | 2016-06-09 |
| 20160164427 | Apparatus and Method for Controlling DC-AC Power Conversion - An apparatus and method for controlling the delivery of power from a DC source to an AC grid includes an inverter configured to deliver power from the unipolar input source to the AC grid and an inverter controller. The inverter includes an input converter, an active filter, and an output converter. The inverter controller includes an input converter controller, an active filter controller and an output converter controller. The input converter controller is configured to control a current delivered by the input converter to a galvanically isolated unipolar bus of the inverter. The output converter is configured to control the output converter to deliver power to the AC grid. Additionally, the active filter controller is configured to control the active filter to supply substantially all the power that is deliver by the output controller to the AC grid at a grid frequency. | 2016-06-09 |
| 20160164428 | METHODS AND DEVICES FOR DETECTING THE INPUT VOLTAGE AND DISCHARGING THE RESIDUEVOLTAGE - The present invention relates to power conversion systems, specifically, it relates to a device for detecting the DC voltage rectified from the AC power supply voltage in an AC-DC converter, primarily used to determine whether the DC input voltage is under a brown-out level and to monitor whether the AC power supply is removed and to discharge the residue DC voltage generated in a high frequency filter capacitor, which is used to filter high frequency noise signals of the AC power supply, during the removal of the AC power. | 2016-06-09 |
| 20160164429 | CONSTANT INRUSH CURRENT CIRCUIT FOR AC INPUT POWER SUPPLY UNIT - A power supply circuit includes a rectifier module configured to rectify an input voltage and a capacitor including a first terminal coupled to the rectifier module. In addition, the power supply circuit includes first and second transistors. The first transistor couples to a second terminal of the capacitor, and the second transistor couples in series to the first transistor. The power supply circuit also includes a resistor, configured to set an inrush current value, in parallel with the second transistor. When coupled to a power supply, the power supply circuit is configured to turn-on the first transistor such that an inrush current flows, at the inrush current value, through the capacitor, first transistor, and resistor. After a delay time, the power supply circuit is configured to turn-on the second transistor such that the inrush current drops to around zero, thus maintaining a low impedance path during steady-state operation. | 2016-06-09 |
| 20160164430 | VOLTAGE DETECTION CIRCUIT AND A METHOD OF DETECTING VOLTAGE CHANGES - A power conversion system and a method for voltage change detection, specifically, relates to a detection circuit implemented in the AC-DC power converter, detect the voltage change. The AC input voltage is rectified to convert into a DC input voltage transmitted to a detection unit generating a detection voltage signal at different logical states corresponding to the input voltage changes. A charge current source unit is used for charging the capacitor when the detection voltage signal is in a second state and a discharge current source unit is used for discharging the capacitor when the detection voltage signal is in a first state. A primary comparator compares the voltage changes of the capacitor in the alternating charge and discharge processes with a critical zero potential and outputs a detection signal identifying the changing trend of the input voltage. | 2016-06-09 |
| 20160164431 | DUAL MODE DC-AC INVERTER SYSTEM AND OPERATION - A dual mode direct current-to-alternating current (DC-AC) inverter is capable of operating either with or without connection to an active external AC power source. The dual mode DC-AC inverter may operate in “current control mode” when connection to the active AC power source is present and may operate in “power control mode” when connection to the active external AC source is absent. Processes for operating an array of these DC-AC inverters are disclosed. The dual mode operation capability enables the DC-AC inverters to function both in the grid connected mode (i.e., current control mode) as well as off-grid mode (i.e., power control mode). The system is configured to sense the presence or absence of grid power and automatically select the appropriate mode of operation. For the power control mode of operation, a process may include designating a master from the array of DC-AC inverters in order to establish the voltage and frequency reference. | 2016-06-09 |
| 20160164432 | POWER-OVER-ETHERNET POWERED INVERTER - An apparatus may include a data management assembly and a DC to AC inverter assembly. The data management assembly may include a data input, a data output, and a power port. The data management assembly may be configured to receive in combination a data signal and a variable DC input voltage on the data input, separate the received data signal from the input voltage, output the data signal on the data output, and output the input voltage on the power port. The DC to AC inverter assembly may be configured to receive the input voltage from the power port, boost the input voltage to a predetermined DC stepped-up voltage that is constant for different input voltages, convert the stepped-up voltage to an AC voltage, and output the AC voltage on a power output. | 2016-06-09 |
| 20160164433 | PIEZOELECTRIC ELEMENT INCLUDING MESOPOROUS PIEZOELECTRIC THIN FILM - A piezoelectric element includes: an upper electrode having acoustic transparency; a lower electrode; and a diaphragm disposed between the upper electrode and the lower electrode and configured of a mesoporous piezoelectric thin film. The upper electrode, the lower electrode, and the diaphragm are electrically insulated from one another. | 2016-06-09 |
| 20160164434 | TRIBOELECTRIC ENERGY GENERATOR USING CONTROL OF DIPOLE POLARIZATION DIRECTION AND METHOD OF FABRICATING THEREOF - Provided are a triboelectric energy generator using a control of a dipole polarization direction and a method of fabricating the same. The present invention controls a direction of a charging property generated by friction through a control of a dipole polarization using a ferroelectric or piezoelectric property of a material, and by using this control, the present invention is related to a triboelectric energy generator in a disk type in which a frictional charging material is slidable on a thin film only using control of a dipole polarization without need of an additional patterning process and output power is improved. | 2016-06-09 |
| 20160164435 | GARMENT HAVING TRANSDUCER CAPABILITIES - The invention provides a garment having transducer capabilities and comprising an outer layer ( | 2016-06-09 |
| 20160164436 | DRIVING APPARATUS AND LENS DRIVING APPARATUS HAVING THE SAME - A driving apparatus has a vibration plate, a vibrator having a piezoelectric element that excites vibration of the vibration plate, and first and second contact parts, and a friction member being in contact with the contact parts. The vibrator and the friction member relatively move with respect to each other, and the contact parts are provided at positions with and interpose an odd number of antinodal lines of vibration generated in a first direction of the vibrator along with excitation, and provided at positions with and interpose an odd number of nodal lines of vibration generated in a second direction of the vibrator along with excitation. | 2016-06-09 |
| 20160164437 | Piezoelectric Power Generation System - A piezoelectric power generation device includes a stator, a rotor, and one or more piezoelectric power generation elements. The stator comprises an internal surface which defines an internal orifice. The one or more piezoelectric power generation elements are disposed on the internal surface of the stator. The rotor is disposed within the internal orifice comprising one or more lobes formed on an outside surface of the rotor. The rotor is configured to rotate with respect to the stator and the one or more piezoelectric power generation elements. The one or more lobes contact the one or more piezoelectric power generation elements as the one or more lobes rotate past the one or more piezoelectric power generation elements. The one or more piezoelectric power generation elements generate energy when contacted by the one or more lobes. | 2016-06-09 |
| 20160164438 | MOTOR CONTROL APPARATUS AND OPERATION METHOD FOR THE SAME - Provided are a motor control apparatus controlling a motor including a stator and progressing or retreating a screw so that pressure is formed in a piston provided in a brake for braking a vehicle, and an operation method thereof and the motor control apparatus includes: the motor including a rotor with a permanent magnet and a coil forming an electromagnetic field; an encoder outputting an encoder pulse and a reference pulse to correspond to rotation of the motor; and an electronic control unit controlling the motor based on the encoder pulse and the reference pulse of the encoder, wherein the location of the rotor is determined based on the encoder pulse and the reference pulse input from the encoder when the motor rotates by forcibly rotating the motor to control the motor when the motor starts, thereby starting the motor when the hall sensor is abnormal or even though the hall sensor is not provided by controlling the motor. | 2016-06-09 |
| 20160164439 | Control Methods and Systems for Motors and Generators Operating in a Stacked Configuration - While motors or generators stacked in series may allow for higher operating voltages, such motors or generators may also exhibit instability. To minimize instability, the motors or generators may be controlled to have an approximately equal current. An example motor system may include motor stacks connected in series, each motor stack exhibiting a respective stack voltage and a respective differential power (based on a difference in power between motors in the motor stack). A control system may average the stack voltages to generate an average stack voltage and generate a nominal stack power corresponding to each stack voltage. The control system may receive the differential powers, combine each differential power and nominal stack power for the respective motor stack to generate first and a second motor powers, and control each motor stack using the first and second motor powers. | 2016-06-09 |
| 20160164440 | SOLAR ENERGY UTILIZATION SYSTEM - A solar energy utilization system includes a solar panel, a motor driven by an inverter circuit functioning as a motor drive circuit with power output by the solar panel, a solar output voltage monitor functioning as a monitor that monitors an input or an output of the solar panel and also functioning as a monitor that monitors an input or an output of the inverter circuit, and a controller. The controller has a control mode in which the inverter circuit is controlled such that an output voltage of the solar panel is maintained at a voltage higher than a maximum power point voltage. In this control mode, the controller performs the control such that a rotation speed of the motor is changed repeatedly at predetermined timings. | 2016-06-09 |
| 20160164441 | METHOD FOR DIAGNOSING ELECTRIC WATER PUMP OF ENGINE - A method for diagnosing an electric water pump of an internal combustion engine includes determining whether a present condition is a coil-open diagnosis condition that enables diagnosis of whether any coil of a sensorless 3-phase motor used in the electric water pump is open. When the coil-open diagnosis condition is satisfied, whether a coil of one phase is open is determined by using a change in phase currents. When the coil-open diagnosis condition is satisfied, whether coils of two phases are open is determined by using a magnitude of a motor torque or a magnitude of an average phase current. When the coil-open diagnosis condition is satisfied, whether any coil of the motor is open during driving of the motor is determined by using a variation in the motor torque. | 2016-06-09 |
| 20160164442 | METHOD FOR ASCERTAINING A COMMUTATION ANGLE - In a method for ascertaining a commutation angle in a permanently excited synchronous motor, the commutation angle indicates the position of a rotor within a magnetic period of the synchronous motor and is used for the field-oriented energization of the synchronous motor. The method includes the steps of specifying a random commutation angle as starting point of the method, impressing a current vector into the motor using the initially randomly specified commutation angle, ascertaining a positional deviation of the rotor, varying the commutation angle used for the energization with the aid of a controller structure in order to counteract the ascertained positional deviation, so that the commutation angle that comes about after a stabilizing period corresponds to the actual commutation angle of the rotor, an initial speed of the rotor being taken into account when ascertaining the positional deviation of the rotor. | 2016-06-09 |
| 20160164443 | CONTROL DEVICE, DRIVING DEVICE, AND IMAGE FORMING APPARATUS - A control device includes a motor driving unit that supplies electric power to a motor according to a magnetic-pole-phase signal output from the motor; and a rotational-position detecting unit that converts the magnetic-pole-phase signal into a rotational-position detection signal and outputs the rotational-position detection signal. The rotational-position detection signal indicates a rotation amount and a rotation direction of an output shaft of the motor and has a higher resolution than the magnetic-pole-phase signal. | 2016-06-09 |
| 20160164444 | Method and System for Eliminating Low Frequency Oscillation Between Generators - A method and system for eliminating the low-frequency oscillation between generators. By way of measuring the absolute rotor angle of a generator and controlling the rotor rotational speed, the absolute rotor angles obtained through measurement are the same when each GPS pulse per second signal arrives. The absolute rotor angles are angles of the internal potential Eq of the generator leading a GPS reference vector. Through the absolute rotor angle, zero steady state error control of the frequency and the rotor angle is achieved and the position of the generator rotor can remain unchanged in the PPS determined rotating coordinate system, thus suppressing the low-frequency oscillation better even without the need of remote measurement and achieving automatic local balance of active power during variation of loads. Accordingly, the power fluctuation on transmission lines is decreased while safe and stable operation of a large-scale interconnected power grid is achieved. | 2016-06-09 |
| 20160164445 | Field Current Profile - An output of a generator may vary according to the speed of the engine, physical characteristics of the engine, or other factors. A profile for a generator that describes a periodic fluctuation in an operating characteristic for the generator is identified. A field current of an alternator associated with the generator is modified based on the profile for the generator in order to counter variations in the output of the generator. | 2016-06-09 |
| 20160164446 | METHOD AND APPARATUS FOR BACK ELECTROMOTIVE FORCE (EMF) POSITION SENSING IN A CRYOCOOLER OR OTHER SYSTEM HAVING ELECTROMAGNETIC ACTUATORS - A method includes driving a component in an electromagnetic actuator back and forth during one or more cycles of the actuator, where the actuator includes a voice coil. The method also includes identifying a back electromotive force (EMF) voltage of the voice coil during at least one of the one or more cycles. The method further includes determining whether a stroke of the component is substantially centered using the back EMF voltage of the voice coil. In addition, the method includes, based on the determination, adjusting one or more drive signals for the voice coil during one or more additional cycles of the actuator. Determining whether the stroke of the component is centered could include determining whether the back EMF voltage of the voice coil is substantially maximized or determining whether times between extremes in the back EMF voltage are substantially equal. | 2016-06-09 |
| 20160164447 | BLDC Motor - A BLDC motor, has a first sub-motor and a second sub-motor. The first and second sub-motors have independent input terminals and a common rotor, including a common output shaft. In a normal operating mode the two sub-motors operate together as one motor to output a normal operating power of the motor. In an emergency operating mode, when one sub-motor has become faulty and generates a braking torque, the normal sub-motor is operated to generate a torque to compensate for the braking torque produced by the faulty sub-motor. | 2016-06-09 |
| 20160164448 | ELECTROMAGNETIC COMPATIBILITY FILTER - The variable speed drive system is arranged to receive input power at fixed input voltage magnitude and frequency and provide power at a variable voltage and variable frequency. The variable speed drive includes a converter connected to an AC source to convert the input voltage to a boosted DC voltage. A DC link connected to the converter filters the DC voltage from the converter stage. An inverter converts the DC link voltage into variable voltage and the variable frequency AC power. An electromagnetic compatibility (EMC) filter includes a series RC circuit from phase-to-ground circuit for each input phase of the converter. The RC circuit includes a resistor connected in series with a capacitor between the converter phase and ground. The EMC filter is connected to the line side of the converter. An inductor is connected between the input source and the EMC filter. | 2016-06-09 |
| 20160164449 | STALL DIAGNOSIS APPARATUS FOR MOTOR OF AIR CONDITIONING ACTUATOR - A stall diagnosis apparatus for a motor of an air conditioning actuator includes: a resistor connecting from a first door actuator of a Heating, Ventilation and Air Conditioning (HVAC) system of a vehicle to the ground; a resistor connection circuit connecting from a VCC power terminal to the resistor; a switch disposed on the resistor connection circuit; a first circuit and a second circuit branched from a motor connection circuit connecting from the VCC power terminal to a motor of the first door actuator through a motor driver and the resistor connection circuit, respectively; a current sensing circuit unit including an input terminal connected to the first circuit and the second circuit and outputting a current signal corresponding to a voltage value between the motor connection circuit and the resistor connection circuit; and a controller for controlling the motor and determining whether or not the motor is stalled. | 2016-06-09 |
| 20160164450 | SOLAR GENERATION SYSTEMS HAVING A COMMON RECEIVER BRIDGE AND COLLECTORS WITH MULTIPLE MOBILE WEBS - The invention relates to a system for concentrating radiation in order to broaden the scale and efficiency of solar generation technologies that consist in a field of vast reflecting surfaces, in the form of collector webs, which concentrate the radiation in a common receiver bridge, which can use a thermal, photovoltaic or thermomechanical Stirling engine receiving mechanism. The collector webs hang from a structure of very tall portals and consist of mirrors adhered to a bundle of cables, forming a surface with variable topology, which can vary the shape and position thereof by stretching and tilting the support structure thereof, which can rotate to track the position of the sun. In addition, the invention provides a receiver which is installed on a bridge that runs longitudinally at height over the solar field. Each receiving mechanism offers the alternative of mobile modular receiving units such as funiculars or a stationary system adhered to the bridge in longitudinal series. The structure of the bridge supports a service access, a longitudinal area for installing thermal fluid matrix pipes and a power discharge network in accordance with the receiving mechanism installed. | 2016-06-09 |
| 20160164451 | Spectrally-Engineered Solar Thermal Photovoltaic Devices - A solar thermal photovoltaic device, and method of forming same, includes a solar absorber and a spectrally selective emitter formed on either side of a thermally conductive substrate. The solar absorber is configured to absorb incident solar radiation. The solar absorber and the spectrally selective emitter are configured with an optimized emitter-to-absorber area ratio. The solar thermal photovoltaic device also includes a photovoltaic cell in thermal communication with the spectrally selective emitter. The spectrally selective emitter is configured to permit high emittance for energies above a bandgap of the photovoltaic cell and configured to permit low emittance for energies below the bandgap. | 2016-06-09 |
| 20160164452 | Rail-Less Roof Mounting Clamp Assembly Components - A rail-less roof mounting system for installing photovoltaic (PV) modules on a roof structure comprises a base mount assembly that engages with a clamp assembly and attaches to the roof structure. The base mount assembly comprises a base member having a waterproof means, a block slider, a top slider and a covering means. An elevated seal portion of a block slider includes a borehole to receive the waterproof means. A vertical engaging portion of the block slider is attached with a sliding seal member of the top slider. The clamp assembly includes a clamp member and a plate member and the clamp member is attached with a track of the top slider. The clamp member interlocks the PV modules to provide a corner-to-corner coupling arrangement, which enables the connection of PV module corners to adjacent PV module corners by sandwiching above and beneath frame members of the PV modules. | 2016-06-09 |
| 20160164453 | Solar Roof Tile - Photovoltaic solar panels are a know means of generate electricity from ultra-violet and solar power. Known problems associated with photovoltaic solar panels include poor efficiency and a short apparatus lifespan; alongside an inability to be easily integrated into architectural surroundings. Disclosed herein is a photovoltaic solar panel, designed to be attached to the front face of a roof tile, which generates electricity with an improved efficiency, has increased longevity and can be incorporated into a variety of architectural surroundings. | 2016-06-09 |
| 20160164454 | Coaxial Drive Tracking System for Use with Photovoltaic Systems - A solar energy collection system for converting solar energy to electricity that includes solar arrays mounted on a frame, Each array is set on a tracker head that is supported on a pedestal; each pedestal mounts onto a beam. Elevators pivot the arrays, where each elevator is made up of a shaft with a threaded end coupled to a drive nut. An upper end of each drive nut gimbal mounts to a portion of the tracker head; rotating a lower end of each shaft raises or lowers the drive nut, thereby pivoting each array. The vertical shafts are ganged together and driven by a single motor. Further included with each pedestal are azimuth orientation shafts that also mount to each tracker head. Rotating each orientation shaft adjusts an azimuth of an associated array. The orientation shafts are ganged together and are rotated by a single motor. | 2016-06-09 |
| 20160164455 | FASTENING DEVICE AND FASTENING METHOD OF SOLAR CELL MODULE AND FASTENING STRUCTURE - A fastening device which adjusts the position of a frame to match the size of a solar cell module and shortens the installation time has been desired. A fastening device | 2016-06-09 |
| 20160164456 | Photovoltaic System Power Tracking Method - A photovoltaic system including a photovoltaic cell, and an electronic module connected to the photovoltaic cell. The electronic module is adapted to produce at least one control signal indicative of electrical power being generated by the photovoltaic cells. A tracking controller is adapted to receive the control signal(s) and based on the control signal(s), the controller is adapted to control a tracking motor for adjusting the system so that electrical power generated by the photovoltaic cells is increased. The photovoltaic system may include an optical element, adapted for concentrating solar light onto the photovoltaic cells. The electronic module preferably performs direct current (DC) to direct current (DC) power conversion and maximum power point tracking by electrical power, current, or voltage at either their inputs or their outputs. Alternatively, the tracking controller is configured to also perform maximum power point tracking by increasing to a local maximum electrical power by varying at least one of (i) current or voltage output from the photovoltaic cell or (ii) current or voltage output from the electronic module. | 2016-06-09 |
| 20160164457 | Smart Junction Box for Photovoltaic Solar Power Modules with Safe Mode and Related Method of Operation - The invention comprises: a smart junction box with a safe mode for photovoltaic solar power modules; and the related method of operation. Power MOSFETs are used as active bypass diodes during the normal operation of the smart junction box, but in safe mode the power MOSFETs are turned on continuously, thereby reducing the output voltage to a safe level of approximately 200 mV. A Non Volatile Memory (NVM) keeps the module in the safe mode after power from the PV cells is interrupted by momentary shading or night. The smart junction box includes transmitter and receiver circuits for wirelessly communicating with other smart junction boxes. The smart junction box enters safe mode in response to receiving a shut-down signal, and exits safe mode in response to receiving a restart signal. The smart junction box acts as a signal repeater, thereby ensuring that the shut-down and restart signals propagate to all junction boxes in the solar array. Some embodiments of the smart junction box include at least one detection circuit for detecting the interruption of current flowing through the junction box, and the receiver circuit typically interprets the detected interruption of current as a shut-down signal. | 2016-06-09 |
| 20160164458 | HOLLOW SUPPORTS AND ANCHORS FOR MECHANICAL RESONATORS - A micromechanical resonator having one or more anchoring stems which are hollow to increase resonator Q factor. By way of example a micromechanical disk resonator embodiment is shown utilizing a resonant micromechanical disk anchored by a stem between at least one electrode used for input and output. To increase resonator Q, a hollow stem is utilized in which an outer thickness of stem material surrounds a hollow area interior of the stem, or that is fabricated with a plurality of vias and/or fabricated substructures containing hollow spaces in the stem material. Measurements have confirmed that Q values can be increased using the hollow core stems by a factor of 2.9 times in certain implementations and operating modes. | 2016-06-09 |
| 20160164459 | OSCILLATOR AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - An oscillator may include first to N-th delay signal generation units, each of which delays and inverts an input signal thereof. Each of the first to N-th delay signal generation units includes an inverter suitable for driving a first node with a low level voltage when a voltage of an input node thereof is higher than a first reference voltage, and driving the first node with a high level voltage when the voltage of the input node thereof is lower than the first reference in voltage; a RC delay unit electrically coupled between the first node and a second node, and suitable for to delaying a signal of the first node and outputting the delayed signal of the first node to the second node; and a buffer suitable for outputting a high level signal when a voltage of the second node is higher than a second reference voltage, and outputting a low level signal when the voltage of the second node is lower than the second reference voltage. | 2016-06-09 |
| 20160164460 | OSCILLATOR REGULATION CIRCUITRY AND METHOD - Oscillator regulation circuitry is provided for regulating a frequency of an output signal generated by an oscillator. Oscillator regulation circuitry has frequency sensing circuitry for sensing the frequency of the output signal and generating a first signal depending on the frequency, and control circuitry which generates the oscillator control signal based on the comparison between the first signal and a non-oscillating reference signal. The frequency sensing circuitry includes at least one switched capacitor. This approach provides improved noise reduction, less sensitivity to process, temperature and voltage variations, and a more linear scaling of the frequency with the reference signal, compared to previous techniques. | 2016-06-09 |
| 20160164461 | CRYSTAL OSCILLATION DEVICE AND SEMICONDUCTOR DEVICE - A wiring pattern for oscillation input signal and a wiring pattern for oscillation output signal are provided on a printed circuit board, and a wiring pattern for ground power source voltage is arranged in a region therebetween. A quartz crystal unit is connected between the wiring pattern for oscillation input signal and the wiring pattern for oscillation output signal and one ends of capacitors serving as load capacitors thereof are connected to the wiring pattern for ground power source voltage. Further, a wiring pattern for VSS is arranged so as to enclose these wiring patterns, and a wiring pattern for VSS is arranged also in a lower layer in addition thereto. By this means, reduction of a parasitic capacitance between an XIN node and an XOUT node, improvement in noise tolerance of these nodes and others can be achieved. | 2016-06-09 |
| 20160164462 | SEMICONDUCTOR APPARATUS, OSCILLATION CIRCUIT, AND SIGNAL PROCESSING SYSTEM - A semiconductor apparatus includes: first and second external terminals that are connected to respective both ends of an piezoelectric vibrator, in which the piezoelectric vibrator is externally disposed; an inverting amplifier that is disposed between the first and second external terminals; a feedback resistance that feeds back an output of the inverting amplifier to an input of the inverting amplifier; a first capacitative element that is disposed between the first external terminal and a reference voltage terminal; a first resistive element that is disposed in series with the first capacitative element; a second capacitative element that is disposed between the second external terminal and the reference voltage terminal; and a second resistive element that is disposed in series with the second capacitative element. | 2016-06-09 |
| 20160164463 | MAGNETORESISTIVE MIXER - A magnetoresistive mixer, comprising a spiral coil, a bridge-type magnetoresistive sensor and a magnetic shielding layer, wherein the spiral coil is located between the bridge-type magnetoresistive sensor and the magnetic shielding layer. Four tunnel magnetoresistive sensor units forming the bridge-type magnetoresistive sensor respectively contain N array-type magnetic tunnel junction rows. The magnetic tunnel junction rows are connected in series, parallel, or combination of series and parallel connections to form two port structures. The four tunnel magnetoresistive sensor units are respectively located in two regions of the spiral coil having opposite current directions, sensing axes of magnetic tunnel junctions are perpendicular to the current directions, and in addition, the distribution characteristics of magnetic fields in directions of the sensing axes of the tunnel magnetoresistive sensor units to the magnetic field in the two regions are opposite, and the distribution characteristics in a single region are the same. The first frequency signal is input through the two ends of the spiral coil, the second frequency signal is input between the power and -ground ports of the bridge-type magnetoresistive sensor, and mixing signals are output through a signal output end of the bridge-type magnetoresistive sensor. The magnetoresistive mixer has the characteristics of good linearity, good input signal isolation, and low power consumption. | 2016-06-09 |
| 20160164464 | SIGNAL PROCESSING CIRCUIT FOR MITIGATING PULLING EFFECT AND ASSOCIATED METHOD - A signal processing circuit has a first mixer, a first amplifier, and a pulling effect mitigation circuit. The first mixer mixes a first input signal and a first oscillation signal to generate a first output signal, wherein the first oscillation signal is generated by dividing a frequency of a reference clock with a frequency dividing factor. The first amplifier amplifies the first output signal, and generates an amplified output signal at an output terminal of the first amplifier. The pulling effect mitigation circuit is coupled to the output terminal of the first amplifier, and generates a compensation signal to the output terminal for reducing at least an N | 2016-06-09 |
| 20160164465 | BUFFER CIRCUIT CAPABLE OF IMPROVING AMPLIFICATION PERFORMANCE - A buffer circuit may include an amplification reference voltage generation unit and an amplification unit. The amplification reference voltage generation unit may generate an amplification reference voltage. The amplification reference voltage generation unit configured to change a level of the amplification reference voltage based on a level of an output signal. The amplification unit may generate the output signal by differentially amplifying an input signal and the amplification reference voltage. | 2016-06-09 |
| 20160164466 | Asymmetric Multilevel Backoff Amplifier with Radio-Frequency Splitter - A radio frequency (RF) amplification system or transmitter includes one or more power amplifiers and a controller that is configured to adjust amplitudes and phases of RF input signals of the one or more power amplifiers and supply voltages applied to the one or more power amplifiers. The system may include a single digital-to-RF modulator and a power divider to drive multiple power amplifiers. A power combiner may also be provided to combine outputs of the power amplifiers. In at least one implementation, amplitude adjustment of the RF input signals of the one or more power amplifiers may be used to provide transmit power control and/or power backoff. | 2016-06-09 |
| 20160164467 | AMPLIFYING DEVICE AND OFFSET VOLTAGE CORRECTION METHOD - A state wherein offset voltage is reduced can be maintained regardless of environmental fluctuation. A differential amplification unit has differential pair transistors, and amplifies a difference between input voltages. An offset voltage measurement unit samples offset voltage generated due to an imbalance in the current drive capacities of the differential pair transistors in a first mode, and determines the polarity of the sampled offset voltage in a second mode. A control unit switches the operating mode between the first mode and second mode, and outputs a control signal for correcting the offset voltage in accordance with the polarity determination result when in the second mode. An offset voltage correction unit corrects the offset voltage based on the control signal. | 2016-06-09 |
| 20160164468 | Amplifier Dynamic Bias Adjustment for Envelope Tracking - An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor. | 2016-06-09 |
| 20160164469 | Amplifier Dynamic Bias Adjustment for Envelope Tracking - An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor. | 2016-06-09 |
| 20160164470 | METHOD, APPARATUS AND SYSTEM FOR ENVELOPE TRACKING - This disclosure relates generally to the field of wireless communication infrastructure, and more particularly to a method, apparatus and system for envelope tracking. The system for envelope tracking comprising: a transistor; an RF transistor; a driver; a switcher current source; and a subtracting network; wherein the system is configured such that when an envelope voltage is less than a predetermined voltage value, the RF transistor is configured for decreasing an amount of absorbed biasing current, and when the envelope voltage is greater than a predetermined voltage value, the RF transistor is configured for increasing an amount of absorbed biasing current. The goal of RF transistor sinking is to absorb the redundant biasing current generated by the envelope tracking supply modulator to eliminate distortions. | 2016-06-09 |
| 20160164471 | RADIO FREQUENCY DEVICES WITH SURFACE-MOUNTABLE CAPACITORS FOR DECOUPLING AND METHODS THEREOF - An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply. | 2016-06-09 |
| 20160164472 | Balanced Doherty Power Amplifier Circuit and Radio Transmitter - A balanced Doherty power amplifier circuit and a radio transmitter is provided. The circuit includes a first peak amplifier, where an input end of the first peak amplifier is connected to a first input end of the circuit, and a first mean amplifier, where an input end of the first mean amplifier is connected to a second input end of the circuit, and an output end of the first mean amplifier is connected to an input end of a first matching unit. The circuit also includes a second peak amplifier, where an input end of the second peak amplifier is connected to the first input end of the circuit; and a second mean amplifier, where an input end of the second mean amplifier is connected to the second input end of the circuit, and an output end of the second mean amplifier is connected to an input end of the second matching unit. | 2016-06-09 |
| 20160164473 | Doherty power amplifier - Disclosed is a Doherty power amplifier. At least one power amplification tube and other power amplification tubes in the Doherty power amplifier are located in different planes. | 2016-06-09 |
| 20160164474 | SYSTEMS AND METHODS RELATED TO LINEAR AND EFFICIENT BROADBAND POWER AMPLIFIERS - Systems and methods related to linear and efficient broadband power amplifiers. A power amplifier (PA) system can include an input circuit configured to receive a radio-frequency (RF) signal and split the RF signal into a first portion and a second portion. The PA system can further include a Doherty amplifier circuit including a carrier amplification path coupled to the input circuit to receive the first portion and a peaking amplification path coupled to the input circuit to receive the second portion. The PA system can further include an output circuit coupled to the Doherty amplifier circuit. The output circuit can include a balance to unbalance (BALUN) circuit configured to combine outputs of the carrier amplification path and the peaking amplification path to yield an amplified RF signal. | 2016-06-09 |
| 20160164475 | HIGH BANDWIDTH AMPLIFIER - An amplifier including: an input terminal coupled to a first node; an output terminal coupled to a second node; and a transistor coupled between a first power source and a second power source, the transistor including: a gate electrode coupled to the first node; a drain electrode coupled to the second node; a source electrode coupled to a third node; and a bulk electrode coupled to a fourth node and configured to receive a bulk voltage to change a threshold voltage of the transistor. | 2016-06-09 |
| 20160164476 | AMPLIFIER WITH TRIPLE-COUPLED INDUCTORS - An apparatus includes an amplifier and a first inductor coupled to an input of the amplifier. The apparatus also includes a second inductor that is inductively coupled to the first inductor and that couples the amplifier to a first supply node. The apparatus further includes a third inductor that is inductively coupled to the first inductor and to the second inductor and that couples the amplifier to a second supply node. | 2016-06-09 |
| 20160164477 | ELECTRIC AMPLIFIER CIRCUIT FOR AMPLIFYING AN OUTPUT SIGNAL OF A MICROPHONE - An electric amplifier circuit for amplifying an output signal of a microphone comprises a supply input terminal (V | 2016-06-09 |
| 20160164478 | SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF THE SAME, AND MOBILE PHONE - A technique capable of maintaining the filter characteristics of a transmitting filter and a receiving filter by reducing the influences of heat from the power amplifier given to the transmitting filter and the receiving filter as small as possible in the case where the transmitting filter and the receiving filter are formed on the same semiconductor substrate together with the power amplifier in a mobile communication equipment typified by a mobile phone is provided. A high heat conductivity film HCF is provided on a passivation film PAS over the entire area of a semiconductor substrate | 2016-06-09 |
| 20160164479 | BUFFER CIRCUIT ROBUST TO VARIATION OF REFERENCE VOLTAGE SIGNAL - A buffer circuit includes a first differential amplifier, second differential amplifier, third differential amplifier, and mixer. The first differential amplifier generates a positive differential signal and a negative differential signal based on an input signal and a reference voltage signal. The second differential amplifier generates a first signal based on the positive differential signal and the negative differential signal. The third differential amplifier generates a second signal having a different phase from the first signal based on the positive differential signal and the negative differential signal. The mixer outputs a signal, generated by mixing the first signal and the second signal, as an output signal. | 2016-06-09 |
| 20160164480 | METHOD, APPARATUS, AND SYSTEM FOR ANALYSIS, EVALUATION, MEASUREMENT AND CONTROL OF AUDIO DYNAMICS PROCESSING - A method, apparatus, and system for measuring and analyzing the effects of dynamics modifying processors on a signal. This new approach utilizes statistical analysis techniques to provide a direct comparison and evaluation between the processed signal and the unprocessed signal's dynamic characteristics. The method identifies and quantifies Effective Dynamic Range, Clip Tolerance, Lower Limit Tolerance, Crest Factor, and Diminuendo Factor, using either peak or r.m.s values. In an alternative embodiment, the invention allows for user adjustment and control of the relative relationship of Crest Factor and Diminuendo Factor, which the user may perceive as loudness. | 2016-06-09 |
| 20160164481 | APPARATUS AND METHODS FOR TUNABLE FILTERS - Apparatus and methods for tunable filters are provided. In certain configurations, a tunable filter includes a semiconductor die attached to a laminated substrate, such as a substrate of a multi-chip module (MCM). The tunable filter includes a vector inductor implemented using two or more conductors arranged on different conductive layers of the laminated substrate. The vector inductor's conductors are inductively coupled to one another and electrically connected in parallel to provide the vector inductor with high quality factor (Q-factor). The semiconductor die includes a variable capacitor that is electrically connected with the vector inductor to operate as a tunable resonator. Additionally, a frequency characteristic of the tunable filter, such as a passband, can be controlled by selecting a capacitance value of the variable capacitor, thereby tuning a resonance of the resonator. | 2016-06-09 |
| 20160164482 | APPARATUS AND METHODS FOR HIGH VOLTAGE VARIABLE CAPACITOR ARRAYS WITH DRIFT PROTECTION RESISTORS - Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells. | 2016-06-09 |
| 20160164483 | COMMON MODE FILTER - A common mode filter includes external electrodes formed by printing and curing a conductive paste. The external electrodes of a multilayer structure having a lower electrode layer are formed by curing the conductive paste and an upper electrode layer formed of a solder. | 2016-06-09 |
| 20160164484 | APPARATUS AND METHODS FOR HIGH VOLTAGE VARIABLE CAPACITORS - Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells. | 2016-06-09 |
| 20160164485 | TUNABLE DUAL-BAND BAND-PASS FILTER - A tunable dual-band resonator and a tunable dual-band band-pass filter using the tunable dual-band resonator. The dual-band resonator is structured such that a stub is added to each half-wavelength resonator provided with half-wavelength resonator protrusions (capacity-component adjust parts). The dual-band resonator is made up of an odd-number mode resonator in a shape including a ground conductor disposed on the back surface of a dielectric body, and a strip conductor disposed on the top surface thereof, and an even-number mode resonator in such a shape as to be formed when the stub is connected to an end face on the opposite side of the open-end of the strip, characterized in that a dielectric rod circular in cross section is provided in the space above the respective stubs, and another dielectric rod circular in cross section is provided in the space above the half-wavelength resonator protrusions. | 2016-06-09 |
| 20160164486 | TRANSFORMER FILTER ARRANGEMENT - A transformer filter arrangement including a transformer having a first winding and a second winding is provided. Both of the first and the second windings are located between an outer border and an inner border, which is inside the outer border. The transformer filter arrangement further includes at least one reactive sub circuit, each including at least one inductor. The first winding of the transformer is divided into a plurality of winding segments. At least a first one of the at least one reactive sub circuit being connected in series with the winding segments of the first winding between two such winding segments, and having at least one of the at least one inductor located inside said inner border. | 2016-06-09 |
| 20160164487 | BULK ACOUSTIC WAVE FILTER - A bulk acoustic wave filter may include: a first resonator part including one or more first bulk acoustic wave resonators connected between a signal port for transmitting or receiving a signal and a node connected to an antenna port; and a second resonator part including one or more second bulk acoustic wave resonators connected between the signal port and a ground, wherein a quality factor (IF) value of the one or more first bulk acoustic wave resonators is less than a IF value of the one or more second bulk acoustic wave resonators. | 2016-06-09 |
| 20160164488 | BULK ACOUSTIC WAVE RESONATOR - A bulk acoustic wave resonator may include: a piezoelectric layer including a piezoelectric material; a first electrode disposed on one surface of the piezoelectric layer; a second electrode disposed on the another surface of the piezoelectric layer; and a frame disposed on the one surface of the piezoelectric layer and surrounding the first electrode, wherein the frame is spaced apart from the first electrode by a predetermined gap. | 2016-06-09 |
| 20160164489 | BULK ACOUSTIC WAVE RESONATOR AND FILTER - A bulk acoustic wave resonator and a filter in which partial thicknesses of protection layers or reflection layers thereof are differently formed are provided. The bulk acoustic wave resonator includes a bulk acoustic wave resonating part comprising a piezoelectric layer, and a reflection layer configured to reflect waves of a resonance frequency generated by the piezoelectric layer based on a signal applied to the bulk acoustic wave resonating part. A thickness of a portion of the reflection layer is different from a thickness of a remaining portion thereof. | 2016-06-09 |
| 20160164490 | PIEZOELECTRIC DEVICE AND METHOD FOR FABRICATING THE SAME - The disclosure provides a piezoelectric device includes a piezoelectric vibrating piece and a coating layer. The piezoelectric vibrating piece includes an electrode and an exposed portion. The coating layer is constituted of a material with a sputtering rate lower than a sputtering rate of a material of the electrode, the coating layer covering the exposed portion. | 2016-06-09 |
| 20160164491 | HIGH-FREQUENCY MODULE - In a high-frequency module, a phase and amplitude of a high-frequency signal from a connection conductor between filter devices change due to the signal being transmitted by a takeout circuit unit. When the high-frequency signal at a third external connection terminal is a suppression signal and a high-frequency signal passing through the first filter circuit is a suppression-target signal, the transmission distance in the takeout circuit unit is such that the phase of the suppression signal is approximately inverted with respect to the phase of the suppression-target signal and the suppression signal has approximately the same amplitude as the suppression-target signal. The suppression signal is mixed with the suppression-target signal and components outside of the pass band are cancelled out and the attenuation characteristics of the filter circuit are enhanced. | 2016-06-09 |
| 20160164492 | APPARATUS AND METHODS FOR HIGH VOLTAGE VARIABLE CAPACITOR ARRAYS WITH FEED-FORWARD CAPACITORS - Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells. | 2016-06-09 |
| 20160164493 | HIGH FREQUENCY ATTENUATOR - An attenuator includes: a first circuit including a common collector or common drain amplifier formed of a first transistor having its control node connected to an input of the attenuator and its emitter or source connected to an intermediate node of the attenuator; and a second circuit including a common collector or common drain amplifier formed of a second transistor having its emitter or source connected to the intermediate node and its control node connected to an output of the attenuator. | 2016-06-09 |
| 20160164494 | SEMICONDUCTOR DEVICE AND METHOD FOR ADJUSTING IMPEDANCE OF OUTPUT CIRCUIT - An impedance adjustment circuit includes a counter circuit outputting a count value thereof as a plurality of first impedance adjustment signals, a mode selection circuit setting a second impedance adjustment signal to be in an active/inactive state irrespective of the count value, and a level fixing circuit fixing a third impedance adjustment signal to be in an active state. A pre-stage circuit generates a plurality of first output control signals, a second output control signal, and a third output control signal in response to the first impedance adjustment signals, the second impedance adjustment signal, and the third impedance adjustment signal, respectively, and a data signal. An output circuit includes a plurality of first transistors, a second transistor, and a third transistor connected in parallel to each other between an output terminal and a first power supply wiring. Control terminals of the first transistors, the second transistor, and the third transistor receive the first output control signals, the second output control signal, and the third output control signal, respectively. | 2016-06-09 |
| 20160164495 | AUTO-TUNABLE ANTENNA DEVICES - Auto-tunable antenna devices and methods of using the same are described herein. One method for tuning an antenna of a device includes comparing a reference phase of a reference signal to a return phase of a return signal of the antenna and sending a correction signal to a tunable circuit element of the antenna in response to the reference phase being out of phase with the return phase. | 2016-06-09 |
| 20160164496 | METHODS AND SYSTEMS FOR DYNAMICALLY ADJUSTING FREQUENCY OFFSETS FOR MITIGATING INTERFERENCE - Disclosed herein are methods and systems for dynamically adjusting frequency offsets for mitigating interference. One embodiment takes the form of a process carried out by a mobile radio configured to use an adjustable transmit frequency. The mobile radio estimates an expected base-station-receive power level with respect to transmissions from to a base station. The mobile radio adjusts the transmit frequency to be a center frequency of a radio channel plus a default frequency offset responsive to the estimated expected base-station-receive power level being less than a first threshold. The mobile radio adjusts the transmit frequency to be the center frequency plus a modified frequency offset responsive to the estimated expected base-station-receive power level being greater than a second threshold. The modified frequency offset is greater in magnitude than the default frequency offset. The mobile radio transmits an uplink signal to the base station over the adjusted transmit frequency. | 2016-06-09 |
| 20160164497 | MINIMIZATION OF BIAS TEMPERATURE INSTABILITY (BTI) DEGRADATION IN CIRCUITS - A circuit structure is provided. The circuit structure includes first pfet device. The circuit structure further includes a first nfet device connected to the pfet device. The circuit structure further includes a keeper nfet device that reduces stress associated with the first nfet device by keeping the first nfet device off during its functional state. The circuit structure further includes a keeper pfet device that reduces stress associated with the first pfet device by keeping the first pfet device off during its functional state. | 2016-06-09 |
| 20160164498 | HYBRID DRIVER CIRCUIT - In one embodiment, a voltage mode driver circuit includes a first voltage adjusting circuit configured to provide an adjustable first pseudo-supply voltage to a first node based on a first supply voltage, including generating the first pseudo-supply voltage based on a first reference voltage and feedback from the first node. In this embodiment, the voltage mode driver circuit includes switching circuitry configured to selectively couple one of the first node or a second node to a first differential output terminal and a different one of the first node or the second node to a second differential output terminal based on a data signal. In this embodiment, the voltage mode driver circuit includes a current mode emphasis driver configured to selectively couple one of the first differential output terminal or the second differential output terminal to a first set of one or more current supplies and a different one of the first differential output terminal or second differential output terminal to a second set of one or more current supplies, based on one or more emphasis signals. | 2016-06-09 |
| 20160164499 | SIGNAL INPUT CIRCUIT AND OPERATING METHOD THEREOF - An input circuit includes: an input buffering unit suitable for receiving one or more input data, wherein each toggling time is defined according to a value of each input data; and a data transformation unit suitable for transforming the input data into an output data according to a mapping table and the toggling time of the input data during a data input duration. | 2016-06-09 |
| 20160164500 | DIGITAL CURRENT SENSING IN POWER CONTROLLER - Some embodiments include apparatus and methods having a node to provide a signal, and a control unit arranged to control a value of an output voltage at an output node on an output path based on a duty cycle of the signal and a value of an input voltage. The control unit can also be arranged to cause a change in a resistance on the output path in order to determine a value of a current on the output path based at least on the change in the resistance. | 2016-06-09 |
| 20160164501 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus includes a pipe input/output signal generation block configured to generate a plurality of pipe input signals and a plurality of pipe output signals according to a pipe enable signal, and be initialized according to an error detection signal; a pipe latch group including a plurality of pipe latches, each of the plurality of pipe latches being configured to receive and store an input signal according to a corresponding pipe input signal and output a stored signal as an output signal according to a corresponding pipe output signal; and an error detection block configured to generate the error detection signal according to a pipe end signal, the pipe enable signal, the plurality of pipe input signals and the plurality of pipe output signals. | 2016-06-09 |
| 20160164502 | SYSTEM AND METHOD FOR REDUCING METASTABILITY IN CMOS FLIP-FLOPS - A circuit and method for reducing metastability of a CMOS SR flip flop is provided. The circuit comprises a first switching module and a second switching module that are operatively coupled to a first and second output terminal of the CMOS SR flip-flop. The method includes injecting current onto the first and second output terminals of the CMOS SR flip-flop at mutually opposite directions during permissible mid-range voltages of the output terminals. Further, the method includes driving the output terminals of the CMOS SR flip-flop into the predetermined state of zero and predetermined stable state of Vdd by utilizing the currents injected onto the output terminals. As a result, the metastable point of the CMOS flip-flop is diverted from the corresponding metastable voltage and thereby reduces the metastability of the CMOS SR flip-flop. | 2016-06-09 |
| 20160164503 | LOW-POWER, SMALL-AREA, HIGH-SPEED MASTER-SLAVE FLIP-FLOP CIRCUITS AND DEVICES INCLUDING SAME - An integrated circuit includes a plurality of positive edge-triggered master-slave flip-flop circuits sharing a clock signal. At least one of the positive edge-triggered master-slave flip-flop circuits includes; an input stage that provides a first output signal generated from an input signal in response to the clock signal and an inverted clock signal, a first inverting circuit that generates the inverted clock signal by delaying the clock signal, a transmission gate that receives a second output signal and generates a final output signal, and a second inverting circuit that receives the first output signal and generates the second output signal from the first output signal. The clock signal is applied to an NMOS transistor of the transmission gate and a PMOS transistor of the input stage, and the inverted clock signal is applied to a PMOS transistor of the transmission gate and an NMOS transistor of the input stage. | 2016-06-09 |
| 20160164504 | LATCH CIRCUIT - A latch circuit includes a first PMOS transistor suitable for pull-up driving a second node based on a voltage of a first node, a first NMOS transistor suitable for pull-down driving the second node based on a voltage of the first node, a second PMOS transistor suitable for pull-up driving the first node based on a voltage of the second node, a second NMOS transistor suitable for pull-down driving the first node based on a voltage of the second node, a first separation element suitable for electrically separating the first NMOS transistor from the second node when the first PMOS transistor is turned on, and a second separation element suitable for electrically separating the second NMOS transistor from the first node when the second PMOS transistor is turned on. | 2016-06-09 |
| 20160164505 | JOSEPHSON CURRENT SOURCE SYSTEMS AND METHOD - One embodiment describes a Josephson current source system. The system includes a flux-shuttle loop that is inductively coupled with an AC input signal. The flux-shuttle loop includes a plurality of Josephson junctions spaced about the flux-shuttle loop and being configured, when activated, to sequentially trigger the plurality of Josephson junctions about the flux-shuttle loop in response to the AC input signal to generate a DC output current provided through an output inductor. The system also includes a flux injector that is configured to selectively activate and deactivate the flux-shuttle loop in response to an input signal to control an amplitude of the DC output current. | 2016-06-09 |
| 20160164506 | RESISTOR CONTROLLED TIMER CIRCUIT WITH GAIN RANGING - A timer circuit is provided comprising: a resistor; a programmable gain circuit coupled to amplify the reference level based upon a resistor and a selected gain; a detection circuit coupled to identify the amplified reference level based upon a resistor; a selection circuit configured to select the gain based at least in part upon the identified amplified reference level based upon a resistor; a comparator circuit configured to transition between providing a signal having a first value and providing a signal having a second value based at least in part upon comparisons of a reactive circuit element excitation level with the amplified reference level based upon a resistor and with a second reference level; and reactive circuit element excitation circuit configured to reverse excitation of the reactive circuit element in response to the comparator circuit transitioning between providing the signal having the first value and providing the signal having the second value. | 2016-06-09 |
| 20160164507 | APPARATUS AND METHOD FOR GENERATING QUADRUPLED REFERENCE CLOCK FROM SINGLE-ENDED CRYSTAL OSCILLATOR - A method, an apparatus, and a computer program product are provided. The apparatus outputs a sinusoidal signal according to a first clock frequency, generates, a first digital signal having a 25% duty cycle based on the sinusoidal signal, generates a second digital signal having a 25% duty cycle based on the sinusoidal signal, combines the first digital signal and the second digital signal to generate a combined digital signal having a 50% duty cycle and a second clock frequency that is double the first clock frequency, and doubles the second clock frequency of the combined digital signal to generate an output signal having a third clock frequency that is quadruple the first clock frequency. The apparatus further generates a first control voltage and a second control voltage for the first buffer and a third control voltage for the second buffer based on the output signal. | 2016-06-09 |
| 20160164508 | APPARATUSES AND METHODS FOR ADJUSTING TIMING OF SIGNALS - Apparatuses and methods for adjusting timing of signals are described herein. An example method may include providing an output clock signal responsive to an input clock signal, and adjusting a slew rate of the output clock signal by a delayed output clock signal. | 2016-06-09 |
| 20160164509 | APPARATUSES AND METHODS FOR ADJUSTING TIMING OF SIGNALS - Apparatuses and methods for adjusting timing of signals are described herein. An example apparatus may include a first signal adjustment cell configured to receive a first clock signal and to adjust skew of rising or falling edges of the first clock signal based on a first control signal. The timing adjustment circuit may further include a second signal adjustment cell configured to adjust skew of rising or falling edges of a second clock signal based on a second control signal. The timing adjustment circuit may further include a differential adjustment cell configured to receive the first and second clock signals and to adjust skew of rising or falling edges of the first clock signal based on the first control signal and to adjust skew of rising or falling edges of the second clock signal based on the second control signal. The first and second clock signals may be complementary. | 2016-06-09 |
| 20160164510 | APPARATUS AND METHOD FOR COMPENSATING FOR DUTY SIGNALS - An apparatus and method for compensating for duty signals are disclosed herein. The apparatus for compensating for duty signals includes a signal input unit, a signal control unit, a combined signal control unit, a determination unit, and a signal output unit. The signal input unit receives a first signal and a second signal. The signal control unit controls the timing of the first and second signals based on first and second control signals, and outputs a combined signal. The combined signal control unit outputs first and second logic operation signals. The determination unit generates the first and second control signals if the timing of the first signal does not match the timing of the second signal, outputs the generated first and second control signals, and applies a third control signal to the combined signal control unit. The signal output unit outputs the first and second signals. | 2016-06-09 |
| 20160164511 | CIRCUIT ARRANGEMENT FOR THE PROTECTION OF AT LEAST ONE COMPONENT OF A TWO WIRE ELECTRICAL CURRENT LOOP - The invention relates to a circuit arrangement for the protection of at least one component | 2016-06-09 |
| 20160164512 | CONFIGURATION OF JFET FOR BASE DRIVE BIPOLAR JUNCTION TRANSISTOR WITH AUTOMATIC COMPENSATION OF BETA VARIATION - A circuit for automatically compensating beta variation by driving base of BJT with JFET is disclosed. The circuit includes a first well, a second well, a third well, one or more leakage current devices, and a varying metal connection. The first well includes first JFET J | 2016-06-09 |
| 20160164513 | VOLTAGE GENERATION APPARATUS - A voltage generation apparatus may include an external voltage sensing circuit configured to generate a first start signal and a second start signal by sensing the magnitude of a first external voltage and the magnitude of a second external voltage. The voltage generation apparatus may include an internal voltage sensing circuit configured to generate a voltage generation signal by comparing an internal voltage with a target voltage. The voltage generation apparatus may include a voltage pumping circuit configured to be activated in response to the first start signal, configured to perform a pumping operation based on the voltage generation signal, and configured to generate the internal voltage. The voltage generation apparatus may include a voltage regulating circuit configured to be activated in response to the first and second start signals, and configured to generate the internal voltage based on the voltage generation signal. | 2016-06-09 |
| 20160164514 | SCAN DRIVING CIRCUIT - A scan driving circuit is disclosed, and the scan driving circuit has a pull-up control module, a pull-up module, a pull-down module, a pull-down maintaining module, a bootstrap capacitor and a constant low-level voltage source; the pull-up control module is connected to the pull-up module, the pull-down module, the pull-down maintaining module and the bootstrap capacitor respectively, and the constant low-level voltage source is connected to the pull-down maintaining module and the pull-down module respectively. The electrical leakage phenomenon can be efficiently avoided, and the reliability of the scan driving circuit is thus improved. | 2016-06-09 |
| 20160164515 | BIASING SCHEME FOR HIGH VOLTAGE CIRCUITS USING LOW VOLTAGE DEVICES - Some embodiments include apparatus and methods having a first node to receive a supply voltage, a second node to receive a first bias voltage, a third node to receive ground potential, a first circuit branch coupled between the first and second nodes, and a second circuit branch coupled between the first and third nodes. The first bias voltage is provided to a gate of a first transistor among a plurality of transistors coupled in series. The first and second circuit branches are arranged to provide a second bias voltage to gate of a second transistor among the plurality of transistors. The value of the second bias voltage is based on a value of the first bias voltage. | 2016-06-09 |
| 20160164516 | EFFICIENTLY MANAGING MULTIPLE POWER SUPPLIES - An apparatus includes a first power supply switch, a second power supply switch, and a control circuit. The first power supply switch includes a P-channel Metal Oxide Semiconductor Field Effect Transistor (PMOSFET) having a drain coupled to a first power rail to receive a first power voltage, a source coupled to an output node, and a gate to selectively turn on or off the PMOSFET to supply the first power voltage to the output node or isolate the first power rail. The second power supply switch receives a second power voltage and passes it to the output node if the second power voltage is present. The control circuit cooperates with the first power supply switch to control the gate voltage to turn on the PMOSFET if the first power voltage is present and the second power voltage is absent, and turn off the PMOSFET if the second power voltage is present. | 2016-06-09 |
| 20160164517 | High Gain Load Circuit for a Differential Pair Using Depletion Mode Transistors - A differential pair gain stage is disclosed. In one embodiment, the gain stage includes a differential pair of depletion-mode transistors, including a first and a second n-type transistor. In certain embodiments of the invention, the depletion mode transistor may be GaN (gallium nitride) field effect transistors. The gain stage includes an active load including one or more depletion mode transistors electrically coupled to at least one of the drains of depletion mode transistors of the differential pair. The active load may include a source follower for maintaining the AC voltages at the drains of the differential pair at a constant value and may further include a casocde stage for setting a fixed drain source voltage across the output transistors to increase the output impedance and gain of the stage. | 2016-06-09 |
| 20160164518 | SELF-POWERED ANTI-TAMPER SENSORS - An anti-tampering system and method typically featuring a printed circuit board with anti-tamper protection circuitry powered by a power source. Switching circuitry is coupled between the power source and the anti-tamper protection circuitry. A transducer outputs a signal to the switching circuitry electrically connecting the power source to the anti-tamper protection circuitry in response to a tampering event. The switching circuitry otherwise disconnects the power source from the anti-tamper protection circuitry to save power. | 2016-06-09 |
| 20160164519 | TOUCHLESS ON/OFF TATTOO COMPONENT FOR HANDHELD TATTOO MACHINES AND TATTOO POWER SUPPLIES - The invention consists of a touchless on/off tattoo component that manipulates the operation of hand held tattoo machines and tattoo power supplies through the use of motion with any body part; such as but not limited to a finger, fingers, hand, hands, arm and arms. The touchless on/off tattoo component includes a housing for retaining the interior electronic components needed to operate a hand held tattoo machine and a tattoo power supply. A sensor enables touchless activation through the use of motion with any body part across the face of the sensor; as well as deactivation with the use of the same motion. | 2016-06-09 |
| 20160164520 | POWER MANAGEMENT SYSTEM FOR INTEGRATED CIRCUITS - A power management circuit for integrated circuits operating systems where the power supply may be marginal includes a supply voltage characterization circuit and a clock synthesis circuit. The supply voltage characterization circuit determines the strength of the supply voltage applied to the IC and provides information to the synthesis circuit that is used to adjust the clock frequency of the IC to insure the IC does not draw too much current and force the IC into reset. A counter is used to determine the time between when the supply voltage reaches a first level and a second higher level, the time being representative of the slope of the supply voltage. Knowledge of the characteristics of a portion of the circuit under certain operating or benchmark conditions may be used to adjust the characterization. | 2016-06-09 |
| 20160164521 | SEMICONDUCTOR DEVICE - A semiconductor device may include a first channel provided in a first die. The semiconductor device may include a second channel provided in a second die and disposed adjacent to the first channel, and configured to exchange signals and data with the first channel. The first channel and the second channel may receive and output calibration-related signals from and to each other through bonding, and may share calibration start signals. The calibration start signal may be respectively generated in the first channel and the second channel. | 2016-06-09 |
| 20160164522 | Reference Buffer Circuits Including a Non-linear Feedback Factor - In an embodiment, an apparatus may include an amplifier circuit including a first input to receive a signal, a second input to receive a feedback signal, and an output. The apparatus may further include a buffer circuit including an input coupled to the output of the amplifier and including an output coupled to an output node. The apparatus may also include a feedback circuit coupled between the output node and the second input of the amplifier circuit. The feedback circuit may include at least one non-linear resistor configured to define a feedback ratio that changes in response to a voltage at the output node. | 2016-06-09 |
| 20160164523 | INTERFACE SUPPLY CIRCUIT - An interface supply circuit includes a power supply unit, a first control circuit coupled to the power supply unit, a second control coupled to the circuit power supply unit, and an output unit. The output unit is coupled to the first control circuit and the second control circuit. The first control circuit is configured to output a first voltage via the output unit when a system is in a normal state. The second control circuit is configured to output a second voltage via the output unit when the system is in a stand-by state. | 2016-06-09 |
| 20160164524 | LOW COST CMOS CHIP WITH TAPE AUTOMATED BONDING (POLYAMIDE) - In view of the foregoing, an embodiment herein provides a low cost system. The system includes a bipolar array, a CMOS chip. The bipolar array includes one or more bipolar integrated circuits. The CMOS chip is programmed by a single level of metal. The bipolar array and the CMOS chip is mounted on a substrate using TAB polyamide. The TAB includes a polyamide film with one or more metal patterns chemically etched by programming three metal layers simultaneously to obtain one or more components. The one or more components are mounted in a package, and a small system can be realized. An external capacitor supplies an ac power source to the bipolar array. The bipolar array produces a rectified voltage and a lower voltage power for the enhanced gate array. An output of the enhanced gate array drives bipolar drivers of DC motor, stepper motor, BLDC motor, and LED assemblies. | 2016-06-09 |
| 20160164525 | CLOCK INTEGRATED CIRCUIT - The clock circuit of an integrated circuit operates with variations such as temperature, ground noise, and power noise. Various aspects of an improved clock integrated circuit address one or more of the variations in temperature, ground noise, and power noise. | 2016-06-09 |
