| 23rd week of 2011 patent applcation highlights part 21 |
| Patent application number | Title | Published |
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| 20110133695 | Power Tool Battery Cell Replacement Kit and Methods Thereof - The present invention relates generally to a kit which allows replacement of a removable battery cell cluster from a power tool which is no longer viable or operational and replacing it with a new battery cell cluster so to operate the power tool normally. The invention further relates to methods of replacing the expired battery cluster and assembling the new battery cluster so that it is attachable to the power tool and so that it is easily transported by the user while working with the power tool. | 2011-06-09 |
| 20110133696 | ACCESSORY AND CHARGING SYSTEM FOR A RECHARGEABLE HAND-HELD ELECTRICAL DEVICE - The present invention relates to rechargeable hand-held electrical devices, chargers and accessories for use therewith. The present invention provides an accessory and charging system for a rechargeable hand-held electrical device. The system includes an electrical device, an accessory and a charger. The electrical device includes a first connecting portion, the charger includes a second connecting portion and the accessory includes a third connecting portion. The first connecting portion of the electrical device is configured to mate with the second connecting portion for enabling the charger to recharge the electrical device. The first connecting portion of the electrical device is also configured to mate with the third connecting portion for enabling the electrical device to supply power to the accessory. Accordingly, the system provides a hand-held electrical device which can serve at least one primary function as well as an accessory which, when attached to the device, can serve at least one secondary function whilst requiring only a single power storage means associated with the device and a single charger to charge the device. In one form, the electrical device is an electrical appliance, such as a hand held power tool, and in another form the accessory includes an electric light. | 2011-06-09 |
| 20110133697 | BATTERY PACK CAPABLE OF CALCULATING RELATIVE REMAINING CAPACITY - A remaining capacity calculating section is provided that acquires a discharged capacity of a rechargeable battery based on a discharging current and a discharging time of the rechargeable battery, and calculates a relative remaining capacity of the rechargeable battery based on the discharged capacity and the fully-charged capacity of the rechargeable battery. The remaining capacity calculating section employs the rating capacity of the rechargeable battery or a learned fully-charged capacity as the fully-charged capacity when a high capacity mode is selected, and employs a capacity obtained by multiplying the rating capacity or learned fully-charged capacity by a predetermined factor not more than 1 as the fully-charged capacity when a long life mode is selected. | 2011-06-09 |
| 20110133698 | Apparatus for Preventing Electrical Shock in Devices - A device for preventing electrical shock from a device with electrical interfaces. A shutter or other barrier associated with the device that physically prevents access or contact to one of the electrical interfaces while another electrical interface is in use. | 2011-06-09 |
| 20110133699 | LITHIUM-ION BATTERY - A lithium-ion battery includes a positive electrode, a negative electrode, and a battery case. The positive electrode includes a positive current collector, a first material of the form Li | 2011-06-09 |
| 20110133700 | METHOD AND SYSTEM FOR MINIMUM OUTPUT-VOLTAGE BATTERY CHARGER - An apparatus and method for a portable device incorporating a battery and a battery charger. In the portable device, there are a plurality of system components configured to facilitate a plurality of functions that the portable device is designed to perform. The battery in the portable device is configured for providing an internal power supply to the plurality of system components in the absence of an external input power supply. The battery charger is configured for charging the battery when the external input power supply is available. The battery charger disclosed herein is capable of supplying system power to the system components when voltage of the battery that is being charged is below a limit, thereby allowing the portable device to operate when voltage of the battery drops below the limit. | 2011-06-09 |
| 20110133701 | DUAL-MODE CHARGER CIRCUIT - A dual-mode charger circuit includes a first charge circuit and a second charge circuit connected in parallel between a power source and a battery, to charge the battery under a slow charge mode and a quick charge mode. A central processing unit detects a capacity of the battery and determines whether the detected capacity exceeds a predetermined capacity, and outputs a mode control signal according to the determination. A mode switch circuit switches the second charger circuit on/off according to the mode control signal. When the second charge circuit is off, the battery is charged under the slow charge mode, and when the second charge circuit is on, the battery is charged under the quick charge mode. | 2011-06-09 |
| 20110133702 | CIRCUIT AND METHOD OF OPERATION FOR AN ELECTRICAL POWER SUPPLY - A battery charging circuit comprising: a semiconductor switch having an output connected to a rechargeable battery; a battery charge controller for receiving power from an external source, and supplying output power to a portable device and the input of the semiconductor switch, the current output of the battery charge controller being controllable; and a voltage sensing circuit for: measuring the voltage drop across the battery charge controller; and responding to the voltage drop across the battery charge controller by modulating the semiconductor switch to reduce the quantity of current supplied to the rechargeable battery when the voltage drop is too great; whereby the total power dissipated by the battery charge controller is controlled, the portable device receiving the power it needs to operate and the rechargeable battery receiving any additional available power. | 2011-06-09 |
| 20110133703 | ARCHITECTURE FOR DUAL SOURCE ELECTRIC POWER GENERATING SYSTEM - A dual source electric power generating system (EPGS) provides both a regulated AC output and a regulated DC output. The EPGS includes a rotating portion and a stationary portion. The stationary portion includes a plurality of windings (permanent magnet generator (PMG) armature windings, an exciter field winding, and high-voltage main generator armature windings), a voltage regulator, a rectifier, an inverter, a point of regulation (POR) sensor. The high-voltage main generator armature windings generate a high-voltage AC that is converted to a regulated, high-voltage AC by the rectifier and the inverter. The stationary portion is further characterized by circuitry for producing the regulated DC output from AC voltage produced by a winding other than the high-voltage main generator armature windings. | 2011-06-09 |
| 20110133704 | METHOD FOR CONTROLLING AN INTERLEAVING MULTIPHASE REGULATOR AND CORRESPONDING SYSTEM - A method is provided for controlling turn-on of phases of a multiphase regulator. According to the method, there are tested the conditions necessary for the turn-on of a phase to be turned-on indicated by a first cell of the phase register, and in response to a positive result a corresponding ramp signal is reset. There is then tested the conditions necessary for the turn-on of a phase successive to the phase to be turned on according to the list of priorities of the phase register, and corresponding ramp signals are reset if there is a positive result. In response to no positive results of testing conditions necessary for the turn-on of all phases successive to the phase to be turned on, there is reset a ramp signal corresponding to a phase successive to a last turned on phase indicated by a last cell of the phase register. | 2011-06-09 |
| 20110133705 | INTEGRATED CIRCUIT FOR SYSTEM CALIBRATION - The present invention discloses an integrated circuit for system calibration, applicable to a power supply, comprising: a comparison module, having a feedback input end coupled to a feedback signal and a reference input end coupled to an analog reference signal for delivering a status signal; a detection and control module, for generating a reference signal and a calibration value according to the status signal, wherein the calibration value is derived from the reference signal at an instant when the status signal changes state, and the calibration value is stored into a calibration value register; a memory module, for receiving, storing and outputting the calibration value; and a reference signal generator, receiving the calibration value to provide the analog reference signal. The present invention can therefore be used to automatically calibrate a system with fewer external components to provide qualified systems. | 2011-06-09 |
| 20110133706 | DC CONVERTER CIRCUIT AND POWER SUPPLY CIRCUIT - A DC converter circuit having high reliability is provided. The DC converter circuit includes: an inductor configured to generate electromotive force in accordance with a change in flowing current; a transistor including a gate, a source, and a drain, which is configured to control generation of the electromotive force in the inductor by being on or off; a rectifier in a conducting state when the transistor is off; and a control circuit configured to control on and off of the transistor. The transistor includes an oxide semiconductor layer whose hydrogen concentration is less than or equal to 5×10 | 2011-06-09 |
| 20110133707 | STABLE LOW DROPOUT VOLTAGE REGULATOR - A Low-dropout (LDO) voltage regulator ( | 2011-06-09 |
| 20110133708 | SWITCHING POWER SUPPLY UNIT - A switching power supply unit of a non-insulated, synchronous rectification type converts a voltage input to an input terminal into a predetermined voltage and outputs the voltage. The unit includes an inductor, a plurality of output switching elements, a plurality of rectifying switching elements, a switching element control circuit, a switching regulator integrated circuit, and a plurality of buffer circuits. The output switching elements, the rectifying switching elements, the switching element control circuit and the buffer circuits are integrated on the switching regulator integrated circuit. | 2011-06-09 |
| 20110133709 | VOLTAGE REGULATOR WITH LOW AND HIGH POWER MODES - A voltage regulator comprising at least first and second regulator elements connected between an output node and a supply rail for supplying load current to a load connected to the output node. The voltage regulator comprises first and second control modules for controlling the first and second regulator elements respectively to maintain the output node at a regulated voltage in the presence of a variable impedance presented by the load to the output node, the second regulator element and the second control module having a smaller load current capacity and smaller leakage current than the first regulator element and the first control module. The voltage regulator also comprises a mode selector for de-activating the first regulator element and the first control module in a first operational mode in response to a load current less than a threshold value, for activating the first regulator element and the first control module in a second operational mode in response to a load current greater than a threshold value, and an additional current-carrying path for carrying supplementary current for the first control module at least during a transition from the first operational mode to the second operational mode. | 2011-06-09 |
| 20110133710 | Partial Feedback Mechanism in Voltage Regulators to Reduce Output Noise Coupling and DC Voltage Shift at Output - Techniques are presented for reducing the DC voltage shift in a voltage regulator, particularly for high and ultra-high speed load switching operation. The regulator includes a power transistor, connected between an input supply voltage and an output node, and an error amplifier, having its output connected to control the gate of the output transistor, a first input connected to receive a reference voltage, and a second input connected to a feedback node. The regulator also includes a first resistance, connected between the feedback node and ground, and also a second resistance, a third resistance, and a first capacitance, where the feedback node is connected to the output node through a combination of the first capacitance in parallel with the second resistance and in series with the third resistance. Consequently, the feedback path from the output node of the regulator uses a partial feedback mechanism, where the capacitance is included to generate a zero in the feedback divider path, but a resistance is placed in series with the capacitance so that at high frequencies the feedback level is still separated from the output level. | 2011-06-09 |
| 20110133711 | SEMICONDUCTOR DEVICE AND SWITCHING REGULATOR USING THE DEVICE - The semiconductor device according to the present invention has an n-channel output transistor wherein an input voltage is impressed on a drain, and a pulsed switching voltage that corresponds to a switching drive of the transistor is brought out from a source; a bootstrap circuit for generating a boost voltage enhanced by a predetermined electric potential above the switching voltage; an internal circuit for receiving a supply of the boost voltage to generate a switching drive signal, and supplying the signal to a gate of the output transistor; an overvoltage protection circuit for monitoring an electric potential difference between the switching voltage and the boost voltage, and generating an overvoltage detection signal; and a switching element for establishing/blocking electrical conduction between the internal circuit and the end impressed with the boost voltage, in accordance with the overvoltage detection signal. | 2011-06-09 |
| 20110133712 | DIGITAL CONTROL SWITCHING POWER SUPPLY UNIT - A digital control switching power supply unit includes an A/D converter circuit having a delay line circuit that has a delay element array whose delay time is controlled by a bias current, and that converts a current value into a digital signal using a signal transmission delay time, a phase difference detector circuit that detects a phase difference between a switching cycle and an A/D conversion cycle, a charge pump circuit that generates a control voltage in accordance with the phase difference, and a bias current indicator circuit that determines a bias current in accordance with an output voltage of the charge pump circuit and a result of a comparison of a detected value of the output voltage and a reference voltage, wherein the digital control switching power supply unit controls in such a way that the A/D conversion cycle is synchronized with the switching cycle. | 2011-06-09 |
| 20110133713 | DC-TO-DC CONVERTER WITH INDEPENDENT COMPENSATION LOGIC - An apparatus comprises a direct current (“DC”) to DC converter comprising a first compensation logic and other DC to DC converter logic. The first compensation logic compensates for phase shifts in an output of the DC to DC converter. The first compensation logic is disabled independently of the other DC to DC converter logic based on a first communication sent to the DC to DC converter. | 2011-06-09 |
| 20110133714 | POWER CONVERTER WITH PROTECTION MECHANISM FOR DIODE IN OPEN-CIRCUIT CONDITION AND PULSE-WIDTH-MODULATION CONTROLLER THEREOF - A power converter with a protection mechanism for a diode in an open-circuit condition includes a DC to Dc (DC/DC) conversion circuit, a detection and protection circuit, a pulse-width-modulation (PWM) signal generator, and a logic gate. The detection and protection circuit is used for detecting an open-circuit condition of the diode of the DC/DC conversion circuit. The logic gate receives an output signal of the detection and protection circuit and a PWM signal outputted by the PWM signal generator. When the diode is in an open-circuit condition, the PWM signal cannot be transmitted to a power switch of the DC/DC conversion circuit due to the output signal of the detection and protection circuit. | 2011-06-09 |
| 20110133715 | DRIVE CONTROL DEVICE FOR AN ELECTRIC LOAD - Provided is a drive control device capable of surely detecting, by a monitoring/controlling unit, an abnormality of a short circuit and a disconnection in a power supply circuit to an electric load, and of decreasing a load required for a quick response imposed on the monitoring/controlling unit. A switching element is controlled to open/close by a control output signal generated by a monitoring/controlling unit, and a determination storing circuit determines whether circuit opening and circuit closing have been correctly carried out and stores a result of the determination, and periodically reports to the monitoring/controlling unit. While the stored content of the determination is periodically reset, the determination operation is updated and continues. The monitoring/controlling unit does not need to immediately monitor the determination storing signal when the open/closing command is generated. | 2011-06-09 |
| 20110133716 | CONTROLLER AND DRIVER COMMUNICATION FOR SWITCHING REGULATORS - Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode. | 2011-06-09 |
| 20110133717 | CONTROLLER AND DRIVER COMMUNICATION FOR SWITCHING REGULATORS - Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode. | 2011-06-09 |
| 20110133718 | Semiconductor Device and Power Conversion Apparatus Using the same - A semiconductor device provides a gate electrode formed on a lateral face of a wide trench, and thereby the gate electrode is covered by a gate insulating layer and a thick insulating layer to be an inter layer. Therefore, a parasitic capacitance of the gate becomes small, and there is no potential variation of the gate since there is no floating p-layer so that a controllability of the dv/dt can be improved. In addition, the conductive layer between the gate electrodes can relax the electric field applied to the corner of the gate electrode. In consequence, compatibility of low loss and low noise and high reliability can be achieved. | 2011-06-09 |
| 20110133719 | Voltage reference circuit operable with a low voltage supply and method for implementing same - According to one embodiment, a voltage reference circuit operable with a low voltage supply comprises an op-amp powered by the low voltage supply and a feedback branch including a transistor driven by an output of the op-amp. The feedback branch couples the low voltage supply to ground through the transistor and at least a rectifying device situated between a reference node of the feedback branch and ground. An input of the op-amp is coupled to the reference node by a voltage divider. In one embodiment, the voltage reference circuit further comprises a reference branch coupling a second reference node to ground through at least a second rectifying device, and wherein a second input of the op-amp is coupled to the second reference node by a second voltage divider. | 2011-06-09 |
| 20110133720 | DYNAMIC VOLTAGE TRANSITIONS - The operating voltage of an integrated circuit (e.g., a processor) is changed in response to one or more conditions (e.g., a laptop computer is connected to an AC power source). Both the operating frequency and the operating voltage of the integrated circuit are changed. The voltage regulator providing the operating voltage to the integrated circuit is caused to transition between voltage levels using one or more intermediate steps. The integrated circuit continues to operate in the normal manner both at the new voltage and throughout the voltage transition. | 2011-06-09 |
| 20110133721 | METHOD OF DIAGNOSING A MALFUNCTION IN AN ABNORMAL VOLTAGE DETECTING APPARATUS, SECONDARY BATTERY SYSTEM, AND HYBRID VEHICLE - The invention provides a method of diagnosing a malfunction in an abnormal voltage detecting apparatus, which includes breaking an electrical connection between a secondary battery ( | 2011-06-09 |
| 20110133722 | LOAD CURRENT DETECTION IN ELECTRICAL POWER CONVERTERS - An electrical power converter has a transformer ( | 2011-06-09 |
| 20110133723 | Sensor Arrangement and Method for Operating a Sensor Arrangement - A sensor arrangement has a plurality of Hall sensor devices, each configured to provide a sensor voltage in response to a magnetic field intensity. A selection unit is configured to forward either of the sensor voltages in response to a selection signal. A transconductance amplifier is configured to generate a sensing current depending on a forwarded sensor voltage. A filter stage has a resistor and a filter capacitor connected in parallel in a switchable manner in response to a first switching signal. The filter stage is configured to generate a filtered voltage across the filter capacitor depending on a sensing current. A capacitive analog-to-digital converter has an input capacitor being connected to the filter capacitor in a switchable manner in response to a second switching signal. The analog-to-digital converter is configured to generate a digital sensor value based on a filtered voltage. The sensor arrangement further has a control circuit which is configured to generate the selection signal and the first and the second switching signals such that for each of the forwarded sensor voltages in a first time segment, the filtered voltage across the filter capacitor is generated, and in a second time segment, the input capacitor is connected to the filter capacitor. | 2011-06-09 |
| 20110133724 | MAGNETIC POSITION DETECTOR - Magnetic members are arranged along a straight line and can be placed face-to-face with spin-valve magnetoresistive elements. The magnetic pole faces of the magnetic members which can be face-to-face with the spin-valve magnetoresistive elements have different magnetic polarities from the magnetic pole faces of neighboring magnetic members. The magnetic members are arranged at a uniform pitch. Each magnetic member is spaced from neighboring magnetic members. X/P is from 40% to 60%, where X is length of each magnetic member along an arrangement direction of the magnetic members, and P is pitch of the magnetic members along the arrangement direction. | 2011-06-09 |
| 20110133725 | HALL-TYPE LINEAR-TRAVEL SENSOR FOR INTERMEDIATE TRAVEL - A sensor assembly for detecting the position of a linearly movable element has a magnet and a sensor for detecting the position of the magnet. A stationary support is provided that is configured for carrying the sensor and for guiding the element that carries the magnet and is linearly movable relative to the support. | 2011-06-09 |
| 20110133726 | Precision alignment system - The present invention provides a precision alignment system operable to provide alignment of a first and second apparatus. The precision alignment system makes use of inductive coupling between loop antennas in the first and second apparatus. The mechanism for alignment is the detection of a null in the signal induced in the loop antennas of the second apparatus arising from an input signal fed to a loop antenna of the first apparatus. The precision alignment system can be incorporated in a system for the wireless transfer of electrical power or may be incorporated in a system for the transfer of data. The precision alignment system of the present invention is particularly suited to applications where optical or other means for alignment of two apparatus are unreliable. In particular, the alignment system disclosed is suitable for operation underwater. | 2011-06-09 |
| 20110133727 | Inductive Position Sensor - An inductive position sensor uses three inductors. First and second inductors are separated by a fixed distance with the first inductor's axial core and second inductor's axial core maintained parallel to one another. A third inductor is disposed between the first and second inductors with the third inductor's axial core being maintained parallel to those of the first and second inductors. The combination of the first and second inductors are configured for relative movement with the third inductor's axial core remaining parallel to those of the first and second inductors as distance changes from the third inductor to each of the first inductor and second inductor. In operation, a source supplies an oscillating current to at least one of the three inductors, while another device measures voltage induced in at least one of the three inductors not supplied with the oscillating current. The voltage so-induced is indicative of an amount of the relative movement between the third inductor and the combination of the first and second inductors. | 2011-06-09 |
| 20110133728 | ANGLE SENSOR - An angle sensor includes: a magnet mounted in a rotatable rotation body so as to be rotatable with the rotation body; a circular yoke extending in a circular shape so as to surround an outer circumferential surface of the magnet around a rotation shaft of the magnet and having a notched portion in a part thereof in an extension direction of the circular yoke; and a magneto-resistive effect element disposed in the notched portion and detecting a direction of a magnetic field generated in the notched portion. A rotation angle of the magnet matches a direction of a magnetic field applied to the GMR element. | 2011-06-09 |
| 20110133729 | METHOD AND MONITORING DEVICE FOR PERFORMING AN RF-SAFE MIT SCAN - A method and a monitoring device for performing an RF-safe MIT scan is disclosed in which it is prevented that an RF exposure, especially a specific absorption rate (SAR), imposed on an examination object, especially a patient, exceeds certain limit values during a magnetic induction tomography (MIT) scan. This is achieved on the one hand by an RF simulation method for simulating intended MIT operating parameters and calculating a resulting RF exposure of the object, and on the other hand by a monitoring device for monitoring the RF power which is applied to the object. | 2011-06-09 |
| 20110133730 | Magnetic Probe Apparatus - A system and method for locating magnetic material. In one embodiment the system includes a magnetic probe; a power module in electrical communication with the magnetic probe to supply current to the magnetic probe; a sense module in electrical communication with the magnetic probe to receive signals from the magnetic probe; and a computer in electrical communication with the power module and the sense module. The computer generates a waveform that controls the supply of current from the power module and receives a signal from the sense module that indicates the presence of magnetic material. The magnetic probe is constructed from a material having a coefficient of thermal expansion of substantially 10 | 2011-06-09 |
| 20110133731 | METHOD AND DEVICE FOR MAGNETIC INDUCTION TOMOGRAPHY - This invention relates to a method and device for magnetic induction tomography. The device comprises a transmitting coil arrangement for generating a primary magnetic field, the primary magnetic field inducing an eddy current in an object of interest, and a measurement coil arrangement for measuring a secondary magnetic field generated by the eddy current to generate a set of measurement data used for image reconstruction of the object of interest, wherein the transmitting coil arrangement at least comprises a pair of transmitting coils intended for carrying substantially electrical currents flowing in the same direction and positioned symmetrically along a common axis and the measurement coil arrangement at least comprises a pair of measurement coils connected and positioned symmetrically along the axis. In an embodiment, the pair of transmitting coils and the pair of measurement coils are respectively Helmholtz coils. | 2011-06-09 |
| 20110133732 | METHODS AND APPARATUS FOR ENHANCED FREQUENCY RESPONSE OF MAGNETIC SENSORS - Methods and apparatus for providing an integrated circuit package device, comprising a conductive leadframe, a magnetic sensor element disposed on the leadframe, wherein the leadframe includes a slot configuration to reduce eddy current flow about the magnetic sensor, the slot configuration including a first slot generally perpendicular to a second slot, wherein the first slot extends under the sensor element. | 2011-06-09 |
| 20110133733 | MAGNETIC FIELD SENSOR DEVICE - A magnetic field sensor device | 2011-06-09 |
| 20110133734 | Method for regulating RF signals in an NMR system and probe head for carrying out the method - A method for regulating radio frequency (RF) signals in a nuclear magnetic resonance (NMR) system, comprising a spectrometer, a control loop, and an NMR probe head with RF components (B | 2011-06-09 |
| 20110133735 | NUCLEAR MAGNETIC RESONANCE IMAGING APPARATUS - A magnetic resonance imaging apparatus is provided, which is capable of reducing SAR while maintaining S/N ratio and image contrast in a GrE-type pulse sequence, regardless of whether a synchronous imaging is performed or not. | 2011-06-09 |
| 20110133736 | Coherent Signal Acquisition System for MR Imaging and Spectroscopy - A system processes an MR dataset to provide an MR signal generated by a group of protons having substantially the same proton spin precession angle. The system includes a computation processor for determining phase angles of RF pulses for use in acquiring MR signal data of a desired coherence pathway in response to, predetermined data indicating a number of coherence pathways in multiple MR datasets to be acquired, predetermined information indicating different types of MR signals present in the multiple MR datasets to be acquired and at least one phase equation selected in response to a corresponding at least one type of the types of MR signals present in the MR datasets to be acquired. The number of coherence pathways represents a corresponding number of groups of protons having substantially the same proton spin precession angle. An RF signal generator generates RF pulses for acquiring multiple MR datasets including MR signal data of the desired coherence pathway using the determined phase angles. An MR imaging device performs multiple MR scans to provide the multiple MR datasets using the generated RF pulses. | 2011-06-09 |
| 20110133737 | Adjustable EMI Suppression Core for Common Mode/Normal Mode Balance - An adjustable EMI suppression core has an outer core having a first reluctance. The outer core has three apertures aligned horizontally. A first aperture and a third aperture are each suitable for a wire to be placed therein. A second aperture is located between the first and third apertures. An inner core is rotatable engaged in the second aperture, for example, using matching threads on an inner surface of the second aperture and an outer surface on the inner core. The inner core has first and third portions having a second reluctance similar to the first reluctance and a third portion having a reluctance considerably higher than the first and second reluctances. Rotating the inner core varies a normal mode and a common mode suppression of currents in the wires placed in the first and second apertures. | 2011-06-09 |
| 20110133738 | Systems and Methods for Obstructing Magnetic Flux - An aspect of the present invention relates to system and method for substantially obstructing magnetic flux. One aspect of the present invention provides an apparatus for substantially obstructing at least one magnetic flux path between an ambient space and a protected volume. The apparatus includes an inner shield, substantially enclosing the protected volume. The inner shield has at least one inner shield aperture extending therethrough to allow external access to the protected volume. An outer shield substantially encloses the inner shield. The outer shield has at least one outer shield aperture extending therethrough to allow internal access from the ambient space. The apparatus is configured to impede magnetic flux between at least one inner shield aperture and at least one outer shield aperture. | 2011-06-09 |
| 20110133739 | ARRANGEMENT OF COILS FOR MRI APPARATUS - A method of determining a magnet arrangement for use in magnetic resonance imaging apparatus, the method including, determining a function representing current densities required within a magnet region to generate a field, determining a current density distribution required to generate a desired field, using the function and determining the magnet arrangement using the current density distribution, the magnet arrangement including a number of current carrying coils arranged within the magnet region. | 2011-06-09 |
| 20110133740 | LOOK AHEAD LOGGING SYSTEM - A technique utilizes the acquisition of data from desired subterranean regions via a logging system. The logging system is constructed for use in a wellbore and comprises a transmitter module having a transmitter antenna. Additionally, the logging system utilizes a receiver module spaced from the transmitter module and having a receiver antenna. The transmitter antenna and the receiver antenna are oriented to enable sensitivity in desired directions, such as ahead of the logging system. | 2011-06-09 |
| 20110133741 | SYSTEM AND METHOD FOR EMPLOYING ALTERNATING REGIONS OF MAGNETIC AND NON-MAGNETIC CASING IN MAGNETIC RANGING APPLICATIONS - A system and methods for facilitating drilling and/or drilling a well in an orientation with respect to an existing well are provided. Specifically, one method in accordance with present embodiments is directed to producing a magnetic field with a magnetic field source positioned in a non-magnetic region of casing within a first well, wherein the first well is cased with alternating regions of magnetic casing and non-magnetic casing. The method may also include producing at least one output from at least one magnetic field sensor capable of sensing directional magnetic field components, wherein the at least one output is based on detection of the magnetic field and wherein the at least one magnetic field sensor is positioned in a second well. | 2011-06-09 |
| 20110133742 | LAMP FAILURE DETECTOR - An apparatus and method for detecting lamp failure is described for an array of lamps used in a rapid thermal processing system. The lamp failure detection system enables identification of a failed lamp among a plurality of lamps, and also provides identification of the failure type. The apparatus applies a lamp failure detection method to the voltage drop values measured across each lamp to determine if a lamp is in a failure state. In one embodiment, a field programmable gate array is used to apply a failure detection method to the lamp voltage values. | 2011-06-09 |
| 20110133743 | FAULT DETECTION DEVICE AND METHOD FOR DETECTING AN ELECTRICAL FAULT - A fault detection device adapted for detecting an electrical fault at a medium voltage switchgear having at least one power module is provided. The fault detection device includes at least one input current sensor adapted for measuring at least one input current of the at least one power module of the medium voltage switchgear and at least one output current sensor adapted for measuring at least one output current of the at least one power module of the medium voltage switchgear. A comparator is provided which is adapted for comparing the at least one output current with the at least one input current. A control unit is adapted for determining an electrical fault at the at least one power module of the medium voltage switchgear on the basis of the comparison. | 2011-06-09 |
| 20110133744 | INTERNAL RESISTANCE ESTIMATION APPARATUS FOR POWER STORAGE DEVICE, DEGRADATION DETERMINATION APPARATUS FOR POWER STORAGE DEVICE, POWER SUPPLY SYSTEM, AND INTERNAL RESISTANCE ESTIMATION METHOD FOR POWER STORAGE DEVICE - A converter control unit responds to a command from a start determining unit to control a converter such that a ripple current is generated at a secondary battery. A storage unit stores a map defining a correlative relationship between the temperature and current of the secondary battery and internal resistance. An estimating unit estimates a value of internal resistance of the secondary battery based on each detection value of the temperature and current, and the map stored in the storage unit. | 2011-06-09 |
| 20110133745 | METHOD AND APPARATUS FOR BATTERY POWER PRE-CHECK AT SYSTEM POWER-ON - A system including at least one electronic component and a battery check circuit. When a power consumption level of the at least one electronic component is increased, the battery check circuit determines whether to provide power from a battery to the at least one electronic component by comparing a power level of the battery to a first power level. | 2011-06-09 |
| 20110133746 | Discharge Ionization Current Detector - To reduce the cost of a high-voltage power supply unit by reducing the discharge starting voltage for a low-frequency dielectric barrier discharge. | 2011-06-09 |
| 20110133747 | INTEGRATED ELECTRICAL CIRCUIT AND TEST TO DETERMINE THE INTEGRITY OF A SILICON DIE - A detection circuit and one or more wires or circuit traces are included in a die. The combination is used to detect mechanical failure of the substrate, e.g. silicon after singulation of the dice from the wafer. Failures may be detected at different regions or planes within the die, and the tests may be performed during operation of the packaged die and integrated circuit, even after installation and during operation of a larger electronic device in which it is incorporated. This is especially useful for chip scale packages, but may be utilized in any type of IC package. | 2011-06-09 |
| 20110133748 | SIGNAL OUTPUT CIRCUIT, TIMING GENERATE CIRCUIT, TEST APPARATUS AND RECEIVER CIRCUIT - Provided is a signal output circuit that outputs a signal, comprising an output circuit that changes a characteristic of a signal output therefrom according to a change in power supply voltage supplied thereto and a control signal supplied thereto; and a control section that changes the control signal to compensate for a change in the characteristic due to a change in the power supply voltage. | 2011-06-09 |
| 20110133749 | TEST ARRANGEMENT FOR AC TESTING OF ELECTRICAL HIGH VOLTAGE COMPONENTS - A test arrangement is provided for AC testing of electrical high voltage components including at least one inverter, at least one test transformer and at least one high-voltage inductor arranged as test components in a common cuboid container. The at least one high-voltage inductor is at least partly removable from the container through at least one opening on a boundary surface of the container by means of a movement apparatus. | 2011-06-09 |
| 20110133750 | INLINE INSPECTION OF PHOTOVOLTAICS FOR ELECTRICAL DEFECTS - A method of inline inspection of photovoltaic material for electrical anomalies. A first electrical connection is formed to a first surface of the photovoltaic material, and a second electrical connection is formed to an opposing second surface of the photovoltaic material. A localized current is induced in the photovoltaic material and properties of the localized current in the photovoltaic material are sensed using the first and second electrical connections. The properties of the sensed localized current are analyzed to detect the electrical anomalies in the photovoltaic material. | 2011-06-09 |
| 20110133751 | SIGNAL GENERATING APPARATUS AND TEST APPARATUS - Provided is a signal generating apparatus comprising a DA converter that outputs an output signal corresponding to input data supplied thereto; a sample/hold unit that is provided between the DA converter and an output end of the signal generating apparatus, and that samples an output voltage of the DA converter and holds the sampled output voltage; a comparing section that compares (i) a level of a signal output from an analog circuit that propagates the output signal to output a signal corresponding to the input data to (ii) a level of the signal output by the DA converter; and a control section that, during a holding period, (iii) provides the DA converter with comparison data instead of the input data to cause the DA converter to output a comparison voltage corresponding to the comparison data, (iv) causes the comparing section to compare a voltage of the signal output by the analog circuit to the comparison voltage, and (v) adjusts the output voltage of the DA converter according to the input data based on a comparison result of the comparing section. | 2011-06-09 |
| 20110133752 | ELECTRONIC DEVICE AND METHOD FOR TESTING A CIRCUIT BOARD - An electronic device, and associated method, provided with a circuit board ( | 2011-06-09 |
| 20110133753 | ELECTRONIC DEVICE AND METHOD FOR TESTING A CIRCUIT BOARD - An electronic device, and associated method, provided with a circuit board ( | 2011-06-09 |
| 20110133754 | TEST ARRANGEMENT FOR IMPULSE VOLTAGE TESTING OF ELECTRICAL HIGH-VOLTAGE COMPONENTS - Exemplary embodiments are directed to a test arrangement for testing surge voltage in electrical high voltage components with a surge voltage generator and a voltage distributor. The surge voltage generator and voltage distributor have a tower-like structure with a first and a second structure end. A rectangular container is connected to the first and second structure and includes a first and a second container end. At least one of the surge voltage generator and the voltage distributor are movable between a first substantially horizontal position inside the container and a substantially vertical position relative to the container. Each movement between the two positions involves a pivot motion about a rotational axis perpendicular to the longitudinal direction of the surge voltage generator. | 2011-06-09 |
| 20110133755 | System and Method of Occupant Detection with a Resonant Frequency - An occupant detection system that includes an electrode, an electrical network, and a controller. The electrode is arranged to be proximate to an expected location of an occupant for sensing an occupant presence proximate the location. The electrode is configured to provide an electrode impedance indicative of the occupant presence. The electrical network is coupled to the electrode to form a resonant circuit and is configured to provide a network impedance. The resonant circuit is configured to exhibit a resonant frequency dependent on the network impedance and the electrode impedance. The controller is coupled to the resonant circuit and is configured to determine the resonant frequency and detect an occupant based on the resonant frequency. | 2011-06-09 |
| 20110133756 | APPARATUS FOR CAPACITIVELY MEASURING CHANGES - An apparatus for capacitively measuring changes has a sensor (S) with a sensor-active region. The sensor has at least one transmitting electrode, which generates an electric field, and a further electrode ( | 2011-06-09 |
| 20110133757 | Apparatus and method for evaluating capacitor - There is provided an apparatus for evaluating a capacitor, including: a charge/discharge control unit | 2011-06-09 |
| 20110133758 | HIGH RESOLUTION CIRCUIT FOR CONVERTING CAPACITANCE-TO-TIME DEVIATION - There is provided a high resolution circuit for converting a capacitance-to-time deviation including a capacitance deviation detecting unit generating two detection signals having a phase difference corresponding to variations of capacitance of an micro electro mechanical system (MEMS) sensor; a capacitance deviation amplifying unit dividing frequencies of the two detection signals to amplify the phase difference corresponding to the capacitance deviation; and a time signal generating unit generating a time signal having a pulse width corresponding to the amplified phase difference. | 2011-06-09 |
| 20110133759 | Quick connect sensor apparatus - An electronic sensor for determining if a metal hose connector is fully snapped into its mating plastic connector. This sensor detects the metal hose in position by having a coil in position over the plastic connector and at the end of the metal hose when it is in correct position. The metal of the hose interacts with the magnetic field of the coil to both increase the inductance and greatly reduce the ‘Q’ because of the “shorted turn” effect of the round metal hose. The sensor inherently detects faults in its own circuit because of the comparator voltage window. Faults such as an open coil, oscillator or rectifier failure will appear at the output as “hose disconnected” which is the desirable failure mode. The invention also detects external faults because of the two non-zero, non-line voltages seen during normal operation. | 2011-06-09 |
| 20110133760 | Systems and Methods for Minimizing Stray Current In Capacitive Sensor Data - A method for minimizing stray current in capacitive sensor data includes receiving a first input from a first wire of a wire harness, the wire harness comprising a plurality of twisted wires, the first input comprising a first signal comprising first sensor data and stray current; receiving a second input from a second wire of the wire harness, the second input comprising a second signal comprising stray current; and subtracting the second signal from the first signal to determine the first sensor data. A system for minimizing stray current in capacitive sensor data is also provided. | 2011-06-09 |
| 20110133761 | QUALIFYING CIRCUIT BOARD MATERIALS - A test structure for testing electrical properties of a material comprises a first loop and a second loop, which are connected to form a closed test loop. A signal generator, for generating a test signal, is coupled to the first loop and the second loop. A signal propagation switching logic is coupled to the first loop and to the second loop for alternatingly flipping the test signal between the first and second loops, such that the test signal moves uninterrupted through the closed test loop. A probe logic detects any degradation of the test signal as the test signal travels along the closed test loop. | 2011-06-09 |
| 20110133762 | CARTRIDGE DEVICE FOR BLOOD ANALYSIS - A cartridge device having a receiving portion for receiving a blood sample and a jack portion for receiving a plug; a stirring device for circulating the blood sample within the receiving portion; and an electrode holder having at least one incorporated electrode wire pair; wherein the electrode holder is attachable to the cell such that one end of the at least one electrode wire pair forms a sensor unit for measuring the electrical impedance between the two electrode wires of the at least one electrode wire pair within the blood sample and that the opposite end of the at least one electrode wire pair forms a plug portion being connectable directly to the plug for an electrical connection of the sensor unit to an analyser. | 2011-06-09 |
| 20110133763 | CIRCUIT FOR SIMULATING AN ELECTRICAL LOAD - A circuit for simulating an electrical load at a terminal of a test circuit having at least one first switch and at least one second switch includes a third switch connected to the first switch of the test circuit via a first external connection point. A fourth switch is connected to the second switch of the test circuit via a second external connection point. The first switch and the second switch are connected via a shared, first internal connection point to the terminal of the test circuit and the third switch and the fourth switch are connected via a shared, second internal connection point such that that the first switch, the second switch, the third switch and the fourth switch form an H-bridge circuit. A voltage source is configured to provide the first and second external connection points with a supply voltage. A controllable voltage source is connected in a transverse bridge branch between the terminal and the second internal connection point. An inductance is active in the transverse bridge branch. A current-control unit is operable on the controllable voltage source so as to adjust, to a predetermined setpoint current, an actual current flowing over the terminal of the test circuit and over the transverse bridge branch. | 2011-06-09 |
| 20110133764 | APPARATUS AND METHOD FOR DETECTING ABNORMALITY IN SOLAR CELL POWER GENERATION SYSTEM - The present invention provides an apparatus for easily detecting an abnormal status of power generation of a solar cell panel in a solar cell power generation system having the power generation of 1 MW or higher. | 2011-06-09 |
| 20110133765 | METHOD AND APPARATUS FOR PROBE CONTACTING - There is provided a method and a device for accurately detecting the contact of a mechanical probe with a contact object. The contact detecting device comprises a mechanical probe movable for being in contact with a contacted object, a charged particle beam source which generates a charged particle beam applied to the contacted object, a detector for detecting secondary particles or reflected particles from the contacted object, a calculating device which calculates, from a detection signal from the detector, a feature quantity of a shadow of the mechanical probe projected on the contacted object, and a control device which controls the operation of the mechanical probe. The calculating device calculates, as the feature quantity of the shadow of the mechanical probe, a shadow depth S(x, y), and obtains an evaluation value J(z), showing a distance between the contacted object and the mechanical probe, based on the shadow depth S(x, y). | 2011-06-09 |
| 20110133766 | TRANSFORMER WITHIN WAFER TEST PROBE - A wafer test probe for testing integrated circuitry on a die is disclosed. The wafer test probe includes a membrane core. The wafer test probe also includes circuitry within the membrane core. The circuitry within the membrane core includes at least one portion of an inductor. The wafer test probe further includes a probe tip. | 2011-06-09 |
| 20110133767 | SILVER ALLOY HAVING EXCELLENT CONTACT RESISTANCE AND ANTIFOULING PROPERTY AND SUITABLE FOR USE IN PROVE PIN - The present invention is a silver alloy suitable for use in a probe pin made of an Ag—Cu alloy, wherein the silver alloy comprises 30 to 50% by weight of Cu and Ag as balance. This silver alloy further comprises 2 to 10% by weight of Ni to further improve strength. A probe pin made of these materials has stable contact resistance even under low contact pressure. The probe pin has excellent strength and antifouling property to adhesion of a foreign matter from a contact object due to repetitive use. Thereby, the probe pin usable in a stable manner for a long period of time can be obtained. | 2011-06-09 |
| 20110133768 | TEST WAFER UNIT AND TEST SYSTEM - Provided is a test wafer unit that tests a plurality of devices under test formed on a wafer under test, the test wafer unit comprising a plurality of test circuits that are formed on the same semiconductor wafer, where a plurality of types of the test circuits having different functions are provided for each device under test; and a selecting section that selects which type of test circuit is electrically connected to each pad of a device under test. Therefore, the test wafer unit can select the test circuit corresponding to testing content to be performed and connect this test circuit to the device under test to perform testing on a variety of devices under test or to perform a variety of tests on a device under test. | 2011-06-09 |
| 20110133769 | INSPECTION APPARATUS AND METHOD FOR LED PACKAGE INTERFACE - An LED package interface inspection apparatus for an LED device comprises a current source, a voltage measuring unit, and a testing control unit. The testing control unit provides at least one control signal to command the current source to output at least one current for the LED device. The testing control unit also provides at least two signals to command the voltage measuring unit to measure a first forward voltage of the LED device at a first time and a second forward voltage of the LED device at a second time. The testing control unit calculates a voltage difference between the first forward voltage and the second forward voltage, and determines that the LED device is defective if the voltage difference is larger than a predetermined threshold value. | 2011-06-09 |
| 20110133770 | METHOD AND APPARATUS FOR CONTROLLING QUBITS WITH SINGLE FLUX QUANTUM LOGIC - In one embodiment, the disclosure relates to a method and apparatus for controlling the energy state of a qubit by bringing the qubit into and out of resonance by coupling the qubit to a flux quantum logic gate. The qubit can be in resonance with a pump signal, with another qubit or with some quantum logic gate. In another embodiment, the disclosure relates to a method for controlling a qubit with RSFQ logic or through the interface between RSFQ and the qubit. | 2011-06-09 |
| 20110133771 | EDGE RATE SUPPRESSION FOR OPEN DRAIN BUSES - An edge rate suppression circuit arrangement is provided for operation with an open drain bus. The circuit arrangement includes a variable resistive circuit having an input for receiving a variable voltage signal and an output coupled to the open drain bus, and a control circuit configured to operate the variable resistive circuit. The control circuit operates the variable resistive circuit in respective high and low resistance states in response to the variable voltage signal. | 2011-06-09 |
| 20110133772 | High Performance Low Power Output Drivers - Long existing performance, noise, and power consumption problems of known output drivers are solved by using n-channel transistors as pull up transistors and/or p-channel transistors as pull down transistors for high performance output drivers. In combination with RC termination circuits, output drivers of the present invention can be fully compatible with HSTL, SSTL, GTL, BTL, SATA, PCIe, LVDS, MIPI, MDDI or other partial voltage interfaces. | 2011-06-09 |
| 20110133773 | High Performance Output Drivers and Anti-Reflection Circuits - Long existing performance, noise, and power consumption problems of known output drivers are solved by using n-channel transistors as pull up transistors and/or p-channel transistors as pull down transistors for high performance output drivers. On-die termination-circuit-branches provide effective anti-reflection functions for multiple chips connected to the same transmission line(s). | 2011-06-09 |
| 20110133774 | METHOD AND APPARATUS FOR HIGH RESOLUTION ZQ CALIBRATION - A method is disclosed for controlling an output impedance of an electronic device of the type having an impedance control terminal to which an external load is to be connected such that a predetermined value of the voltage at the impedance control terminal controls the output impedance of the device. The method is comprised of comparing a reference voltage to a voltage at the impedance control terminal. A variable count signal representing a count value is produced in response to the comparing. The impedance of a variable impedance circuit is varied in response to the count signal, wherein the impedance of the variable impedance circuit controls the voltage at the impedance control terminal. A device connected in parallel with the variable impedance circuit is periodically operated to change (increase/decrease) the impedance of the variable impedance circuit. An apparatus for performing the method is also disclosed. Because of the rules governing abstracts, this abstract should not be used to construe the claims. | 2011-06-09 |
| 20110133775 | INTERFACE CIRCUIT - An interface of the present invention includes a first inverter circuit that inverts a logic level of an input signal given to an external input terminal and outputs the inverted logic level, a second inverter circuit that outputs a potential in which a logic level of an output signal of the first inverter circuit is inverted, that is, a potential higher or lower than a logic of an input signal applied to the first inverter circuit by the amount of a predetermined potential, and a feedback path that positive feedbacks an output signal of the second inverter circuit to the external input terminal. The interface circuit of the invention positive-feedbacks a potential of the output signal of the second inverter circuit and shifts the potential of the external input terminal in a floating state to an H or L level potential. | 2011-06-09 |
| 20110133776 | ARRAYS OF TRANSISTORS WITH BACK CONTROL GATES BURIED BENEATH THE INSULATING FILM OF A SEMICONDUCTOR-ON-INSULATOR SUBSTRATE - This invention provides a semiconductor device structure formed on a conventional semiconductor-on-insulator (SeOI) substrate and including an array of patterns, each pattern being formed by at least one field-effect transistor, each FET transistor having, in the thin film, a source region, a drain region, a channel region, and a front control gate region formed above the channel region. The provided device further includes at least one FET transistor having a pattern including a back control gate region formed in the base substrate beneath the channel region, the back gate region being capable of being biased in order to shift the threshold voltage of the transistor to simulate a modification in the channel width of the transistor or to force the transistor to remain off or on whatever the voltage applied on its front control gate. This invention also provides methods of operating such semiconductor device structures. | 2011-06-09 |
| 20110133777 | Configurable Circuits, IC's, and Systems - Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes a logic circuit for receiving input data sets and configuration data sets and performing several functions on the input data sets. Each configuration data set specifies a particular function that the logic circuit has to perform on the input data set. The IC also includes a connection circuit for supplying sets of the configuration data to the logic circuit at a particular rate for at least a particular time period. At least two supplied configuration data sets are different and configure the logic circuit to perform two different functions on the input data. | 2011-06-09 |
| 20110133778 | NON-VOLATILE LOGIC CIRCUITS, INTEGRATED CIRCUITS INCLUDING THE NON-VOLATILE LOGIC CIRCUITS, AND METHODS OF OPERATING THE INTEGRATED CIRCUITS - Provided is a non-volatile logic circuit that includes a latch unit having a pair of latch nodes and a pair of non-volatile memory cells to be supplied first and second write voltages according to data of the pair of latch nodes when a write enable signal is activated such that a write operation is performed with respect to the pair of non-volatile memory cells. The first and second write voltages are different and logic values of data written to the respective non-volatile memory cells are different. | 2011-06-09 |
| 20110133779 | INTERFACE CIRCUIT - An interface of the present invention includes a first inverter circuit that inverts a logic level of an input signal given to an external input terminal and outputs the inverted logic level, a second inverter circuit that outputs a potential in which a logic level of an output signal of the first inverter circuit is inverted, that is, a potential higher or lower than a logic of an input signal applied to the first inverter circuit by the amount of a predetermined potential, and a feedback path that positive feedbacks an output signal of the second inverter circuit to the external input terminal The interface circuit of the invention positive-feedbacks a potential of the output signal of the second inverter circuit and shifts the potential of the external input terminal in a floating state to an H or L level potential. | 2011-06-09 |
| 20110133780 | HIGH PERFORMANCE LOW POWER OUTPUT DRIVERS - Long existing performance, noise, and power consumption problems of known output drivers are solved by using n-channel transistors as pull up transistors and/or p-channel transistors as pull down transistors for high performance output drivers. In combination with RC termination circuits, output drivers of the present invention can be fully compatible with HSTL, SSTL, GTL, BTL, SATA, PCIe, LVDS, MIPI, MDDI or other partial voltage interfaces. | 2011-06-09 |
| 20110133781 | LOW POWER COMPLEMENTARY LOGIC LATCH AND RF DIVIDER - A quadrature output high-frequency RF divide-by-two circuit includes a pair of differential complementary logic latches. The latches are interconnected to form a toggle flip-flop. Each latch includes a tracking cell and a locking cell. In a first embodiment, the locking cell includes two complementary logic inverters and two transmission gates. When the locking cell is locked, the two gates are enabled such that the locked (i.e., latched) signal passes through both transmission gates and both inverters. In one advantageous aspect, the tracking cell only involves two transmission gates. Due to the circuit topology, the first embodiment is operable from a low supply voltage at a high operating frequency while consuming a low amount of supply current. In a second and third embodiment, the tracking cell involves a pair of inverters. The sources of the transistors of the inverters are, however, coupled together thereby resulting in performance advantages over conventional circuits. | 2011-06-09 |
| 20110133782 | METHOD AND CIRCUIT ARRANGEMENT FOR CONTROLLING SWITCHING TRANSISTORS OF AN INTEGRATED CIRCUIT - A method and circuit arrangement is provided for controlling switching transistors of an integrated circuit, with a bridge circuit and with a control unit, which is designed and/or has a program so that the control unit is designed as a measuring device and measures a bridge voltage of the bridge circuit, outputs an adjusting signal for adjusting a component of a bridge circuit, and outputs a control signal for activating the switching transistors. When the bridge circuit) has a branch with a resistor network and a transistor connected in series, and the control unit is designed and/or has a program so that the adjusting signal for adjusting a resistance value of the resistor network is switchable as the component dependent on the bridge voltage. | 2011-06-09 |
| 20110133783 | SIGNAL INTERPOLATION METHODS AND CIRCUITS - An interpolation circuit for comparing an input voltage signal with an interpolated reference signal derived from a first reference voltage signal and a second reference voltage signal may include a transconductive circuit configured to generate a first differential current signal proportional to a difference between the first reference voltage signal and the input voltage signal and a second differential current signal proportional to a difference between the second reference voltage signal and the input voltage signal, an intermediate circuit configured to generate a third differential current signal, and a transinductive circuit configured to generate an output voltage signal having a first polarity if a value of the input voltage signal is greater than a value of the interpolated reference signal and a second polarity if the value of the input signal is less than the value of the interpolated reference signal. | 2011-06-09 |
| 20110133784 | CIRCUIT FOR DETECTING PHASE IMBALANCE OF SIGNALS - A circuit for detecting a phase imbalance of signals includes a conversion block and a comparator coupled to the conversion block. The conversion block generates generating a direct current (DC) signal based on a first signal and a second signal. The level of the DC signal is determined by a phase difference between the first signal and the second signal. The comparator compares the DC signal to a reference signal and generates an alert signal if a difference between the DC signal and the reference signal is greater than a predetermined threshold. | 2011-06-09 |
| 20110133785 | APPARATUS AND METHOD FOR TIMING ERROR DETECTION DECISION LOCK - A method for timing error detection decision lock includes the following steps. Multiple detected values are obtained from a transmission signal. A moving sum mean signal is obtained according to the detected values. The moving sum mean signal is sampled every second constant period to obtain multiple sampling values. Whether the transmission signal is in a timing-lock status or an un-timing-lock status is determined according to relative relationships between the sampling values. | 2011-06-09 |
| 20110133786 | SEMICONDUCTOR DEVICE - A speed performance measurement circuit that may perform speed performance measurement is provided between a first logic circuit and a second logic circuit. The speed performance measurement circuit includes a first flip flop that stores first data, a first delay circuit that delays the first data and generates second data, and a second flip flop that stores the second data. Furthermore, the speed performance measurement circuit includes a first comparator circuit that compares output of the first flip flop to output of the second flip flop, and a third flip flop that stores output data from the first comparator circuit in accordance with timing of the first clock signal. Data in a normal path is compared to data in a path delayed by a certain time to measure speed, and power voltage of a circuit is determined based on such comparison. Thus, change in speed with respect to power voltage in a critical path can be measured. | 2011-06-09 |
| 20110133787 | CIRCUIT AND METHOD FOR DETERMINING A CURRENT - A power supply circuit having a converter circuit and method for determining a current flowing into the converter circuit. A converter circuit includes an amplifier and a current-to-current converter module. The amplifier has a current sensing element coupled between its inverting and noninverting input terminals. The amplifier generates a sensing signal from a charging current flowing through the current sensing element. The sensing signal is input into the current-to-current converter module, which scales the charging current and modulates the scaled charging current. The current-to-current converter module converts the modulated current to a charging voltage that is representative of the charging current. The charging current is converted to a current that is representative of the input current to converter circuit. The input current to the converter circuit is added to an auxiliary load current to yield the current of the power supply circuit. | 2011-06-09 |
| 20110133788 | DUAL FUNCTION VOLTAGE AND CURRENT MODE DIFFERENTIAL DRIVER - A dual function differential driver includes a voltage mode differential driver portion and a current mode differential driver portion. Control circuitry is connected to the voltage mode differential driver portion and the current mode differential driver portion. The control circuitry switches the dual function differential driver between operation as a voltage mode differential driver and operation as a current mode differential driver. | 2011-06-09 |
| 20110133789 | Driver circuit, driver apparatus, and image forming apparatus - A driver circuit drives a plurality of groups of light emitting elements. Each element includes an anode, a cathode connected to the ground, and a gate that controls electrical conduction between the anode and cathode. A first driver section simultaneously drives the anodes of the elements of the plurality of groups of elements. A second driver section simultaneously drives the gates of the elements in a corresponding group of the plurality of groups. The second driver section includes a series connection of a first switch element and a voltage level shifter. The series connection is connected between a power supply and the group of gates. The second driver section further includes a second switch element connected between the group of gates and the ground. | 2011-06-09 |
| 20110133790 | DEVICE FOR DRIVING SWITCHING ELEMENTS - A drive unit controls the operation of a corresponding power switching element such as IGBT which forms an inverter and a converter. The drive unit controls the operation of the corresponding power switching element to supply an operation current to a motor generator. First and second switching elements in the drive unit are simultaneously turned on when an operation signal transferred from a control device is switched to a turning-on instruction operation signal. The voltage at the gate terminal of the power switching element is shifted to a divided voltage obtained by dividing a voltage of the power source by first and second resistances connected in series in the drive unit. When a mirror time period of the power switching element is elapsed, the second switching element only is turned off in order to shift the gate voltage of the power switching element to the voltage of the power source. | 2011-06-09 |
| 20110133791 | OUTPUT BUFFER CIRCUIT, INPUT BUFFER CIRCUIT, AND INPUT/OUTPUT BUFFER CIRCUIT - An output buffer circuit in accordance with an embodiment comprises a plurality of buffer circuits, each of the buffer circuits including a transistor operative to change an output signal of an output terminal in response to a change in an input signal, the output buffer circuit being configured to enable the plurality of buffer circuits to be driven selectively. Each of the plurality of buffer circuits includes a plurality of output transistors having respective current paths formed in parallel to one another between a fixed voltage terminal supplying a certain fixed voltage and an output terminal, and being selectively rendered in an operable state in accordance with a control signal provided from external. The plurality of output transistors included in each of the plurality of buffer circuits are formed having a certain size ratio. | 2011-06-09 |
| 20110133792 | BUFFER CIRCUIT - A buffer circuit in accordance with an embodiment comprises output transistors connected between a first fixed voltage terminal and an output terminal, and gate control transistors connected between a second fixed voltage terminal and a gate of one of the output transistors or between two of gates of the output transistors. The output transistors are configured to turn on to change a voltage of the output terminal. The gate control transistors are configured to apply a gate voltage to the gates of the output transistors. A gate of each of the gate control transistors is applied with a certain voltage, such that when a source of each of the gate control transistors changes from a first potential to a second potential, a potential difference between the gate and the source attains a threshold voltage or greater, whereby each of the gate control transistors is turned on. | 2011-06-09 |
| 20110133793 | CLOCK DIVIDER WITH SEAMLESS CLOCK FREQUENCY CHANGE - A clock divider circuit including a clock input, a clock selection input, a divider stage and a toggle stage is provided. The clock divider circuit provides an output clock based on a clock input received at the clock input. The clock selection input is coupled to the divider stage, and the divider stage is coupled to the toggle stage. A clock divide setting is updated at the clock selection input synchronously to an operation of the divider stage. In one implementation, for example, the clock divider setting is updated seamlessly. A method of transitioning an output clock signal is also provided. The method includes receiving an input clock signal and a first clock divide setting; providing an output clock signal having a first output clock frequency by dividing the input clock signal based upon the first clock divide setting utilizing a divider stage of a clock divider circuit; providing an updated second clock divide setting synchronously to an operation of the divider stage; and transitioning the output clock signal to a second output clock frequency based upon the updated second clock divide setting. A power management system is also provided. | 2011-06-09 |
| 20110133794 | PHASE LOCKED LOOP WITH DIGITAL COMPENSATION FOR ANALOG INTEGRATION - A phase locked loop (PLL) device includes a digital differentiator configured to differentiate a digital loop signal to at least partially compensate for the integration of an analog current signal by an analog integrator. A digital to analog converter (DAC) includes a current source output stage that generates the analog current signal based on an digital input signal. The analog integrator integrates the analog current signal to generate a voltage control signal for controlling a voltage controlled oscillator (VCO). | 2011-06-09 |
