| 23rd week of 2013 patent applcation highlights part 19 |
| Patent application number | Title | Published |
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| 20130141090 | MAGNETIC FIELD SENSING APPARATUS AND METHODS - Magnetic field sensor designs that provide both increased directionality and proximate coupling desirable for improved directionality and sensitivity and methods for fabricating them. | 2013-06-06 |
| 20130141091 | MAGNETIC FIELD SENSOR - A magnetic field sensor has a magnetoresistive rod having a stack of stacked layers that include a pinned layer having a fixed magnetization direction almost perpendicular to a longitudinal direction, a free layer comprising a magnetostrictive material having a coefficient of magnetostriction greater than 20 ppm to 25° C. and a longitudinal axis of easiest magnetization, the magnetization changing when the free layer is exposed to a magnetic field, a non-magnetic spacer layer interposed between the free and pinned layers to form a tunnel junction or spin valve, and a stress-generating layer for exerting uniaxial stress essentially such that a product of stress and magnetostriction coefficient is greater than 500 ppm·MPa at 25° C. The rod's length is at least ten times its greatest width. | 2013-06-06 |
| 20130141092 | METHOD OF OPTIMIZING MAGNETIC RESONANCE SCANNING PARAMETERS | 2013-06-06 |
| 20130141093 | Surface Electrode Design that can be Left in Place During MR Imaging - For use in MR imaging of a patient a plurality of surface electrodes such as ECG or defibrillator are provided for obtaining electrical signals for determining electrical activity within the body of the patient and remain in place during the MR imaging. The surface electrodes include a quick disconnect wire for carrying the signals to a signal processing system to be removed during the MR imaging to prevent heating. Each electrode comprises a conductive layer divided by slits into separate side by side sections to reduce eddy currents which are induced in the surface electrodes when they are exposed to variations in the magnetic field. The sections all are connected through the layer to the conductive location to allow the signal therefrom to be connected to the communication conductor. | 2013-06-06 |
| 20130141094 | MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD - A magnetic resonance imaging apparatus according to an exemplary embodiment includes a first imaging unit, an identifying unit, and a second imaging execution unit. The first imaging execution unit acquires, after applying a labeling RF pulse to blood flowing into the myocardium of a subject, multiple non-contrast MR data for which the time intervals between labeling and acquiring data are different by performing sequential imaging of an imaging area including the myocardium in each segment of a k-space for a given time interval. The identifying unit identifies a time interval taken by the labeled blood to reach a given position in the imaging area. The second imaging execution unit sets the identified time interval and, after applying a labeling RF pulse to the blood flowing into the myocardium of the subject, acquires non-contrast MR data by imaging the imaging area including the myocardium. | 2013-06-06 |
| 20130141095 | NMR SPECTROSCOPY DEVICE BASED ON RESONANCE TYPE IMPEDANCE (IR) SENSOR AND METHOD OF NMR SPECTRA ACQUISITION - Processes and apparatuses are provided for contactless Nuclear magnetic resonance (“NMR”) spectrum acquiring and spectroscopic analysis and/or measuring or monitoring, in-line, in-situ and/or in real time, at least one composition or object under test of one or more solid, liquid, and/or gaseous substances and/or one or more bulk materials. One or more apparatus may include a resonance type impedance sensor having at least two coils, at least one coil of the at least two coils being at least one excitation coil, at least one other coil of the at least two coils being at least one sensing coil. The method(s) involve acquiring an NMR spectrum of an object under test while changing at least one of the frequency of an IR sensor and the intensity of the magnetic field applied to an object under test and/or sweeping intensity of the magnetic field applied to the object under test. | 2013-06-06 |
| 20130141096 | SYSTEMS AND METHODS FOR MEASURING NUCLEAR MAGNETIC RESONANCE SPIN-LATTICE RELAXATION TIME T1 AND SPIN-SPIN RELAXATION TIME T2 - A system for measuring nuclear magnetic resonance spin-lattice relaxation time T | 2013-06-06 |
| 20130141097 | MAGNETIC RESONANCE IMAGING APPARATUS - The MRI apparatus includes an image generating unit, an area setting unit, a slice condition determining unit and an imaging executing unit. The image generating unit images an object at a predetermined imaging position, and generates an image for positioning. The area setting unit sets a slab area and a slice area on a basis of a recommended value that is stored in a storage and corresponds to the predetermined imaging position, and to display the set slab area and the set slice area on the image for positioning, the storage storing the recommended value of a parameter concerning a slice condition for each of a plurality of imaging positions. The slice condition determining unit determines the slice condition on a basis of the slice area. The imaging executing unit executes an imaging of the slab area in accordance with the determined slice condition. | 2013-06-06 |
| 20130141098 | Alignment Phantom for MR/PET System - A phantom for co-registering a magnetic resonance image and a nuclear medical image is disclosed. The phantom includes a longitudinal member having a first end cap and a second end cap and a chamber contained within the longitudinal member. The chamber contains a fluid for producing a first image using a first imaging modality. The phantom further includes a first rod disposed within the chamber of the longitudinal member. The first rod contains a radioactive substance for producing a second image using a second imaging modality. | 2013-06-06 |
| 20130141099 | VARIATION OF AN MRI SEQUENCE PARAMETER TO MINIMIZE THE VARIANCE OF A MEASURED VALUE - In a magnetic resonance system and a method and device for generating a control command sequence for operating the magnetic resonance system, a magnetic resonance data acquisition sequence is provided to a processor and is modified in the processor. The sequence operates the magnetic resonance system to acquire magnetic resonance data from a subject in multiple individual data acquisitions for subsequent automated evaluation of the individual data acquisitions with respect to an evaluation parameter. The individual evaluation results are combined into an overall evaluation result. The control command sequence is automatically modified in the processor by varying at least one sequence control parameter between different individual data acquisitions so that a variance of a measurement error in the overall evaluation result is minimized. | 2013-06-06 |
| 20130141100 | ANOMALY DETECTION SYSTEM FOR WIRELINE CABLES - An embodiment of a method for detecting an anomaly in at least a portion of a wireline cable, comprises providing at least one wireline cable, providing a wireline surface equipment system comprising an anomaly detection system and disposing the anomaly detection system adjacent the wireline cable, operating the surface equipment to enable the wireline cable to pass by the anomaly detection system, operating the anomaly detection system to detect the presence of an anomaly in at least a portion of the wireline cable, the anomaly detection system generating an output when an anomaly is detected, and sending the output of the anomaly detection system to a control unit. | 2013-06-06 |
| 20130141101 | RADIO FREQUENCY ASSISTED GEOSTRUCTURE ANALYZER - The invention relates to instruments designated for geophysical survey, in particular for soil mass exploration using electromagnetic waves. Radio frequency assisted geostructure analyzer comprising transmitting antenna and radio transmitter ( | 2013-06-06 |
| 20130141102 | OPTIMIZED ARRAYS FOR LOOK AHEAD-OF-BIT APPLICATIONS - Various embodiments include apparatus and methods of operation with respect to well logging. Apparatus and methods include a tool having an arrangement of transmitters and receivers to capture a signal from a first region relative to the tool such that signal contributions from a second region relative to the tool are cancelable, based on placement of the transmitters and receivers with respect to each other. Additional apparatus, systems, and methods are disclosed. | 2013-06-06 |
| 20130141103 | Induction Coil Impedance Modeling Using Equivalent Circuit Parameters - Methods and related systems are described for making an electromagnetic induction survey of a formation surrounding a cased section of a borehole. An electromagnetic transmitter and/or receiver is deployed into the cased section of the borehole. Electromagnetic survey measurements and impedance measurements relating to impedance of the transmitter and/or receiver are made while deployed in the section of the borehole. Compensation is made for the attenuation amplitude and/or phase in the electromagnetic survey measurements due to the conductive casing. The compensation is based on the impedance measurements and equivalent circuit parameters. The impedance measurements are correlated with numerical modeling results of a purely inductive electromagnetic transducer, and calculated equivalent circuit parameters are combined with the numerical modeling results. | 2013-06-06 |
| 20130141104 | Shielded Antenna For A Downhole Logging Tool - This disclosure relates to a downhole logging tool for acquiring data in an earth formation. In one embodiment, the downhole logging tool has a tool body with a longitudinal axis, a set of antennas located on the tool body and including coil windings forming a closed-loop pattern, and a shield disposed over the antennas and having an arrangement of slots with each slot being substantially perpendicular to a proximate portion of at least one of the underlying coil windings, wherein the path length around each slot is more than twice the length of the distance between the slot and a directly adjacent slot along an arc of the coil windings. The downhole logging tool may be a wireline or while-drilling tool, and it may be an induction or propagation tool. | 2013-06-06 |
| 20130141105 | TEST SYSTEM FOR A BATTERY MODULE - A test system for a battery module is provided. The system includes a housing having a bottom plate; and first, second, third and fourth side walls coupled to the bottom plate that defines an interior region. The system further includes a mounting fixture that fixedly holds the battery module thereon. The system further includes first, second, third and fourth coupling members. The system further includes a lid coupled to the housing utilizing the first, second, third and fourth coupling members. The system further includes a battery charging system that charges the battery module. | 2013-06-06 |
| 20130141106 | CIRCUIT FOR MEASURING VOLTAGE OF BATTERY AND POWER STORAGE SYSTEM USING THE SAME - A circuit for measuring voltage of a battery and a power storage system using the same are disclosed. According to one aspect, the circuit includes a switching element connected to the battery and configured to output a first signal at a first voltage level. The switching element is configured to be turned-on in response to a voltage measuring control signal. The circuit also includes a voltage conversion circuit connected to the switching element. The voltage conversion circuit is configured to output a second signal at a second voltage level that is proportional to the first voltage level. An analog-digital converter is configured to receive the second signal and convert the received second signal into a digital signal. A controller is configured to transfer the voltage measurement control signal to the switching element, and receive the digital signal from the analog-digital converter. | 2013-06-06 |
| 20130141107 | BATTERY INSPECTION APPARATUS - A battery inspection apparatus includes: a battery inspection table having a plurality of inspection units each for inspecting a rechargeable battery; and a controller that is provided separately from the battery inspection table and configured to control the battery inspection table. Each of the inspection units includes: a contactor for inspection configured to contact a corresponding battery; and a measurement circuit that is connected to the contactor and configured to generate an analog measured signal by measuring at least one of a current, voltage, and temperature, based on an input from the contactor. The battery inspection table has a control board mounted, the control board being configured to convert the analog measured signal generated by each of the inspection units into a digital signal to output to a common communication cable, and the communication cable connects the control board and the controller together. | 2013-06-06 |
| 20130141108 | METHOD FOR RECOGNIZING A CRITICAL BATTERY CONDITION AFTER A RESET OF A BATTERY MONITORING DEVICE - The invention relates to a method for recognising a critical battery condition after a reset ( | 2013-06-06 |
| 20130141109 | Battery Health Monitoring System and Method - A method and system for monitoring the health of a battery is provided. A precision frequency can be determined for the battery by applying one of an AC current or voltage perturbation across a frequency sweep with impedance spectroscopy equipment to obtain an impedance response; collecting data related to the impedance response at a plurality of various states of charge within a recommended voltage window of the battery; plotting the collected data on one or more impedance curves; and analyzing the one or more impedance curves at the various states of charge to determine the precision frequency. Next, one of an AC current or voltage perturbation can be applied at the precision frequency resulting in an impedance response. The value of the impedance response can be recorded, and a determination can be made of a battery classification zone that the impedance value falls within. | 2013-06-06 |
| 20130141110 | METHODS AND APPARATUS FOR CONTINUOUS GROUND FAULT SELF-TEST - Methods and apparatus for continuous ground fault self-test are disclosed. An example ground fault detection device includes a sense coil to detect current in a line conductor and a neutral conductor, the sense coil comprising a winding influenced by a current difference between the line conductor and the neutral conductor. The example ground fault detection device also includes a current bypass to facilitate a continuous current imbalance detected by the sense coil, and a ground fault detector circuit to detect at least one of the continuous current imbalance in the sense coil or a ground fault current imbalance. | 2013-06-06 |
| 20130141111 | Method and Apparatus for Locating a Parallel Arc Fault - Methods to determine the location of an arc fault include a first method utilizing the inherent resistance per unit length of the wire. A second and a third method utilize an inherent inductance per unit length of the wire. The second method derives the inherent inductance from the output voltage and a rate of current rise. The third method derives the inherent inductance from a resonant frequency of an oscillating current. The information is useful to locate a fault emanating from a wire member of a wiring harness used to distribute power about an aircraft. | 2013-06-06 |
| 20130141112 | Method and Apparatus for Locating a Parallel Arc Fault - Methods to determine the location of an arc fault include a first method utilizing the inherent resistance per unit length of the wire. A second and a third method utilize an inherent inductance per unit length of the wire. The second method derives the inherent inductance from the output voltage and a rate of current rise. The third method derives the inherent inductance from a resonant frequency of an oscillating current. The information is useful to locate a fault emanating from a wire member of a wiring harness used to distribute power about an aircraft. | 2013-06-06 |
| 20130141113 | SYSTEMS AND METHODS OF IDENTIFYING CONNECTIONS IN A COMMUNICATIONS PATCHING SYSTEM USING COMMON-MODE CHANNEL SIGNAL TRANSMISSIONS - Communications patching system and methods utilizing common-mode channel communications are provided for identifying patch panel ports to which a backbone cable is connected in a communications patching system, for identifying a patch panel port to which a horizontal cable terminating at a telecommunications outlet is connected in a communications patching system, and for identifying the physical location of first and second connectors of a patch cord in a communications patching system having multiple patching zones. | 2013-06-06 |
| 20130141114 | NON-LINEAR KERF MONITOR AND DESIGN STRUCTURE THEREOF - A non-linear kerf monitor, methods of manufacture and design structures are provided. The structure includes a coplanar waveguide provided in a kerf of a wafer between a first chip and a second chip. The structure further includes a shunt switch and a series switch coupled to the coplanar waveguide. | 2013-06-06 |
| 20130141115 | Process and Installation for Inspection and/or Sorting Combining Surface Analysis and Volume Analysis - Automatic process and installation for inspecting and/or sorting objects or articles belonging to at least two different categories, and made to advance approximately in a single layer, for example on a conveyor belt or a similar transport support. The process includes subjecting the advancing flow of objects or articles to at least two different types of contactless analysis by radiation, whose results are used in a combined manner for each object or article to perform a discrimination among these objects or articles and/or an evaluation of at least one characteristic of the latter, the analyses including at least one surface analysis process able to determine the physical and/or chemical composition of the outer layer of an object or article exposed to the radiation used in this process, and at least one volume analysis process able to determine the equivalent thickness of material of the same object or article. | 2013-06-06 |
| 20130141116 | Conductivity Sensor - A conductivity sensor is disclosed. The conductivity sensor includes an oscillator for providing an input signal and a reactive circuit having an induction coil, a capacitive element, and a resistive element connected in parallel. The induction coil is adapted to be placed adjacent to a specimen. The conductivity sensor further includes a control circuit for driving the reactive circuit to resonance when the induction coil is placed adjacent to the specimen. The reactive coil is configured to provide an output signal having a parameter representative of the conductivity of the specimen when the reactive circuit is at resonance. The induction coil may include a first conductive element that spirals outward to an external perimeter and a second conductive element operably connected to the first conductive element. The second conductive element spirals inward from the external perimeter staggered relative to the first conductive element. | 2013-06-06 |
| 20130141117 | IMPEDANCE RESONANCE SENSOR FOR REAL TIME MONITORING OF DIFFERENT PROCESSES AND METHODS OF USING SAME - Processes and apparatuses are provided for contactless measuring or monitoring in-situ and in real time composition or other electromagnetic impedance correlated properties of liquid or gaseous substances or bulk materials. One or more apparatus may include a resonance type impedance sensor having at least two coils, at least one coil of the at least two coils being at least one excitation coil connectable to at least one alternating current source with frequency sweep, at least one other coil of the at least two coils being at least one sensing coil connectable to at least one data processing system. The one or more methods may include calculating changes in amplitude and resonant frequency induced by electromagnetic interaction between said sensor and object to determine impedance of said object under test; and matching said impedance with predetermined calibration data to determine said chemical or physical properties of said object under test. | 2013-06-06 |
| 20130141118 | Capacitive Coupling of Bond Pads - In one embodiment, a system includes a touch sensor comprising a first set of electrodes and a first set of bond pads electrically coupled to the first set of electrodes. The system also includes a second set of bond pads capacitively coupled to the first set of bond pads. Each bond pad of the second set of bond pads is coincident with a bond pad of the first set of bond pads. The system also includes a circuit electrically coupled to the second set of bond pads such that signals may be communicated from the first set of bond pads to the circuit. | 2013-06-06 |
| 20130141119 | Substantially Edgeless Touch Sensor - In one embodiment, an apparatus is provided that includes a touch sensor. The touch sensor includes a plurality of drive electrodes made of conductive material, a plurality of sense electrodes made of conductive material, and a plurality of edges. Each of the drive electrodes and each of the sense electrodes are coupled to at least one track. The tracks are located along only one of the plurality of edges of the touch sensor. | 2013-06-06 |
| 20130141120 | DETERMINING LAYER THICKNESS - A technique comprising: producing a plurality of devices according to a common production process; and determining the thickness of a layer of one of said plurality of devices using an indicator of a first electrical property dependent on the area of overlap between a first element of the device and a second element of the device partially underlying said first element via said layer, wherein the method further comprises: additionally using an indicator of a second electrical property dependent on the area of overlap between said first element of the device and a third element of the device also partially underlying said first element via said layer, wherein (a) the difference between (i) a measured indicator of said first electrical property, and (ii) a measured indicator of said second electrical property provides a more reliable indicator of the thickness of said layer than (b) an indicator of said first electrical property. | 2013-06-06 |
| 20130141121 | "Robust Capacitive Measurement System", - A capacitive sensing circuit is disclosed, wherein the mixer is directly connected to the sense electrode. The AC transimpedance amplifier in front of the mixer in prior art is removed and replaced by a differential DC transimpedance amplifier respectively integrator. The mixer DC offset voltage or current together with the large amplification factor required after the mixer now would result in an inacceptable DC offset at the output of the signal chain. In order to eliminate the effect of the mixer offset, the amplifying stages after the mixer are AC coupled to the mixer output and one of the signals entering the mixer is phase modulated or amplitude modu | 2013-06-06 |
| 20130141122 | MICROSENSOR FOR MERCURY - Methods and devices for detecting a concentration of one or more element in hydrocarbon and/or natural gas in an oil and gas field application. The device including a microstructure having a low thermal mass suspended within a channel, the microstructure includes a supporting layer and a insulating layer; a controllable thermal device in communication with the supporting layer of the microstructure, wherein the controllable thermal device is controllably heated to one or more release temperature of the one or more element; a sensing layer arranged on the insulating layer to absorb molecules of the one or more element from hydrocarbon and/or natural gas; a detecting and measuring resistance device in communication with the sensing layer for measuring the resistance changes caused by absorption of molecules of the one or more element onto the sensing layer at a first temperature and a second temperature, and storing the data on a processor. | 2013-06-06 |
| 20130141123 | PH-METER CAPABLE OF MEASURING CONDUCTIVITY AND DISSOLVED OXYGEN SIMULTANEOUSLY - A pH-meter capable of measuring conductivity and dissolved oxygen at the same time is composed of a gauge and three probes. Three power sources and three measuring circuits are mounted to the gauge. The detectors of the probes include a pH detector, a conductivity detector and a dissolved oxygen detector. Each of the probes is independently connected with the gauge via a transmission cable to be independently supplied with electricity and the signals of two probes are independently transmitted by electric insulation. Thus, the detecting elements can measure the pH value, conductivity, and dissolved oxygen at the same time with interference with one another. | 2013-06-06 |
| 20130141124 | TEST METHOD OF DRIVING APPARATUS AND CIRCUIT TESTING INTERFACE THEREOF - A circuit testing interface and test method are disclosed. The circuit testing interface may include a test current transmitting pad, a test voltage measuring pad, and at least one driving circuit comprising an output terminal. The output terminal of the at least one driving circuit may be coupled to a through-silicon via (TSV). The circuit testing interface may further include at least one switch module, coupled to (1) the output terminal of the driving circuit, (2) the test current transmitting pad, and (3) the test voltage measuring pad. | 2013-06-06 |
| 20130141125 | DEVICE AND METHOD FOR TESTING STABLITY OF ELECTRONIC DEVICES - A test device is connected to a plurality of electronic devices to test a stability of the electronic devices is provided. The test device includes a parameter setting module, a signal generating module, a communication module, and a monitoring module. The parameter setting module sets test parameters for a test in response to a user input. The signal generating module generates a control signal according to the test parameters set by the user to control the electronic devices to execute operations corresponding to the test parameters. The communication module transmits the control signal to the electronic devices. The monitoring module monitors whether the electronic devices are running in a normal state during the test to determine the stability of the electronic devices and further informs the monitoring result to the user. | 2013-06-06 |
| 20130141126 | SIMULATION TEST CARD - A simulation test card to simulate a peripheral card to be inserted into a system to be tested includes a board, an edge connector formed on a bottom side of the board, and a first heating circuit. The first heating circuit includes a number of first switches, a number of first resistors, and a heating element. First terminal of the first switches are connected to a power pin of the edge connector. A first terminal of each first switch is connected to a first terminal of the first heating element through a corresponding first resistor. A second terminal of the first heating element is connected to a ground pin of the edge connector. Each of the switches can be selectively switched to make the first heating circuit generate different heat. | 2013-06-06 |
| 20130141127 | PROBE ASSEMBLY FOR INSPECTING POWER SEMICONDUCTOR DEVICES AND INSPECTION APPARATUS USING THE SAME - The present invention provides a probe assembly for inspecting power semiconductor devices, which comprises (1) a probe block having more than one probe holding hole, (2) more than one probe, each of which is contained in one of the probe holding holes with its outer surface being in contact with the inner surface of the probe holding hole, and which has lower end protruding from the probe block and coming into contact with the power semiconductor device on inspection, and (3) one or more cooling means which cool the probe block. According to the probe assembly and the inspection apparatus having the prove assembly of the present invention, it is possible to inspect characteristics of power semiconductor devices accurately by suppressing temperature rises of the probes as well as the power semiconductor device under test. | 2013-06-06 |
| 20130141128 | TEST DEVICE AND TEST METHOD FOR TESTING ELECTRONIC DEVICES - A test method includes: generating a start command in responses to a user input; testing each of the electronic devices in responses to the start command, and generating a test result for each of the electronic devices; obtaining a unique identifier of each of the electronic devices; obtaining the test result of each electronic device and generating a test file corresponding to each of the electronic device to record the test result; naming the test file according to the unique identifier of the corresponding electronic device; obtaining the test files, identifying the test files according to the test file name and determining whether each of the electronic devices are running in a normal state by analyzing the test result recorded in the test file. A test device using the above method is also described. | 2013-06-06 |
| 20130141129 | CONTACTOR AND SEMICONDUCTOR TEST APPARATUS COMPRISING THE SAME - Provided is a test contactor for testing a semiconductor device which includes a cylinder, a piston which is configured to reciprocate between a first position and a second position according to a change in pressure in the cylinder, and a pressing part which is configured to change its location according to the reciprocating motion of the piston. The pressing part is configured to be in contact with the semiconductor device when the piston is located at the first position, and the pressing part is configured not to be in contact with the semiconductor device when the piston is located at the second position. | 2013-06-06 |
| 20130141130 | Wafer Probe Card - A wafer probe card has an adapter module and a probe module detachably mounted together. The adapter module has a holding member and an interposer mounted within the holding plate. The probe module has a frame assembly and a space transformer and a probe assembly mounted within the frame assembly. A fixing plate is mounted on the holding member of the adapter module to constitute an electrical connection among the interposer, space transformer and probe assembly. When any element of the wafer probe card is faulty, the adapter module or the probe module is detached and the faulty element is replaced. The adapter module or the probe module with the replaced element is then reassembled. Alternatively, the adapter module or the probe module can be replaced on a modular basis. Accordingly, all components are unnecessarily to be detached entirely, thereby improving the operational speed and efficiency. | 2013-06-06 |
| 20130141131 | SUSPENDED IO TRACE DESIGN FOR SSP CANTILEVER DATA READ / WRITE - A suspended IO trace design for SSP cantilever Read/Write is described. Instead of having the whole I/O trace attached to surface of the cantilever, the cantilever is designed with fish-bone-like support and the I/O traces are anchored to cantilever structures | 2013-06-06 |
| 20130141132 | INSPECTION APPARATUS FOR SEMICONDUCTOR DEVICES AND CHUCK STAGE USED FOR THE INSPECTIONAPPARATUS - The present invention provides an inspection apparatus, which comprises probes for front side electrodes, probes for back side electrodes, and a chuck stage, wherein the probes for front side electrodes and the probes for back side electrodes are formed on the upper surface of the chuck stage, and the probe contact area electrically continues to the wafer holding area, and the probes for front side electrodes and the probes for back side electrodes are located leaving a distance in horizontal direction between them so that the probes for back side electrodes move relatively within the probe contact area when the probes for front side electrodes are moved relatively within the wafer under test by the movement of the chuck stage. According to the inspection apparatus of the present invention, it is possible to inspect characteristics of semiconductor devices having electrodes on both side of a wafer more accurately in wafer state. | 2013-06-06 |
| 20130141133 | Apparatus and Method for Monitoring a Photovoltaic System - The apparatus for monitoring a photovoltaic system includes an incoupling circuit configured to couple an AC voltage test signal into the photovoltaic system, and an outcoupling circuit configured to outcouple a response signal, which is associated with the test signal, from the photovoltaic system, and an evaluation device, which is connected to the outcoupling circuit. The evaluation device is configured to identify events which adversely affect correct operation of the photovoltaic system. The apparatus is distinguished in that the outcoupling circuit includes a first transformer and a second transformer, each having a respective primary winding and each having a respective secondary winding which is connected to the evaluation device, with the primary windings of the first and second transformers being arranged in different electrical lines between a generator and an inverter in the photovoltaic system. The disclosure also relates to a corresponding method for monitoring a photovoltaic system. | 2013-06-06 |
| 20130141134 | Systems and Methods for Sensing Signals Communicated with a Host Device or on an Interface of Plug-In Card when There is Lack of Access to Sensing Points - A circuit system for testing a chip is provided. The circuit system includes a first layer coupled with a plurality of ground communication mediums. Each ground communication medium facilitates communication of a ground signal. The circuit system includes a second layer coupled with a first integrated circuit chip. The second layer is coupled with a plurality of radio frequency (RF) communication mediums. The RF communication mediums facilitate communication of RF signals. The first integrated circuit chip communicates via one of the RF signals and the ground signal with a second integrated circuit chip. The first and second layers are used to probe the RF signals and the ground signal. | 2013-06-06 |
| 20130141135 | APPARATUS FOR TESTING ELECTRONIC DEVICES - An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer. | 2013-06-06 |
| 20130141136 | METHOD AND APPARATUS FOR PARASITIC CURRENT DETECTION - The invention relates to a method for parasitic current detection in a power supply system, which comprises at least one electrical unit, a power grid having power paths for supplying the unit, and a central electrical feed apparatus for feeding electrical power into the power grid, wherein the feed apparatus is connected to a first of the power paths, at which a reference potential is present, and is connected to at least a second of the power paths, at which a potential for generating an operating current through the unit is present, wherein the first power path is earthed by means of a defined first earthing branch of a connecting portion of the first power path, said connecting portion being connected directly to the feed apparatus and being otherwise unbranched. The invention further relates to an apparatus for carrying out the method. | 2013-06-06 |
| 20130141137 | Stacked Physically Uncloneable Function Sense and Respond Module - A physically uncloneable function (PUF) sense and response module fabricated from a stack of integrated circuit chip layers. At least one of the PUF chips in the stack has a unique identifier resulting from random effects of fabrication processes. The PUF chip generates the fingerprint at power-on resulting that in turn is used to generate a private key. The private key generates a public key used to communicate with the outside world. The encrypted data from the outside world is decrypted with the private key. The public key is stored for comparison with pubic keys generated at subsequent power-up operations. If the key changes, tampering is indicated and a predetermined tamper response event is generated such as the erasing of the contents of a memory. | 2013-06-06 |
| 20130141138 | SYSTEMS AND METHODS OF INTEGRATED CIRCUIT CLOCKING - Various systems and methods are provided for integrated circuit clocking. In one embodiment, an integrated circuit system includes a plurality of combinational logic groups, each combinational logic group having a propagation time; and means for delaying a synchronizing clock signal supplied to at least one of the plurality of combinational logic groups based upon a period of the synchronizing clock signal and the propagation time of the at least one combinational logic group. In another embodiment, a method includes delaying a clock signal to produce a delayed clock signal and communicating the clock signal and the delayed clock signal to separate groups of the combinational logic circuit during a clock cycle that results in a reduction in power consumption by the combinational logic circuit. | 2013-06-06 |
| 20130141139 | CAPACITIVE SENSOR INTERFACE AND METHOD - Electronic interface and method for reading a capacitive sensor that includes one input capacitor ( | 2013-06-06 |
| 20130141140 | STRESS REDUCED CASCODED CMOS OUTPUT DRIVER CIRCUIT - An output driver circuit includes first, second, third, and fourth transistors having a common current path, wherein a gate of the first transistor receives a first switching signal, a gate of the second transistor receives a first reference voltage, a gate of the third transistor receives a second reference voltage, and a gate of the fourth transistor receives a second switching signal, and wherein a first capacitor is coupled between the gate of the first transistor and the gate of the third transistor, a second capacitor is coupled between the gate of the second transistor and the gate of the fourth transistor, and an output signal is provided at a node coupling the second and third transistors. | 2013-06-06 |
| 20130141141 | DRIVER CIRCUIT FOR TRANSMITTING COIL OF ACTIVE ANTIMAGNETIC CARD COPYING DEVICE - The present invention relates to a driver unit that locates the transmitter, which transmits magnetic field around the card insertion slot in order to prevent fraud in self-service terminals (SST) such as ATM, which enables transactions with magnetic tape cards. | 2013-06-06 |
| 20130141142 | Multiphase Electrical Power Assignment at Minimal Loss - In a multiphase electrical power assignment, a processor: receives instructions to connect a bi-directional power device to a multiphase premise power source; determines that the power device is to be coupled to a target phase's phase connection; confirms that the power device is not coupled to any phase connections; and couples the power device to the phase connection, where the power device's power signal is synchronized with the phase connection's power signal. When the power device is in a connected state, the processor: issues a command to place each phase connection switch in an open state; in response to confirming that the phase connection switches are in the open state, issues commands to the power device so that a power signal of the power device will be synchronized with the target phase; and closes the phase connection switch corresponding to the target phase. | 2013-06-06 |
| 20130141143 | OSCILLATION FREQUENCY ADJUSTING APPARATUS, OSCILLATION FREQUENCY ADJUSTING METHOD, AND WIRELESS COMMUNICATION APPARATUS - A voltage controlled oscillation circuit oscillates at an oscillation frequency corresponding to a control voltage. Injection locked oscillation circuits oscillate at an oscillation frequency corresponding to an output signal from the voltage controlled oscillation circuit. A mixer circuit performs a frequency conversion based on output signals from the injection locked oscillation circuits. A synchronization determiner determines the synchronous status between the injection locked oscillation circuits in accordance with an output signal from the mixer circuit. The injection locked oscillation circuits synchronize with each other at a frequency that is an integral multiple of the oscillation frequency of the voltage controlled oscillation circuit. | 2013-06-06 |
| 20130141144 | POWER-UP SIGNAL GENERATION CIRCUIT - A power-up signal generation circuit includes: a first section signal generation unit configured to sense a level of an external voltage and a level of an internal voltage and generate a first section signal; a second section signal generation unit configured to output a second section signal by buffering the first section signal when the internal voltage is lowered to below a minimum level; and a selective output unit configured to output the first section signal as a power-up signal, wherein the selective output unit outputs the second section signal as the power-up signal when a power-up section is ended and a mode register setting operation is performed. | 2013-06-06 |
| 20130141145 | CLOCK AND DATA RECOVERY CIRCUIT - The invention provides a clock and data recovery (CDR) circuit, including: a phase locked loop (PLL) circuit, providing a reference voltage; a first delay device, delaying an input data according to a control signal so as to generate a first delay signal; an edge detector, generating an edge signal according to the first delay signal and the input data; a second delay device, delaying the edge signal so as to generate a second delay signal; a first gated voltage-controlled oscillator, generating an output recovery clock according to the second delay signal and the reference voltage; a phase detector, detecting a phase difference between the first delay signal and the output recovery clock so as to generate a phase signal and a output recovery data; and an amplifier, amplifying the phase signal by a factor so as to generate the control signal. | 2013-06-06 |
| 20130141146 | PLL CIRCUIT, CALIBRATION METHOD AND WIRELESS COMMUNICATION TERMINAL - An ILFD controller sets a control parameter on the basis of a frequency of a frequency-divided signal and a frequency of a reference signal measured by a clock counter. A VCO controller selects an oscillation band that defines an oscillation frequency of a VCO and also selects an oscillation band of the VCO on the basis of the frequency of the reference signal and a frequency of a frequency-divided signal that is a result obtained by frequency-dividing an output signal, which is delivered from the VCO in response to the selected oscillation band, by means of an ILFD and a frequency divider. | 2013-06-06 |
| 20130141147 | PULSE WIDTH ADJUSTING CIRCUIT AND METHOD - The pulse width adjusting circuit includes a pulse delaying circuit for inputting an inputted pulse signal a and for outputting a plurality of different delayed pulse signals b | 2013-06-06 |
| 20130141148 | PULSE STRETCHING CIRCUIT AND METHOD - A pulse stretching circuit having a pulse delay circuit for receiving an input pulse signal and for outputting a delay pulse signal, and a pulse adjustment circuit, connected to the pulse delay circuit, receiving the input pulse signal and the delay pulse signal and for outputting an output pulse signal having a pulse width longer than a pulse width of the input pulse signal. The pulse adjustment circuit causes a leading edge of the output pulse signal in response to a leading edge of the input pulse signal, keeps a state in which the output pulse signal is displaced with the leading edge thus caused longer than a total time of times for both pulse widths of the input pulse signal and the delay pulse signal, and causes a trailing edge of the output pulse signal in response to a trailing edge of the delay pulse signal. | 2013-06-06 |
| 20130141149 | APPARATUS AND METHOD FOR DUTY CYCLE CALIBRATION - An apparatus for duty cycle calibration includes an input calibration circuit, a delay chain, a first comparator, and a second comparator. The input calibration circuit calibrates an input clock signal according to a first control signal so as to generate an input calibration clock signal. The delay chain includes a plurality of delay units coupled in series, and delays the input calibration clock signal so as to generate a first delay clock signal and a second delay clock signal. At least two of the delay units each have an adjustable delay time which is controlled according to a second control signal. The first comparator compares the input calibration clock signal with the first delay clock signal so as to generate the first control signal. The second comparator compares the input calibration clock signal with the second delay clock signal so as to generate the second control signal. | 2013-06-06 |
| 20130141150 | METHOD FOR GENERATING A MULTIPHASE PWM SIGNAL - A method and a circuit configuration are provided for generating a multiphase PWM signal. For this purpose a number of PWM generators are provided, which respectively have one counter, two comparators and one state memory, each PWM generator outputting a PWM signal, which represents a phase of the multiphase PWM signal, the PWM generators being coupled with one another via multiplexers such that the counters of the PWM generators that are coupled with one another are clocked identically. | 2013-06-06 |
| 20130141151 | ANALOG DELAY CELLS FOR THE POWER SUPPLY OF AN RFID TAG - A delay circuit for an RFID tag includes a power supply input and a power supply output and one or more delay circuits in cascade connection between the power supply input and the power supply output. A first delay circuit includes a passive circuit, a second delay circuit includes a ramp circuit, and a third delay circuit includes a current mirror circuit. | 2013-06-06 |
| 20130141152 | VOLTAGE CONTROLLED VARIABLE RESISTOR SUITABLE FOR LARGE SCALE SIGNAL APPLICATION - A voltage controlled variable resistor circuit is configured to variably attenuate a variable source signal. A fixed attenuation circuit is coupled to receive the variable source signal and output an attenuated variable source signal. The variable source signal is further applied across a variable resistive divider formed of a fixed resistive circuit and a variable resistive circuit. The variable resistive circuit has a first input configured to receive the attenuated variable source signal and a second input configured to receive a variable resistance control signal. The variable resistive circuit is configured to have a resistance which is variable in response to the attenuated variable source signal and the variable resistance control signal. | 2013-06-06 |
| 20130141153 | ELECTRONIC DEVICE AND TRANSMITTER DC OFFSET CALIBRATION METHOD THEREOF - An embodiment of the invention provides an electronic device. The electronic device includes a digital-to-analog converter (DAC), a transmitter front-end (TX FE), an amplifier, an analog-to-digital converter (ADC), and a swap circuitry. The TX FE has a first and a second input end coupled to a first and a second output end of the DAC, respectively. The ADC has a first and a second input end coupled to a first and a second output end of the amplifier, respectively. The swap circuitry is configured to couple the first and second output ends of the DAC to a first and a second input end of the amplifier in a normal state, respectively, and couple the first and second output ends of the DAC to the second and first input ends of the amplifier in a swapped state, respectively. | 2013-06-06 |
| 20130141154 | OUTPUT CIRCUIT - A low-side off-detection signal compares the gate signal of a low-side transistor with a predetermined first level to generate a low-side off-detection signal indicating that the low-side transistor is off. The low-side detection transistor is of the same type as the low-side transistor, with the source connected to the ground terminal, and the gate receiving the low-side transistor gate signal. A first resistor is arranged between the drain of the low-side detection transistor and the power supply terminal. A first bypass circuit is arranged in parallel with the first resistor, and is configured to switch to the conduction state when a control signal is a level which instructs the low-side transistor to switch off, and to switch to the cut-off state when the control signal level instructs the low-side transistor to switch on. The drain signal of the low-side detection transistor is output as the low-side off-detection signal. | 2013-06-06 |
| 20130141155 | DETECTION DEVICE - A detection device includes a resonance unit having a coil and a capacitor, an oscillation unit for oscillating the resonance unit, and a signal processing unit for detecting the oscillation state of the resonance unit and outputting an object detection signal when oscillation is stopped. The signal processing unit intermittently executes a self-diagnosis mode by forcibly oscillating the oscillation unit to determine whether or not an abnormality occurs in the resonance unit. | 2013-06-06 |
| 20130141156 | High Electron Mobility Transistors with Multiple Channels - A device includes a source for transmitting an electronic charge through a conduction path; a drain for receiving the electronic charge; a stack for providing at least part of the conduction path; and a gate operatively connected to the stack for controlling a conduction of the electronic charge. The stack includes an insulator layer, an N-polar layer and a barrier layer selected such that, during an operation of the device, the conduction path formed in the N-polar layer includes a two-dimensional electron gas (2DEG) channel and an inversion carrier channel. | 2013-06-06 |
| 20130141157 | SIGNAL PROCESSING CIRCUIT AND METHOD FOR DRIVING SIGNAL PROCESSING CIRCUIT - A memory element capable of operating at high speed and reducing power consumption and a signal processing circuit including the memory element are provided. As a writing transistor, a transistor which is formed using an oxide semiconductor and has significantly high off-state resistance is used. In a memory element in which a source of the writing transistor is connected to an input terminal of an inverter, a control terminal of a transfer gate, or the like, the threshold voltage of the writing transistor is lower than a low-level potential. The highest potential of a gate of the writing transistor can be a high-level potential. When the potential of data is the high-level potential, there is no potential difference between a channel and the gate; thus, even when the writing transistor is subsequently turned off, a potential on the source side hardly changes. | 2013-06-06 |
| 20130141158 | LDO WITH DISTRIBUTED OUTPUT DEVICE - A method and apparatus for supplying independently switched, regulated power to a plurality of loads is disclosed. | 2013-06-06 |
| 20130141159 | INTEGRATED CIRCUIT, WIRELESS COMMUNICATION UNIT AND METHOD FOR A DIFFERENTIAL INTERFACE FOR AN ENVELOPE TRACKING SIGNAL - An integrated circuit for providing a differential interface for an envelope tracking signal is described. The integrated circuit includes a subtraction module having a first input for receiving a digital envelope tracking signal and a second input for receiving a second signal, wherein the subtraction module is arranged to subtract the second signal from the digital envelope tracking signal and produce an envelope tracking signal with a reduced average direct current (DC) component; a digital-to-analog converter (DAC) arranged to receive the envelope tracking signal with the reduced average DC component and produce a differential analog version thereof; and a modulator operably coupled to a differential output of the DAC, wherein the modulator comprises a DC input point arranged to insert a DC component into the differential analog version of the envelope tracking signal. | 2013-06-06 |
| 20130141160 | POWER SERIES DIGITAL PREDISTORTER AND CONTROL METHOD THEREOF - A PAPR observation unit that measures PAPR in a distributed output of an input signal and PAPR in a combined output of a linear transmission path and a third order distortion generation path, a distortion observation unit that observes distortion in the output of a power amplifier, and a controller are provided, where the controller includes a third order out-of-band distortion compensation coefficient control unit that adjusts coefficients corresponding to an outside of an input signal band among frequency characteristic compensator coefficients on the basis of distortion observed by the distortion observation unit and a third order in-band distortion coefficient control unit that adjusts coefficients corresponding to an inside of the input signal band among frequency characteristic compensator coefficients on the basis of the observed PAPR. | 2013-06-06 |
| 20130141161 | POWER AMPLIFIER - There is provided a power amplifier capable of compensating for a distortion without deteriorating a gain of input voltage. The power amplifier includes an input terminal to which an input voltage is applied; a class AB power amplification circuit connected to the input terminal; and an element connected between the input terminal and the class AB power amplification circuit, turned on when the input voltage is equal to or greater than a predetermined value, and varying impedance thereof according to the input voltage. | 2013-06-06 |
| 20130141162 | SWITCHING AMPLIFIER WITH INDUCTANCE MEANS FOR TRANSMITTING ENERGY - A switching amplifying method or a switching amplifier for obtaining one or more linearly amplified replicas of an input signal, is highly efficient, and does not have the disadvantage of “dead time” problem related to the class D amplifiers. Said switching amplifier comprises: an inductance means; a switching unit for switching a current from a DC voltage to the inductance means; a switching power transmitting unit for blocking a current when the switching unit switches on, and conducting the current from the inductance means to a filter unit positively or negatively according to the polarity of the input signal when the current from the DC voltage to the inductance means is switched off; an amplifier control unit to control the switching unit and the switching power transmitting unit according to the input signal; said filter unit filtering the current from the switching power transmitting unit to get an output signal. | 2013-06-06 |
| 20130141163 | OUTPUT COUPLING CAPACITOR FREE AUDIO POWER AMPLIFIER DYNAMICALLY CONFIGURED FOR SPEAKERS AND HEADPHONES WITH EXCELLENT CLICK AND POP PERFORMANCE - First and second channel bridge amplifiers are dynamically configured to drive either speakers or headphones. The first channel bridge amplifier includes a first amplifier driving one end of a first speaker through a mechanical switch in a headphone-jack, and a second amplifier driving another end of the first speaker. The second channel bridge amplifier includes third and fourth amplifiers driving respective ends of a second speaker. To suppress click and pop, an amplifier control circuit maintains certain amplifiers (depending on headphone or speaker mode) tri-stated until input coupling capacitors have fully charged and an input signal exceeding a predetermined amount is detected. | 2013-06-06 |
| 20130141164 | VOLTAGE OUTPUT DEVICE HAVING AN OPERATIONAL AMPLIFIER - A voltage output device capable of preventing an increase in circuit scale includes an offset compensation function and is suitably applicable to a drive circuit for display devices. The voltage output device includes an operational amplifier having an inverting input terminal and a non-inverting input terminal. Resistance values of a load resistor on the inverting input side and a load resistor on the non-inverting input side are maintained when the output voltage of the amplifier has changed while sequentially varying either one or both of the resistance values of the load resistor on the inverting input side and the load resistor on the non-inverting input side in a state that the inverting input terminal and the non-inverting input terminal are connected. The voltage output device is configured to output the output voltage of the amplifier with the inverting input terminal not connected to the non-inverting input terminal. | 2013-06-06 |
| 20130141165 | PERFORMANCE OF OFF-CHIP CONNECTION FOR POWER AMPLIFIER - There is provided an integrated circuit comprising a main push-pull amplifier ( | 2013-06-06 |
| 20130141166 | POWER AMPLIFIER TUBE AND POWER AMPLIFICATION METHOD - A power amplifier tube and a power amplification method are disclosed in the present invention. The power amplifier tube includes a high voltage heterojunction bipolar transistor (HVHBT) power amplifier tube core and a high electron mobility transistor (HEMT) power amplifier tube core, and the HVHBT power amplifier tube core and the HEMT power amplifier tube core are integrated in the same encapsulation. In the present invention, it should be configured as a Doherty amplifier, and the power tube is designed in a breakthrough combination manner of new power amplifier tube cores, compared with all the existing Doherty amplifiers which employ LDMOS power amplifier tube cores, the power amplification with high efficiency can be achieved on the basis of ensuring small volume of power amplifier tube. | 2013-06-06 |
| 20130141167 | POWER AMPLIFIER - Disclosed herein is a circuit for preventing an element from being damaged although output impedance of a final transistor is changed in a power amplifier. The power amplifier includes: a power stage amplifying a signal; a transformer connected to an output terminal of the power stage and coupling a signal output from the power stage; and a controller controlling a bias voltage from the power stage according to the coupled signal. Although output impedance is changed, damage to the power amplifier can be prevented. Also, the power amplifier can be automatically controlled to maintain performance thereof by sensing an operational state in which output impedance is normal. | 2013-06-06 |
| 20130141168 | LOW-NOISE AMPLIFIER WITH THROUGH-MODE - The low-noise amplifier with through mode is configured such that a source grounded transistor and a gate grounded transistor are connected in cascode, and a load impedance element and a switching transistor are serially connected between the drain of the gate grounded transistor and a power supply, and a through pass circuit is connected between an input terminal and an output terminal. The gate voltage of the gate grounded transistor is regulated by a bias circuit and the voltage of a mode control terminal is converted by a level shifter to control the gate voltage of the switching transistor, whereby, in the case of using only transistors whose terminal-to-terminal breakdown voltages are each equal to or less than the power supply voltage, it becomes feasible to prevent voltages equal to or more than the terminal-to-terminal breakdown voltages from being applied between the terminals of each transistor. | 2013-06-06 |
| 20130141169 | LINEAR AMPLIFIER POWER SUPPLY MODULATION FOR ENVELOPE TRACKING - Circuitry, which includes a linear amplifier and a linear amplifier power supply, is disclosed. The linear amplifier at least partially provides an envelope power supply signal to a radio frequency (RF) power amplifier (PA) using a selected one of a group of linear amplifier supply voltages. The linear amplifier power supply provides at least one of the group of linear amplifier supply voltages. Selection of the selected one of the group of linear amplifier supply voltages is based on a desired voltage of the envelope power supply signal. | 2013-06-06 |
| 20130141170 | AMPLIFIER INDUCTOR SHARING FOR INDUCTIVE PEAKING - A method of sharing inductors for inductive peaking of an amplifier having at least two stages includes calculating a single stage inductance of a single stage of the at least two stages for inductive peaking in order to have a stable impulse response. A shared inductance is calculated for inductive peaking by dividing the single stage inductance by a number of stages of the at least two stages. At least two inductors having the shared inductance are shared among the at least two stages for inductive peaking. | 2013-06-06 |
| 20130141171 | Method to Shorten Crystal Oscillator's Startup Time - An oscillator circuit includes an amplifier including at least two terminals for receiving a crystal and an automatic amplitude control loop coupled to the amplifier including biasing circuitry switched between a first operational mode and a second operational mode. The first operational mode occurs during an initial time period and the second operational mode occurs after the initial time period is expired. The biasing circuitry includes first and second PMOS transistor circuits, each transistor circuit including an unswitched PMOS transistor and a switched PMOS transistor. Alternatively, the biasing circuitry can include first and second NMOS transistor circuits, each transistor circuit including an unswitched NMOS transistor and a switched NMOS transistor. The biasing circuitry is under control of an internally generated control signal. | 2013-06-06 |
| 20130141172 | Orthogonally Referenced Integrated Ensemble for Navigation and Timing - An orthogonally referenced integrated ensemble for navigation and timing includes a dual-polyhedral oscillator array, including an outer sensing array of oscillators and an inner clock array of oscillators situated inside the outer sensing array. The outer sensing array includes a first pair of sensing oscillators situated along a first axis of the outer sensing array, a second pair of sensing oscillators situated along a second axis of the outer sensing array, and a third pair of sensing oscillators situated along a third axis of the outer sensing array. The inner clock array of oscillators includes a first pair of clock oscillators situated along a first axis of the inner clock array, a second pair of clock oscillators situated along a second axis of the inner clock array, and a third pair of clock oscillators situated along a third axis of the inner clock array. | 2013-06-06 |
| 20130141173 | METHODS AND APPARATUS FOR TUNING DEVICES HAVING MECHANICAL RESONATORS - Methods and apparatus for tuning devices having mechanical resonators are described. In one implementation, a mechanical resonator and a phase shifter are configured in a feedback loop, so that the phase shifter shifts the phase of the resonator output signal. The amount of phase shift induced by the phase shifter may be variable. In another implementation, an LC tuning subcircuit is coupled to a mechanical resonator. In some implementations, the LC tuning subcircuit has a variable capacitance. One or more of the apparatus described herein may be implemented as part, or all, of a microelectromechanical system (MEMS). | 2013-06-06 |
| 20130141174 | OSCILLATOR FOR GENERATING A SIGNAL COMPRISING A TERAHERTZ-ORDER FREQUENCY USING THE BEAT OF TWO OPTICAL WAVES - The invention concerns an oscillator generating a wave composed of a frequency of on the order of terahertz from a beat of two optical waves generated by a dual-frequency optical source ( | 2013-06-06 |
| 20130141175 | PUSH-PUSH OSCILLATOR CIRCUIT - A push-push oscillator circuit with a first oscillation branch with a first active device and a first tank adapted to provide a signal having a fundamental frequency f | 2013-06-06 |
| 20130141176 | Highly Linear-Gain Oscillator - A variable frequency oscillator includes an inductance unit having a first inductance, a first variable capacitor coupled across the inductance unit, and a second variable capacitor coupled across a part of the inductance unit. The inductance of the part of the inductance unit coupled by the second variable capacitor is a proportion of the first inductance. | 2013-06-06 |
| 20130141177 | TUNABLE INDUCTOR CIRCUIT - A tunable inductor circuit is disclosed. The tunable inductor circuit includes a first inductor. The tunable inductor circuit also includes a second inductor in parallel with the first inductor. The tunable inductor circuit also includes a switch coupled to the second inductor. A resistance of the switch is added in parallel to the first inductor based on operation of the switch. | 2013-06-06 |
| 20130141178 | Injection Locked Divider with Injection Point Located at a Tapped Inductor - Injection locked dividers provide a divided clock signal after being driven by a injected clock signal that is a multiple of the divided clock signal. At injected clock signal at 60 GHz generates a differential 30 GHz clock signal. One innovative construction of the injection locked oscillator reduces the internal capacitive at a node by associating the parasitic capacitance at this node with the inductors of the tapped inductor resonant circuit. This provides more energy flow in the injection pulses applied to the legs of the injection locked circuit providing an increase locking range. | 2013-06-06 |
| 20130141179 | OSCILLATING DEVICE FOR FREQUENCY DETECTION, ULTRASONIC TRANSCEIVER SYSTEM AND FREQUENCY DETECTION METHOD THEREOF - The present invention discloses an oscillating device for frequency detection, an ultrasonic transceiver system and a frequency detection method thereof. The oscillating device for frequency detection, which is applicable for detecting a transducer having a lowest impedance frequency and a highest impedance frequency, comprises an oscillating circuit. The oscillating circuit has a loop gain whose maximum value occurs at the lowest impedance frequency of the transducer and whose minimum value occurs at the highest impedance frequency of the transducer, wherein a difference of a phase of the loop gain and an impedance phase of the transducer is zero between the lowest impedance frequency and the highest impedance frequency, and the loop gain is of a value greater than 1 at a frequency where the phase difference is zero. | 2013-06-06 |
| 20130141180 | HIGH-FREQUENCY MODULE - A high-frequency module has a structure including balanced terminals, with high design flexibility and good transmission characteristics. Wiring patterns to be connected to balanced terminals of SAW filters of SAW duplexers are located on a second layer to a sixth layer of a layered body. The characteristic impedances of first wiring patterns defining a pair of parallel or substantially parallel lines match, the characteristic impedances of second wiring patterns defining a pair of parallel or substantially parallel lines match, the characteristic impedances of third wiring patterns defining a pair of parallel or substantially parallel lines match, and the characteristic impedances of fourth wiring patterns defining a pair of parallel or substantially parallel lines match. | 2013-06-06 |
| 20130141181 | RESONANCE REDUCING CIRCUIT BOARD - A circuit card is provided that includes ground traces that extend from a resistor to a commoning bar, where a resultant electrical length between the resistor and the commoning bar and is configured to reduce energy carried on the ground terminals that could otherwise result in cross-talk. In an embodiment, the ground trace may be configured in a meandering manner. In another embodiment, the ground trace may be split and joined by an inductor. | 2013-06-06 |
| 20130141182 | ADAPTIVE LINE FILTER - A device for improving the filter effect of a filter connected up between an electrical energy source and a source of interference is provided. The filter is configured to feed back interference transients from ground to an input of the source of interference generating the interference transients. The device includes a measuring device for determining a leakage current flowing through the filter and a final control element configured to modify a limit frequency of the filter such that the leakage current through the filter is damped to below a predefined level if the measuring device detects the leakage current. | 2013-06-06 |
| 20130141183 | DIRECTIONAL COUPLER INTEGRATED BY CMOS PROCESS - A directional coupler is disclosed integrated on a single chip and an integrated circuit based on a standard CMOS process and relates to a field of radio frequency communication. In exemplary implementations, by using a standard CMOS process technology, the directional coupler integrated by a CMOS process is formed by a coil winded by a upper layer of metal lines, a coil winded by a lower layer of metal lines, two tuning capacitor array, and a matching resistor. Two terminals of the coil are a direct terminal and an input terminal; two terminals of the coil are a coupled terminal and an isolation terminal; the terminals of the coils and are intersected at 90°; the coil is winded by an upper metal layer and the coil is winded by a lower metal layer. Further, the insertion loss is low and the isolation degree is large. | 2013-06-06 |
| 20130141184 | DIRECTIONAL COUPLER - In a directional coupler, sub-lines or main lines are electromagnetically coupled to each other to degrade isolation characteristics. A capacitor is located between the sub-lines or between the main lines to cause the isolation characteristics to have poles in order to improve the isolation characteristics of the directional coupler. | 2013-06-06 |
| 20130141185 | FILTER AND DUPLEXER - A filter includes: a coupled multi-mode acoustic wave filter connected between an input terminal and an output terminal; a first inductor connected between the coupled multi-mode acoustic wave filter and a ground terminal; an acoustic wave resonator, one end of which is connected between the input terminal or the output terminal and the coupled multi-mode acoustic wave filter; and a second inductor connected between another end of the acoustic wave resonator and the ground terminal. | 2013-06-06 |
| 20130141186 | RECOMBINANT WAVEGUIDE POWER COMBINER / DIVIDER - In an example embodiment, an in-phase recombinant waveguide combiner/divider device can comprise: a single waveguide input; N waveguide outputs, wherein N is an integer greater than 2; a first waveguide dividing portion; a second waveguide dividing portion; a third waveguide dividing portion; and a waveguide combining portion. The waveguide combining portion can be configured to combine two signals that are each respectively received from the second waveguide dividing portion and third waveguide dividing portion. In general an in-phase recombinant waveguide combiner/divider can comprise more junctions than output ports of a conservative power divider network structure. In an example embodiment, for a N-way waveguide power divider, there can be at least N+1 waveguide junctions. | 2013-06-06 |
| 20130141187 | CROSS-COUPLED BANDPASS FILTER - A cross-coupled bandpass filter includes first, second and third resonators such that a positive mutual inductance is generated between the first and third resonators and mutual inductance generated between the first and second resonators and mutual inductance generated between the second and third resonators have the same polarity, thereby generating a transmission zero in a high frequency rejection band. | 2013-06-06 |
| 20130141188 | DMS FILTER HAVING IMPROVED SIGNAL SUPPRESSION IN THE STOP BAND - A DMS filter has improved signal suppression in fly-back. At least two transformers of a first type are connected in parallel between a common node of the signal path and a ground connection/reference potential. A concentrated element is connected in the signal path of said transformers of the first type, so that the voltages present at the first transformers are different from each other. | 2013-06-06 |
| 20130141189 | ELASTIC WAVE APPARATUS - An elastic wave device includes a first unbalanced terminal, a second unbalanced terminal, a first balanced terminal, a second balanced terminal, a first filter part, and a second filter part. A phase of an electric signal transmitted from first unbalanced terminal to the first balanced terminal in the first filter part is different from a phase of an electric signal transmitted from the second unbalanced terminal to the first balanced terminal in the second filter part. A phase of an electric signal transmitted from the first unbalanced terminal to the second balanced terminal in the first filter part is different from a phase of an electric signal transmitted from the second unbalanced terminal to the second balanced terminal in the second filter part. | 2013-06-06 |
