| 23rd week of 2013 patent applcation highlights part 13 |
| Patent application number | Title | Published |
|---|
| 20130140490 | Silicon Nitride Powder for Siliconnitride Phosphor, CaAlSiN3 Phosphor Using Same, Sr2Si5N8 Phosphor Using Same, (Sr, Ca)AlSiN3 Phosphor Using Same, La3Si6N11Phosphor Using Same, and Methods for Producing the Phosphors - Provided are: a silicon nitride powder for siliconitride phosphors with higher luminance, which can be used for a fluorescent display tube (VFD), a field emission display (FED), a plasma display panel (PDP), a cathode ray tube (CRT), a light emitting diode (LED), and the like; a CaAlSiN | 2013-06-06 |
| 20130140491 | Green to Yellow Light-Emitting Aluminate Phosphors - A green and yellow emitting lutetium aluminate based photoluminescent material having the formula (Lu | 2013-06-06 |
| 20130140492 | BORATE LUMINESCENT MATERIALS, PREPARATION METHODS AND USES THEREOF - Borate luminescent materials, preparation methods and uses thereof are provided. The luminescent materials are represented by the general formula: (In | 2013-06-06 |
| 20130140493 | ANTICORROSIVE FOR BOILER - The boiler anti-corrosive of the present invention contains an amine compound represented by formula (1): | 2013-06-06 |
| 20130140494 | SEMICONDUCTOR COMPOSITION - A semiconductor composition for producing a semiconducting layer with consistently high mobility is disclosed. The semiconductor composition includes a diketopyrrolopyrrole-thiophene copolymer and a non-aromatic halogenated hydrocarbon solvent. The copolymer has a structure disclosed within. Preferably, the non-aromatic halogenated hydrocarbon solvent contains at least 2 carbon atoms and at least 3 halogen atoms. | 2013-06-06 |
| 20130140495 | METHOD AND SYSTEM FOR PRODUCING GRAPHENE AND FUNCTIONALIZED GRAPHENE - This disclosure includes a process that unexpectedly can produce very inexpensive graphene, functionalized graphenes, and a new compound called graphenol in particulate or dispersions in solvents. The process can also produce graphene layers on metallic and nonmetallic substrates. Further, the graphenol, functionalized graphenes, and graphene can be utilized to form nanocomposites that yield property improvements exceeding anything reported previously. | 2013-06-06 |
| 20130140496 | SUBSTITUTED LITHIUM-MANGANESE METAL PHOSPHATE - A substituted lithium-manganese metal phosphate of formula | 2013-06-06 |
| 20130140497 | CARBON-LITHIUM TRANSITION METAL PHOSPHATE COMPOSITE MATERIAL HAVING A LOW CARBON CONTENT - The present invention relates to a composite material containing particles of a lithium transition metal phosphate and carbon with a carbon content of ≦1.4 wt.-%. The present invention further relates to an electrode containing the composite material and a secondary lithium-ion battery containing an electrode comprising the composite material. | 2013-06-06 |
| 20130140498 | SYSTEMS AND METHODS FOR DISPERSING GRAPHITIC CARBON - Methods and systems for improved dispersion and solubility of carbon materials such as carbon nanotubes through novel binary solvent blends, which include in some embodiments, a mixture of a dibasic ester blend and DMSO. | 2013-06-06 |
| 20130140499 | CONDUCTIVE POLYMER COMPOSITION FOR PTC ELEMENT WITH DECREASED NTC CHARACTERISTICS, USING CARBON NANOTUBE - The present invention relates to a conductive polymer composition for a PTC element with decreased NTC characteristics, using carbon nanotubes, a PTC binder resin, and a cellulose-based or polyester-based resin for fixing the carbon nanotubes and the PTC binder, and to a PTC element, a circuit and a sheet heating element using the same. | 2013-06-06 |
| 20130140500 | PASTE COMPOSITION FOR SOLAR CELL ELECTRODE, ELECTRODE FABRICATED USING THE SAME, AND SOLAR CELL INCLUDING THE SAME - A paste composition for a solar cell electrode includes: a mixture of conductive powders, a glass frit, and an organic vehicle, and the mixture of conductive powders includes about 1 wt % to about 10 wt % of a first conductive powder having an average particle diameter (Dx) from about 1 nm to about 100 nm, and about 90 wt % to about 99 wt % of a second conductive powder having an average particle diameter (D | 2013-06-06 |
| 20130140501 | SILVER-COATED SPHERICAL RESIN, METHOD FOR PRODUCING SAME, ANISOTROPICALLY CONDUCTIVE ADHESIVE CONTAINING SILVER-COATED SPHERICAL RESIN, ANISOTROPICALLY CONDUCTIVE FILM CONTAINING SILVER-COATED SPHERICAL RESIN, AND CONDUCTIVE SPACER CONTAINING SILVER-COATED SPHERICAL RESIN - This silver-coated spherical resin includes: a spherical resin; and silver coated on a surface of the spherical resin, wherein an amount of the silver is in a range of 2 to 80 parts by mass with respect to 100 parts by mass of the silver-coated spherical resin, and a crystallite diameter of the silver measured by X-ray diffractometry is in a range of 18 to 24 nm. This method for producing a silver-coated spherical resin includes: a process of subjecting a spherical resin to a pretreatment using an aqueous solution of a tin compound; and a subsequent process of subjecting the spherical resin to an electroless silver plating using a reducing agent, wherein, during the pretreatment, a temperature of the aqueous solution of the tin compound is set to be in a range of 20 to 45° C. | 2013-06-06 |
| 20130140502 | SPUTTERING TARGET - An oxide sintered body including an oxide of indium (In), gallium (Ga), and positive trivalent and/or positive tetravalent metal X, wherein the amount of the metal X relative to the total amount of In and Ga is 100 to 10000 ppm (weight). | 2013-06-06 |
| 20130140503 | PRECURSOR COMPOSITION FOR FORMING AMORPHOUS METAL OXIDE SEMICONDUCTOR LAYER, AMORPHOUS METAL OXIDE SEMICONDUCTOR LAYER, METHOD FOR PRODUCING SAME, AND SEMICONDUCTOR DEVICE - The invention provides a precursor composition for forming an amorphous metal oxide semiconductor layer, containing a metal salt, a primary amide, and a water-based solution. An amorphous metal oxide semiconductor layer is formed by use of the composition. | 2013-06-06 |
| 20130140504 | TERNARY THERMOELECTRIC MATERIAL CONTAINING NANOPARTICLES AND PROCESS FOR PRODUCING THE SAME - A thermoelectric material that comprises a ternary main group matrix material and nano-particles and/or nano-inclusions of a Group 2 or Group 12 metal oxide dispersed therein. A process for making the thermoelectric material that includes reacting a reduced metal precursor with an oxidized metal precursor in the presence of nanoparticles. | 2013-06-06 |
| 20130140505 | BINARY THERMOELECTRIC MATERIAL CONTAINING NANOPARTICLES AND PROCESS FOR PRODUCING THE SAME - A thermoelectric material that comprises a binary main group matrix material and nano-particles and/or nano-inclusions of metal oxide dispersed therein, and has electrical properties of ternary doped materials. A process for making the thermoelectric material that includes reacting a reduced metal precursor with an oxidized metal precursor in the presence of nanoparticles. | 2013-06-06 |
| 20130140506 | HOST-GUEST MATERIALS HAVING TEMPERATURE-DEPENDENT DUAL EMISSION - A composition is provided comprising a host material and a luminescent dopant. The composition exhibits dual luminescent emission peaks, one each for the host material and the luminescent dopant. The intensity of the emission peaks vary in intensity as a result of the changing temperature of the composition. This quality enables the composition to be used for ratiometric optical thermometry, including exemplary applications, such as in situ temperature sensing. | 2013-06-06 |
| 20130140507 | TERNARY THERMOELECTRIC MATERIAL CONTAINING NANOPARTICLES AND PROCESS FOR PRODUCING THE SAME - A thermoelectric material that comprises a ternary main group matrix material and nano-particles and/or nano-inclusions of transition metal oxide dispersed therein. A process for making the thermoelectric material that includes reacting a reduced metal precursor with an oxidized metal precursor in the presence of transition metal oxide nanoparticles. | 2013-06-06 |
| 20130140508 | SEMICONDUCTIVE CERAMIC SINTERED COMPACT - There is provided a semiconductive ceramic sintered compact that has a conductivity high enough to attain static electricity removal and antistatic purposes and, at the same time, has excellent mechanical properties or stability over time. The semiconductive ceramic sintered compact includes at least a main phase and first and second phases contained in the main phase observed as a result of observation of any face of the sintered compact, the main phase being a ceramic sintered phase containing Al | 2013-06-06 |
| 20130140509 | "METHOD AND SYSTEM FOR EQUALLY TENSIONING MULTIPLE STRANDS" - A method and system are described for tensioning structural strands | 2013-06-06 |
| 20130140510 | ENERGY ABSORPTION DEVICES - A slider assembly includes:
| 2013-06-06 |
| 20130140511 | RESISTIVE-SWITCHING MEMORY ELEMENT - A resistive-switching memory element is described. The memory element includes a first electrode, a porous layer over the first electrode including a point defect embedded in a plurality of pores of the porous layer, and a second electrode over the porous layer, wherein the nonvolatile memory element is configured to switch between a high resistive state and a low resistive state. | 2013-06-06 |
| 20130140512 | NONVOLATILE RESISTIVE MEMORY ELEMENT WITH A PASSIVATED SWITCHING LAYER - A nonvolatile resistive memory element has a novel variable resistance layer that is passivated with non-metallic dopant atoms, such as nitrogen, either during or after deposition of the switching layer. The presence of the non-metallic dopant atoms in the variable resistance layer enables the switching layer to operate with reduced switching current while maintaining improved data retention properties. | 2013-06-06 |
| 20130140513 | THERMALLY CONFINED ELECTRODE FOR PROGRAMMABLE RESISTANCE MEMORY - A memory device includes a plurality of side-wall electrodes formed on a first side-wall of a trench within an insulating layer over a first plurality of contacts in an array of contacts in a substrate. The plurality of side-wall electrodes contact respective top surfaces of the first plurality of contacts. The side-wall electrodes respectively comprise a layer of tantalum nitride, having a composition Ta | 2013-06-06 |
| 20130140514 | NONVOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A nonvolatile memory device includes a substrate, a lower electrode formed above said substrate, a second variable resistance layer formed above said lower electrode and comprising a second transitional metal oxide, a first variable resistance layer formed above said second variable resistance layer and comprising a first transitional metal oxide having an oxygen content that is lower than an oxygen content of the second transitional metal oxide, and an upper electrode formed above said first variable resistance layer. A step is formed in an interface between said lower electrode and said second variable resistance layer. The second variable resistance layer is formed covering the step and has a bend above the step. | 2013-06-06 |
| 20130140515 | NONVOLATILE MEMORY ELEMENT AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a nonvolatile memory element, the method including: forming a first lower electrode layer, a current steering layer, and a first upper electrode layer; forming a second lower electrode layer, a variable resistance layer, and a second upper electrode layer on the first upper electrode layer; patterning the second upper electrode layer, the variable resistance layer, and the lower electrode layer; patterning the first upper electrode layer, the current steering layer, and first lower electrode layer to form a current steering element, using the second lower electrode layer as a mask by use of etching which is performed on the second lower electrode layer at an etching rate lower than at least etching rates at which the second upper electrode layer and the variable resistance layer are etched; and forming a variable resistance element which has an area smaller than the area of the current steering element. | 2013-06-06 |
| 20130140516 | PROTRUDING POST RESISTIVE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - A resistive memory device may include a substrate, gate electrode structures, a first impurity region, a second impurity region, a first metal silicide pattern and a second metal silicide pattern. The substrate may have a first region where isolation patterns and first active patterns may be alternately arranged in a first direction, and a second region where linear second active patterns may be extended in the first direction. The gate electrode structures may be arranged between the first region and the second region of the substrate. The first and second impurity regions may be formed in the first and second impurity regions. The first metal silicide pattern may have an isolated shape configured to make contact with an upper surface of the first impurity region. The second metal silicide pattern may make contact with an upper surface of the second impurity region. | 2013-06-06 |
| 20130140517 | Thin and Flexible Gallium Nitride and Method of Making the Same - A material for use in electronic circuits. The material includes a thin layer of gallium nitride (GaN), the thin layer of GaN produced in a high-volume production setting without mechanical planarization having a thickness of as low as 10 nm and a defect density as low as 10 | 2013-06-06 |
| 20130140518 | QUANTUM DOT GATE FETS AND CIRCUITS CONFIGURED AS BIOSENSORS AND GENE SEQUENCERS - Quantum dot (QD) gate FETs and the use of quantum dot (QD) gate FETs for the purpose of sensing analytes and proteins is disclosed and described. Analytes, proteins, miRNAs, and DNAs functionalized to the QDs change the charge density in the gate and hence the current-voltage characteristics. In one embodiment, QD-FETs, such as | 2013-06-06 |
| 20130140519 | LIGHT EMITTING DIODE - A light emitting diode including a substrate, a first semiconductor layer, an active layer, and a second semiconductor layer is provided. The first semiconductor layer includes a first surface and a second surface, and the first surface is connected to the substrate. The active layer and the second semiconductor layer are stacked on the second surface in that order, and a surface of the second semiconductor layer away from the active layer is configured as the light emitting surface. A first electrode electrically is connected with the first semiconductor layer. A second electrode is electrically connected with the second semiconductor layer. A number of three-dimensional nano-structures are located on the surface of the first surface of the first semiconductor layer and the light emitting surface, and a cross section of each of the three-dimensional nano-structures is M-shaped. | 2013-06-06 |
| 20130140520 | LIGHT EMITTING DIODE - A light emitting diode including a substrate, a first semiconductor layer, an active layer, and a second semiconductor layer is provided. The substrate includes an epitaxial growth surface and a light emitting surface. The first semiconductor layer, the active layer and the second semiconductor layer is stacked on the epitaxial growth surface. The first semiconductor layer includes a first surface and a second surface, and the first surface is connected to the substrate. The active layer and the second semiconductor layer are stacked on the second surface in that order. A first electrode electrically is connected with the first semiconductor layer. A second electrode is electrically connected with the second semiconductor layer. A number of three-dimensional nano-structures are located on the surface of the first surface of the first semiconductor layer and aligned side by side, and a cross section of each of the three-dimensional nano-structure is M-shaped. | 2013-06-06 |
| 20130140521 | OPTOELECTRONIC DEVICE INCLUDING NANOWIRES WITH A CORE/SHELL STRUCTURE - Optoelectronic device including light-emitting means in the form of nanowires ( | 2013-06-06 |
| 20130140522 | LIGHT-EMITTING PANEL, MANUFACTURING METHOD OF LIGHT-EMITTING PANEL, AND FILM FORMING SYSTEM - A light-emitting panel includes: a substrate; and a light-emitting functional multilayer formed on the substrate, wherein the light-emitting functional multilayer including a first functional layer and a second functional layer, a thickness of part of the first functional layer positioned in a first light-emitting region is smaller than a thickness of part of the first functional layer positioned in a second light-emitting region, a thickness of part of the second functional layer positioned in the first light-emitting region is greater than a thickness of part of the second functional layer positioned in the second light-emitting region, and when the light-emitting functional multilayer is viewed in a layering direction thereof, the first light-emitting region and the second light-emitting region are adjacent or distant from each other in a direction perpendicular to the layering direction, and each include a plurality of pixels that are each composed of a plurality of adjacent sub-pixels. | 2013-06-06 |
| 20130140523 | Quantum Well Device With Lateral Electrodes - An apparatus includes a substrate, a sequence of crystalline semiconductor layers on a planar surface of the substrate, and first and second sets of electrodes over the sequence. The sequence has a 2D quantum well therein. The first set of electrodes border opposite sides of a lateral region of the sequence and are controllable to vary a width of a non-depleted portion of the quantum well along the top surface. The second set of electrodes border channels between the lateral region and first and second adjacent lateral areas of the sequence and are controllable to vary widths of non-depleted segments of the quantum well in the channels. The electrodes are such that straight lines connecting the lateral areas via the channels either pass between one of the electrodes and the substrate or are misaligned to an effective [1 | 2013-06-06 |
| 20130140524 | Nanoparticle Synthesis - A noble metal nanoparticle can be grown on a semiconductor substrate by contacting a predetermined region of the substrate with a solution including noble metal ions. The predetermined region of the semiconductor substrate can be exposed by applying a polymeric layer over the substrate selectively removing a portion of the polymeric layer. The nanoparticles can be prepared in a predetermined pattern. The nanoparticle can be formed with a barrier separating it from another nanoparticle on the substrate; for example, nanoparticle can be located in a pit etched in the substrate. The size and location of the nanoparticle can be stable at elevated temperatures. | 2013-06-06 |
| 20130140525 | GALLIUM NITRIDE GROWTH METHOD ON SILICON SUBSTRATE - A semiconductor structure includes a silicon substrate; more than one bulk layer of group-III/group-V (III-V) compound semiconductor atop the silicon substrate; and each bulk layer of the group III-V compound is separated by an interlayer. | 2013-06-06 |
| 20130140526 | HEXAGONAL BORON NITRIDE SHEET, METHOD OF PREPARING THE HEXAGONAL BORON NITRIDE SHEET, AND ELECTRONIC DEVICE INCLUDING THE HEXAGONAL BORON NITRIDE SHEET - A hexagonal boron nitride sheet having: a two-dimensional planar structure with a sp | 2013-06-06 |
| 20130140527 | Composite material of hole-blocking polymer and electron-injection/electron-transport conjugated polymer grafted with crown ether into which metal ion is intercalated, and uses thereof in OLED and organic solar cell - An water/alcohol soluble electron-injection/hole-blocking composite layer contains a conjugated polymer grafted with a side chain crown ether and with pseudo-metallic state of metal-ion stabilized by the crown ether (to reduce electron-injection barrier and facilitate electron transport), and a polymer with hole-blocking function. This composite layer is able to improve the performance of an organic light emitting diode with oxygen- and moisture-stable cathode (such as Al and Au), and the performance of an organic solar cell. | 2013-06-06 |
| 20130140528 | FOIL SHAPED ELECTRO-OPTICAL PRODUCT, SEMI-FINISHED PRODUCT AND METHOD AND APPARATUS FOR MANUFACTURING THE SAME - A curved foil-shaped electro-optical product ( | 2013-06-06 |
| 20130140529 | ORGANIC LIGHT EMITTING DEVICE CAPABLE OF REDUCING LEAKAGE CURRENT BETWEEN PIXELS - Disclosed is an organic light emitting device having an improved light emitting quality, by which a leakage current generated between pixels when a current flows from one pixel to an adjacent pixel of a light emitting part may be prevented, making it possible to prevent undesired emission of light in the adjacent pixel and improve light emitting quality. | 2013-06-06 |
| 20130140530 | ORGANIC LIGHT-EMITTING DIODE INCLUDING MULTI-LAYERED HOLE TRANSPORTING LAYER, AND FLAT DISPLAY DEVICE INCLUDING THE ORGANIC LIGHT-EMITTING DIODE - An organic light-emitting diode including: a first mixed layer between an emission layer and a first electrode and including first and second compounds; a second mixed layer between the emission layer and the first mixed layer and including third and fourth compounds; a first charge generation layer between the first mixed layer and the first electrode and including the first and second compounds and a first charge generation material; a second charge generation layer between the first mixed layer and the second mixed layer and including the third and fourth compounds and a second charge generation material; and a buffer layer between the emission layer and the second mixed layer, the first and the third compounds are each independently a compound represented by Formula 1 below, and the second compound and fourth compounds are each independently a compound represented by Formula 2 below: | 2013-06-06 |
| 20130140531 | FOLDABLE THIN FILM TRANSISTOR - A foldable thin film transistor (TFT) is provided, the foldable TFT including: a foldable substrate; source and drain electrodes interconnected on the foldable substrate; a channel layer including nanofibers of an organic semiconductor connecting the source and drain electrodes; a gate electrode electronically connected with the source and drain electrodes and the channel layer; and a gate insulating layer disposed between the channel layer and the gate electrode and comprising an ionic liquid and a resin. | 2013-06-06 |
| 20130140532 | PHOTOCROSSLINKABLE POLYIMIDE POLYMER, MANUFACTURING METHODS FOR THE SAME AND MEMORY DEVICES USING THE SAME - The present invention relates to a polymer memory device and to a production method for the same, and relates to a novel photocrosslinkable polymer compound able to be used in a polymer memory device, to a novel non-volatile memory device in which an active layer between an upper electrode and a lower electrode comprises a photocrosslinkable polyimide polymer, and to a production method for the same. In the polymer memory device, the photocrosslinkable polyimide polymer is used as an active layer. | 2013-06-06 |
| 20130140533 | PIXEL STRUCTURE OF ELECTROLUMINESCENT DISPLAY PANEL - A pixel structure of electroluminescent display panel has a first sub-pixel region, a second sub-pixel region and a third sub-pixel region. The pixel structure of electroluminescent display panel includes a first organic light-emitting layer and a second organic light-emitting layer. The first organic light-emitting layer, which includes a first organic light-emitting material, is disposed at least in the first sub-pixel region and the second sub-pixel region. The second organic light-emitting layer, which includes a second organic light-emitting material and a third organic light-emitting material, is disposed at least in the second sub-pixel region and the third sub-pixel region. The first organic light-emitting layer and the second organic light-emitting layer overlap in the second sub-pixel region. The first sub-pixel region and the third sub-pixel region have different cavity lengths. | 2013-06-06 |
| 20130140534 | Light-Emitting Devices Comprising Nanostructures - Light-emitting devices are described herein. | 2013-06-06 |
| 20130140535 | PIXEL STRUCTURE OF AN ELECTROLUMINESCENT DISPLAY PANEL - A pixel structure of an electroluminescent display panel includes a first sub-pixel region, a second sub-pixel region, a third sub-pixel region and a fourth sub-pixel region having different cavity lengths. The first sub-pixel region and the second sub-pixel region share a first organic light-emitting layer, which can generate a first primary color light in the first sub-pixel region, and a second primary color light in the second sub-pixel region. The third sub-pixel region and the fourth sub-pixel region share a second organic light-emitting layer, which can generate a third primary color light in the third sub-pixel region, and a fourth primary color light in the fourth sub-pixel region. The first primary color light, the second primary color light, the third primary color light and the fourth primary color light have different spectra of wavelength. | 2013-06-06 |
| 20130140536 | Light Emitting Device and Manufacturing Method Thereof - Disclosed is a light emission element including, on a substrate having an insulative surface, a first electrode connected with a thin film transistor and an insulator covering the end of the first electrode, a layer containing an organic compound in contact with the first electrode, a second electrode in contact with the layer containing the organic compound. The first electrode has an inclined surface and the inclined surface reflects emitted light from the layer containing the organic compound. Further, a light absorbing multi-layered film absorbing external light is disposed on the portion of the first electrode covered with the insulator. The light absorbing multi-layered film comprising at least has a three-layered structure comprising a light transmitting film, a film partially absorbing light and a light transmitting film. | 2013-06-06 |
| 20130140537 | ORGANIC LIGHT EMITTING DISPLAY DEVICE - Disclosed is an organic light-emitting display device defined into a non-display area and a display area which is provided with pixels. Each of the pixels includes: first through fourth nodes; an organic light emission element connected to the fourth node; a drive transistor disposed between the second, third, and fourth nodes and configured to generate a drive current which drives the organic light emission element to emit light; a storage capacitor disposed between the first and third nodes; first through fifth transistors; wherein the fifth transistor is disposed between the second node with the non-display area and a reference voltage line and configured to control an initialization of the second node. | 2013-06-06 |
| 20130140538 | ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS - An electro-optical device includes a first pixel circuit having a first light emitting element; a second pixel circuit having a second light emitting element arranged adjacent to the first light emitting element along a first direction; a first data line arranged along a second direction crossing the first direction, the first data line being electrically connected to the first pixel circuit; a second constant potential wiring line arranged along the second direction, the second constant potential wiring line being electrically connected to the second pixel circuit; a wiring line connected to the second constant potential wiring line. The first data line and the wiring line overlap when seen from a third direction perpendicular to the first direction and to the second direction. | 2013-06-06 |
| 20130140539 | HOST MATERIAL AND ORGANIC LIGHT EMITTING DISPLAY DEVICE USING THE SAME - A host material is disclosed. The host material, as a compound which is represented by the following formula 1, has a chemical structure in which nitrogen and silicon atoms are chemically and directly bonded to each other. | 2013-06-06 |
| 20130140540 | ORGANIC THIN FILM TRANSISTOR WITH ION EXCHANGED GLASS SUBSTRATE - Articles utilizing strengthened glass substrates, for example, ion-exchanged glass substrates, in combination with organic molecules or polymers are described along with methods for making the articles. The articles are useful in electronics-based devices that utilize organic thin film transistors. | 2013-06-06 |
| 20130140541 | LAYER STRUCTURE COMPRISING ELECTROTECHNICAL COMPONENTS - The present invention provides a layer structure comprising a substrate ( | 2013-06-06 |
| 20130140542 | ORGANIC ELECTROLUMINESCENCE ELEMENT AND METHOD OF MANUFACTURING THEREOF - An organic EL element comprises: an anode; a cathode; a functional layer including at least a light-emitting layer; a hole injection layer disposed between the anode and the functional layer; and a bank. The hole injection layer contains tungsten oxide. Tungsten atoms constituting the tungsten oxide include both tungsten atoms with a valence of six and tungsten atoms with a valence less than six. The hole injection layer includes a crystal of the tungsten oxide. A particle diameter of the crystal is on an order of nanometers. The hole injection layer has a recessed portion whose inner side surface has an upper edge that is one of (i) aligned with part of a lower edge of the bank, the part being in contact with the light-emitting layer, and (ii) in contact with a bottom surface of the bank. | 2013-06-06 |
| 20130140543 | ORGANIC EL ELEMENT, DISPLAY DEVICE, AND LIGHT-EMITTING DEVICE - An organic EL element comprises: an anode; a cathode; a functional layer that is disposed between the anode and the cathode and includes at least a light-emitting layer; a hole injection layer disposed between the anode and the functional layer; and a bank. The hole injection layer contains tungsten oxide, and has a recessed portion. A UPS spectrum of the hole injection layer, obtained from a UPS measurement, has a protrusion appearing near a Fermi surface and within a region corresponding to a binding energy range lower than a top of a valence band. The tungsten oxide contained in the hole injection layer satisfies a condition, determined from an XPS measurement, that a ratio in a number density of atoms other than tungsten atoms and oxygen atoms to the tungsten atoms does not exceed approximately 0.83. | 2013-06-06 |
| 20130140544 | DEUTERATED COMPOUNDS FOR ELECTRONIC APPLICATIONS - This invention relates to deuterated indolocarbazole compounds that are useful in electronic applications. It also relates to electronic devices in which the active layer includes such a deuterated compound. | 2013-06-06 |
| 20130140545 | MOISTURE ABSORPTION FILLING MATERIAL FOR ORGANIC LIGHT EMITTING DEVICE, METHOD FOR PREPARING THE SAME, AND ORGANIC LIGHTING EMITTING DEVICE INCLUDING THE SAME - A moisture absorption filling material for an organic light-emitting device may include a fibrous web structure including an assembly of fibers, the fibers including a binder resin and hygroscopic particles, the hygroscopic particles being secured into the fibers. A method of preparing a moisture absorption filling material for an organic light-emitting device may include electrospinning a mixture including about 10 wt % to about 60 wt % of hygroscopic particles and about 40 wt % to about 90 wt % of a binder. | 2013-06-06 |
| 20130140546 | HYGROSCOPIC FILLER FOR ORGANIC EL GETTER, METHOD FOR MANUFACTURING THE SAME, AND ORGANIC EL DEVICE INCLUDING THE SAME - A hygroscopic filler for an organic EL getter, a method of manufacturing the same, and an organic EL device including the same, the hygroscopic filler including a sheet having pores; and a mixture of an organic binder and a hygroscopic material, the mixture being secured to the sheet. | 2013-06-06 |
| 20130140547 | ORGANIC LIGHT-EMITTING DEVICE INCLUDING BARRIER LAYER INCLUDING SILICON OXIDE LAYER AND SILICON NITRIDE LAYER - An organic light-emitting device including a barrier layer that includes a silicon oxide layer and a silicon-rich silicon nitride layer. The organic light-emitting device includes a flexible substrate that includes a barrier layer and plastic films disposed under and over the barrier layer. The barrier layer includes a silicon-rich silicon nitride layer and a silicon oxide layer. The order in which the silicon-rich silicon nitride layer and the silicon oxide layer are stacked is not limited and the silicon oxide layer may be first formed and then the silicon-rich silicon nitride layer may be stacked on the silicon oxide layer. The silicon-rich silicon nitride layer has a refractive index of 1.81 to 1.85. | 2013-06-06 |
| 20130140548 | ORGANIC SEMICONDUCTOR COMPOSITION, ORGANIC THIN FILM, AND ORGANIC THIN FILM TRANSISTOR HAVING SAME - To provide an organic semiconductor composition that can exhibit a high carrier transport property and give uniform characteristics. An organic semiconductor composition characterized by containing a high molecular weight compound having a carrier transport property and a low molecular weight compound, in which the low molecular weight compound has a structure represented by Formula (1) and a content ratio of the low molecular weight compound is from 5 to 95 parts by mass relative to a total of 100 parts by mass of the high molecular weight compound and the low molecular weight compound, | 2013-06-06 |
| 20130140549 | BICARBAZOLE COMPOUNDS FOR OLEDS - Novel organic compounds comprising a bicarbazole core are provided. In particular, the compounds has a 3,3′-bicarbazole core substituted at the 9-position with a triazine or pyrimidine. The compounds may be used in organic light emitting devices to provide devices having improved efficiency and improved lifetime. | 2013-06-06 |
| 20130140550 | ORGANIC LIGHT-EMITTING ELEMENT AND PRODUCTION METHOD THEREOF - The present invention relates to an organic light-emitting element and a production method thereof. Specifically, the present invention relates to an organic light-emitting element, which has excellent productivity during mass production thereof and may allow simplification of vapor deposition equipment, and the like, and a production method thereof. | 2013-06-06 |
| 20130140551 | TRANSISTORS, METHODS OF MANUFACTURING THE SAME, AND ELECTRONIC DEVICES INCLUDING TRANSISTORS - A transistor may include a channel layer formed of an oxide semiconductor. The oxide semiconductor may include GaZnON, and a proportion of Ga content to a total content of Ga and Zn of the channel layer is about 0.5 to about 4.5 at %. | 2013-06-06 |
| 20130140552 | SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SAME, AND DISPLAY DEVICE - A semiconductor device ( | 2013-06-06 |
| 20130140553 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A highly reliable semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device is manufactured with a high yield, so that high productivity is achieved. In a semiconductor device including a transistor in which a source electrode layer and a drain electrode layer are provided over and in contact with an oxide semiconductor film, entry of impurities and formation of oxygen vacancies in an end face portion of the oxide semiconductor film are suppressed. This can prevent fluctuation in the electric characteristics of the transistor which is caused by formation of a parasitic channel in the end face portion of the oxide semiconductor film. | 2013-06-06 |
| 20130140554 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device including a minute transistor with a short channel length is provided. A gate insulating layer is formed over a gate electrode layer; an oxide semiconductor layer is formed over the gate insulating layer; a first conductive layer and a second conductive layer are formed over the oxide semiconductor layer; a conductive film is formed over the first conductive layer and the second conductive layer; a resist mask is formed over the conductive film by performing electron beam exposure; and then a third conductive layer and a fourth conductive layer are formed over and in contact with the first conductive layer and the second conductive layer, respectively, by selectively etching the conductive film. | 2013-06-06 |
| 20130140555 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer. | 2013-06-06 |
| 20130140556 | THIN FILM TRANSISTOR AND ARRAY SUBSTRATE INCLUDING THE SAME - An array substrate includes a gate line on a substrate including a pixel region, the gate line extending in one direction; a gate electrode in the pixel region and extending from the gate line; a gate insulating layer on the gate line and the gate electrode; a data line on the gate insulating layer and crossing the gate line to define the pixel region; an oxide semiconductor layer on the gate insulating layer and having three ends, the oxide semiconductor layer corresponding to the gate electrode; an etch stopper on the oxide semiconductor layer to expose the three ends of the oxide semiconductor layer; a source electrode contacting two ends of the three ends of the oxide semiconductor layer and extending from the data line; and a drain electrode contacting one end of the three ends of the oxide semiconductor layer and spaced apart from the source electrode. | 2013-06-06 |
| 20130140557 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed. | 2013-06-06 |
| 20130140558 | SEMICONDUCTOR DEVICE - Disclosed is a semiconductor device functioning as a multivalued memory device including: memory cells connected in series; a driver circuit selecting a memory cell and driving a second signal line and a word line; a driver circuit selecting any of writing potentials and outputting it to a first signal line; a reading circuit comparing a potential of a bit line and a reference potential; and a potential generating circuit generating the writing potential and the reference potential. One of the memory cells includes: a first transistor connected to the bit line and a source line; a second transistor connected to the first and second signal line; and a third transistor connected to the word line, bit line, and source line. The second transistor includes an oxide semiconductor layer. A gate electrode of the first transistor is connected to one of source and drain electrodes of the second transistor. | 2013-06-06 |
| 20130140559 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced. | 2013-06-06 |
| 20130140560 | SEMICONDUCTOR DEVICE - An intrinsic or substantially intrinsic semiconductor, which has been subjected to a step of dehydration or dehydrogenation and a step of adding oxygen so that the carrier concentration is less than 1×10 | 2013-06-06 |
| 20130140561 | PHOTODIODE AND ULTRAVIOLET SENSOR - A p-type semiconductor layer containing a solid solution of NiO and ZnO as a principal component is joined to an n-type semiconductor layer containing ZnO as a principal component, and the p-type semiconductor layer contains a rare earth element R. The content of the rare earth element R is preferably 0.001 to 1 mole with respect to | 2013-06-06 |
| 20130140562 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a gate line, a gate insulation layer, a data line, a switching element, a protection insulation layer, a gate pad portion and a data pad portion. The gate insulation layer is disposed on the gate line. The switching element is connected to the gate line and the data line. The protection insulation layer is disposed on the switching element. The gate pad portion includes a first gate pad electrode which makes contact with an end portion of the gate line through a first hole formed through the gate insulation layer, and a second gate pad electrode which makes contact with the first gate pad electrode through a second hole formed through the protection insulation layer. The data pad portion includes a data pad electrode which makes contact with an end portion of the data line through a third hole formed through the protection insulation layer. | 2013-06-06 |
| 20130140563 | Plating Process and Structure - A system and method for plating a contact connected to a test pad is provided. An embodiment comprises inserting a blocking material into vias between the contact and the test pad. In another embodiment a blocking structure may be inserted between the contact and the test pad. In yet another embodiment a blocking layer may be inserted into a contact stack. Once the blocking material, the blocking structure, or the blocking layer have been formed, the contact may be plated, with the blocking material, the blocking structure, or the blocking layer reducing or preventing degradation of the test pad due to galvanic effects. | 2013-06-06 |
| 20130140564 | Electrical Test Structure for Devices Employing High-K Dielectrics or Metal Gates - Disclosed herein are various electrical test structures for evaluating semiconductor devices that employ high-k dielectrics and/or metal gate electrode structures. In one example, the test structure disclosed herein includes a first line formed over an isolation material, a first active region defined in a semiconducting substrate and a first extension formed over an isolation material, the first extension extending from a first side of the first line, wherein the first extension is positioned proximate the first active region and wherein the first line and the first extension are comprised of at least one of a high-k layer of insulating material or a metal layer. | 2013-06-06 |
| 20130140565 | TEST STRUCTURE FOR DETECTION OF GAP IN CONDUCTIVE LAYER OF MULTILAYER GATE STACK - A semiconductor structure including a test structure for detection of a gap in a conductive layer of the semiconductor structure includes a semiconductor substrate; the test structure, the test structure being located on the semiconductor substrate, the test structure comprising a multilayer gate stack, wherein the multilayer gate stack includes a single conductive layer region including: a gate dielectric located on the semiconductor substrate; the conductive layer located on the gate dielectric; and an undoped amorphous silicon layer located on the conductive layer; and wherein the test structure is configured to detect the presence of the gap in the conductive layer. | 2013-06-06 |
| 20130140566 | BIPOLAR JUNCTION TRANSISTOR WITH A SELF-ALIGNED EMITTER AND BASE - Methods for fabricating bipolar junction transistors with self-aligned emitter and extrinsic base, bipolar junction transistors made by the methods, and design structures for a BiCMOS integrated circuit. The bipolar junction transistor is fabricated using a sacrificial emitter pedestal that provides a sacrificial mandrel promoting self-alignment between the emitter and the extrinsic base. The sacrificial emitter pedestal is subsequently removed to open an emitter window extending to the intrinsic base. An emitter is formed in the emitter window that lands on the intrinsic base. | 2013-06-06 |
| 20130140567 | SILICON SUBSTRATE, EPITAXIAL STRUCTURE INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SILICON SUBSTRATE - Crack formation and propagation in a silicon substrate may be reduced by forming a crack reducing portion. The silicon substrate includes a silicon main portion and a silicon edge portion formed around the silicon main portion. The crack reducing portion is formed on the silicon edge portion of the silicon substrate such that the directions of crystal faces in the crack reducing portion are randomly oriented. | 2013-06-06 |
| 20130140568 | IMAGE DETECTOR - An image detector comprises: an active matrix-type TFT array substrate having a pixel area, in which photoelectric conversion elements and thin film transistors are arranged in a matrix shape, a data line, and a bias line; a conversion layer, which is arranged on the TFT array substrate and converts radiation into light; and a conductive cover, which covers the conversion layer, wherein the conductive cover is adhered in an adhesion area in an upper layer than an area, in which at least one of the data line and the bias line extend from the pixel area to each of terminals, and wherein inorganic insulation films configured by at least two layers are formed between the at least one of the data line and the bias line and the adhesion area. | 2013-06-06 |
| 20130140569 | SEMICONDUCTOR DEVICE - A semiconductor device includes a first transistor which includes a first gate electrode below its oxide semiconductor layer and a second gate electrode above its oxide semiconductor layer, and a second transistor which includes a first gate electrode above its oxide semiconductor layer and a second gate electrode below its oxide semiconductor layer and is provided so as to at least partly overlap with the first transistor. In the semiconductor device, a conductive film serving as the second gate electrode of the first transistor and the second gate electrode of the second transistor is shared between the first transistor and the second transistor. Note that the second gate electrode not only controls the threshold voltages (Vth) of the first transistor and the second transistor but also has an effect of reducing interference of an electric field applied from respective first gate electrodes of the first transistor and the second transistor. | 2013-06-06 |
| 20130140570 | THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor array panel includes an insulation substrate; a gate line on the insulation substrate; a gate insulating layer on the gate line; a data line on the gate insulating layer; a first insulating layer on the data line and including a first contact hole which exposes a portion of the data line; a first connection assistant member in the first contact hole; and further including a first field generating electrode on the first insulating layer. The first field generating electrode is in connection with the exposed portion of the data line through the first connection assistant member. | 2013-06-06 |
| 20130140571 | ARRAY SUBSTRATE FOR FLAT DISPLAY DEVICE AND MANUFACTURING THE SAME - In one embodiment, an array substrate for a flat display device includes a gate line extending in a first direction, a source line extending a in second direction orthogonally crossing the first direction. A switching element includes a semiconductor layer, a gate electrode electrically connected with the gate line, a source electrode electrically connected with the gate line in contact with the semiconductor layer and a drain electrode in contact with the semiconductor layer. An insulating film covers the source line and the switching element, and includes a contact hole exposing the drain electrode. A pixel electrode is formed on the insulating film. An insulating filling component is filled in the contact hole of the insulating film so as to be interposed between the drain electrode and the pixel electrode in a pixel in which the source line is short-circuited with the drain electrode. | 2013-06-06 |
| 20130140572 | ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - An array substrate having a wiring of a pad region formed without an insulating film or without an insulating film and an organic film to reduce abnormal operations due to an increase in resistance caused by a contact margin at a high temperature, and a method for manufacturing the same are provided. The array substrate includes: an insulating substrate including a pad region and a thin film transistor (TFT) formation region; a first electrode layer formed in the pad region of the substrate; and a second electrode formed on the first electrode layer in an overlapping manner. | 2013-06-06 |
| 20130140573 | MANUFACTURING METHOD FOR CRYSTALLINE SEMICONDUCTOR FILM, SEMICONDUCTOR DEVICE, AND DISPLAY DEVICE - An object is to form a crystalline semiconductor film including a plurality of semiconductor regions with different average grain sizes by a simple manufacturing process. | 2013-06-06 |
| 20130140574 | THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME AND ELECTRONIC DEVICE - Embodiments of the present invention disclose a thin film transistor array substrate and a method for manufacturing the same and an electronic device. The method for manufacturing the thin film transistor array substrate comprises: a first patterning process, in which a pattern of an active layer which is formed by a semiconductor layer and patterns of a source electrode and a drain electrode, which are separated from each other and are formed by a first metal layer, are formed on a transparent substrate; a second patterning process, in which a pattern of an insulating layer is formed on the transparent substrate subjected to the first patterning process, the pattern of the insulating layer comprising a contact via hole exposing the source electrode; and a third patterning process, in which a pattern of a pixel electrode, which is formed by a transparent conductive layer, and a pattern of a gate electrode, which is formed by a second metal layer, are formed on the transparent substrate subjected to the second patterning process, the pixel electrode being connected to the source electrode through the contact via hole. | 2013-06-06 |
| 20130140575 | DISPLAY APPARATUS AND METHOD OF LAYING OUT PIXEL CIRCUITS - Herein disclosed a display apparatus including: a pixel array having a matrix of pixel circuits each including respective electrooptical elements for determining a display brightness level and respective drive circuits for driving the electrooptical elements; wherein adjacent two of the pixel circuits are paired with each other, and each of the drive circuits of the adjacent two pixel circuits includes at least one transistor having a low-concentration source/drain region or an offset region of an offset gate structure, the electrooptical elements and the drive circuits of the adjacent two pixel circuits being laid out such that a line interconnecting a drain region and a source region of the at least one transistor extends parallel to a direction of pixel columns of the pixel circuits of the pixel array. | 2013-06-06 |
| 20130140576 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device, and a method for manufacturing the same, comprises a source/drain region formed using a solid phase epitaxy (SPE) process to provide partially isolated source/drain transistors. Amorphous semiconductor material at the source/drain region is crystallized and then shrunk through annealing, to apply tensile stress in the channel direction. | 2013-06-06 |
| 20130140577 | Semiconductor Device and Method for Preparing the Same - A semiconductor device and a method for preparing the same that can solve crack of a semiconductor film, capacitance electrodes and the like due to stress when forming a source electrode and a drain electrode in a semiconductor device having a thin film transistor and a holding capacitance with three or more capacitance electrodes is provided. Before forming the source electrode and the drain electrode, a crystalline silicon film for relaxing the stress is formed, then a contact hole connecting to the semiconductor film of the thin film transistor is opened, and a metal film to be the source electrode and the drain electrode is formed. | 2013-06-06 |
| 20130140578 | CIRCUIT STRUCTURE HAVING ISLANDS BETWEEN SOURCE AND DRAIN - A circuit structure includes a substrate, an unintentionally doped gallium nitride (UID GaN) layer over the substrate, a donor-supply layer over the UID GaN layer, a gate structure, a drain, and a source over the donor-supply layer. A number of islands are over the donor-supply layer between the gate structure and the drain. The gate structure disposed between the drain and the source. The gate structure is adjoins at least a portion of one of the islands and/or partially disposed over at least a portion of at least one of the islands. | 2013-06-06 |
| 20130140579 | METHOD OF INTEGRATING A PLURALITY OF BENZOCYCLOBUTENE LAYERS WITH A SUBSTRATE AND AN ASSOCIATED DEVICE - A method of integrating benzocyclobutene (BCB) layers with a substrate is provided along with a corresponding device. A method includes forming a first BCB layer on the substrate and depositing a first metal layer on the first BCB layer and within vias defined by the first metal layer. The method also forms a second BCB layer on the first metal layer and deposits a second metal layer on the second BCB layer and within vias defined by the second metal layer. The second metal layer extends through the vias defined by the second metal layer to establish an operable connection with the first metal layer. The first and second metal layers are independent of an electrical connection to any circuit element carried by the substrate, but the first and second metal layers secure the second BCB layer to the underlying structure and reduce the likelihood of delamination. | 2013-06-06 |
| 20130140580 | Optoelectronic Component - An optoelectronic component can be used for mixing electromagnetic radiation having different wavelengths, in particular in the far field. The optoelectronic component includes a carrier. A first semiconductor chip has a first radiation exit surface for emitting electromagnetic radiation in a first spectral range is provided on the carrier and a second semiconductor chip as a second radiation exit surface for emitting electromagnetic radiation in a second spectral range is provided on the carrier. A diffusing layer is provided on the radiation exit surfaces of the semiconductor chips which face away from the carrier. | 2013-06-06 |
| 20130140581 | OPTICAL DEVICE - An optical device is provided. Multi-layer structures are disposed on a substrate, wherein each of the multi-layer structures is consisting of at least two insulated layers with different refractive indexes formed alternately. A buffer layer covers the multi-layer structures, so that said multi-layer structures are disposed between the buffer layer and the substrate, wherein said buffer layer is an un-doped GaN based semiconductor layer. A first conductive semiconductor layer is disposed on the buffer layer. An active layer is disposed on said first conductive semiconductor layer. A second conductive semiconductor layer is disposed on said active layer and a transparent conductive layer is disposed on said second conductive semiconductor layer. | 2013-06-06 |
| 20130140582 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - The present invention relates to a semiconductor device and a method for manufacturing the same. A RESURF layer ( | 2013-06-06 |
| 20130140583 | SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - First, third, and fourth regions have a first conductivity type, and a second region has a second conductivity type. The second region is provided with a plurality of through holes exposing the first region. The third region includes a contact portion, a connecting portion, and a filling portion. The contact portion is in contact with a first portion of the second region. The connecting portion extends from the contact portion to each of the plurality of through holes in the second region. The filling portion fills each of the plurality of through holes in the second region. The fourth region, is provided on the first portion of the second region. | 2013-06-06 |
| 20130140584 | SEMICONDUCTOR DEVICE - Disclosed is a JBS diode wherein an increase in an on-voltage is suppressed by sufficiently spreading a current to the lower portion of a junction barrier (p | 2013-06-06 |
| 20130140585 | JUNCTION BARRIER SCHOTTKY RECTIFIERS HAVING EPITAXIALLY GROWN P+-N JUNCTIONS AND METHODS OF MAKING - A junction barrier Schottky (JBS) rectifier device and a method of making the device are described. The device comprises an epitaxially grown first n-type drift layer and p-type regions forming p | 2013-06-06 |
| 20130140586 | SILICON CARBIDE SEMICONDUCTOR ELEMENT AND METHOD FOR PRODUCING THE SAME - This silicon carbide semiconductor element includes: a body region of a second conductivity type which is located on a drift layer of a first conductivity type; an impurity region of the first conductivity type which is located on the body region; a trench which runs through the body region and the impurity region to reach the drift layer; a gate insulating film which is arranged on surfaces of the trench; and a gate electrode which is arranged on the gate insulating film. The surfaces of the trench include a first side surface and a second side surface which is opposed to the first side surface. The concentration of a dopant of the second conductivity type is higher at least locally in a portion of the body region which is located beside the first side surface than in another portion of the body region which is located beside the second side surface. | 2013-06-06 |
| 20130140587 | POLARIZATION STRUCTURE, METHOD OF MANUFACTURING A POLARIZATION STRUCTURE AND ORGANIC LIGHT EMITTING DISPLAY DEVICE HAVING A POLARIZATION STRUCTURE - A polarization structure for a display device is disclosed. In one embodiment, the structure includes a retardation layer, a first polarizing layer, a first uniaxial optical compensation layer, a second polarizing layer and a second uniaxial optical compensation layer. The retardation layer may be configured to create a phase difference between two polarization components of an incident light. The first polarizing layer may be disposed on the retardation layer. The first uniaxial optical compensation layer may be disposed on the first polarizing layer. The second polarizing layer may be disposed on the first uniaxial optical compensation layer. The second uniaxial optical compensation layer may be disposed between the first polarizing layer and the first uniaxial optical compensation layer or between the first polarizing layer and the second polarizing layer. | 2013-06-06 |
| 20130140588 | LIGHT EMITTING DIODE AND METHOD OF FABRICATING THE SAME - Exemplary embodiments of the present invention disclose a light emitting diode (LED) and a method of fabricating the same. The LED includes a substrate, a semiconductor stack arranged on the substrate, the semiconductor stack including an upper semiconductor layer having a first conductivity type, an active layer, and a lower semiconductor layer having a second conductivity type, isolation trenches separating the semiconductor stack into a plurality of regions, connectors disposed between the substrate and the semiconductor stack, the connectors electrically connecting the plurality of regions to one another, and a distributed Bragg reflector (DBR) having a multi-layered structure, the DBR disposed between the semiconductor stack and the connectors. The connectors are electrically connected to the semiconductor stack through the DBR, and portions of the DBR are disposed between the isolation trenches and the connectors. | 2013-06-06 |
| 20130140589 | ORGANIC LIGHT EMITTING DEVICE HAVING IMPROVED LIGHT EMITTING QUALITY - An organic light emitting device includes, a base part, patterned first electrodes on the base part, conductive material layers spaced apart from the patterned first electrodes and between the first electrodes, pixel defining layers between the patterned first electrodes, the pixel defining layers overlapping only a portion of upper surfaces of the conductive material layers, light emitting layers on the first electrodes, and a second electrode on the light emitting layers. | 2013-06-06 |
