| 23rd week of 2014 patent applcation highlights part 16 |
| Patent application number | Title | Published |
|---|
| 20140151655 | ORGANIC LIGHT EMITTING DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - Discussed is an organic light emitting display device which prevents a voltage drop, wherein the light emitting display device includes a substrate; a first electrode on the substrate; an organic light emitting layer on the first electrode; a second electrode on the substrate including the organic light emitting layer; and an encapsulation substrate confronting the substrate, wherein the encapsulation substrate is formed of a metal material, and is electrically connected with the second electrode. | 2014-06-05 |
| 20140151656 | GAS AND MOISTURE PERMEATION BARRIERS - A gas and moisture permeation barrier stack deposited by both sputtering and atomic layer deposition techniques. In one embodiment, the barrier stack comprises a bottom barrier layer deposited on a substrate by sputtering and a top barrier layer deposited on the sputtered layer by atomic layer deposition. In one embodiment, the sputtered barrier layer has a water vapor transmission rate of about 10 | 2014-06-05 |
| 20140151657 | Furan and Selenophene Derivatized Benzo [1,2-b:4,5-b'] Dithiophene-Thienothiophene Based Conjugated Polymers For High-Efficiency Organic Solar Cells - Compositions, synthesis and applications for furan, thiophene and selenophene derivatized benzo[1,2-b:3,4-b′]dithiophene(BDT)-thienothiophene (BDT-TT) based polymers, namely, poly[(4,8-bis(5-(2-ethyhexyl)selenophen-2-yl)-benzo[1,2-b;4,5-b′]dithiophene)-2,6-diyl-alt-(4-(2-ethylhexanoyl)-3-fluorothieno[3,4-b]thiophene)-2-6-diyl (CS-15), poly[(4,8-bis(5-(2-ethyhexyl)selenophen-2-yl)-benzo[1,2-b;4,5-b′]dithiophene)-2,6-diyl-alt-(4-(2-ethylhexyl)-3-fluorothieno[3,4-b]thiophene)-2-carboxylate-2-6-diyl (CS-16), poly[(4,8-bis(5-(2-ethyhexyl)furan-2-yl)-benzo[1,2-b;4,5-b′]dithiophene)-2,6-diyl-alt-(4-(2-ethylhexyl)-3-fluorothieno[3,4-b]thiophene)-2-carboxylate-2-6-diyl (CS-18) and poly[(4,8-bis(5-hexylfuran-2-yl)-benzo[1,2-b;4,5-b′]dithiophene)-2,6-diyl-alt-(4-(2-ethylhexanoyl)-3-fluorothieno[3,4-b]thiophene)-2-6-diyl (CS-24) are disclosed. Further, an organic solar cell constructed of a derivatized benzo[1,2-b:3,4-b′]dithiophene(BDT)-thienothiophene (BDT-TT) based polymer is discussed. | 2014-06-05 |
| 20140151658 | ORGANIC LIGHT EMITTING DISPLAY - An organic light emitting display includes a red light emitting layer, a green light emitting layer and a blue light emitting layer formed between first and second electrodes, a hole-transporting layer formed between the first electrode and each of the red, the green and the blue light emitting layers, and an electron-transporting layer formed between the second electrode and each of the red, the green and the blue light emitting layers, wherein at least one light emitting layer of the red, the green and the blue light emitting layers includes a first light emitting layer including a light emitting host and a light emitting dopant, and a second light emitting layer which is formed between the first light emitting layer and at least one of the electron-transporting layer and the hole-transporting layer, and includes the light emitting dopant. | 2014-06-05 |
| 20140151659 | LIGHT-EMITTING COMPOUND - An unsubstituted or substituted phosphorescent compound of formula (I): | 2014-06-05 |
| 20140151660 | POLYMER AND ORGANIC ELECTRONIC DEVICE - A polymer comprising repeat units of formula (I) and one or more co-repeat units: | 2014-06-05 |
| 20140151661 | AMINE DERIVATIVE, ORGANIC ELECTROLUMINESCENCE MATERIAL, AND ORGANIC ELECTROLUMINESCENCE DEVICE INCLUDING THE SAME - An amine derivative having a phenanthroimidazole group, an organic electroluminescence material, and an electroluminescence device, the amine derivative being represented by Formula 1, below: | 2014-06-05 |
| 20140151662 | Light-Emitting Element, Light-Emitting Device, Electronic Appliance, and Lighting Device - A light-emitting element in which a light-emitting layer contains an organic compound capable of emitting phosphorescence is provided. A light-emitting element which can have low driving voltage, high current efficiency, or a long lifetime is provided. In a light-emitting element in which a light-emitting layer is interposed between a pair of electrodes, the light-emitting layer contains an organic compound. The organic compound has a 1,2,4-triazole skeleton, a phenyl skeleton, an arylene skeleton, and a Group 9 metal or a Group 10 metal. The nitrogen atom at the 4-position of the 1,2,4-triazole skeleton coordinates to the Group 9 metal or the Group 10 metal. The nitrogen atom at the 1-position of the 1,2,4-triazole skeleton is bonded to a phenyl skeleton. The arylene skeleton is bonded to the 3-position of the 1,2,4-triazole skeleton and the Group 9 metal or the Group 10 metal. | 2014-06-05 |
| 20140151663 | ORGANIC ELECTROLUMINESCENCE DEVICE - An organic EL device having a red light emitting area and a green light emitting area is provided. Each of the red light emitting area and the green light emitting area has a structure such that a first electrode having a light transmitting characteristic and an organic layer formed on the first electrode are stacked, and a second electrode having a light reflecting characteristic is disposed on the organic layers of the red and green light emitting areas. Reflectance of green light by the second electrode in the red light emitting area is smaller than reflectance of green light in the second electrode of the green light emitting area. Reflectance of red light by the second electrode of the red light emitting area is larger than reflectance of red light by the second electrode of the green light emitting area. | 2014-06-05 |
| 20140151664 | BENZOIMIDAZOLE DERIVATIVE, ORGANIC ELECTROLUMINESCENCE MATERIAL AND ORGANIC ELECTROLUMINSCENCE DEVICE - A benzoimidazole derivative includes two carbazole substituents connected to each other, and a benzoimidazole substituent connected to a benzene ring of one of the carbazole substituents through an aryl group. | 2014-06-05 |
| 20140151665 | CARBAZOLE DERIVATIVE AND ORGANIC ELECTROLUMINESCENCE DEVICE USING THE SAME - An indolo[3,2,1-jk] carbazole derivative is represented by the following Formula 1. | 2014-06-05 |
| 20140151666 | AMINE DERIVATIVE, AND ORGANIC ELECTROLUMINESCENCE MATERIAL AND ORGANIC ELECTROLUMINESCENCE DEVICE USING THE SAME - An amine derivative represented by compound (1) of following Formula 1: | 2014-06-05 |
| 20140151667 | AMINE DERIVATIVE, ORGANIC ELECTROLUMINESCENCE MATERIAL HAVING THE SAME AND ORGANIC ELECTROLUMINESCENCE DEVICE USING THE MATERIAL - An amine derivative including a fluorine substituted aryl group is represented by compound (1) of the following Formula 1. | 2014-06-05 |
| 20140151668 | ORGANIC LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME - Provided are an organic light emitting diode and a method of manufacturing the same. The organic light emitting diode adjusts an optical resonance thickness and prevents spectrum distortions without use of an auxiliary layer. The organic light emitting diode includes a first electrode that is optically reflective; a second electrode that is optically transmissible and faces the first electrode; an organic emission layer interposed between the first electrode and the second electrode, the organic emission layer including: a first emission layer including a mixed layer that contains a host material and a dopant material, and a second emission layer comprising only the host material; and a carrier injection transport layer interposed between the organic emission layer and the first electrode or between the organic emission layer and the second electrode. | 2014-06-05 |
| 20140151669 | LIGHT-EMITTING DEVICE AND DISPLAY PANEL - Organic semiconductor layers comprise between a first electrode and a photoelectric converting layer a light extraction improving layer that contains at least silver or gold in part as a component, partially reflects light, and has transparency. The light extraction improving layer is in contact with or is inserted into a functional layer containing, for example, an organic semiconductor material, an oxide, a fluoride, or an inorganic compound having strong acceptor properties or strong donor properties with an ionization potential of 5.5 eV or higher, within the organic semiconductor layers. | 2014-06-05 |
| 20140151670 | POLYCYCLIC COMPOUND AND ORGANIC ELECTRONIC DEVICE COMPRISING THE SAME - An exemplary embodiment of the present application provides a new compound and an organic electronic device using the same. The organic electronic device according to an exemplary embodiment of the present application shows excellent characteristics in terms of efficiency, driving voltage, and service life. | 2014-06-05 |
| 20140151671 | ORGANIC ELECTROLUMINESCENCE LIGHT-EMITTING DEVICE AND PRODUCTION METHOD THEREOF - An object of the present invention is to provide an organic EL light-emitting device in which a permeation and diffusion of moisture from outside are prevented and a stable light-emitting characteristic is able to be maintained for a long period. The present invention relates to an organic EL light-emitting device comprising a sealing layer, a hygroscopic layer and a protective layer, which are aligned on the back of an organic electroluminescence element under a predetermined condition, wherein the sealing layer and the protective layer are constituted from a specific material, whereby it is possible to maintain a stable light-emitting characteristic for a long period together with suppressing the deterioration caused by moisture being permeated from outside. | 2014-06-05 |
| 20140151672 | LIGHT-EMITTING ELEMENT AND ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE - Provided is a light-emitting element in the structure and configuration of causing no possibility of a short circuit between first and second electrodes even if there is any foreign substance or a protrusion on the first electrode. Such a light-emitting element is configured to include, in order, a first electrode | 2014-06-05 |
| 20140151673 | ORGANIC ELECTROLUMINESCENCE GENERATING DEVICES - An electroluminescence generating device comprising a channel of organic semiconductor material, said channel being able to carry both types of charge carriers, said charge carriers being electrons and holes; an electron electrode, said electron electrode being in contact with said channel and positioned on top of a first side of said channel layer or within said channel layer, said electron electrode being able to inject electrons in said channel layer; a hole electrode, said hole electrode being spaced apart from said electron electrode, said hole channel and positioned on top of within said channel layer, said hole electrode being able to inject holes into said channel; a control electrode positioned on said first side or on a second side of said channel; whereby light emission of said electroluminescence generating device can be acquired by applying an electrical potential difference between said electron electrode and said hole electrode. | 2014-06-05 |
| 20140151674 | LIGHT-EMITTING DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - Provided is a method to manufacture a light-emitting display device in which a contact hole for the electrical connection of the pixel electrode and one of the source and drain electrode of a transistor and a contact hole for the processing of a semiconductor layer are formed simultaneously. The method contributes to the reduction of a photography step. The transistor includes an oxide semiconductor layer where a channel formation region is formed. | 2014-06-05 |
| 20140151675 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - An object of the invention is to reduce an area occupied by a capacitor in a circuit in a semiconductor device, and to downsize a semiconductor device on which the capacitor and an organic memory are mounted. The organic memory and the capacitor, included in a peripheral circuit, in which the same material as the layer containing the organic compound used for the organic memory is used as a dielectric, are used. The peripheral circuit here means a circuit having at least a capacitor such as a resonance circuit, a power supply circuit, a boosting circuit, a DA converter, or a protective circuit. Further, a capacitor in which a semiconductor is used as a dielectric may be provided over the same substrate as well as the capacitor in which the same material as the layer containing the organic compound is used as a dielectric. In this case, it is desirable that the capacitor in which the same material as the layer containing the organic compound is used as a dielectric and the capacitor in which the semiconductor is used as a dielectric are connected to each other in parallel. | 2014-06-05 |
| 20140151676 | OLEDS HAVING HIGH EFFICIENCY AND EXCELLENT LIFETIME - An OLED device comprises a cathode, an anode, and has therebetween a light-emitting layer wherein the light-emitting layer comprises (a) a 2-arylanthracene compound and (b) a light-emitting second anthracene compound having amino substitution at a minimum of two positions, wherein at least one amine is substituted at the 2 position of the second anthracene compound. | 2014-06-05 |
| 20140151677 | AROMATIC AMINE DERIVATIVE, AND ORGANIC ELECTROLUMINESCENT ELEMENT CONTAINING SAME - An aromatic amine derivative represented by the following formula (1): wherein
| 2014-06-05 |
| 20140151678 | ORGANIC LIGHT-EMITTING ELEMENT, LIGHT SOURCE DEVICE AND METHOD OF MANUFACTURING ORGANIC LIGHT-EMITTING ELEMENT - In order to achieve the increased efficiency of an organic light-emitting element, there is a need to reduce the influence of non-radiative recombination of electron-hole pairs except for surface plasmon polariton excitation, to convert most of exciton energy into visible light, and to tremendously improve the luminous efficiency of the organic light-emitting element. An organic light-emitting element according to the present invention includes a reflective electrode, a transparent electrode, and a light-emitting layer placed between the reflective electrode and the transparent electrode, and the organic light-emitting element is configured so that the light-emitting layer contains a host and a first dopant, and for the first dopant, one of the vertical component and horizontal component of the average value for transition dipole moments with respect to a substrate surface is larger than the other of the components. | 2014-06-05 |
| 20140151679 | METHOD OF FORMING A TOP GATE TRANSISTOR - A method of forming a top-gate transistor over a substrate comprises: forming a source and a drain electrode; forming an organic stack over the source and drain electrodes comprising an organic semiconductor layer and an organic dielectric layer over the organic semiconductor layer; forming a gate bi-layer electrode comprising a first gate layer of a first material and a second gate layer of a different second material; selectively depositing regions of a mask material over the gate bi-layer electrode; performing a first plasma etch step to remove portions of the first gate layer using the mask material as a mask; and performing a second plasma etch step to remove portions of the second gate layer and organic stack using the first gate layer as a mask, thereby patterning the gate bi-layer electrode and the organic stack. | 2014-06-05 |
| 20140151680 | POLYMER COMPOUND AND ORGANIC TRANSISTOR USING SAME - A polymer compound comprising a structural unit represented by the formula: | 2014-06-05 |
| 20140151681 | ORGANIC ELECTROLUMINESCENCE DEVICE - In order to provide an organic electroluminescent element which has excellent luminous efficiency and long service life, this organic electroluminescent element is provided with: a positive electrode; a negative electrode; an organic light emitting layer that is arranged between the positive electrode and the negative electrode; a first layer that is formed of sodium fluoride and arranged between the negative electrode and the organic light emitting layer so as to be in contact with the organic light emitting layer; and a second layer that is arranged between the first layer and the negative electrode and contains a first material and a second material, said first material being composed of an organic material and containing electrons donated from the second material. | 2014-06-05 |
| 20140151682 | CIRCUIT BOARD, DISPLAY DEVICE, AND PROCESS FOR PRODUCTION OF CIRCUIT BOARD - The present invention provides a circuit board having excellent productivity, particularly a circuit board having excellent productivity with respect to a semiconductor layer and source layer forming step, a display device, and a process for producing a circuit board. The circuit board of the present invention is a circuit board including an oxide semiconductor layer and an electrode connected to the oxide semiconductor layer, wherein the electrode is formed by essentially laminating a layer made of a metal other than copper and a layer containing copper. | 2014-06-05 |
| 20140151683 | THIN FILM TRANSISTOR - A thin film transistor includes an oxide semiconductor, in which an oxygen defect content of the oxide semiconductor is no greater than about 0.15 based on an entire oxygen content included in the oxide semiconductor. | 2014-06-05 |
| 20140151684 | X-RAY DETECTOR - An X-ray detector including a thin film transistor (TFT) substrate and a photo-diode array layer is disclosed. Each thin film transistor in the TFT substrate includes: a substrate; a gate-electrode on the substrate; a gate insulating layer on the gate-electrode; a semiconductor layer on the gate insulating layer, wherein a portion of the semiconductor layer covers the gate-electrode; an etching stop layer covering the semiconductor layer; a source-electrode and a drain-electrode respectively disposed on the etching stop layer, wherein the source-electrode and the drain-electrode are respectively electrically connected to the semiconductor layer through conductive via-holes each having a base portion at the semiconductor layer, and at least one of the projection areas of the base portions vertically projected on the substrate has a non-overlapping region beyond the projection area of the gate-electrode vertically projected on the substrate; and a passivation layer covering the source-electrode and the drain-electrode. | 2014-06-05 |
| 20140151685 | SEMICONDUCTOR DEVICE - A highly reliable semiconductor device having stable electrical characteristics is provided. Oxide films each containing one or more kinds of metal elements included in an oxide semiconductor film are formed in contact with an upper side and a lower side of the oxide semiconductor film where a channel is formed, whereby interface states are not easily generated at an upper interface and a lower interface of the oxide semiconductor film. A material which has a lower electron affinity than the oxide semiconductor film is used for the oxide films in contact with the oxide semiconductor film, whereby electrons flowing in the channel hardly move in the oxide films and mainly move in the oxide semiconductor film. Thus, even when an interface state exists between the oxide film and an insulating film formed on the outside of the oxide film, the state hardly influences the movement of electrons. | 2014-06-05 |
| 20140151686 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device including a transistor having a reduced number of oxygen vacancies in a channel formation region of an oxide semiconductor with stable electrical characteristics or high reliability is provided. A gate insulating film is formed over a gate electrode; an oxide semiconductor layer is formed over the gate insulating film; an oxide layer is formed over the oxide semiconductor layer by a sputtering method to form an stacked-layer oxide film including the oxide semiconductor layer and the oxide layer; the stacked-layer oxide film is processed into a predetermined shape; a conductive film containing Ti as a main component is formed over the stacked-layer oxide film; the conductive film is etched to form source and drain electrodes and a depression portion on a back channel side; and portions of the stacked-layer oxide film in contact with the source and drain electrodes are changed to an n-type by heat treatment. | 2014-06-05 |
| 20140151687 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - In a semiconductor device, a region where a channel is formed is protected. In a semiconductor device, a region protecting a region where a channel is formed is provided in a semiconductor layer. In a semiconductor device, a layer protecting a region where a channel is formed is provided. In a semiconductor device, a region and/or a layer protecting a region where a channel is formed have/has a low density of defect states. In a semiconductor device, a region where a channel is formed has a low density of defect states. | 2014-06-05 |
| 20140151688 | SEMICONDUCTOR DEVICE - To provide a semiconductor device which can be miniaturized or highly integrated. To obtain a semiconductor device including an oxide semiconductor, which has favorable electrical characteristics. To provide a highly reliable semiconductor device including an oxide semiconductor, by suppression of a change in its electrical characteristics. The semiconductor device includes an island-like oxide semiconductor layer over an insulating surface; an insulating layer surrounding a side surface of the oxide semiconductor layer; a source electrode layer and a drain electrode layer in contact with top surfaces of the oxide semiconductor layer and the insulating layer; a gate electrode layer overlapping with the oxide semiconductor layer; and a gate insulating layer between the oxide semiconductor layer and the gate electrode layer. The source electrode layer and the drain electrode layer are provided above the top surface of the oxide semiconductor layer. The top surface of the insulating layer is planarized. | 2014-06-05 |
| 20140151689 | DISPLAY APPARATUS AND METHOD OF MANUFACTURING DISPLAY APPARATUS - A display apparatus includes a gate electrode formed on a substrate as a portion of a gate line, a gate insulating film formed on the gate electrode, a semiconductor oxide layer formed on the gate insulating film, and a first insulating film formed to cover the semiconductor oxide layer. The display apparatus also includes a drain electrode connected to the semiconductor oxide layer through a first contact hole that is formed at the first insulating film, a second insulating film formed on the first insulating film, a third insulating film formed on the second insulating film, and a pixel electrode formed on the third insulating film. The pixel electrode is connected to the semiconductor oxide layer through a second contact hole that is formed on the semiconductor oxide layer. | 2014-06-05 |
| 20140151690 | SEMICONDUCTOR MATERIALS, TRANSISTORS INCLUDING THE SAME, AND ELECTRONIC DEVICES INCLUDING TRANSISTORS - According to example embodiments, a semiconductor material may include zinc, nitrogen, and fluorine. The semiconductor material may further include oxygen. The semiconductor material may include a compound. For example, the semiconductor material may include zinc fluorooxynitride. The semiconductor material may include zinc oxynitride containing fluorine. The semiconductor material may include zinc fluoronitride. The semiconductor material may be applied as a channel material of a thin film transistor (TFT). | 2014-06-05 |
| 20140151691 | SEMICONDUCTOR DEVICE - A semiconductor device in which deterioration of electrical characteristics which becomes more noticeable as the transistor is miniaturized can be suppressed is provided. The semiconductor device includes an oxide semiconductor stack in which a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer are stacked in this order from the substrate side over a substrate; a source electrode layer and a drain electrode layer which are in contact with the oxide semiconductor stack; a gate insulating film over the oxide semiconductor stack, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating film. The first oxide semiconductor layer includes a first region. The gate insulating film includes a second region. When the thickness of the first region is T | 2014-06-05 |
| 20140151692 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Disclosed is a semiconductor device including: an insulating layer; a source electrode and a drain electrode embedded in the insulating layer; an oxide semiconductor layer in contact and over the insulating layer, the source electrode, and the drain electrode; a gate insulating layer over and covering the oxide semiconductor layer; and a gate electrode over the gate insulating layer, where the upper surfaces of the insulating layer, the source electrode, and the drain electrode exist coplanarly. The upper surface of the insulating layer, which is in contact with the oxide semiconductor layer, has a root-mean-square (RMS) roughness of 1 nm or less, and the difference in height between the upper surface of the insulating layer and the upper surface of the source electrode or the drain electrode is less than 5 nm. This structure contributes to the suppression of defects of the semiconductor device and enables their miniaturization. | 2014-06-05 |
| 20140151693 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Disclosed is a semiconductor device including an insulating layer, a source electrode and a drain electrode embedded in the insulating layer, an oxide semiconductor layer in contact with the insulating layer, the source electrode, and the drain electrode, a gate insulating layer covering the oxide semiconductor layer, and a gate electrode over the gate insulating layer. The upper surface of the surface of the insulating layer, which is in contact with the oxide semiconductor layer, has a root-mean-square (RMS) roughness of 1 nm or less. There is a difference in height between an upper surface of the insulating layer and each of an upper surface of the source electrode and an upper surface of the drain electrode. The difference in height is preferably 5 nm or more. This structure contributes to the suppression of defects of the semiconductor device and enables their miniaturization. | 2014-06-05 |
| 20140151694 | METAL OXIDE TFT WITH IMPROVED SOURCE/DRAIN CONTACTS - A method of forming ohmic source/drain contacts in a metal oxide semiconductor thin film transistor includes providing a gate, a gate dielectric, a high carrier concentration metal oxide semiconductor active layer with a band gap and spaced apart source/drain metal contacts in a thin film transistor configuration. The spaced apart source/drain metal contacts define a channel region in the active layer. An oxidizing ambient is provided adjacent the channel region and the gate and the channel region are heated in the oxidizing ambient to reduce the carrier concentration in the channel area. Alternatively or in addition each of the source/drain contacts includes a very thin layer of low work function metal positioned on the metal oxide semiconductor active layer and a barrier layer of high work function metal is positioned on the low work function metal. | 2014-06-05 |
| 20140151695 | Semiconductor Device And Method For Manufacturing The Same - An object is to manufacture a semiconductor device with high reliability by providing the semiconductor device including an oxide semiconductor with stable electric characteristics. In a transistor including an oxide semiconductor layer, a gallium oxide film is used for a gate insulating layer and made in contact with an oxide semiconductor layer. Further, gallium oxide films are provided so as to sandwich the oxide semiconductor layer, whereby reliability is increased. Furthermore, the gate insulating layer may have a stacked structure of a gallium oxide film and a hafnium oxide film. | 2014-06-05 |
| 20140151696 | DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A conductive layer to be a gate electrode, an insulating layer to be a gate insulating layer, a semiconductor layer, and an insulating layer to be a channel protective layer, which are each included in a transistor, are successively formed without exposure to the air. A gate electrode (including another electrode or a wiring which is formed in the same layer) and an island-like semiconductor layer are formed through one photolithography step. A display device is manufactured through four photolithography steps including the photolithography step, a photolithography step of forming a contact hole, a photolithography step of forming a source electrode and a drain electrode (including another electrode or a wiring which is formed in the same layer), and a photolithography step of forming a pixel electrode (including another electrode or a wiring which are formed in the same layer). | 2014-06-05 |
| 20140151697 | Semiconductor Packages, Systems, and Methods of Formation Thereof - In accordance with an embodiment of the present invention, a semiconductor package includes a current rail comprising a first contact area and a second contact area, a first groove and a second groove, and a magnetic field generating portion. Along a current flow direction, the first groove is disposed between the first contact area and the magnetic field generating portion and the second groove is disposed between the magnetic field generating portion and the second contact area. The thickness of the current rail at the first groove is smaller than the thickness of the current rail at the first contact area. | 2014-06-05 |
| 20140151698 | Test Structures for Post-Passivation Interconnect - An integrated circuit structure includes a passivation layer, a polymer layer over the passivation layer, and a PPI monitor structure. The PPI monitor structure includes a portion overlying a portion of the polymer layer. The PPI monitor structure is electrically floating. | 2014-06-05 |
| 20140151699 | Test Structure Placement on a Semiconductor Wafer - A method of fabricating integrated circuit devices is provided. The method includes forming a plurality of spaced integrated circuit dies on a semiconductor wafer and forming a dedicated test die on the semiconductor wafer adjacent the plurality of spaced integrated circuit dies, the dedicated test die including a test structure having a first width when viewed in a top view and being operable to generate wafer evaluation data. Further, the method includes forming a scribe line region interposed between the plurality of spaced integrated circuit dies, the scribe line region having a second width defined by a distance between adjacent integrated circuit dies when viewed in a top view, the second width being smaller than the first width, and the scribe line region being free of test structures. | 2014-06-05 |
| 20140151700 | CHIP PACKAGE AND A METHOD FOR MANUFACTURING A CHIP PACKAGE - A chip package may include an interconnection layer having a first surface configured to face at least one chip, and a second surface opposite the first surface; at least one first pad and at least one second pad formed at at least one of the first surface and the second surface of the interconnection layer; at least one first conductive interconnect formed over the at least one first pad; and at least one second conductive interconnect formed over the at least one second pad, wherein a height of the at least one first conductive interconnect is less than a height of the at least one second conductive interconnect. | 2014-06-05 |
| 20140151701 | EMBEDDED CHIP PACKAGE, A CHIP PACKAGE, AND A METHOD FOR MANUFACTURING AN EMBEDDED CHIP PACKAGE - An embedded chip package is provided. The embedded chip package includes a plurality of chips; encapsulation material embedding the plurality of chips; at least one electrical redistribution layer electrically connected to the plurality of chips; and a common terminal connected to the at least one electrical redistribution layer, wherein the common terminal provides an interface to at least one of transmit and receive a common electrical signal between the plurality of chips and the common terminal. | 2014-06-05 |
| 20140151702 | SEMICONDUCTOR DEVICE HAVING CHIP CRACK DETECTION STRUCTURE - A semiconductor device includes a plurality of signal terminals on each of a plurality of vertically stacked semiconductor chips, each plurality of signal terminals connected to vertically aligned signal terminals of an adjacent semiconductor chip by through silicon vias, a common test terminal on each of the plurality of vertically stacked semiconductor chips connected to a vertically aligned common test terminal of an adjacent semiconductor chip by a through silicon via; a plurality of spiral test terminals on the plurality of vertically stacked semiconductor chips, each spiral test terminal connected to a non-vertically aligned spiral test terminal of an adjacent semiconductor chip by a through silicon via, and a conductive line arranged along a periphery of at least one of the plurality of vertically stacked semiconductor chips, the conductive line connected to a respective common test terminal and a respective spiral test terminal. | 2014-06-05 |
| 20140151703 | SEMICONDUCTOR DEVICE - A semiconductor device includes at least two semiconductor chips each including a plurality of data input/output pads, a data memory portion structured so as to read/write data through the plurality of data input/output pads, a test result input/output pad, and a test circuit for controlling a first test mode that decides data read from the data memory portion and outputs the decision from the test result input/output pad and a second test mode that decides data read from the data memory portion, inputs test result of another semiconductor chip from the test result input/output pad and outputs a synthesized test result of the test result of the chip itself and the test result of the other semiconductor chip from a specified part of the plurality of data input/output pads, and a plurality of data input/output terminals each connected with different data input/output pads. | 2014-06-05 |
| 20140151704 | Method, System, and Apparatus for Preparing Substrates and Bonding Semiconductor Layers to Substrates - Embodiments of preparing substrates for subsequent bonding with semiconductor layer are described herein. A substrate may be prepared with one or more chemicals or a sacrificial layer to limit or remove substrate contaminants and reduce substrate surface damage. Other embodiments may be described and claimed. | 2014-06-05 |
| 20140151705 | NANOWIRES, NANOWIRE FIELDE-EFFECT TRANSISTORS AND FABRICATION METHOD - A method is provided for fabricating a nanowire-based semiconductor structure. The method includes forming a first nanowire with a first polygon-shaped cross-section having a first number of sides. The method also includes forming a semiconductor layer on surface of the first nanowire to form a second nanowire with a second polygon-shaped cross-section having a second number of sides, the second number being greater than the first number. Further, the method includes annealing the second nanowire to remove a substantial number of vertexes of the second polygon-shaped cross-section to form the nanowire with a non-polygon-shaped cross-section corresponding to the second polygon-shaped cross-section. | 2014-06-05 |
| 20140151706 | STRUCTURES INCORPORATING SILICON NANOPARTICLE INKS, DENSIFIED SILICON MATERIALS FROM NANOPARTICLE SILICON DEPOSITS AND CORRESPONDING METHODS - Silicon nanoparticle inks provide a basis for the formation of desirable materials. Specifically, composites have been formed in thin layers comprising silicon nanoparticles embedded in an amorphous silicon matrix, which can be formed at relatively low temperatures. The composite material can be heated to form a nanocrystalline material having crystals that are non-rod shaped. The nanocrystalline material can have desirable electrical conductive properties, and the materials can be formed with a high dopant level. Also, nanocrystalline silicon pellets can be formed from silicon nanoparticles deposited form an ink in which the pellets can be relatively dense although less dense than bulk silicon. The pellets can be formed from the application of pressure and heat to a silicon nanoparticle layer. The materials described herein can be effectively used for the formation of doped contacts for crystalline silicon solar cells, thin film silicon solar cells, electronic devices, such as printed electronics, and other useful products. | 2014-06-05 |
| 20140151707 | LIGHT EMITTING DEVICE - The present invention provides a TFT that has a channel length particularly longer than that of an existing one, specifically, several tens to several hundreds times longer than that of the existing one, and thereby allowing turning to an on-state at a gate voltage particularly higher than the existing one and driving, and allowing having a low channel conductance gd. According to the present invention, not only the simple dispersion of on-current but also the normalized dispersion thereof can be reduced, and other than the reduction of the dispersion between the individual TFTs, the dispersion of the OLEDs themselves and the dispersion due to the deterioration of the OLED can be reduced. | 2014-06-05 |
| 20140151708 | THIN FILM TRANSISTOR, DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - A thin film transistor and a method of manufacturing the same, and a display device and a method of manufacturing the same are disclosed, in which the thin film transistor substrate comprises an active layer formed on a substrate; a gate electrode controlling electron transfer within the active layer; a source electrode connected with one end area of the active layer; a drain electrode connected with the other end area of the active layer; and a light-shielding layer formed under the active layer to shield light from entering the active layer. | 2014-06-05 |
| 20140151709 | DISPLAY PANEL AND PRODUCTION METHOD FOR SAME - Provided is a display panel having a plurality of pixels arranged in a matrix of rows and columns. Each of the pixels is composed of a plurality of first sub-pixels emitting light of different colors. Each of the first sub-pixels is composed of a plurality of second sub-pixels emitting light of the same color. Each of the second sub-pixels includes: a first electrode; a second electrode above the first electrode; and a light-emitting layer between the first electrode and the second electrode. | 2014-06-05 |
| 20140151710 | Stacked Gate Structure, Metal-Oxide-Semiconductor Including the Same, and Method for Manufacturing the Stacked Gate Structure - The invention provides a stacked gate structure and metal-oxide-semiconductor including the same, and method for manufacturing the stacked gate structure. The stacked gate structure comprises a substrate, a semiconductor layer positioned on the substrate, a gate dielectric positioned on the semiconductor layer, and a gate electrode layer positioned on the gate dielectric, which the gate dielectric comprises a composite oxide layer composed of lanthanum oxide (La | 2014-06-05 |
| 20140151711 | SEMICONDUCTOR LIGHT-EMITTING DEVICE - A semiconductor light-emitting device is provided. The semiconductor light-emitting device includes a buffer layer, a light-emitting layer, a first-conductivity semiconductor layer, a first light reflecting layer, a protective structure, and an adhesive layer. The first-conductivity semiconductor layer is disposed between the buffer layer and a first side of the light-emitting layer. The first light reflecting layer is disposed between the first-conductivity semiconductor layer and the buffer layer. The protective structure is disposed between the first reflecting layer and the buffer layer. The adhesive layer is disposed between the first-conductivity semiconductor layer and the protective structure. | 2014-06-05 |
| 20140151712 | ENHANCEMENT-MODE HIGH ELECTRON MOBILITY TRANSISTOR STRUCTURE AND METHOD OF MAKING SAME - An epitaxial structure, such as an enhancement-mode high electron mobility transistor (HEMT) includes a first barrier layer over an aluminum gallium nitride channel layer. The first barrier layer is formed at a first temperature and is overlaid by a second barrier layer formed at a second temperature that is lower than that of the first temperature. The first barrier layer acts as an etch stop when forming a gate recess in the second barrier layer by a wet or dry etching. | 2014-06-05 |
| 20140151713 | METHOD OF GROWING NITRIDE SEMICONDUCTOR LAYER, NITRIDE SEMICONDUCTOR DEVICE, AND METHOD OF FABRICATING THE SAME - Exemplary embodiments of the present invention provide a method of growing a nitride semiconductor layer including growing a gallium nitride-based defect dispersion suppressing layer on a gallium nitride substrate including non-defect regions and a defect region disposed between the non-defect regions, and growing a gallium nitride semiconductor layer on the defect dispersion suppressing layer. | 2014-06-05 |
| 20140151714 | GALLIUM NITRIDE SUBSTRATE AND METHOD FOR FABRICATING THE SAME - Exemplary embodiments of the present invention relate to a single-crystal substrate including a buffer layer including a nitride semiconductor, holes penetrating the buffer layer, and a single-crystal nitride semiconductor disposed on the buffer layer. | 2014-06-05 |
| 20140151715 | LIGHT EMITTING DIODE WITH NANOSTRUCTURED LAYER AND METHODS OF MAKING AND USING - A light emitting diode has a plurality of layers including at least two semiconductor layers. A first layer of the plurality of layers has a nanostructured surface which includes a quasi-periodic, anisotropic array of elongated ridge elements having a wave-ordered structure pattern, each ridge element having a wavelike cross-section and oriented substantially in a first direction. | 2014-06-05 |
| 20140151716 | PROCESS FOR THE MANUFACTURE OF A DOPED III-N BULK CRYSTAL AND A FREE-STANDING III-N SUBSTRATE, AND DOPED III-N BULK CRYSTAL AND FREE-STANDING III-N SUBSTRATE AS SUCH - A process for producing a doped III-N bulk crystal, wherein III denotes at least one element of the main group III of the periodic system, selected from Al, Ga and In, wherein the doped crystalline III-N layer or the doped III-N bulk crystal is deposited on a substrate or template in a reactor, and wherein the feeding of at least one dopant into the reactor is carried out in admixture with at least one group III material. In this manner, III-N bulk crystals and III-N single crystal substrates separated therefrom can be obtained with a very homogeneous distribution of dopants in the growth direction as well as in the growth plane perpendicular thereto, a very homogeneous distribution of charge carriers and/or of the specific electric resistivity in the growth direction as well as in the growth plane perpendicular thereto, and a very good crystal quality. | 2014-06-05 |
| 20140151717 | Packaged Vertical Power Device Comprising Compressive Stress and Method of Making a Packaged Vertical Power Device - A packaged vertical semiconductive device including a compressive stress and a method of making such a packaged vertical semiconductive device are disclosed. In one embodiment an assembled device includes a carrier, a connection layer disposed on the carrier, the connection layer having a first height, and a chip disposed on the connection layer, the chip having a second height, wherein the second height is smaller than the first height. | 2014-06-05 |
| 20140151718 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device according to the present invention includes a die pad, a semiconductor element joined to an upper surface of the die pad, and a resin sheet making close contact with a lower surface of the die pad, wherein the semiconductor element is resin-sealed together with the die pad and the resin sheet, wherein a recess is formed in the lower surface of the die pad, and a part of the resin sheet is filled into the recess bring the resin sheet into close contact with the lower surface of the die pad including an inside of the recess. | 2014-06-05 |
| 20140151719 | SILICON CARBIDE SEMICONDUCTOR ELEMENT - This silicon carbide semiconductor element includes: a body region of a second conductivity type which is located on a drift layer of a first conductivity type; an impurity region of the first conductivity type which is located on the body region; a trench which runs through the body region and the impurity region to reach the drift layer; a gate insulating film which is arranged on surfaces of the trench; and a gate electrode which is arranged on the gate insulating film. The surfaces of the trench include a first side surface and a second side surface which is opposed to the first side surface. The concentration of a dopant of the second conductivity type is higher at least locally in a portion of the body region which is located beside the first side surface than in another portion of the body region which is located beside the second side surface. | 2014-06-05 |
| 20140151720 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device adapted for being disposed on a substrate is provided. The semiconductor device includes a pixel electrode, a drain, a semiconductor channel layer, a source, a gate insulation layer and a side-gate. The pixel electrode is disposed on the substrate. The drain is disposed on the pixel electrode and exposes a portion of pixel electrode. The semiconductor channel layer is disposed on the drain. The source is disposed on the semiconductor channel layer. The gate insulation layer is disposed on the substrate, at least covers the source and surrounds the semiconductor channel layer. The side-gate is disposed on the gate insulation layer and extendedly covers the substrate along at least one side of the gate insulation layer. An extending direction of a portion of the side-gate is identical to a stacking direction of the drain, the semiconductor channel layer and the source. | 2014-06-05 |
| 20140151721 | PHASE TRANSITION COOLING IN LED LIGHTING DEVICES - A lighting device is provided comprising a chip-on-board (COB) light emitting diode (LED) light source, a phase transfer fluid disposed in a hermetically sealed phase transfer fluid chamber, a phase transfer fluid wicking structure, a distributed color conversion medium, and a glass containment plate. The color conversion medium is distributed in two dimensions over an emission field of the lighting device within the glass containment plate. The COB LED light source comprises a thermal heat sink framework and at least one LED and defines the hermetically sealed phase transfer fluid chamber in which the phase transfer fluid is disposed. The glass containment plate is positioned over the hermetically sealed phase transfer fluid chamber and contains the distributed color conversion medium. The phase transfer fluid wicking structure is transparent to at least a portion of the operating wavelength bandwidth of the LED and is configured within the hermetically sealed phase transfer fluid chamber to encourage transport of phase transfer fluid, permit vaporization of transported phase transfer fluid, and receive condensed phase transfer fluid vapor. | 2014-06-05 |
| 20140151722 | LIGHT EMITTING DIODE (LED) LIGHT SOURCE DEVICE HAVING UNIFORM ILLUMINATION - An LED light source device includes a printed circuit board (PCB) and a plurality of LED light sources located on the PCB and electrically connected with the PCB. The plurality of LED light sources are arranged symmetrically relative to a center point of the PCB, and a distance between every adjacent two LED light sources decreases along a direction away from the center point of the PCB. An optical lens is located over the LED light sources for diverging light from a central one of the LED light sources. | 2014-06-05 |
| 20140151723 | PIXEL ARRAY - A pixel array includes multiple scan lines, multiple gate lines, multiple data lines and multiple pixel structures. The scan lines are disposed on a substrate. The gate lines intersect with the scan lines to demarcate multiple first unit regions and multiple second unit regions. Each gate line electrically connects to one of the scan lines. The data lines intersect with the scan lines and pass through the first unit regions. Each data line is located between two adjacent gate lines. The pixel structures are disposed on the first unit regions. Each pixel structure includes an active device and a pixel electrode. The active device is driven by one corresponding scan line and connects with one corresponding data line. An orthographic projection of each pixel electrode on the substrate is non-overlapped with or incompletely overlapped with an orthographic projection of the corresponding gate lines on the substrate. | 2014-06-05 |
| 20140151724 | Method for Producing an Optoelectronic Semiconductor Component and Such a Semiconductor Component - A method for producing a semiconductor component is disclosed. A carrier substrate includes a mounting region and an opening, which is formed in the mounting region of the carrier substrate. After mounting a semiconductor chip, an electrically insulating layer is applied to the carrier substrate in such a way that the electrically insulating layer completely fills the first opening in the carrier substrate. A second opening is formed in the electrically insulating layer. An electrically conductive layer is then applied to the electrically insulating layer in such a way that the second opening is filled with the electrically conductive layer in the form of a via. A semiconductor component produced in this way is also provided. | 2014-06-05 |
| 20140151725 | Method and Apparatus for Fabricating Phosphor-Coated LED Dies - The present disclosure involves a method of packaging a light-emitting diode (LED). According to the method, a group of metal pads and a group of LEDs are provided. The group of LEDs is attached to the group of metal pads, for example through a bonding process. After the LEDs are attached to the metal pads, each LED is spaced apart from adjacent LEDs. Also according to the method, a phosphor film is coated around the group of LEDs collectively. The phosphor film is coated on top and side surfaces of each LED and between adjacent LEDs. A dicing process is then performed to slice through portions of the phosphor film located between adjacent LEDs. The dicing process divides the group of LEDs into a plurality of individual phosphor-coated LEDs. | 2014-06-05 |
| 20140151726 | LIGHT EMITTING MODULE - There are provided a light emitting module including a luminescent material layer ( | 2014-06-05 |
| 20140151727 | STRUCTURE OF LED LIGHT COLOR MIXING CIRCUIT - The present invention provides a structure of color mixing circuit of LED light. The LED light includes two input terminals and two output terminals. The two input terminals are respectively an input terminal of reverse parallel connection of any two light-emitting chips of three primary-color light-emitting chips of R, G, B and an anode input terminal of the remaining light-emitting chip and the two output terminals are respectively an output terminal of reverse parallel connection of any two light-emitting chips of the three primary-color light-emitting chips of R, G, B and a cathode output terminal of the remaining light-emitting chip. The structure is simple and the purposes of reducing the number of IC control chips and synchronous color change of light-emitting chips are achieved with modification only made on electrical connection among the three primary-color light-emitting chips in realizing operation of a group of LED lights connected in series. | 2014-06-05 |
| 20140151728 | LED WITH IMPROVED INJECTION EFFICIENCY - A light emitting device and method for making the same is disclosed. The light-emitting device includes an active layer sandwiched between a p-type semiconductor layer and an n-type semiconductor layer. The active layer emits light when holes from the p-type semiconductor layer combine with electrons from the n-type semiconductor layer therein. The active layer includes a number of sub-layers and has a plurality of pits in which the side surfaces of a plurality of the sub-layers are in contact with the p-type semiconductor material such that holes from the p-type semiconductor material are injected into those sub-layers through the exposed side surfaces without passing through another sub-layer. The pits can be formed by utilizing dislocations in the n-type semiconductor layer and etching the active layer using an etching atmosphere in the same chamber used to deposit the semiconductor layers without removing the partially fabricated device. | 2014-06-05 |
| 20140151729 | LED LIGHTING DEVICES WITH QUANTUM DOT GLASS CONTAINMENT PLATES - A lighting device is provided comprising a chip-on-board (COB) light emitting diode (LED) light source, a light source encapsulant, a quantum dot distributed color conversion medium, and a quantum dot glass containment plate. The COB LED light source comprises at least one LED and defines a light source encapsulant cavity in which the light source encapsulant is distributed over the LED. The quantum dot glass containment plate is positioned over the light source encapsulant cavity and contains a quantum dot distributed color conversion medium. The distributed color conversion medium comprises a quantum dot structure and is distributed in two dimensions over an emission field of the lighting device within the quantum dot glass containment plate. | 2014-06-05 |
| 20140151730 | LED Packaging Construction and Manufacturing Method Thereof - LED packaging construction includes a substrate, a cavernous construction, a LED, and a reflection layer. The substrate is daubed with an insulation layer and a circuit layer on a surface on the substrate, wherein the substrate is made of metal, and the insulation layer is disposed between the circuit layer and the substrate. The cavernous construction is disposed on the substrate and surrounds the LED, and is formed by disposing a photoresist layer and patterning the photoresist layer. The circuit layer electrically connects the LED through a conducting wire. The reflection layer is at least disposed on a first surface of the cavernous construction, wherein the first surface surrounds the LED and faces toward the LED, and a part of light emitted from the LED is reflected by the reflection layer. | 2014-06-05 |
| 20140151731 | PHOTON CONVERSION STRUCTURES, DEVICES FOR LIGHT EMITTING DEVICES - The disclosure herein provides photon conversion, extraction and distribution structures, devices, and methods for light emitting devices. The structures, devices, and methods described herein can improve the efficiency and/or light distribution of light emitting devices. | 2014-06-05 |
| 20140151732 | BLUE LIGHT-EMITTING PHOSPHOR AND LIGHT-EMITTING DEVICE USING SAME - A blue light-emitting Eu-activated silicate phosphor having a constitutional formula of Sr | 2014-06-05 |
| 20140151733 | LAYERED PRODUCT FOR FINE PATTERN FORMATION AND METHOD OF MANUFACTURING LAYERED PRODUCT FOR FINE PATTERN FORMATION - Disclosed is a layered product for fine pattern formation and a method of manufacturing the layered product for fine pattern formation, capable of easily forming a fine pattern having a thin or no remaining film in order to form a fine pattern having a high aspect ratio on a processing object. The layered product for fine pattern formation (1) of the present invention used to form a fine pattern ( | 2014-06-05 |
| 20140151734 | LIGHT-EMITTING DEVICE AND METHOD FOR MANUFACTURING SAME - A light-emitting device includes: a substrate; a light-emitting element mounted on the substrate, with a surface opposite to a light-emitting surface facing the substrate; a first resin encapsulant which covers the light-emitting element such that at least part of the light-emitting surface is exposed; and a second resin encapsulant provided on and in contact with the first resin encapsulant and the light-emitting surface. The first resin encapsulant contains a light reflective material. The second resin encapsulant has a function of converting first light emitted by the light-emitting element into second light of different wavelength, and a function of mixing the first light and the second light. | 2014-06-05 |
| 20140151735 | LATERAL SEMICONDUCTOR LIGHT EMITTING DIODES HAVING LARGE AREA CONTACTS - Light emitting diodes include a diode region having first and second opposing faces that include therein an n-type layer and a p-type layer, an anode contact that ohmically contacts the p-type layer and extends on the first face, and a cathode contact that ohmically contacts the n-type layer and also extends on the first face. The anode and cathode contacts extend on the first face to collectively cover substantially all of the first face. A small gap may be provided between the contacts. | 2014-06-05 |
| 20140151736 | HIGH-POWER WHITE LEDS - A light emitting apparatus has a radiation source for emitting short wavelength radiation. A down conversion material receives and down converts at least some of the short wavelength radiation emitted by the radiation source and back transfers a portion of the received and down converted radiation. An optic device adjacent the down conversion material at least partially surrounds the radiation source. The optic device is configured to extract at least some of the back transferred radiation. A sealant substantially seals a space between the radiation source and the optic device. | 2014-06-05 |
| 20140151737 | LIGHT EMITTING DEVICE - A light emitting device includes an electrically conductive member provided with a reflective film; a light emitting element mounted on the reflective film; and a protective film continuously covering a surface of the light emitting element and a surface of the reflective film. A thickness of the protective film on the reflective film in a vicinity of the light emitting element is substantially equal to a thickness of the protective film on the reflective film in the region except for the vicinity of the light emitting element. | 2014-06-05 |
| 20140151738 | ROUGHENED HIGH REFRACTIVE INDEX LAYER/LED FOR HIGH LIGHT EXTRACTION - A light emitting diode (LED) includes a p-type layer of material, an n-type layer of material and an active layer between the p-type layer and the n-type layer. A roughened layer of transparent material is adjacent one of the p-type layer of material and the n-type layer of material. The roughened layer of transparent material has a refractive index close to or substantially the same as the refractive index of the material adjacent the layer of transparent material, and may be a transparent oxide material or a transparent conducting material. An additional layer of conductive material may be between the roughened layer and the n-type or p-type layer. | 2014-06-05 |
| 20140151739 | OPTICAL SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, an optical semiconductor device includes a light emitting layer, a transparent layer, a first metal post, a second metal post and a sealing layer. The light emitting layer includes a first and a second major surface, a first and a second electrode. The second major surface is a surface opposite to the first major surface, and the first electrode and second electrodes are formed on the second major surface. The transparent layer is provided on the first major surface. The first metal post is provided on the first electrode. The second metal post is provided on the second electrode. The sealing layer is provided on the second major surface. The sealing layer covers a side surface of the light emitting layer and seals the first and second metal posts while leaving end portions of the first and second metal posts exposed. | 2014-06-05 |
| 20140151740 | Micro-Structure Phosphor Coating - An optical emitter includes micro-structure phosphor coating on a light-emitting diode die mounted on a package substrate. The micro-structures are transferred onto a micro-structure phosphor coating precursor by patterning and curing the precursor or by curing the precursor through a mold. The micro-structures are half spheroids, three-sided pyramids, or six-sided pyramids. | 2014-06-05 |
| 20140151741 | Semiconductor Construction, Semiconductor Unit, and Manufacturing Method Thereof - A semiconductor structure and its manufacturing method including multiple steps are provided. First, a patterned circuit board having a substrate and a patterned circuit layer is provided. The substrate includes a first surface, a second surface, at least one connecting channel, and at least one conductive through hole, wherein patterned circuit layer is disposed on the first surface, a second surface, and the inside wall of the conductive through hole. Then, the patterned circuit board is disposed on a carrier, and the patterned circuit layer disposed on one of the first surface and the second surface is touched with the carrier. Then, a filling process is applied. A filling material flows to the conductive through hole via the first surface or the second surface from the connecting channel. Then, a package material is provided to produce a semiconductor structure. | 2014-06-05 |
| 20140151742 | GLASS SEALING WITH TRANSPARENT MATERIALS HAVING TRANSIENT ABSORPTION PROPERTIES - Transparent glass-to-glass hermetic seals are formed by providing a low melting temperature sealing glass along a sealing interface between two glass substrates and irradiating the interface with laser radiation. Absorption by the sealing glass and induced transient absorption by the glass substrates along the sealing interface causes localized heating and melting of both the sealing glass layer and the substrate materials, which results in the formation of a glass-to-glass weld. Due to the transient absorption by the substrate material, the sealed region is transparent upon cooling. | 2014-06-05 |
| 20140151743 | ELECTROSTATIC DISCHARGE PROTECTION DEVICE - An electrostatic discharge protection device may include a first conductivity type well, a second conductivity well; a first doping region and a second doping region which are formed in the first conductivity type well and have different conductivity types from each other; a third doping region and a fourth doping region which are formed in the second conductivity type well and have different conductivity types from each other; and a fifth doping region formed in the second conductivity type well between the first and second doping regions and the third and fourth doping regions. | 2014-06-05 |
| 20140151744 | POWER SEMICONDUCTOR DEVICES - A power semiconductor device may comprise: a lower structure; a solder layer on the lower structure; a semiconductor structure on the solder layer; a contact layer on the semiconductor structure; a pad layer on the contact layer; and/or a wire between the pad layer and the lower structure. The solder layer may be electrically connected to a first electrode of the semiconductor structure. | 2014-06-05 |
| 20140151745 | ELECTROSTATIC DISCHARGE PROTECTIVE DEVICE - An electrostatic discharge (ESD) protection device is provided. A proper trigger voltage is determined by providing an ESD doped injection layer into a PNPN structure and adjusting the injection energy and dosage of the ESD doped injection layer; a proper holding voltage is obtained by adjusting the size of the ESD doped injection layer, thus preventing the latch-up. The self-isolation effect of the electrostatic discharge protection device is formed on the basis of an epitaxial wafer high voltage process or a silicon-on-insulator (SOI) wafer high voltage process, the ESD protective device of the present invention can prevent the device from being falsely triggered due to noise interference. Compared with other known ESD protection devices, the device has the same electrostatic protection ability, much smaller area, and much lower cost. | 2014-06-05 |
| 20140151746 | FINFET DEVICE WITH ISOLATED CHANNEL - Despite improvements in FinFETs and strained silicon devices, transistors continue to suffer performance degradation as device dimensions shrink. These include, in particular, leakage of charge between the semiconducting channel and the substrate. An isolated channel FinFET device prevents channel-to-substrate leakage by inserting an insulating layer between the channel (fin) and the substrate. The insulating layer isolates the fin from the substrate both physically and electrically. To form the isolated FinFET device, an array of bi-layer fins can be grown epitaxially from the silicon surface, between nitride columns that provide localized insulation between adjacent fins. Then, the lower fin layer can be removed, while leaving the upper fin layer, thus yielding an interdigitated array of nitride columns and semiconducting fins suspended above the silicon surface. A resulting gap underneath the upper fin layer can then be filled in with oxide to isolate the array of fin channels from the substrate. | 2014-06-05 |
| 20140151747 | HIGH ELECTRON MOBILITY TRANSISTOR INCLUDING PLURALITY OF GATE ELECTRODES - According to example embodiments, a high electron mobility transistor includes: a channel layer including a first semiconductor material; a channel supply layer on the channel layer and configured to generate a 2-dimensional electron gas (2DEG) in the channel layer, the channel supply layer including a second semiconductor material; source and drain electrodes spaced apart from each other on the channel layer, and an upper surface of the channel supply layer defining a gate electrode receiving part; a first gate electrode; and at least one second gate electrode spaced apart from the first gate electrode and in the gate electrode receiving part. The first gate electrode may be in the gate electrode receiving part and between the source electrode and the drain electrode. The at least one second gate electrode may be between the source electrode and the first gate electrode. | 2014-06-05 |
| 20140151748 | COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME - The compound semiconductor device includes a first-compound-semiconductor-layer, a second-compound-semiconductor-layer formed on an upper side of the first-compound-semiconductor-layer and having a band gap larger than the band gap of the first-compound-semiconductor-layer, a p-type third-compound-semiconductor-layer formed on an upper side of the second-compound-semiconductor-layer, an electrode formed on an upper side of the second-compound-semiconductor-layer through the third-compound-semiconductor-layer, a fourth-compound-semiconductor-layer formed so as to be in contact with the third-compound-semiconductor-layer at an upper side of the second-compound-semiconductor-layer and having a band gap smaller than the band gap of the second-compound-semiconductor-layer, and a fifth-compound-semiconductor-layer formed so as to be in contact with the third-compound-semiconductor-layer at an upper side of the fourth-compound-semiconductor-layer and having a band gap larger than the band gap of the fourth-compound-semiconductor-layer. | 2014-06-05 |
| 20140151749 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - According to example embodiments, a high electron mobility transistor (HEMT) includes a channel layer; a channel supply layer on the channel layer; a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer; a gate electrode on a part of the channel supply layer between the source electrode and the drain electrode; a first depletion-forming layer between the gate electrode and the channel supply layer; and a at least one second depletion-forming layer on the channel supply layer between the gate electrode and the drain electrode. The at least one second depletion-forming layer is electrically connected to the source electrode. | 2014-06-05 |
| 20140151750 | HETEROJUNCTION BIPOLAR TRANSISTOR - Structures and methods of making a heterojunction bipolar transistor (HBT) device that include: an n-type collector region disposed within a crystalline silicon layer; a p-type intrinsic base comprising a boron-doped silicon germanium crystal that is disposed on a top surface of an underlying crystalline Si layer, which is bounded by shallow trench isolators (STIs), and that forms angled facets on interfaces of the underlying crystalline Si layer with the shallow trench isolators (STIs); a Ge-rich, crystalline silicon germanium layer that is disposed on the angled facets and not on a top surface of the p-type intrinsic base; and an n-type crystalline emitter disposed on a top surface and not on the angled lateral facets of the p-type intrinsic base. | 2014-06-05 |
| 20140151751 | DENSITY GRADIENT CELL ARRAY - One or more techniques or systems for mitigating density gradients between two or more regions of cells are provided herein. In some embodiments, an array of cells is associated with a dummy region. For example, the array of cells includes an array of gates and an array of OD regions. In some embodiments, the array of gates includes a first set of gates associated with a first gate dimension and a second set of gates associated with a second gate dimension. In some embodiments, the array of OD regions includes a first set of OD regions associated with a first OD dimension and a second set of OD regions associated with a second OD dimension. In this manner, at least one of a pattern density, gate density, or OD density is customized to a region associated with active cells, thus mitigating density gradients between respective regions. | 2014-06-05 |
| 20140151752 | ACCESSING OR INTERCONNECTING INTEGRATED CIRCUITS - Multiple integrated circuits (ICs) die, from different wafers, can be picked-and-placed, front-side planarized using a vacuum applied to a planarizing disk, and attached to each other or a substrate. The streets between the IC die can be filled, and certain techniques or fixtures allow application of monolithic semiconductor wafer processing for interconnecting different die. High density I/O connections between different IC die can be obtained using structures and techniques for aligning vias to I/O structures, and programmably routing IC I/O lines to appropriate vias. Existing IC die can be retrofitted for such interconnection to other IC die, such as by using similar techniques or tools. | 2014-06-05 |
| 20140151753 | SOLID-STATE IMAGING APPARATUS, MANUFACTURING METHOD THEREOF, AND ELECTRONIC INFORMATION DEVICE - The solid-state imaging apparatus | 2014-06-05 |
| 20140151754 | SOLID-STATE IMAGE PICKUP DEVICE AND METHOD OF MANUFACTURING SAME - A solid-state image pickup device including: a photoelectric conversion section configured to convert incident light into a signal charge; a transfer transistor configured to read the signal charge from the photoelectric conversion section and transfer the signal charge; and an amplifying transistor configured to amplify the signal charge read by the transfer transistor, wherein a compressive stress film having a compressive stress is formed on the amplifying transistor. | 2014-06-05 |
