23rd week of 2015 patent applcation highlights part 57 |
Patent application number | Title | Published |
20150155794 | Short Circuit Protection - A method and apparatus are provided for short circuit protection in a DC current source. A rectifying circuit arranged to generate a DC output can coupled to an AC source and a capacitor filter circuit can be provided to smooth the DC output. A short circuit detection unit can also be provided for monitoring at least one voltage across the capacitor filter circuit and generating a fault signal. A controller can then limit current through the capacitor filter circuit when the fault signal implies that the monitored voltage has fallen below a threshold value. | 2015-06-04 |
20150155795 | METHOD AND DEVICE FOR CONTROLLING AN INVERTER - The invention relates to a method ( | 2015-06-04 |
20150155796 | INTERLOCKING DEVICE AND THREE-PHASE INTERLOCKING DEVICE FOR DC TO AC CONVERTER - The disclosure provides an interlocking device and a three-phase interlocking device for a DC to AC converter (DAC). The interlocking device includes a first interlocking circuit and a second interlocking circuit. The first interlocking circuit couples with a first switch and a second switch, controls whether to conduct the first switch according to the logic levels of a first signal, a second signal and a third signal, and controls whether to conduct the second switch according to the logic levels of the first signal and the second signal. The second interlocking circuit couples with a third switch and a fourth switch, controls whether to conduct the third switch according to the logic levels of the first signal, the third signal and a fourth signal, and controls whether to turn on the fourth switch according to the logic levels of the third signal and the fourth signal. | 2015-06-04 |
20150155797 | POWER SEMICONDUCTOR DEVICE - The purpose of the present invention is to reduce variance of a voltage to be applied between the terminals of each of the power semiconductor elements, and to improve lifetime of the power semiconductor elements and reliability of the power semiconductor device. In order to achieve the purpose, in this power semiconductor device, which is provided with three or more power semiconductor elements that are aligned and mounted on a metal wire, and another metal wire different from the metal wire, one terminal of each of the power semiconductor elements being connected to the wire and another one terminal thereof being connected to the other wire, the resistance value of the metal wire in a region where the power semiconductor elements are mounted is higher in the downstream side than that in the upstream side in the electric current flowing direction. | 2015-06-04 |
20150155798 | VIBRATION TYPE ACTUATOR, VIBRATOR, AND VIBRATOR MANUFACTURING METHOD - A vibration type actuator providing a satisfactory actuator performance even when an increase in speed is achieved and having a contact spring. The actuator includes a vibrator equipped with an electrical-mechanical energy conversion element, an elastic member to which the electrical-mechanical energy conversion element is fixed, and a protrusion provided on the elastic member. The vibrator can generate an elliptic movement in the protrusion. A driven body is configured to come into contact with the protrusion and to make a relative movement with respect to the vibrator. The protrusion includes a contact portion having a contact surface contacting the driven body, a continuous side wall portion protruding with respect to one end surface of the elastic member and forming a hollow structure, and a connection portion connecting the contact portion and the side wall portion and exhibiting flexibility in a direction normal to the contact surface. | 2015-06-04 |
20150155799 | WOBBLE MOTOR WITH A SOLID STATE ACTUATOR - An wobble motor with an actuator extending in a Z direction between opposite mount and tool ends and comprising two sections offset in that Z direction. Each section comprises a structure of electrodes interleaved in a piezoelectric material in such a way that a Y-region can cause deflection in a Y-direction perpendicular to the Z-direction upon energising of associated electrodes and such that a X-region can cause deflection in an X-direction perpendicular to the Y and Z directions upon energising of associated electrodes. | 2015-06-04 |
20150155800 | ACOUSTIC MECHANICAL FEED-THROUGHS FOR PRODUCING WORK ACROSS A STRUCTURE - An apparatus that passes vibrational energy across a mechanical structure lacking a perforation. The disclosed apparatus and method provide the ability to transfer work (rotary or linear motion) across pressure or thermal barriers or in a sterile environment without generating contaminants; the presence of reflectors in the solid barrier to enhance the efficiency of the energy/power transmission, and the ability to produce a bi-directional driving mechanism using a plurality of different mode resonances, such as a fundamental frequency resonance and a higher frequency resonance. In some instances, a plane within the mechanical structure lacking a perforation is a nodal plane of the vibrational energy field. | 2015-06-04 |
20150155801 | Multiple Induction Electric Motor And Vehicle - A novel multiple induction electric motor system that separately produces synchronized variable frequency alternating current control signals and using multiple induction electric motors, produces synchronized rotating magnetic fields responsive to the control signals, induces magnetic fields around a conductor in inductive rotors responsive to the rotating magnetic fields, and applies rotational forces between the rotating magnetic fields and the induced magnetic fields to a common shaft of the multiple motors. The common shaft sums the rotational forces and transmits the rotational forces to a drive wheel. Such a system can be implemented using two, three or more synchronized induction electric motors, and respective elements thereof, wherein the stator and rotor laminations can be arranged, stacked and/or otherwise configured such that the multiple induction electric motors operate at lower temperatures and at higher efficiencies. | 2015-06-04 |
20150155802 | Control Device for Rotating Electrical Machine, and Rotating Electrical Machine Drive System Including Control Device - A control device ( | 2015-06-04 |
20150155803 | MOTOR CONTROL APPARATUS - A motor control apparatus includes a by-wire control circuit for sequentially switching an energized phase of a motor. The by-wire control circuit pre-stores a first table defining an energized phase address corresponding to each address and a second table defining an energized phase corresponding to each energized phase address. When receiving a drive permission code from a second control circuit, the by-wire control circuit switches the energized phase in a correct order of driving the motor, by calculating an address for access to the first table based on the drive permission code, calculating an energized phase address corresponding to the address by referring to the first table, and determining the energized phase corresponding to the energized phase address by referring to the second table. | 2015-06-04 |
20150155804 | MOTOR DRIVING DEVICE - A motor driving device includes an inverter circuit having switching elements; and a control device controlling the switching of the switching elements. The control device sets a carrier frequency to f1 when a two-phase modulation scheme is selected, and sets the carrier frequency to f0, which is half of the carrier frequency f1, when a three-phase modulation scheme is selected. Thereby, the frequency of the secondary component of a current flowing in a filter circuit of when selecting the three-phase modulation scheme may be deviated from the resonance frequency of the filter circuit. Accordingly, the current ripple generated in the filter circuit may be reduced even when selectively switching the modulation scheme for the PWM modulation among a plurality of modulation schemes. | 2015-06-04 |
20150155805 | Electric Motor Drive Device - An electric motor drive device | 2015-06-04 |
20150155806 | Motor Control Device - A motor control device capable of executing a start mode that takes into consideration both the start performance with respect to a residual load and the life of a drive circuit is provided. A motor control device for executing a start mode in which a rotor is rotated by forced commutation control: stores a current value at the time when a stop command to a synchronous motor is issued; and decides, when a start command to the synchronous motor is issued after the issuance of the stop command, a target current value based on the stored current value in the start mode in response to the start command. | 2015-06-04 |
20150155807 | AUTO CALIBRATION DRIVER IC AND ITS APPLICATION MOTOR DRIVER SYSTEM - A motor driver IC with auto calibration function is provided, the motor driver IC utilizes a Hall sensor of a switched sensor circuit to detect the changes in an external magnetic field. By using the compensation current which is generated by the automatic calibration circuit to correct the unexpected offset existed in the Hall sensor of the sensing unit itself to zero so that the sensing unit can sense the changes in the external magnetic field accurately and can point out the rotor position correctly, and the motor can be further driven to commutate relatively to reduce the motor rotation noise to achieve good output performance of the motor rotation and the better motor driving system stability. | 2015-06-04 |
20150155808 | FAN SIMULATION CIRCUIT - A fan simulation circuit includes a connector, a voltage converter, a control chip, and a selecting module. The connector is used to output a speed signal. A power pin of the voltage converter is connected to a first voltage input terminal An output pin of the voltage converter is connected to a speed pin of the connector through a first resistor. The output pin is also connected to a second voltage input terminal through the first resistor and a second resistor in that order. The selecting module is used to output high or low-level signals to the control chip. The control chip outputs different speed signals to an input pin of the voltage converter. The voltage converter converts the speed signals and outputs converted speed signals to the speed pin of the connector. | 2015-06-04 |
20150155809 | METHOD OF OPERATING A WIND TURBINE AS WELL AS A SYSTEM SUITABLE THEREOF - A method of operating a wind turbine is provided. The wind turbine comprises a turbine rotor with at least one blade having a variable pitch angle, a power generator, and a power converter connected to the power generator via a first circuit breaker and to a power grid via a second circuit breaker. According to the method, overvoltage events at the power grid are monitored. If an overvoltage event is detected, the method comprises opening the first circuit breaker and the second circuit breaker, disabling active operation of the power converter, connecting a power dissipating unit to the power generator to dissipate power output from the power generator, and moving the pitch angle of the at least one blade towards a feathered position. | 2015-06-04 |
20150155810 | ROTARY ELECTRIC MACHINE CONTROL SYSTEM AND ROTARY ELECTRIC MACHINE CONTROL METHOD - A rotary electric machine control system includes a control device that controls a rotary electric machine. When there is a current phase at which a reluctance torque is maximum between a first current phase (θ1) of a first current vector (I | 2015-06-04 |
20150155811 | METHOD FOR CONTROLLING A POWER TRAIN AND CORRESPONDING SYSTEM - A method for controlling a power train and corresponding system. A method for controlling a power train equipping a motor vehicle and comprising an electric motor provided with a rotor and a stator, said method comprising the regulation of the currents of the rotor and the stator delivering control signals to the electric motor, said currents to be regulated and said control signals being expressed in a rotating reference system and comprising a plurality of axes. The method includes a measurement of the values of the currents of the rotor and the stator, a transformation of said measurements into said rotating reference system, a determination of minimum and maximum limits for each of the currents on the basis of said control signals, and a comparison of the measured signals with said minimum and maximum limits. | 2015-06-04 |
20150155812 | METHOD AND APPARATUS FOR CONTROLLING AN ELECTRICALLY-POWERED TORQUE MACHINE OF A POWERTRAIN SYSTEM - A method for controlling an electrically-powered torque machine of a powertrain system includes determining a predicted torque command to control the torque machine. A flux command is determined responsive to the predicted torque command. The flux command is a flux level providing a fast torque reserve that is responsive to the predicted torque command. The fast torque reserve is a prescribed minimum rate of change in torque output from the torque machine responsive to the predicted torque command. An inverter controller controls flux of the torque machine responsive to the flux command. | 2015-06-04 |
20150155813 | MOTOR DRIVING APPARATUS AND MOTOR DRIVING METHOD - A motor driving apparatus having a protection function for protecting an inverter or a controller from a back electromotive voltage may include: a driving unit including at least one inverter arm switching driving power to drive a motor; a first switching unit forming a transfer path through which a back electromotive voltage from the motor is transferred to a charging unit; and a second switching unit including at least one switch positioned between a driving line of the driving unit and the motor and turned on and off at a preset interval to decrease a voltage level of the back electromotive voltage from the motor. | 2015-06-04 |
20150155814 | VIBRATION GENERATING DEVICE - The vibration generating device comprises a first member which has a first contact part and a second member which has a second contact part arranged spaced apart from the first member; a tilt support member which supports the second member so as to be able to tilt with respect to the first member; and a vibration generating member which is fixed to the first member or the second member. When the first member or the second member tilts such that the first contact part makes contact with the second contact part, the vibration generating member vibrates differently depending on the direction in which the first member or the second member tilts. | 2015-06-04 |
20150155815 | APPARATUS FOR CONTROLLING INDUCTION MOTOR - An apparatus for controlling an induction machine is disclosed, wherein a magnitude of a current outputted to the induction machine to an inverter is determined by the apparatus to determine a voltage amount that compensates the command voltage in response to the magnitude of the current, and a voltage compensation amount is added to a command voltage determined from a voltage-frequency relationship according to a relevant voltage compensation amount to output a final command voltage. | 2015-06-04 |
20150155816 | VEHICLE-MOUNTED MOTOR DRIVING CONTROL BOARD - An object of the present invention is to achieve reductions in size and costs of a vehicle-mounted motor driving control board in a configuration which allows the redundancy of a power supply to be ensured. The vehicle-mounted motor driving control board is formed by one printed circuit board on which are formed two inverter driving circuits for driving two inverter circuits for three-phase motors, and a voltage step-up/step-down driving circuit for driving a voltage step-up/step-down circuit for supplying electric power to the inverter circuits. The vehicle-mounted motor driving control board further includes a first power supply circuit for supplying electric power to part of constituent circuits constituting the voltage step-up/step-down driving circuit and the two inverter driving circuits, and a second power supply circuit for supplying electric power to the remainder of the constituent circuits in the voltage step-up/step-down driving circuit and the two inverter driving circuits. | 2015-06-04 |
20150155817 | CIRCUIT ARRANGEMENT AND OPERATING METHOD - A circuit arrangement ( | 2015-06-04 |
20150155818 | SOLAR POWER GENERATION SYSTEM, CONTROL DEVICE USED FOR SOLAR POWER GENERATION SYSTEM, AND CONTROL METHOD AND PROGRAM FOR SAME - In a light power generation system, a control device, a control method, and a program, efficient power can be supplied. The maximum power detection unit operates a MOSFET in a power converter circuit and open-circuits both ends of a solar cell panel in the maximum power detection mode. After that, the maximum power detection unit short-circuits both ends of the solar cell panel, detects a maximum power by monitoring the output power of the solar cell panel during a period from the open state to the short-circuited state, and defines the voltage of the solar cell panel as an optimal voltage when detecting the maximum power. In a tracking operation mode, the control unit performs PWM control with respect to the MOSFET by defining the optimal voltage to be a reference signal. Operations are repeated between the maximum power detection mode and the tracking operation mode. | 2015-06-04 |
20150155819 | HOLE-THRU-LAMINATE MOUNTING SUPPORTS FOR PHOTOVOLTAIC MODULES - A mounting support for a photovoltaic module is described. The mounting support includes a pedestal having a surface adaptable to receive a flat side of a photovoltaic module laminate. A hole is disposed in the pedestal, the hole adaptable to receive a bolt or a pin used to couple the pedestal to the flat side of the photovoltaic module laminate. | 2015-06-04 |
20150155820 | PIVOT-FIT CONNECTION APPARATUS, SYSTEM, AND METHOD FOR PHOTOVOLTAIC MODULES - A system and method are disclosed for quickly and easily assembling PV modules into a PV array in a sturdy and durable manner. In examples of the present technology, the system includes various couplings having a first engaging portion adapted to engage a first PV module and a second engaging portion adapted to engage a second PV module. At least one of the engaging portions allows variable positioning of the engaged PV module along the engaging portion. | 2015-06-04 |
20150155821 | PIVOT-FIT CONNECTION APPARATUS, SYSTEM, AND METHOD FOR PHOTOVOLTAIC MODULES - A system and method are disclosed for quickly and easily assembling PV modules into a PV array in a sturdy and durable manner. In examples of the present technology, the system includes various couplings having a first engaging portion adapted to engage a first PV module and a second engaging portion adapted to engage a second PV module. At least one of the engaging portions allows variable positioning of the engaged PV module along the engaging portion. | 2015-06-04 |
20150155822 | IMPROVED FLEXIBLE HIGH MODULUS PHOTOVOLTAIC BUILDING SHEATHING MEMBER - The present invention: is premised upon an improved photovoltaic building sheathing member (“PV device”), more particularly to a flexible high modulus photovoltaic building sheathing member, the member comprising: a flexible photovoltaie eel! assembly, a body portion comprised of a body material and connected to a peripheral edge segment of the photovoltaic cell assembly, wherein; the body portion has a cross-sectional area of at least 35 mm | 2015-06-04 |
20150155823 | CONNECTING COMPONENTS FOR PHOTOVOLTAIC ARRAYS - The invention includes an apparatus for mounting a photovoltaic (PV) module on a structure where the apparatus includes a base portion, a stud portion, and a coupling portion. The coupling portion includes a male portion that acts as a spring under load and a clip portion that penetrates the PV module frame to create a grounding bond. The apparatus includes a lower jaw, shaped to pry open a groove, and a key portion that can compress to allow for tolerances. The invention further includes a clip with one or more tabs and one or more teeth. The invention further includes a replacement roof tile which includes a support structure with a horizontal flange, a vertical component, a horizontal component, a flashing with an upper surface and a lower surface, and a tile-shaped metal surface having a curvilinear shape that reflects the shapes of adjacent tiles. | 2015-06-04 |
20150155824 | METHOD FOR MANUFACTURING SOLAR CELL AND SOLAR CELL MADE THEREBY - A method for manufacturing a solar cell including a solar cell panel having a light receiving surface and an optical film formed on the light receiving surface includes providing a solar cell panel comprising a light receiving surface, preparing a coating solution comprising a birefringent material having a relative refraction index of about 1.05 to about 2.5, a transparent adhesive, and an organic solvent, coating the light receiving surface with the coating solution, thereby forming a liquid layer of the coating solution on the light receiving surface, and curing the liquid layer to form an optical film on the light receiving surface. Light-absorbing efficiencies of the solar cell under non-zero light incident angles on the light receiving surface are increased. | 2015-06-04 |
20150155825 | Distributed Power Harvesting Systems Using DC Power Sources - A distributed power harvesting system including multiple direct current (DC) power sources with respective DC outputs adapted for interconnection into a interconnected DC power source output. A converter includes input terminals adapted for coupling to the interconnected DC power source output. A circuit loop sets the voltage and current at the input terminals of the converter according to predetermined criteria. A power conversion portion converts the power received at the input terminals to an output power at the output terminals. A power supplier is coupled to the output terminals. The power supplier includes a control part for maintaining the input to the power supplier at a predetermined value. The control part maintains the input voltage and/or input current to the power supplier at a predetermined value. | 2015-06-04 |
20150155826 | SYSTEM AND METHOD OF COOLING OF PHOTOVOLTAIC PANEL AND METHOD OF INSTALLATION OF SYSTEM - A heat is taken from a photovoltaic panel ( | 2015-06-04 |
20150155827 | SOLAR POWER SYSTEMS - A solar power system ( | 2015-06-04 |
20150155828 | SOLAR CELL MEASURING APPARATUS - Discussed is a solar cell measuring apparatus to measure a current of a solar cell having a photoelectric converter and first and second electrodes electrically insulated from each other, both the first and second electrodes being located at one surface of the photoelectric converter. The solar cell measuring apparatus includes a measuring unit which includes a first measuring member corresponding to the first electrode and a second measuring member corresponding to the second electrode, wherein the first and second measuring members comes into close contact with the solar cell at the surface of the photoelectric converter to measure the current of the solar cell. | 2015-06-04 |
20150155829 | METHOD AND APPARATUS FOR TESTING PHOTOVOLTAIC MODULES - A method and an apparatus for testing photovoltaic modules are provided, wherein power that a photovoltaic module outputs or draws is modulated a modulating frequency, the photovoltaic module is scanned using a camera and the camera signal generated by the camera is evaluated in order to obtain a luminescence image of the photovoltaic module which is used for detecting defects on the photovoltaic module. The photovoltaic module is operated only in the forward direction and the camera signal is evaluated using a digital filter, such as a lock-in filter. | 2015-06-04 |
20150155830 | MULTIPLE-STATE, SWITCH-MODE POWER AMPLIFIER SYSTEMS AND METHODS OF THEIR OPERATION - An embodiment of an amplifier includes N (N>1) switch-mode power amplifier (SMPA) branches. Each SMPA branch includes two drive signal inputs and one SMPA branch output. A module coupled to the amplifier samples an input RF signal, and produces combinations of drive signals based on the samples. When an SMPA branch receives a first combination of drive signals, it produces an output signal at one voltage level. Conversely, when the SMPA branch receives a different second combination of drive signals, it produces the output signal at another voltage level. At least two of the SMPA branches produce output signals having different absolute magnitudes. A combiner combines the output signals from all of the SMPA branches to produce a combined output signal that may have, at any given time, one of 2*N+1 quantization states. | 2015-06-04 |
20150155831 | RF AMPLIFIER OPERATIONAL IN DIFFERENT POWER MODES - Embodiments of a radio frequency (RF) amplification are disclosed. The RF amplification device includes a first RF amplification circuit, a second RF amplification circuit, and power control circuitry operable in a first power mode and a second power mode. The first RF amplification circuit has a cascode amplifier stage configured to amplify an RF signal. The cascode amplifier stage has an input transistor and a cascode output transistor that are stacked in cascode. The second RF amplification circuit is configured to amplify the RF signal. The power control circuitry is configured to bias the first cascode output transistor so that the first cascode output transistor operates in a saturation region in the first power mode and bias the first cascode output transistor so that the first cascode output transistor operates in a triode region in the second power mode. The second RF amplification circuit is assisted without introducing additional loading. | 2015-06-04 |
20150155832 | POWER AMPLIFIER AND TRANSMITTER - A power amplifier includes a first amplifier unit, a second amplifier unit, a first switching element, a second switching element and a third switching element. Each of the amplifier units includes a power supply terminal, a ground terminal, an input terminal, and an output terminal, and amplifies a signal received at the input terminal according to a voltage between the power supply terminal and the ground terminal, and outputs the signal from the output terminal. The first switching element is connected between the ground terminal of the first amplifier unit and the power supply terminal of the second amplifier unit. The second switching element is connected between the ground terminal of the first amplifier unit and a first reference voltage terminal. The third switching element is connected between the power supply terminal of the second amplifier unit and a second reference voltage terminal. | 2015-06-04 |
20150155833 | SIGNAL AMPLIFIER WITH ACTIVE POWER MANAGEMENT - A system for amplifying a signal with active power management according to one embodiment includes a first digital to analog converter (DAC) circuit configured to provide a modulated carrier signal; a amplifier circuit coupled to the first DAC, where the amplifier circuit is configured to amplify the modulated carrier signal; an output stage circuit coupled to the amplifier circuit, where the output stage circuit is configured to provide the amplified signal to a network; a second DAC circuit configured to provide a full wave rectified envelope of the modulated carrier signal; and a switching regulator circuit including a voltage reference input coupled to the second DAC circuit, where the switching regulator circuit is configured to provide a supply voltage to the output stage circuit and the supply voltage is modulated in response to the envelope received at the voltage reference input. | 2015-06-04 |
20150155834 | APPARATUS AND METHODS FOR CALIBRATING ENVELOPE TRACKERS - Apparatus and methods for envelope tracking calibration are provided. In one embodiment, a power amplifier system includes a power amplifier, an envelope tracker that generates the power amplifier's supply voltage, a power detector, and a calibration module. The envelope tracker includes an envelope shaping table generated at a desired gain compression and a scaling module that scales an amplitude of an envelope signal. The power detector measures the power amplifier's output power, and the calibration module provides calibration data to the scaling module to change the scaling of the envelope signal's amplitude. The calibration module sets the calibration data to a first value corresponding to a supply voltage level associated with substantially no gain compression, and reduces the supply voltage level by changing the calibration data until the power detector indicates that the gain compression of the power amplifier is about equal to the desired gain compression. | 2015-06-04 |
20150155835 | Reduced Power Amplifier Load Impact for Open Loop Envelope Tracking - A method for implementing envelope tracking (ET), the method comprising switching from a receiver (Rx) radio frequency (RF) path to a supply sensing path during factory calibration, sensing the power amplifier (PA)'s supply voltage via the supply sensing path, comparing the PA's supply voltage to a corresponding reference supply voltage, determining the difference between the PA's supply voltage and the corresponding reference supply voltage, and updating one or more parameters used to perform a PA load pre-distortion during factory calibration, wherein the PA load pre-distortion is used to match the PA's supply voltage to the corresponding reference supply voltage. | 2015-06-04 |
20150155836 | Nonlinear Load Pre-Distortion for Open Loop Envelope Tracking - An apparatus for providing envelope tracking (ET), comprising: a power amplifier (PA) load variation pre-distortion, and an open loop ET modulator operatively coupled to the PA load variation pre-distortion, wherein the PA load variation pre-distortion is configured to determine a load variation at a PA supply voltage path based on an input signal received by a PA, and generate a pre-distortion compensation signal using the load variation, and wherein the open loop ET modulator is configured to generate a PA supply voltage on the PA supply voltage path using the pre-distortion compensation signal. | 2015-06-04 |
20150155837 | AMPLIFIER, TRANSMITTER, AND AMPLIFICATION METHOD - An amplifier includes an increase unit, a generator, a decrease unit, an adder, and an amplification unit. The increase unit increases a rate of an input signal and samples the input signal. The generator generates a predistorter signal for compensating for distortion occurring due to amplification of the input signal, from the input signal whose rate is increased by the increase unit. The decrease unit configured to decrease a rate of the predistorter signal generated by the generator to the rate before being increased by the increase unit. The adder adds the predistorter signal whose rate is decreased by the decrease unit to the input signal before the rate is increased. The amplification unit configured to amplify the input signal to which the predistorter signal is added by the adder. | 2015-06-04 |
20150155838 | AMPLIFIER WITH ADJUSTABLE LOAD - A device includes a Doherty amplifier having a carrier path and a peaking path. The Doherty amplifier includes a carrier amplifier configured to amplify a signal received from the carrier path and a peaking amplifier configured to amplify a signal received from the peaking path. The device includes a variable impedance coupled to an output of the Doherty amplifier, and a controller configured to set the variable impedance to a first impedance when an output power level of the Doherty amplifier is less than a threshold and to a second impedance when the output power level of the Doherty amplifier is above the threshold. | 2015-06-04 |
20150155839 | Reducing Crosstalk and Matched Output Power Audio Amplfiers - A multi-channel Class D audio amplifier is provided to substantially reduce channel-to-channel crosstalk by employing in each channel a local triangle ramp generator controlled by a single global digital timing signal. The noise critical timing/integrating capacitor for the triangle ramp generator resides locally in each channel and adjacent to the PWM comparator of that channel and referenced to the local ground of that channel. The amplifier can also include a duty cycle limitation circuit to limit output power availability depending on the impedance of any attached loads (speakers). | 2015-06-04 |
20150155840 | MULTIPLE-STATE, SWITCH-MODE POWER AMPLIFIER SYSTEMS AND METHODS OF THEIR OPERATION - An embodiment of an amplifier includes N (N>1) switch-mode power amplifier (SMPA) branches. Each SMPA branch includes two drive signal inputs and one SMPA branch output. A module coupled to the amplifier samples an input RF signal, and produces combinations of drive signals based on the samples. When an SMPA branch receives a first combination of drive signals, it produces an output signal at a first voltage level. Conversely, when the SMPA branch receives a different second combination of drive signals, it produces the output signal at a different second voltage level. Finally, when the SMPA branch receives a different third combination of drive signals, it produces the output signal at a voltage level of substantially zero. A combiner combines the output signals from all of the SMPA branches to produce a combined output signal that may have, at any given time, one of 2*N+1 quantization states. | 2015-06-04 |
20150155841 | Two-Stage Operational Amplifier in Class AB - The invention relates to a two-stage operational amplifier ( | 2015-06-04 |
20150155842 | METHOD, APPARATUS, AND SYSTEM FOR ANALYSIS, EVALUATION, MEASUREMENT AND CONTROL OF AUDIO DYNAMICS PROCESSING - A method, apparatus, and system for measuring and analyzing the effects of dynamics modifying processors on a signal. This new approach utilizes statistical analysis techniques to provide a direct comparison and evaluation between the processed signal and the unprocessed signal's dynamic characteristics. The method identifies and quantifies Effective Dynamic Range, Clip Tolerance, Lower Limit Tolerance, Crest Factor, and Diminuendo Factor, using either peak or r.m.s values. In an alternative embodiment, the invention allows for user adjustment and control of the relative relationship of Crest Factor and Diminuendo Factor, which the user may perceive as loudness. | 2015-06-04 |
20150155843 | AMPLIFYING SYSTEM - An amplifying system with increased linearity is disclosed. The amplifying system includes a first gain stage with a first gain characteristic, a second gain stage with a second gain characteristic, and bias circuitry configured to substantially maintain alignment of distortion inflection points between the first gain characteristic and the second gain characteristic during operation. The bias circuitry is configured to further maintain alignment of the distortion inflection points between the first gain characteristic and the second gain characteristic over design corners by providing substantially constant headroom between quiescent bias voltage and turnoff of the first gain stage and the second gain stage. In some embodiments the first gain characteristic is expansive and the second gain characteristic is compressive. In other embodiments the first gain characteristic is compressive and the second gain characteristic is expansive. In some embodiments the first gain stage is configured to provide RF degeneration control of gain. | 2015-06-04 |
20150155844 | BAND PASS FILTER CIRCUIT AND MULTILAYER BAND PASS FILTER - A band pass filter circuit includes an input terminal, an output terminal, a signal line, and a plurality of main LC parallel resonators. First ends of the plurality of main LC parallel resonators are connected to the signal line, and second ends of the plurality of main LC parallel resonators are connected to one another. At least one attenuation-pole-defining sub LC parallel resonator including an inductor and a capacitor is inserted between a ground and the connected second ends of the plurality of main LC parallel resonators. | 2015-06-04 |
20150155845 | STRUCTURAL BODY AND WIRING BOARD - A second conductor plane ( | 2015-06-04 |
20150155846 | APPARATUS AND METHODS FOR WIRELESS COMMUNICATION - An apparatus comprising: a first resonant circuit configured to have an impedance at a first operational frequency band to impedance match a first radiator to radio circuitry, and to have an impedance at a second operational frequency band to impedance match a second radiator to the radio circuitry; a second resonant circuit configured to have an impedance at the first operational frequency band to impedance match the first radiator to the radio circuitry, and to have an impedance at the second operational frequency band to impedance match the second radiator to the radio circuitry; and a third resonant circuit configured to have an impedance at the first operational frequency band to impedance match the first radiator to the radio circuitry, and to have an impedance at the second operational frequency band to impedance match the second radiator to the radio circuitry. | 2015-06-04 |
20150155847 | IMPEDANCE-MATCHING DEVICE - The invention relates to an impedance-matching device comprising a circuit consisting of a plane substrate ( | 2015-06-04 |
20150155848 | HIGH-FREQUENCY DEVICE AND DIRECTIONAL COUPLER - A high-frequency device includes a substrate including a plurality of layers that are stacked on top of one another and that include dielectric and magnetic layers, terminals, pattern conductors each formed on one layer, and via conductors each extending through one layer. The pattern conductors and via conductors connect the terminals and form a signal line that transmits a high-frequency signal. A first portion of the signal line includes a via conductor extending through one magnetic layer and/or a pattern conductor sandwiched between two magnetic layers and has a predetermined resistance to the high-frequency signal. A second portion of the signal line includes a capacitor formed of two pattern electrodes with at least one dielectric layer and no magnetic layers sandwiched there between and/or an inductor including a pattern conductor formed on a dielectric layer. The high-frequency device has an impedance to the high-frequency signal at the terminals. | 2015-06-04 |
20150155849 | SURFACE MOUNTING QUARTZ CRYSTAL UNIT AND METHOD OF FABRICATING THE SAME - A surface mounting quartz crystal unit includes a ceramic substrate, a holding terminal, a metal cover, a signal line terminal and a ground terminal, and a metal layer. The holding terminal holds a crystal resonator on the substrate. The metal cover is arranged to cover the crystal resonator. The signal line terminal and a ground terminal are formed on a rear surface of the substrate. The metal layer bonds the substrate to the metal cover at a part on a front surface of the substrate. The part is in contact with the metal cover. The substrate has a first through via inside the substrate. The first through via connects the holding terminal to the signal line terminal. The substrate has a through conductor at the substrate. The through conductor connects the metal layer to the ground terminal. | 2015-06-04 |
20150155850 | ELASTIC WAVE FILTER DEVICE AND DUPLEXER - In an elastic wave filter device, an elastic wave filter element chip is mounted on a board. In the elastic wave filter element chip, a ladder filter including a plurality of series arm resonators and a plurality of parallel arm resonators are provided. In/on the board, a first inductor connected in parallel to the series arm resonator and a second inductor connected between the parallel arm resonators P | 2015-06-04 |
20150155851 | ACOUSTIC WAVE ELEMENT - An acoustic wave element includes: a piezoelectric substrate; an IDT (Interdigital Transducer) formed on the piezoelectric substrate; and an end face of the piezoelectric substrate that is formed on at least one end of the IDT in a propagation direction of an acoustic wave; wherein when a wavelength of the acoustic wave which the IDT excites is expressed by “λ” and a metallization ratio of the IDT is expressed by “D”, a distance between an inner end of an electrode finger of the IDT nearest to the end face and the end face is equal to or more than 7λ/16+D×λ/4 and equal to or less than 3λ/4+Dλ/4. | 2015-06-04 |
20150155852 | FILTER USING BAWRS - Provided is a filter using bulk acoustic wave resonators (BAWRs), the filter comprising two or more BAWRs connected in series or in parallel to each other, one or more LC elements being connected in series or in parallel to the respective BAWRs, thus constituting a BAWR set. | 2015-06-04 |
20150155853 | SURFACE ACOUSTIC WAVE FILTER - A surface acoustic wave filter includes a piezoelectric substrate, a lower-layer wiring line, an upper-layer wiring line, and an interlayer insulating film. The lower-layer wiring line is disposed on the piezoelectric substrate. The upper-layer wiring line crosses the lower-layer wiring line. The upper-layer wiring line has a potential that is different from the potential of the lower-layer wiring line. The interlayer insulating film is disposed between the lower-layer wiring line and the upper-layer wiring line. The interlayer insulating film has a portion that has a width that is not greater than the width of the upper-layer wiring line in a cross-sectional view taken along a direction in which the lower-layer wiring line extends. | 2015-06-04 |
20150155854 | SEMICONDUCTOR CIRCUIT - There is a need to provide a technology that shortens a time period from a point to start an external power supply for a microcontroller to a point to start operating a logic circuit. A stable voltage supply circuit of a semiconductor circuit accepts an external power supply VCC and supplies a VDD line with one of a power supply voltage to cause a stable output voltage and a power supply voltage to cause an unstable output voltage and fast start. At startup, the semiconductor circuit accepts an external power supply. The semiconductor circuit raises a power supply voltage to cause a stable output voltage and supplies a logic portion initialization circuit with an unstable power supply voltage to fast start, and initializes a VDD operation circuit. When the output voltage is stabilized, the semiconductor circuit changes a power supply voltage supplied to the VDD line and starts operating the VDD operation circuit. | 2015-06-04 |
20150155855 | APPARATUSES AND METHODS FOR DUTY CYCLE ADJUSTMENTS - Apparatuses and methods have been disclosed. One such apparatus includes a plurality of gates coupled together in series. A first pull-down circuit can be coupled to a node between two adjacent gates of the plurality of gates and controlled responsive to a first control signal. A second pull-down circuit can be coupled to an output of one of the gates and controlled responsive to a second control signal. A duty cycle of a signal provided by the plurality of gates can be increased responsive to the first control signal and can be decreased responsive to the second control signal. The plurality of gates and the first and second pull-down circuits can make up a duty cycle adjuster circuit that can adjust the duty cycle of the signal by adjusting only a single type of edges of the signal. | 2015-06-04 |
20150155856 | CIRCUITRY AND METHOD FOR OPERATING SUCH CIRCUITRY - A circuitry is suggested, in particular a power switch, comprising a first electronic switch with an isolated gate; a second electronic switch with an isolated gate; a measuring device for determining a charge at the isolated gate of the first electronic switch and at the isolated gate of the second electronic switch; an energy supply for providing charge to the isolated gate of the first electronic switch and to the isolated gate of the second electronic switch based on the charge determined by the measuring device; a logic unit for activating either the first electronic switch, both or none of the electronic switches. | 2015-06-04 |
20150155857 | FLIP-FLOP CIRCUIT AND SEMICONDUCTOR APPARATUS USING THE SAME - A flip-flop circuit may include: a latch unit configured to latch an input signal in response to a clock signal; and a timing control unit configured to delay a signal provided from the latch unit by a predetermined time regardless of the clock signal. | 2015-06-04 |
20150155858 | BIPOLAR TRANSISTOR FREQUENCY DOUBLERS AT MILLIMETER-WAVE FREQUENCIES - Methods for frequency multiplying include receiving a signal having an input frequency at a frequency multiplier comprising a pair of transistors; and selecting a harmonic in the signal by connecting the transistors to a common impedance through a respective collector impedance, wherein an output frequency at the harmonic between the collector impedances and the common impedance is an even integer multiple of an input frequency. | 2015-06-04 |
20150155859 | COMPARATOR CIRCUIT HAVING A CALIBRATION CIRCUIT - A comparator circuit includes a comparator, a first selection circuit, and a switched-capacitor circuit. The comparator has a first terminal, a second terminal, and an output terminal. The comparator is configured to generate an output signal at the output terminal based on a first signal on the first terminal and a second signal on the second terminal. The first selection circuit is coupled with the first terminal of the comparator and configured to selectively set a first input signal or a first calibration signal as the first signal in response to a control signal. The switched-capacitor circuit is coupled with the output terminal and the second terminal of the comparator. The switched-capacitor circuit is configured to adjust and output the second signal based on the output signal. | 2015-06-04 |
20150155860 | CLAMPING CIRCUIT, POWER SUPPLY DEVICE INCLUDING THE SAME AND DRIVING METHOD OF POWER SUPPLY DEVICE - A power supply includes a power switch and a switch control circuit controlling a switching operation of the power switch using a comparison voltage generated according to an output, determining a clamping voltage by sensing an input voltage during a start-up period, and clamping the comparison voltage to the clamping voltage during the start-up period. | 2015-06-04 |
20150155861 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM INCLUDING THE SAME - A semiconductor device includes a first pad suitable for receiving a first clock that is inputted from an exterior, a second pad suitable for receiving a second clock that is inputted from the exterior, a differential clock recognition unit suitable for recognizing between the first clock and the second clock as a positive clock of differential clocks and recognizing the other as a negative clock of the differential clocks in response to a mirror function signal which represents whether a mirror function is enabled or not, an output unit suitable for outputting an internal signal as an output signal in response to the differential clocks and controlling an output moment of the output signal in response to the mirror function signal and an output moment control signal, and a third pad suitable for supplying the output signal to the exterior. | 2015-06-04 |
20150155862 | SWITCHING DEVICE DRIVING APPARATUS - A switching device driving apparatus for preventing arm short circuit is provided, including: a first switching device driving unit for receiving a control signal for controlling a first switching device and a second switching device so that they will not turn ON at the same time and outputting an ON/OFF drive signal to the first switching device; and a second switching device driving unit for receiving the control signal and outputting an ON/OFF drive signal to the second switching device, in which the first switching device driving unit outputs a drive signal for increasing the delay of the ON timing of the first switching device with respect to the OFF timing of the second switching device with increase in ambient temperature. | 2015-06-04 |
20150155863 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus includes a switching device, a voltage detection circuit, a switch circuit, and a control circuit. The voltage detection circuit outputs a detection voltage according to a voltage applied between the first and second terminals of the switching device. The switch circuit is provided in series with a gate drive wire connected to the gate terminal of the switching device and switches between a high impedance state and a low impedance state according to a control signal. The control circuit outputs the control signal to put the switch circuit into the low impedance state when the detection voltage is not greater than a predetermined threshold voltage and outputs the control signal to put the switch circuit into the high impedance state when the detection voltage is greater than the threshold voltage. | 2015-06-04 |
20150155864 | SEMICONDUCTOR DEVICE - A semiconductor device includes a switching unit that is provided on a substrate and controls selection of a high-frequency signal, a low-frequency circuit that is provided on the substrate and processes signals having a frequency lower than that of the switching unit, a first ground portion connected to a ground node of the low-frequency circuit, a ground conductor provided on the substrate, connected to the first ground portion at a first connection position, and connected to the ground node of the switching unit at a second connection position, and a second ground portion connected to the ground conductor, the second ground portion being closer to the second connection position than the first connection position. | 2015-06-04 |
20150155865 | DRIVING CIRCUIT AND DRIVING METHOD - The present technology relates to a driving circuit and a driving method, in which power loss at the time of switching an FET (Field Effect Transistor) can be reduced with a simple circuit configuration. | 2015-06-04 |
20150155866 | LOW POWER DIE - A functional circuit includes at least one silicon on insulator (SOI) transistor and at least one output terminal. A biasing circuit controls an operational voltage supplied to the functional circuit. The biasing circuit disables the at least one output terminal by controlling a reverse body bias voltage supplied to reverse body bias the at least one SOI transistor. | 2015-06-04 |
20150155867 | ADAPTIVE BUS TERMINATION APPARATUS AND METHODS - Termination impedance of a digital signal bus is adaptively selected as a function of a present or anticipated state of the bus. A variable termination resistor is arranged in series between a termination switch and a common voltage node at the termination end of each bus conductor. Information regarding the current or anticipated bus state is received from an external device such as a bus controller or may be derived by sensing activity on the bus. For example, clock frequency detection logic coupled to clock lines of the bus senses the current operational speed of the bus. A highest-value termination resistance predetermined to be consistent with reliable bus operation under conditions of the current or anticipated bus state is selected for each bus conductor. A bus conductor termination may be taken to a high impedance state by opening the associated termination switch. Decreased average bus power consumption may result. | 2015-06-04 |
20150155868 | INTELLIGENT CURRENT DRIVE FOR BUS LINES - An intelligent current drive is disclosed that couples an active current source to a bus line to increase the rate of pull-up and decouples the active current source from the bus line prior to reaching the desired pull-up voltage. | 2015-06-04 |
20150155869 | SEMICONDUCTOR APPARATUS AND REDUCED CURRENT AND POWER CONSUMPTION - A semiconductor apparatus may include a mode control circuit configured to output differential output signals which swing in a current mode logic (CML) area and a first control signal, in response to a power-down mode signal; a first circuit unit configured to be provided with the differential output signals, and operate in a power-down mode; and a second circuit unit configured to be provided with the differential output signals, and be interrupted in its operation in the power-down mode. | 2015-06-04 |
20150155870 | LOW POWER CLOCK GATING CIRCUIT - A clock gating circuit for generating a clock enable signal with respect to a clock input signal and a logic enable signal includes: a first plurality of transistors coupled in series between a power supply and ground, for receiving at least the logic enable signal and generating a first output; a second plurality of transistor coupled in series between the power supply and ground, for receiving at least the first output and generating a second output; a third plurality of transistors coupled in series between the power supply and ground, for receiving at least the second output and an inverted second output; and an AND gate circuit, for receiving the second output and generating the clock enable signal. | 2015-06-04 |
20150155871 | PRE-DRIVER AND POWER CIRCUIT INCLUDING THE SAME - Disclosed are a pre-driver having a modified circuit for gate pulse modulation and a power circuit including the same. The pre-driver includes a level shifter that outputs pulses having a phase difference and a gate pulse modulator that performs gate pulse modulation. The gate pulse modulator outputs a modulated gate pulse obtained by modulating a pulse by a reference voltage, and has a structure in which the number of switches provided therein is reduced. | 2015-06-04 |
20150155872 | SEMICONDUCTOR DEVICE AND COMMUNICATION INTERFACE CIRCUIT - A communication interface circuit includes a register and a register setting circuit. The register holds a data value for controlling characteristics of an electronic circuit element included in the communication interface circuit. The register setting circuit changes a wire connection state on the basis of a control signal. The register setting circuit inputs a variable data value to the register to detect the data value corresponding to the characteristics of the electronic circuit element in a first wire connection state, and sets the data value detected in the first wire connection state in the register on the basis of a fixed value in a second wire connection state. A control circuit outputs the above control signal. | 2015-06-04 |
20150155873 | INPUT BUFFER WITH CURRENT CONTROL MECHANISM - An input buffer includes a first driving circuit, a second driving circuit, a pull up circuit, and a pull down circuit. The first driving circuit is arranged for driving a first input signal to generate an output signal. The second driving circuit is arranged for driving the output signal. The pull up circuit is arranged for selectively controlling the second driving circuit to pull up the output signal according to the first input signal and a second input signal. The pull down circuit is arranged for selectively controlling the second driving circuit to pull down the output signal according to the first input signal and the second input signal. | 2015-06-04 |
20150155874 | CAPACITIVE COUPLING, ASYNCHRONOUS ELECTRONIC LEVEL SHIFTER CIRCUIT - An asynchronous level shifter electronic circuit including: a transmitter, which can be coupled to a first voltage and generates a communication signal; a receiver, which can be coupled to a second voltage; and a capacitive coupling stage, which receives the communication signal and supplies a corresponding filtered signal to the receiver. The receiver includes: a threshold device, which has an input terminal and an output terminal and switches an electrical quantity on the output terminal between a first value and a second value, as a function of corresponding transitions through a threshold of a first intermediate signal present on the input terminal, to generate a second intermediate signal; and a biasing circuit, which generates the first intermediate signal to have a d.c. component, which is a function of the second intermediate signal, and superposed on which is a variable component, which is a function of the filtered signal. | 2015-06-04 |
20150155875 | LVDS DRIVER - An LVDS driver is provided that includes a plurality of differential signal generators configured to generate a differential signal to transmit the generated differential signal to a plurality of LVDS receivers through a transmission line. A slew rate of the differential signal is controlled for each output of the differential signal. | 2015-06-04 |
20150155876 | DIE-STACKED MEMORY DEVICE WITH RECONFIGURABLE LOGIC - A die-stacked memory device incorporates a reconfigurable logic device to provide implementation flexibility in performing various data manipulation operations and other memory operations that use data stored in the die-stacked memory device or that result in data that is to be stored in the die-stacked memory device. One or more configuration files representing corresponding logic configurations for the reconfigurable logic device can be stored in a configuration store at the die-stacked memory device, and a configuration controller can program a reconfigurable logic fabric of the reconfigurable logic device using a selected one of the configuration files. Due to the integration of the logic dies and the memory dies, the reconfigurable logic device can perform various data manipulation operations with higher bandwidth and lower latency and power consumption compared to devices external to the die-stacked memory device. | 2015-06-04 |
20150155877 | PHASE LOCK LOOP DEVICE WITH CORRECTING FUNCTION OF LOOP BANDWIDTH AND METHOD THEREOF - A phase lock loop (PLL) device with correcting function of loop bandwidth and method thereof is related to the method including generating an output signal by a PLL circuit according to a reference signal and a feedback signal, modulating a feedback coefficient to unlock the feedback signal and the reference signal, detecting two valid crossovers of a phase difference between the reference signal and the feedback signal, calculating an oscillation frequency according to the two valid crossovers, and setting a control parameter of the PLL circuit according to the oscillation frequency. The feedback signal is related to the output signal, and there is the feedback coefficient between the feedback signal and the output signal. | 2015-06-04 |
20150155878 | STOCHASTIC ENCODING IN ANALOG TO DIGITAL CONVERSION - A method and system for encoding an analog signal on a stochastic signal, the encoded signal then converted to a digital signal by an analog to digital converter, the analog to digital converter thereafter decoding from the encoded signal a digital signal, which corresponds to the analog signal. The stochastic signal may be a noise signal shaped to a Gaussian normal curve. An encoding process is performed by a multiplication circuit, which multiplies the stochastic signal by the analog signal, producing a product signal for an analog to digital conversion. During analog to digital conversion, the product signal is decoded. The decoding is performed using an arithmetic operation, which may be a Root Sum Square function or a Root Means Square function. The decoded signal is then mapped to account for offset error, gain error, and endpoint adjustment. The result is a decoded digital signal corresponding to the analog signal. | 2015-06-04 |
20150155879 | SEMICONDUCTOR INTEGRATED CIRCUIT AND IMAGE SENSOR CIRCUIT - The semiconductor integrated circuit includes a first converting circuit that receives the input analog signal, analog-to-digital converts the input analog signal and outputs a resulting first digital signal. The semiconductor integrated circuit includes an amplifier circuit that receives a reference analog signal, which is obtained by the first converting circuit digital-to-analog converting the first digital signal, and the input analog signal and outputs an amplified signal responsive to the difference between the reference analog signal and the input analog signal. The semiconductor integrated circuit includes a second converting circuit that analog-to-digital converts the amplified signal and outputs a resulting second digital signal. The semiconductor integrated circuit includes an output circuit that outputs an output signal obtained by a calculation of the first digital signal and the second digital signal. | 2015-06-04 |
20150155880 | INTEGRATED CIRCUITS, LIQUID CRYSTAL DISPLAY (LCD) DRIVERS, AND SYSTEMS - An integrated circuit includes a digital-to-analog converter (DAC) circuit including at least one first channel type digital-to-analog converter (DAC) and at least one second channel type DAC. The integrated circuit further includes a plurality of sample and hold (S/H) circuits, each of the plurality of S/H circuits being coupled with a single DAC of the DAC circuit. A number of the at least one first channel type DAC is different than a number of the at least one second channel type DAC. | 2015-06-04 |
20150155881 | Radio Frequency Circuit - A digital-to-analog conversion circuit operates by selectively charging or discharging members of a plurality of capacitors. Charging of the capacitors occurs during a reset period while digital-to-analog conversion occurs as the capacitors are discharged. Those capacitors that are charged or discharged are selected from the plurality of capacitors based on a digital input. The analog output includes the charge discharged from the selected capacitors. | 2015-06-04 |
20150155882 | CODING METHOD, DECODING METHOD, CODER, AND DECODER - A coding method, a decoding method, a coder, and a decoder are disclosed herein. A coding method includes: obtaining the pulse distribution, on a track, of the pulses to be encoded on the track; determining a distribution identifier for identifying the pulse distribution according to the pulse distribution; and generating a coding index that includes the distribution identifier. A decoding method includes: receiving a coding index; obtaining a distribution identifier from the coding index, wherein the distribution identifier is configured to identify the pulse distribution, on a track, of the pulses to be encoded on the track; determining the pulse distribution, on a track, of all the pulses to be encoded on the track according to the distribution identifier; and reconstructing the pulse order on the track according to the pulse distribution. | 2015-06-04 |
20150155883 | PERFORMING A CYCLIC REDUNDANCY CHECKSUM OPERATION RESPONSIVE TO A USER-LEVEL INSTRUCTION - In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a user-level instruction for the checksum operation. For example, a cyclic redundancy checksum may be computed in the processor itself responsive to the user-level instruction. Other embodiments are described and claimed. | 2015-06-04 |
20150155884 | METHOD OF AND APPARATUS FOR GENERATING SPATIALLY-COUPLED LOW-DENSITY PARITY-CHECK CODE - A method, apparatus, and non-transitory computer-readable recording medium for generating an algebraic Spatially-Coupled Low-Density Parity-Check (SC LDPC) code are provided. The method includes selecting an LDPC block code over a finite field GF(q) with a girth of at least 6; constructing a parity-check matrix H from the selected LDPC block code; replicating H a user-definable number of times to form a two-dimensional array H | 2015-06-04 |
20150155885 | ERROR CORRECTING APPARATUS, ERROR CORRECTING METHOD, AND PROGRAM - Provided is an error correcting method including: executing, by an error-position detector, a determination process if a received word fails to satisfy a predetermined condition, the received word having a plurality of symbols, the determination process including determining if a determination-target symbol has an error or not, and detecting an error position, the error position being a position of the symbol having an error; changing, by a determination-target changing unit, the position of the determination-target symbol of the received word every time the determination process is executed; detecting, by an undetected-position detector, if the predetermined condition is satisfied, the error position of the symbol, for which the determination process is not executed, based on a relation between the error position and a variable generated from the received word; and correcting, by an error corrector, an error at the error position detected by the error-position detector and the undetected-position detector. | 2015-06-04 |
20150155886 | QPP Interleaver/DE-Interleaver for Turbo Codes - A quadratic permutation polynomial (QPP) interleaver is described for turbo coding and decoding. The QPP interleaver has the form: | 2015-06-04 |
20150155887 | METHOD AND APPARATUS FOR READING A DISC - Aspects of the disclosure provide a circuit that includes a decoder, an error checking module, and a controller. The decoder is configured to receive codewords, and decode the codewords based on an error correcting code. The error checking module is configured to error-check sectors using an error detecting code in the sectors. Each sector is formed of a plurality of decoded codewords. The controller is configured to store in a memory, when the error checking fails for at least one sector, the decoded codewords and corresponding flags indicative of pass or fail of the decoding of the codewords. | 2015-06-04 |
20150155888 | CONCATENATED ERROR CORRECTION DEVICE - A concatenated error correction device may be provided that includes: a first encoder which encodes a plurality of blocks arranged in a column direction and a row direction into a block-wise product code consisting of column codes and row codes by applying a first error correction code to the blocks in each of the column direction and the row direction; and a second encoder which receives K number of source symbols and applies a second error correction code to the source symbols, and then encodes into N number of symbols including N-K number of parity symbols. The N number of symbols form the plurality of blocks. K and N are natural numbers. | 2015-06-04 |
20150155889 | Selective merge and partial reuse LDPC (Low Density Parity Check) code construction for limited number of layers Belief Propagation (BP) decoding - Selective merge and partial reuse LDPC (Low Density Parity Check) code construction for limited number of layers Belief Propagation (BP) decoding. Multiple LDPC matrices may be generated from a base code, such that multiple/distinct LDPC coded signals may be encoded and/or decoded within a singular communication device. Generally speaking, a first LDPC matrix is modified in accordance with one or more operations thereby generating a second LDPC matrix, and the second LDPC matrix is employed in accordance with encoding an information bit thereby generating an LDPC coded signal (alternatively performed using an LDPC generator matrix corresponding to the LDPC matrix) and/or decoding processing of an LDPC coded signal thereby generating an estimate of an information bit encoded therein. The operations performed on the first LDPC matrix may be any one of, or combination of, selectively merging, deleting, partially re-using one or more sub-matrix rows, and/or partitioning sub-matrix rows. | 2015-06-04 |
20150155890 | ELECTRONIC APPARATUS - The invention provides electronic apparatus including an antenna, an antenna switch, at least one switch unit, and a transceiver. The antenna switch has N transceiving ports. The antenna switch selects one of the transceiving ports for transceiving signal with the antenna. The switch unit is coupled between the antenna switch and the transceiver. The transceiver has transmitting ports and receiving ports, and one of the transmitting ports is coupled to the switch unit, and one of the receiving ports is coupled to the switch unit. Wherein, the first end is connected to the fourth end of the switch unit and the third end is connected to the second end of the switch unit in a first status, and the first end is connected to the second end of the switch unit and the third end is connected to the fourth end of the switch unit in a second status. | 2015-06-04 |
20150155891 | DUAL MODE WWAN AND WLAN TRANSCEIVER SYSTEMS AND METHODS - A method of wireless communication includes communicating by receiving by a first transceiver a first type of signal, receiving by a second transceiver a first type of signal, carrier aggregating the signals received by the first transceiver and the signal the second transceiver. The method includes detecting a second type of signal and switching the first transceiver to receive the second signal type while the second transceiver continues to receive the first type of signal. | 2015-06-04 |
20150155892 | Sensor and Measuring Arrangement - A sensor for liquid and/or gas analysis comprising a measuring transducer for producing a measurement signal, and, connected with the measuring transducer, especially separably, a compact transmitter, which is embodied for receiving and further processing the measurement signal. The compact transmitter includes: a transmitter housing; a transmitter circuit arranged in the transmitter housing; arranged in the transmitter housing, a first interface, via which the transmitter circuit is connectable by means of a connection cable with a first superordinated data processing system, especially one embodied as a superordinated control system; and arranged in the transmitter housing, a second interface, which connects the transmitter circuit with an antenna and which is embodied to supply the antenna with, or to receive by means of the antenna, a radio signal, whose center frequency has a wavelength λ. The antenna includes a radiating element and at least one metal mirror element, and wherein the radiating element has a length of λ/8 up to 3λ/8, especially of, for instance, λ/4. | 2015-06-04 |
20150155893 | Frequency Planning for Digital Power Amplifier - Systems and techniques relating to wireless communication devices and digital power amplifiers include, according to an aspect, a device including: modulation circuitry of a radio frequency transmitter having a local oscillator frequency; a digital power amplifier coupled with the modulation circuitry; and a clock input coupled with the digital power amplifier; wherein the clock input provides a clock signal to the digital amplifier at a sampling clock frequency; and wherein the local oscillator frequency is an integer multiple of the sampling clock frequency. | 2015-06-04 |