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23rd week of 2009 patent applcation highlights part 39
Patent application numberTitlePublished
20090142809Method for Cleaving Cervimycin Monoesters - The invention relates to a method for cleaving cervimycin esters. An object of the invention to convert in a simple manner the cervimycin esters which are less active but formed in larger quantity into the highly active cervimycin K that occurs as a minor component in the preparation by fermentation, is achieved by preparing unesterified cervimycins from cervimycin esters with di- or monomethylated malonic acids, by ester cleavage effected by at least one esterolytic enzyme at temperatures of 20° C. to 75° C. and a pH of pH 5.0 to 10.0, preferably pH 6.0 to 9.0.2009-06-04
200901428102'-Terminator Nucleotide-Related Methods and Systems - The present invention provides methods of extending primer nucleic acids and sequencing target nucleic acids. The methods include the use of 2′-terminator nucleotides to effect chain termination. In addition to related reaction mixtures and kits, the invention also provides computers and computer readable media.2009-06-04
20090142811Discovery, Cloning and Purification of Thermococccus sp. (Strain 9 Degrees N-7) Dna Ligase - Compositions that describe a thermostable DNA ligase isolated from 2009-06-04
20090142812METHOD FOR PRODUCING HIGH MOLECULAR WEIGHT REDUCED VISCOSITY STARCH PASTES - Disclosed herein are methods of making high molecular weight, reduced viscosity starch pastes by enzymatic conversion. The methods provide a process for producing enzyme-thinned starch pastes that have improved molecular weight distributions, i.e., starch pastes having a more mid to high molecular weight content and less low molecular weight sugars than traditional enzyme converted pastes at similar solids and viscosity. In some embodiments, the methods utilize an enzyme capable of producing longer-chain oligosaccharides rather than low-molecular weight sugars. Other embodiments utilize a combination of enzymes to provide low viscosity pastes that are stabilized against setback and retrogradation. Furthermore, the methods may utilize a continuous starch enzyme cooker for the production of the high molecular weight, reduced viscosity starch pastes.2009-06-04
20090142813PROCESSES FOR THE PRODUCTION OF L-CITRULLINE - Processes for producing a suitable purity grade of L-Citrulline are disclosed. The processes can include contacting crude L-Citrulline in an aqueous solution with an adsorptive medium at a temperature above approximately 50° C. and below the temperature of denaturement for the L-Citrulline for an interval sufficient to remove at least one contaminant from the L-Citrulline. The processes can also include concentrating the dissolved L-Citrulline relative to the aqueous solution.2009-06-04
20090142814METHOD FOR PRODUCING CARBOXYLIC ACID USING METHANOL-ASSIMILATING BACTERIUM - A method for producing a carboxylic acid by a fermentation process which comprises culturing a methanol-assimilating bacterium capable of producing the carboxylic acid in a liquid medium containing methanol and a counter ion to produce and accumulate the carboxylic acid in the medium, further comprising the feeding of a substance comprising methanol and a counter ion to the medium by fed-batch culturing to maintain the total ionic strength within the fermentation medium at or below a certain level.2009-06-04
20090142815Gene SMS 05 - The present invention relates to newly identified genes that encode proteins that are involved in the synthesis of L-ascorbic acid (hereinafter also referred to as Vitamin C). The invention also features polynucleotides comprising the full-length polynucleotide sequences of the novel genes and fragments thereof, the novel polypeptides encoded by the polynucleotides and fragments thereof, as well as their functional equivalents. The present invention also relates to the use of said polynucleotides and polypeptides as biotechnological tools in the production of Vitamin C from microorganisms, whereby a modification of said polynucleotides and/or encoded polypeptides has a direct or indirect impact on yield, production, and/or efficiency of production of the fermentation product in said microorganism. Also included are methods/processes of using the polynucleotides and modified polynucleotide sequences to transform host microorganisms. The invention also relates to genetically engineered microorganisms and their use for the direct production of Vitamin C.2009-06-04
20090142816GLIOCLADIUM ISOLATE C-13 AND METHODS OF ITS USE FOR PRODUCING VOLATILE COMPOUNDS AND HYDROCARBONS - Provided herein is 2009-06-04
20090142817PROCESS FOR HYDROLYSIS OF STARCH - The present invention relates to a process for enzymatic hydrolysis of granular starch into a soluble starch hydrolyzate at a temperature below the initial gelatinization temperature of said granular starch.2009-06-04
20090142818Process of producing a fermentation product - The present invention relates to a process of producing a fermentation product, especially ethanol, from starch-containing material using an alpha-amylase and a carbohydrate-source generating enzyme. The invention also relates to a composition comprising an alpha-amylase and a carbohydrate-source generating enzyme as well as the use such compositions for producing fermentation products.2009-06-04
20090142819METHODS FOR CO-PRODUCTION OF ETHANOL AND SILICA FROM EQUISETUM - A method for the co-production of silica and at least one other useful industrial chemical such as ethanol, comprises the steps of: pre-treating siliceous plant matter derived from plants, such as horsetail weeds from the genus 2009-06-04
20090142820Directed evolution methods for improving polypeptide folding, solubility and stability - The invention provides directed evolution methods for improving the folding, solubility and stability (including thermostability) characteristics of polypeptides. In one aspect, the invention provides a method for generating folding and stability-enhanced variants of proteins, including but not limited to fluorescent proteins, chromophoric proteins and enzymes. In another aspect, the invention provides methods for generating thermostable variants of a target protein or polypeptide via an internal destabilization baiting strategy. Internally destabilization a protein of interest is achieved by inserting a heterologous, folding-destabilizing sequence (folding interference domain) within DNA encoding the protein of interest, evolving the protein sequences adjacent to the heterologous insertion to overcome the destabilization (using any number of mutagenesis methods), thereby creating a library of variants. The variants in the library are expressed, and those with enhanced folding characteristics selected.2009-06-04
20090142821Peroxide-driven cytochrome P450 oxygenase variants - The invention relates to novel variants of cytochrome P450 oxygenases. These variants have an improved ability to use peroxide as an oxygen donor as compared to the corresponding wild-type enzyme. These variants also have an improved thermostability as compared to the cytochrome P450 BM-3 F87A mutant. Preferred variants include cytochrome P450 BM-3 heme domain mutants having 158V, F87A, H100R, F107L, A135S, M145A/V, N239H, S274T, L3241, I366V, K434E, E442K, and/or V446I amino acid substitutions.2009-06-04
20090142822Crystal Structure of an Angiotensin-Converting Enzyme (ACE) and Uses Thereof - The present invention relates to a crystal of ACE protein. The present invention further relates to methods, processes, ACE modulators, pharmaceutical compositions and uses of ACE crystal and the structure coordinates thereof.2009-06-04
20090142823ATTENUATED RNA VIRUS AND APPLICATIONS THEREOF - The invention encompasses an attenuated RNA virus and methods of using an attenuated RNA virus. The RNA virus comprises, in part, an ion channel protein comprising a peptide tag.2009-06-04
20090142824INCUBATOR - To improve an incubator. In an incubator for incubating a culture medium accommodated in an incubation space defined in a storage. A heater to control a temperature of the water stored in a water storing structure which is in the bottom side of the storage, and to keep the temperature of the water a predetermined temperature. A water supplier to supply the water to the water storing structure when the water has been decreased. In the incubator when the water supplier supplies the water during the culture medium is incubated, the water supplier decreases the amount of water supplied per an unit time than the amount of water supplied during the culture medium is not incubated.2009-06-04
20090142825COMPOSITE DETECTION DEVICES HAVING IN-LINE DESALTING AND METHODS OF MAKING THE SAME - A composite detection device having in-line desalting is provided. The composite detection device comprises a membrane configured for desalting at least a portion of an analyte stream, and a nanostructure for detecting a bio-molecule or a bio-molecule interaction, wherein the nanostructure and the membrane are arranged such that an analyte stream desalted at least in part by the membrane is detected by the nanostructure. A bio-sending detection system having the composite detection device and method of fabrication of the composite detection device are also provided.2009-06-04
20090142826Diffraction-Based Diagnostic Devices - A biosensor includes a substrate with areas of active receptive material disposed thereon. The receptive material is specific for an analyte of interest. A pattern of the active areas is defined on the substrate by an oxidizing photo-masking process.2009-06-04
20090142827Mixing Apparatus And Container For Such - A mixing apparatus is proposed having a container (2009-06-04
20090142828Methods and Compositions for Increasing Protein Yield from a Cell Culture - Disclosed herein are compositions and methods for increasing protein production from a cell culture. By switching the cells from a replicative to a productive state (RP switch), protein biosynthesis is extended. The productive state is a pseudo-senescent state. This pseudo-senescent state can be induced by transforming the cells with a vector expressing a cell cycle inhibitor. Expression of the cell cycle inhibitor within the cell, because it does not cause cell death, allows for cells to be maintained in culture for longer periods. The invention allows for controlled enhanced protein biosynthetic productivity of cell lines for commercial and research purposes.2009-06-04
20090142829Recombinant Constructs And Their Use In Reducing Gene Expression - Recombinant constructs useful for reducing the expression of endogenous mRNA and any substantially similar endogenous mRNA are disclosed. In particular, a recombinant construct comprising, inter alia, a suitable nucleic acid sequence and its reverse complement can be used to alter the expression of any homologous, endogenous RNA (i.e., the target RNA) which is in proximity to this suitable nucleic acid sequence.2009-06-04
20090142830Aqueous Solution for Cell Preservation - To provide an aqueous solution for cell preservation which is free of a natural animal-derived component such as a basal medium or serum. An aqueous preservation solution showing a high cell survival rate was obtained by removing a natural animal-derived component such as a basal medium or serum and controlling other components and their concentrations.2009-06-04
20090142831PLACENTAL STEM CELLS - The present invention provides a method of extracting and recovering embryonic-like stem cells, including, but not limited to pluripotent or multipotent stem cells, from an exsanguinated human placenta. A placenta is treated to remove residual umbilical cord blood by perfusing an exsanguinated placenta, preferably with an anticoagulant solution, to flush out residual cells. The residual cells and perfusion liquid from the exsanguinated placenta are collected, and the embryonic-like stem cells are separated from the residual cells and perfusion liquid. The invention also provides a method of utilizing the isolated and perfused placenta as a bioreactor in which to propagate endogenous cells, including, but not limited to, embryonic-like stem cells. The invention also provides methods for propagation of exogenous cells in a placental bioreactor and collecting the propagated exogenous cells and bioactive molecules therefrom.2009-06-04
20090142832Indoles, Derivatives, and Analogs Thereof and Uses Therefor - Indole derivatives and analog compounds and pharmaceutical compositions comprising the same are provided. Also provided are methods of using these compounds to inhibit tubulin polymerization in a cell associated with a proliferative disease or to treat a cancer.2009-06-04
20090142833Pine Cone Extracts and Uses Thereof - A method of producing a pine cone extract and the pine cone extract produced there from, wherein the pine cone extract is useful in increasing the effects of nucleic acid vaccines and medicaments; and useful in the production of phenotypically immature and/or mature dendritic and/or fibrocyte cells.2009-06-04
20090142834Multipotent stem cells from peripheral tissues and uses thereof - This invention relates to multipotent stem cells, purified from the peripheral tissue of mammals, and capable of differentiating into neural and non-neural cell types. These stem cells provide an accessible source for autologous transplantation into CNS, PNS, and other damaged tissues.2009-06-04
20090142835STEM CELL SEPARATING MATERIAL AND METHOD OF SEPARATION - The present invention has its object to provide a material for separating stem cell and a filter for separating stem cell, each is capable of selectively separating and recovering, in a simple and easy manner, stem cells from body fluids or biological tissue-derived treated fluids, a method for separating and recovering stem cells, and stem cells obtained by such method. The present invention is a material for separating stem cell which has a density K of 1.0×102009-06-04
20090142836BIOENGINEERED TISSUE CONSTRUCTS AND METHODS FOR PRODUCTION AND USE - Bioengineered constructs are formed from cultured cells induced to synthesize and secrete endogenously produced extracellular matrix components without the requirement of exogenous matrix components or network support or scaffold members. The bioengineered constructs of the invention can be treated in various ways such that the cells of the bioengineered constructs can be devitalized and/or removed without compromising the structural integrity of the constructs. Moreover, the bioengineered constructs of the invention can be used in conjunction with biocompatible/bioremodelable solutions that allow for various geometric configurations of the constructs.2009-06-04
20090142837METHOD AND APPARATUS FOR SUBSTANTIALLY ISOLATING PLANT TISSUES - The present invention provides methods and devices for the rapid isolation of monocot plant embryos suitable for transformation or tissue culture. The invention includes mechanical devices for substantially isolating plant embryos for use as transformable explants. Media suitable for isolating plant embryos and methods for their preparation are also provided.2009-06-04
20090142838Methods for expressing rnp particles in eukaryotic cells - Provided herein are nucleic acid constructs and methods for producing or enhancing the production of group II intron RNP particles in eukaryotic cells. The present methods comprise introducing at least one nucleic acid construct comprising a nucleic acid encoding a modified or wild type group II intron RNA and a wild-type or modified group II intron-encoded protein into the eukaryotic cell, and maintaining the cell under conditions that allow for expression of the group II intron RNA and the group II intron-encoded protein in the cell. The nucleic acid encoding the group II intron RNA is operably linked to an RNA polymerase I, an RNA polymerase II, or an RNA polymerase III promoter, and the nucleic acid encoding the group II intron-encoded protein is operably linked to an RNA polymerase II promoter. In certain embodiments, a subcellular localization signal is attached to the group II intron-encoded protein.2009-06-04
20090142839Inducing Premature Senescence to Stabilize Stem Cell Feeder Layer Cells - The present invention provides stem cell feeder layer cell lines that contain are readily triggered to differentiation. The expression vector encodes the senescence-triggering factors (STFs) consisting of Cip/Kip, INK4A, Cy protein or ankyrin-binding protein motifs. Each expression vector also contains an inducible transcription regulation element for conditional expression of the STFs.2009-06-04
20090142840DNA encoding anti-apoptotic protein and recombinant 30K protein - The present invention relates to DNAs encoding anti-apoptotic 30K proteins. More particularly, the present invention is directed to 30K protein genes and a recombinant proteins prepared by using novel anti-apoptotic gene obtained from silkworm. The present invention also provides anti-apoptotic health care food, pharmaceutical preparation, additive for cell culture medium, and food supplement.2009-06-04
20090142841Vectors capable of immortalizing non-dividing cells and cells immortalized with said vectors - Vectors capable of stably integrating a transgene in the genome of a non-dividing cell or of a slowly-dividing cell, said vector comprising or expressing at least one immortalization molecule and cells immortalized with said vectors.2009-06-04
20090142842CLEAVABLE MODIFICATIONS TO REDUCIBLE POLY(AMIDO ETHYLENIMINE)S TO ENHANCE NUCLEOTIDE DELIVERY - Improved poly(amido ethylenimine) copolymers for gene delivery are disclosed. One illustrative embodiment includes polyethylene glycol (PEG) covalently bonded to a branched poly(triethyenetetramine/cystamine bisacrylamide) copolymer (poly(TETA/CBA)). The polyethylene glycol can be linear or branched. Another illustrative embodiment includes an RGD peptide covalently bonded to the poly(TETA/CBA)-PEG conjugate. Still another illustrative embodiment includes a method of using these compositions for transfecting a cell with a nucleic acid.2009-06-04
20090142843Glucose Transport Mutants For Production Of Biomaterial - A method is disclosed for restoring a Glu2009-06-04
20090142844Automatic Method of Preparing Samples of Total Blood For Analysis, and an Automatic Device For Implementing the Method - The present invention relates to a method of preparing analyses of total blood samples and to a device that is useful for implementing the method, said samples being conserved in tubes including at least one identification means for identifying the sample, the device comprising: 2009-06-04
20090142845FLOW REACTOR METHOD AND APPARATUS - A method of conducting a chemical reaction in a flow reactor comprises the steps of pumping at least one liquid reaction plug bounded at both ends by liquid spacer plugs along a reaction channel of the reactor; and conducting the chemical reaction in the reaction plug inside the reaction channel, wherein the liquid reaction plug comprises one or more reagents dispersed in a reaction solvent, the liquid spacer plugs are immiscible in the reaction solvent, and the reagents are substantially insoluble in the spacer plugs; and wherein the aspect ratio of the at least one reaction plug is at least about 10.2009-06-04
20090142846METHODS FOR MEASURING BIOCHEMICAL REACTIONS - Methods for measuring biochemical reactions and analysis of reaction products by controlling dispersion of reagents within fluid streams such that the measuring of the biochemical reaction is substantially free of a measurable dispersion artifact. Controlling dispersion of reagents within fluid streams can include flowing multiple fluid streams each including reaction reagents into contact through a mixing region to laterally mix the fluid streams and then passing the merged, laterally mixed fluid stream through a controlled dispersion element to axially disperse the reaction reagents merged fluid stream. Controlling dispersion of reagents within fluid streams can include controlling flow rates of multiple fluid streams each including reaction reagents to create a concentration gradient that is substantially free of a measurable dispersion artifact. The biochemical reaction can occur in a microfluidic chip.2009-06-04
20090142847METAL ENHANCED FLUORESCENCE-BASED SENSING METHODS - The present invention relates to metallic-surface detection systems for determining target substances including free bilirubin in neonatal serum in the presence of a predominantly high background of bilirubin bound Human Serum Albumin (HSA) or sensing and isolating target nucleotide sequences wherein a fluorescence signal is enhanced by close proximity of the target substances near metallic surfaces.2009-06-04
20090142848Removal Of Minerals From Cellulosic Biomass - Disclosed is a method for removing minerals from a cellulosic biomass. For example, the biomass may be prewashed with an acid solution and rinsed with water to remove minerals prior to acid saccharification. The removal of minerals may reduce overall acid requirements, and decrease pretreatment costs.2009-06-04
20090142849Stable Oxygen Isotope Labeling of Pre-existing Phosphoryl Groups on Phosphomolecules for Modification-Specific Mass Spectrometry - The present invention relates to the production and use of phosphate-specific marker ions labeled with one or more stable oxygen isotopes for analysis of phosphopeptides and other phosphorylated biological and synthetic molecules.2009-06-04
20090142850Disintegratable Films for Diagnostic Devices - The invention provides disintegratable film compositions for diagnostic test devices. The films are prepared with a combination of components that yield films of sufficient film strength and desired disintegration profiles. A disintegratable film according to the present invention contains a water soluble high molecular weight component, a water soluble low molecular weight component, and one or more reagents for use in a diagnostic device. Optionally, the films further contain a starch component, a glucose component, a plasticizer and/or a humectant, and/or a filler. The invention further provides a diagnostic testing device, which includes a film according to an embodiment of the invention, and methods of using such devices.2009-06-04
20090142851METHOD FOR SELECTIVELY RECOVERING C-TERMINAL PEPTIDE OF PROTEIN AND METHOD FOR DETERMINING AMINO ACID SEQUENCE OF C-TERMINAL PEPTIDE OF PROTEIN USING THE SAME - The present invention provides a method for specifically recovering a C-terminal peptide fragment, and a method for easily determining the sequence of a C-terminal peptide fragment, which is difficult to be determined by a conventional method, with the use of a mass spectrometer, in particular a method capable of de novo sequencing of a C-terminal peptide fragment. A method for selectively recovering a C-terminal peptide of a protein, comprising the steps of: in a cleavage product of a protein containing a C-terminal peptide fragment (A) having an α-amino group but not having an ε-amino group and the other peptide fragments (B) having an α-amino group and an ε-amino group, selectively modifying the α-amino groups to obtain a C-terminal peptide fragment modified (A′) and the other peptide fragments modified (B′); and separating the C-terminal peptide fragment modified (A′) from the modified cleavage product by allowing a carrier to hold the other peptide fragments modified (B′) via the ε-amino group. A method for determining the amino acid sequence of a C-terminal peptide of a protein, comprising the steps of: selectively recovering a C-terminal peptide of a protein by the above method; and determining the amino acid sequence by subjecting a recovered C-terminal peptide fragment to mass spectrometry measurement.2009-06-04
20090142852BACTERIORHODOPSIN-BASED SENSORS - A sensor comprising a membrane containing bacteriorhodopsin. In one embodiment, the sensor comprises a layer of purple membrane between a first and a second electrode, wherein the electrodes are connected to a circuit such that a signal is produced when a charge is transferred across the membrane. In another embodiment, the sensor comprises a field effect transistor with a layer of purple membrane deposited on the gate. The layer of purple membrane may be further functionalized by adding fluorophores to the layer of purple membrane. The fluorophores may be deposited adjacent to the layer of purple membrane, or the fluorophores may be attached to the layer of purple membrane with linkages. The fluorophores or linkages between the fluorophores and the purple membrane may be functionalized with receptors to produce sensors for targeted chemical or biological species.2009-06-04
20090142853MICROFLUIDIC SYSTEM AND METHODS - A microfluidic system comprising: at least one microfluidic channel, the inner surface of which is fluorinated or fluorous; and a pump for supplying a flow of an aqueous medium containing chemical reagents or assay components to said microfluidic channel. Preferably, the apparatus further comprises a supply of a non-aqueous medium which is compatible with the surface of the microfluidic channel but immiscible with the aqueous medium, such as a perfluorocarbon solvent, for forming a sheath around the flowing aqueous medium whereby the aqueous medium is suspended away from the surface of the microfluidic channel. Also provided are methods for carrying out a chemical reaction or a biological assay in the microfluidic systems of the subject matter disclosed herein.2009-06-04
20090142854SILANIZING AGENTS COMPRISING A SACCHARIDE END GROUP AND USES THEREOF, IN PARTICULAR FOR THE FUNCTIONALIZATION OF SOLID SUPPORTS - The invention relates to silanizing agents comprising a saccharide end group and to the use thereof for the functionalization of solid supports. The invention also relates to solid supports that have been functionalized by said silanizing agents (glycochips) and to the use of same, such for biological analysis and, in particular, for screening saccharide molecules or proteinaceous ligands of interest.2009-06-04
20090142855Polynucleotides and Polypeptides of the IL-12 Family of Cytokines - The present invention relates to the primate family of cytokines. Provided herein are polynucleotides encoding such polypeptides, and reagents useful for producing the encoded polypeptides in a host source, and for identifying compounds which bind and modulate the activity of the encoded polypeptides. Also provided are reagents useful for the diagnosis or treatment of inflammatory and/or autoimmune related diseases in primates.2009-06-04
20090142856Use of unique fluorochromes in rapid test systems - The present invention includes an assay method for detecting an analyte in a sample. The assay includes a solid surface such as a nitrocellulose membrane. It also includes providing a sample is applied to the solid surface and detecting the presence or absence of the analyte using a fluorescent label from a lanthanide label. The invention also includes a device for detecting the fluorescence in or on an assay test strip. The device includes a housing, a solid surface and an ultraviolet radiation emitting LED.2009-06-04
20090142857Package design of small diameter sensor - A small sensor assembly is produced by encapsulating an inner package within an outer package. The inner assembly can have electrical components and sensors attached to a lead frame. The electrical components can be protected within inner packages that have alignment indentations. The alignment indentations are positioned over the outside edges of the lead frame and, preferably, no electrical components directly underlie the alignment indentations. The inner assembly is held in alignment by movable pins within a mold into which plastic is flowed. The mold is configured to cause some of the plastic to set earlier than the rest of the plastic and to hold the inner assembly in alignment within the mold. The movable pins can be retracted once enough plastic has set to hold the inner assembly. Unset plastic can then flow into the alignment indentations. A sealed sensor assembly is formed once all the plastic has set.2009-06-04
20090142858Power-Measured Pulses for Thermal Trimming - A circuit for trimming a thermally-trimmable resistor, measuring a temperature coefficient of resistance of the thermally-trimmable resistor, and annealing a thermally-trimmable resistor post-trimming, the circuit comprising: a thermally-isolated area on a substrate housing the thermally-trimmable resistor; heating circuitry for applying a signal to a heating resistor; and a constant-power module adapted to maintain power dissipated in the heating resistor substantially constant over a duration of the signal by varying at least one parameter of the signal as a result of a change in resistance of the heating resistor during the signal.2009-06-04
20090142859PLASMA CONTROL USING DUAL CATHODE FREQUENCY MIXING - Methods for processing a substrate in a processing chamber using dual RF frequencies are provided herein. In some embodiments, a method of processing a substrate includes forming a plasma of a polymer forming chemistry to etch a feature into a substrate disposed on a substrate support in a process chamber while depositing a polymer on at least portions of the feature being etched. A low frequency and a high frequency RF signal are applied to an electrode disposed in the substrate support. The method further includes controlling the level of polymer formation on the substrate, wherein controlling the level of polymer formation comprises adjusting a power ratio of the high frequency to the low frequency RF signal.2009-06-04
20090142860SYSTEM AND METHOD FOR ENHANCED CONTROL OF COPPER TRENCH SHEET RESISTANCE UNIFORMITY - A method is disclosed for controlling the sheet resistance of copper trenches formed on semiconductor wafers. The method includes forming a plurality of copper-filled trenches on a wafer, measuring the sheet resistance of each of the plurality of copper-filled trenches, and comparing the measured sheet resistance values to a predetermined sheet resistance value. Photolithography steps performed on subsequent wafers are adjusted according to a difference between the measured sheet resistance values and the predetermined value. In one embodiment, this adjustment takes the form of adjusting a photolithographic extension exposure energy to thereby adjust the cross-section of the resulting trenches.2009-06-04
20090142861Method of Manufacturing Flash Memory Device - Disclosed are methods of manufacturing a flash memory device. The method can include performing a first test on memory banks of chips on a wafer to record an availability of the banks; performing an inking process on each of the chips according to a number of available banks in the chip; performing a sawing process to divide the chips mounted on the wafer; packaging the divided chips according to the number of available banks in the chip; and performing a verification test on the packaged chips.2009-06-04
20090142862LUMINESCENT SEMI-CONDUCTIVE POLYMER MATERIAL, METHOD OF PREPARING THE SAME AND ORGANIC LIGHT EMITTING ELEMENT HAVING THE SAME - The present invention is related to a luminescent material generated by polymerization of a pyrromethene complex by glow discharge. The polymer material of the present invention exhibits semi-conductive properties and has a luminescence maximum in a spectrum region in the range of about 540 nm to about 585 nm with a half-width of the luminescence band in the range of about 55 nm to about 75 nm, a quantum yield of photoluminescence in the range of about 0.6 to about 0.8, and an electric conductivity at a temperature of about 20° C. in the range of about 2009-06-04
20090142863ORGANIC EL DISPLAY PANEL FOR REDUCING RESISTANCE OF ELECTRODE LINES - Method for fabricating an organic EL display panel having an EL region at every cross of first and second electrodes, including the steps of forming a plurality of first electrodes at regular intervals on a transparent substrate, forming an insulating layer in regions other than the EL regions, forming second supplementary electrodes on the insulating layer, forming an electric insulating barrier between adjacent EL regions perpendicular to the first electrodes, forming an organic EL layer in each of the EL regions with a shadow mask, depositing an electrode material on an entire surface inclusive of the organic EL layer, to form a plurality of second electrodes electrically connected to the second supplementary electrodes, and forming a protection film on an entire surface inclusive of the second electrodes.2009-06-04
20090142864METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY SUBSTRATE - A method for manufacturing a thin film transistor (TFT) array substrate needs only or even less than six mask processes for manufacturing the TFT array substrate integrated with a color filter pattern. Therefore, the manufacturing method is simpler and the manufacturing cost is reduced. In addition, the manufacturing method needs not to form a contact window in a relative thick film layer such as a planarization layer or a color filter layer, so as to connect the pixel electrode to the source/drain. Thus, the difficulty of the manufacturing process is effectively reduced.2009-06-04
20090142865LIQUID CRYSTAL DISPLAY - A liquid crystal display using a ferroelectric liquid crystal, which can give mono-domain alignment of the ferroelectric liquid crystal without forming alignment defects such as zigzag defects, hairpin defects and double domains and which is so remarkably good in alignment stability that the alignment thereof can be maintained even if the temperature of the liquid crystal is raised to the phase transition point or higher. The liquid crystal display has a ferroelectric liquid crystal sandwiched between two substrates, wherein an electrode and a photo alignment layer are each successively formed on opposite faces of the two substrates facing each other, and a constituent material of the respective photo alignment layer has a different composition with the ferroelectric liquid crystal sandwiched there between.2009-06-04
20090142866Method for cutting liquid crystal display panel and method for fabricating liquid crystal display panel using the same - A method for cutting a liquid crystal display panel including: forming prearranged cut lines on a pair of attached mother substrates on which a plurality of panel regions have been disposed; and separating the liquid crystal display panel from a dummy glass around the liquid crystal display panel through a transfer unit which includes a body for adsorbing a liquid crystal display panel and transferring it, and a plate attached on an edge of the body, fixing and separating a dummy glass of a mother substrate from the liquid crystal display panel, and moving up and down separately from the body. A dummy removing plate is attached at an edge of a trans hand to remove a dummy glass when a breaking process-finished liquid crystal display panel is extracted, so a damage of the liquid crystal display panel due to the dummy glass can be prevented.2009-06-04
20090142867METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - The number of photomasks is reduced in a method for manufacturing a liquid crystal display device which operates in a fringe field switching mode, whereby a manufacturing process is simplified and manufacturing cost is reduced. A first transparent conductive film and a first metal film are sequentially stacked over a light-transmitting insulating substrate; the first transparent conductive film and the first metal film are shaped using a multi-tone mask which is a first photomask; an insulating film, a first semiconductor film, a second semiconductor film, and a second metal film are sequentially stacked; the second metal film and the second semiconductor film are shaped using a multi-tone mask which is a second photomask; a protective film is formed; the protective film is shaped using a third photomask; a second transparent conductive film is formed; and the second transparent conductive film is shaped using a fourth photomask.2009-06-04
20090142868ORGANIC ELECTRO-LUMINANCE DEVICE AND METHOD FOR FABRICATING THE SAME - Provided is an organic EL device and fabrication method thereof that can prevent the performance of the organic EL layer and the TFT from being lowered in forming the cathode using an E-beam heating evaporation process. The organic EL device includes a substrate, an anode, an organic EL layer, a cathode, and a transparent electrode connected with the cathode to extract the cathode to an outside, and further includes an interconnection line connected to the transparent electrode, for discharging charges accumulated on the cathode outside the organic EL device. According to the present invention, since the charges generated on the cathode can be removed through the interconnection line, the underlying organic EL layer and the TFT can be prevented from being damaged, so that the device reliability can be enhanced.2009-06-04
20090142869Method of producing semiconductor optical device - Si atoms obtained by thermal decomposition of SiH2009-06-04
20090142870MANUFACTURING METHOD OF GROUP III NITRIDE SEMICONDUCTOR LIGHT-EMITTING DEVICE - The present invention provides a manufacturing method of a group III nitride semiconductor light-emitting device, including a lamination step of forming a plurality of lamination films including a group III nitride semiconductor on a substrate, in which a substrate on which is formed a foundation layer including a monocrystalline group III nitride semiconductor is used as the substrate, and lamination films are formed on the foundation layer by a sputtering method, with the substrate including the foundation layer and a target made from a group III metal or an alloy including a group III metal being placed in a sputtering chamber.2009-06-04
20090142871METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device provides a semiconductor device with a gallium-nitride-based semiconductor structure that allows long-term stable operation without degradation in device performance. After formation of an insulation film on a surface other than on a ridge surface, an oxygen-containing gas such as O2009-06-04
20090142872Fabrication of capacitive micromachined ultrasonic transducers by local oxidation - Fabrication methods for capacitive micromachined ultrasonic transducers (CMUTS) with independent and precise gap and post thickness control are provided. The fabrication methods are based on local oxidation or local oxidation of silicon (LOCOS) to grow oxide posts. The process steps enable low surface roughness to be maintained to allow for direct wafer bonding of the membrane. In addition, methods for fabricating a step in a substrate are provided with reduced or minimal over-etch time by utilizing the nonlinearity of oxide growth. The fabrication methods of the present invention produce CMUTs with unmatched uniformity, low parasitic capacitance, and high breakdown voltage.2009-06-04
20090142873Method for Manufacturing a Sensor Array Including a Monolithically Integrated Circuit - A method for producing a sensor array including a monolithically integrated circuit is described as well as a sensor array. This sensor array has a micromechanical sensor structure, in which a first partial structure which is associated with the sensor structure is produced at the same time as a second partial structure which is associated with the circuit, a process variation of the first partial structure being performed in order to adjust a structure property of the sensor structure while the second partial structure remains the same.2009-06-04
20090142874METHOD FOR MANUFACTURING PHOTOELECTRIC CONVERSION DEVICE - A method for manufacturing a photoelectric conversion device typified by a solar cell, having an excellent photoelectric conversion characteristic with a silicon semiconductor material effectively utilized. The point is that the surface of a single crystal semiconductor layer bonded to a supporting substrate is irradiated with a pulsed laser beam to become rough. The single crystal semiconductor layer is irradiated with the pulsed laser beam in an atmosphere containing an inert gas and oxygen so that the surface thereof is made rough. With the roughness of surface of the single crystal semiconductor layer, light reflection is suppressed so that incident light can be trapped. Accordingly, even when the thickness of the single crystal semiconductor layer is equal to or greater than 0.1 μm and equal to or less than 10 μm, path length of incident light is substantially increased so that the amount of light absorption can be increased.2009-06-04
20090142875METHOD OF MAKING AN IMPROVED SELECTIVE EMITTER FOR SILICON SOLAR CELLS - A method for forming a selective emitter on a silicon solar cell is provided including forming an oxide layer on a surface of the P-type silicon substrate, implanting phosphorus doping atoms into the oxide layer on the substrate using plasma immersion ion implantation, patterning the oxide layer, annealing the substrate to provide heavily doped regions in the patterned regions and a lightly doped region between the patterned regions, and providing metal contacts to the heavily doped regions.2009-06-04
20090142876INK COMPOSITION AND FABRICATION METHOD FOR COLOR CONVERSION FILM - An ink composition of a color conversion film is disclosed. The ink composition includes a fluorescent polymer (Formula I, II, III), an aromatic transparent unsaturated resin containing a phenyl or fluorene functional group (Formula IV, V), and a solvent of a cyclic compound, wherein the molecular structure of the aromatic transparent unsaturated resin is compatible to that of the fluorescent polymer. The invention further provides a fabrication method of a color conversion film including dispensing the disclosed ink composition on a substrate, and curing the ink composition to form the color conversion film.2009-06-04
20090142877Method for making a thin-film poly-crystalline silicon solar cell on an indium tin oxide-glass substrate at a low temperature - A method is disclosed for making a thin-film poly-crystalline silicon solar cell. In the method, there is provided an ITO-glass substrate by coating a glass substrate with a transparent and conductive ITO film. An amorphous silicon film is grown on the ITO-glass substrate. An aluminum film is grown on the amorphous silicon film. The aluminum film and the amorphous silicon film arte annealed and therefore converted into an aluminum-silicon alloy film and a p2009-06-04
20090142878PLASMA TREATMENT BETWEEN DEPOSITION PROCESSES - Embodiments of the present invention include an improved method of forming a thin film solar cell device using a plasma processing treatment between two or more deposition steps. Embodiments of the invention also generally provide a method and apparatus for forming the same. The present invention may be used to advantage to form other single junction, tandem junction, or multi-junction solar cell devices.2009-06-04
20090142879METHOD OF MANUFACTURING PHOTOELECTRIC CONVERSION DEVICE - A fragile layer is formed in a region at a depth of less than 1000 nm from one surface of a single crystal semiconductor substrate, and a first impurity semiconductor layer and a first electrode are formed at the one surface side. After bonding the first electrode and a supporting substrate, the single crystal semiconductor substrate is separated using the fragile layer or the vicinity as a separation plane, thereby forming a first single crystal semiconductor layer over the supporting substrate. An amorphous semiconductor layer is formed on the first single crystal semiconductor layer, and a second single crystal semiconductor layer is formed by heat treatment for solid phase growth of the amorphous semiconductor layer. A second impurity semiconductor layer having a conductivity type opposite to that of the first impurity semiconductor layer and a second electrode are formed over the second single crystal semiconductor layer.2009-06-04
20090142880Solar Cell Contact Formation Process Using A Patterned Etchant Material - Embodiments of the invention contemplate the formation of a high efficiency solar cell using novel methods to form the active region(s) and the metal contact structure of a solar cell device. In one embodiment, the methods include the use of various etching and patterning processes that are used to define point contacts through a blanket dielectric layer covering a surface of a solar cell substrate. The method generally includes depositing an etchant material that enables formation of a desired pattern in a dielectric layer through which electrical contacts to the solar cell device can be formed.2009-06-04
20090142881Tellurium (Te) Precursors for Making Phase Change Memory Materials - Tellurium (Te)-containing precursors, Te containing chalcogenide phase change materials are disclosed in the specification. A method of making Te containing chalcogenide phase change materials using ALD, CVD or cyclic CVD process is also disclosed in the specification in which at least one of the disclosed tellurium (Te)-containing precursors is introduced to the process.2009-06-04
20090142882Phase Change Memories With Improved Programming Characteristics - A phase change memory may be made with improved speed and stable characteristics over extended cycling. The alloy may be selected by looking at alloys that become stuck in either the set or the reset state and finding a median or intermediate composition that achieves better cycling performance. Such alloys may also experience faster programming and may have set and reset programming speeds that are substantially similar.2009-06-04
20090142883Leaded Stacked Packages Having Elevated Die Paddle - A semiconductor package includes a leadframe, an elevated die paddle disposed above the leadframe, a first die attached to a lower surface of the elevated die paddle to support the first die within the semiconductor package, and a second die attached to the first die. A method of manufacturing a semiconductor package includes providing a leadframe having a lower lead and an elevated die paddle structure, attaching a first die to the elevated die paddle structure with a die adhesive (DA) for supporting the first die within the semiconductor package, and wire bonding the first die to the lower lead.2009-06-04
20090142884METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device comprising the steps of (1) applying an underfill composition to a surface of a silicon wafer, (2) dicing the silicon wafer into chips, (3) positioning the chip, and (4) bonding the chip to the substrate, characterized in that 2009-06-04
20090142885METHOD FOR PROTECTING POROUS LOW-K DIELECTRIC POST CHEMICAL MECHANICAL PLANARIZATION - A method of forming a semiconductor structure chemically-mechanically polishes (CMP) a semiconductor structure before applying a sealant layer over the porous low-k dielectric. The process of applying the sealant layer is a selective process that causes the sealant to adhere to or deposit onto the porous low-k dielectric and to not adhere to the copper conductors. After the sealant layer is formed, the cap is applied. The parylene layer seals the pores in the low-k dielectric which prevents the low-k dielectric layer from being damaged during the cap pre-cleaning process and also prevents the cap material from penetrating into the low-k dielectric.2009-06-04
20090142886METHOD OF FABRICATING THIN FILM TRANSISTOR STRUCTURE - A method of fabricating a thin film transistor (TFT) includes first providing a strip-shaped silicon island which is a thin film region with a predetermined long side and short side. Next, the strip-shaped silicon island is subject to an ion implantation to form a first ion doping region and a second ion doping region. The first and second ion doping regions, respectively used as the source and the drain of the TFT, are located at two sides along the long side of the island and substantially perpendicular to the gate. A gate is formed over the strip-shaped silicon island and the first and second ion doping regions, wherein the gate is substantially parallel to the direction of the short side.2009-06-04
20090142887Methods of manufacturing an oxide semiconductor thin film transistor - Methods of manufacturing an oxide semiconductor thin film transistor are provided. The methods include forming a gate on a substrate, and a gate insulating layer on the substrate to cover the gate. A channel layer, which is formed of an oxide semiconductor, may be formed on the gate insulating layer. Source and drain electrodes may be formed on opposing sides of the channel layer. The method includes forming supplying oxygen to the channel layer, forming a passivation layer to cover the source and drain electrodes and the channel layer, and performing an annealing process after forming the passivation layer.2009-06-04
20090142888MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A semiconductor device which has higher integration and is further reduced in thickness and size. A semiconductor device with high performance and low power consumption. A semiconductor element layer separated from a substrate by using a separation layer is stacked over a semiconductor element layer formed by using another substrate and covered with a flattened inorganic insulating layer. After separation of the semiconductor element layer in a top layer from the substrate, the separation layer is removed so that an inorganic insulating film formed under the semiconductor element layer is exposed. The flattened inorganic insulating layer and the inorganic insulating film are made to be in close contact and bonded to each other. In addition, a semiconductor layer included in the semiconductor element layer is a single crystal semiconductor layer which is separated from a semiconductor substrate and transferred to a formation substrate.2009-06-04
20090142889Oxide Isolated Metal Silicon-Gate JFET - A JFET structure with self-aligned metal source, drain and gate contacts with very low resistivity and very small feature sizes. Small source, drain and gate openings are etched in a thin dielectric layer which has a thickness set according to the desired source, gate and drain opening sizes, said dielectric layer having a nitride top layer. Metal is deposited on top of said dielectric layer to fill said openings and the metal is polished back to the top of the dielectric layer to achieve thin source, drain and gate contacts. Some embodiments include an anti-leakage poly-silicon layer lining the contact holes and all embodiments where spiking may occur include a barrier metal layer.2009-06-04
20090142890Phosphorus Activated NMOS Using SiC Process2009-06-04
20090142891MASKLESS STRESS MEMORIZATION TECHNIQUE FOR CMOS DEVICES - In one embodiment, the present invention provides a method of manufacturing a semiconducting device that includes providing a silicon containing substrate having PFET device and NFET device, wherein the NFET device includes an amorphous silicon containing region; depositing a tensile strain silicon nitride layer atop the NFET device and the PFET device, wherein the silicon nitride tensile strain layer induces a tensile strain in a channel of the NFET device region; annealing to crystallize the amorphous silicon containing region, wherein the tensile strain silicon nitride layer positioned atop the PFET device confines oxygen within a channel positioned within the silicon containing substrate underlying the PFET device, wherein the oxygen within the channel shifts a threshold voltage of the PFET device towards a valence band of silicon of the silicon containing substrate; and removing the tensile strain silicon nitride layer.2009-06-04
20090142892Method of fabricating semiconductor device having thin strained relaxation buffer pattern and related device - A method of fabricating a semiconductor device includes forming a buffer pattern on a substrate, the buffer pattern including germanium, recrystallizing the buffer pattern to form a strained relaxation buffer pattern, and forming a tensile silicon cap on the strained relaxation buffer pattern, the cap being under tensile strain.2009-06-04
20090142893OXIDE EPITAXIAL ISOLATION - Non-volatile memory cell structures are described that are formed by a method including forming a first oxide layer on a horizontal strained substrate, forming at least one first recess through the first oxide layer to the strained substrate, and forming at least one vertical epitaxial structure in the recess. A crystal lattice of the vertical epitaxial structure is aligned with a crystal lattice of the strained substrate.2009-06-04
20090142894METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE - A method for fabricating a semiconductor structure. The novel transistor structure comprises first and second source/drain (S/D) regions whose top surfaces are lower than a top surface of the channel region of the transistor structure. A semiconductor layer and a gate stack on the semiconductor layer are provided. The semiconductor layer includes (i) a channel region directly beneath the gate stack, and (ii) first and second semiconductor regions essentially not covered by the gate stack, and wherein the channel region is disposed between the first and second semiconductor regions. The first and second semiconductor regions are removed. Regions directly beneath the removed first and second semiconductor regions are removed so as to form first and second source/drain regions, respectively, such that top surfaces of the first and second source/drain regions are below a top surface of the channel region.2009-06-04
20090142895METHOD OF FORMING A VIA - A method for forming a via includes forming a gate electrode over a semiconductor substrate, forming a source/drain region in the semiconductor substrate adjacent the gate electrode, forming a silicide region in the source/drain region, forming a post-silicide spacer adjacent the gate electrode after forming the silicide region, forming an interlayer dielectric layer over the gate electrode, the post-silicide spacer, and the silicide region, and forming a conductive via in the interlayer dielectric layer, extending to the silicide region.2009-06-04
20090142896METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device includes providing a semiconductor substrate having first and second low voltage transistor regions and first and second high voltage transistor regions. A dielectric layer is formed over the semiconductor substrate-in the low and high voltage transistor. Gates are formed over the dielectric layer in the low and high voltage regions. Lightly doped drains are formed in the first low-voltage transistor region and the first high-voltage transistor region by performing an ion implantation process on the semiconductor substrate using a first gate in the first low-voltage transistor region and a third gate in the first high-voltage transistor region as ion implantation masks and the dielectric layer as a buffer.2009-06-04
20090142897FIELD EFFECT TRANSISTOR WITH NARROW BANDGAP SOURCE AND DRAIN REGIONS AND METHOD OF FABRICATION - A transistor having a narrow bandgap semiconductor source/drain region is described. The transistor includes a gate electrode formed on a gate dielectric layer formed on a silicon layer. A pair of source/drain regions are formed on opposite sides of the gate electrode wherein said pair of source/drain regions comprise a narrow bandgap semiconductor film formed in the silicon layer on opposite sides of the gate electrode.2009-06-04
20090142898Coupling Well Structure for Improving HVMOS Performance - A semiconductor structure includes a substrate, a first well region of a first conductivity type overlying the substrate, a second well region of a second conductivity type opposite the first conductivity type overlying the substrate, a cushion region between and adjoining the first and the second well regions, an insulation region in a portion of the first well region and extending from a top surface of the first well region into the first well region, a gate dielectric extending from over the first well region to over the second well region, wherein the gate dielectric has a portion over the insulation region, and a gate electrode on the gate dielectric.2009-06-04
20090142899INTERFACIAL LAYER FOR HAFNIUM-BASED HIGH-K/METAL GATE TRANSISTORS - A method of forming an interfacial layer for hafnium-based high-k/metal gate transistors comprises depositing a hafnium-based high-k dielectric layer on a semiconductor substrate and then annealing the high-k dielectric layer and the semiconductor substrate in a nitric oxide atmosphere for a time duration and at a temperature sufficient to drive at least a portion of the nitric oxide through the dielectric layer to an interface between the dielectric layer and the substrate. At this interface, the nitric oxide reacts with the substrate to form a silicon oxynitride interfacial layer.2009-06-04
20090142900METHOD FOR CREATING TENSILE STRAIN BY SELECTIVELY APPLYING STRESS MEMORIZATION TECHNIQUES TO NMOS TRANSISTORS - By selectively applying a stress memorization technique to N-channel transistors, a significant improvement of transistor performance may be achieved. High selectivity in applying the stress memorization approach may be accomplished by substantially maintaining the crystalline state of the P-channel transistors while annealing the N-channel transistors in the presence of an appropriate material layer which may not to be patterned prior to the anneal process, thereby avoiding additional lithography and masking steps.2009-06-04
20090142901METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device is disclosed. The method includes: forming a photoresist film on a semiconductor substrate including a silicide forming region and non-silicide forming region; forming a photoresist pattern as a non-salicide pattern by patterning the photoresist film, so as to cover the non-silicide forming region and open the silicide forming region, with an overhang structure that a bottom is removed more compared to a top; forming a metal film on a top of the photoresist pattern and overall the semiconductor substrate in the silicide forming region; stripping the photoresist pattern and the metal film on the photoresist pattern; and forming a silicide metal film by annealing the metal film remaining on the semiconductor substrate. Therefore, the present invention simplifies a salicide process of a semiconductor device, making it possible to improve yields.2009-06-04
20090142902Methods Of Etching Trenches Into Silicon Of A Semiconductor Substrate, Methods Of Forming Trench Isolation In Silicon Of A Semiconductor Substrate, And Methods Of Forming A Plurality Of Diodes - A method of etching trenches into silicon of a semiconductor substrate includes forming a mask over silicon of a semiconductor substrate, with the mask comprising trenches formed there-through. Plasma etching is conducted to form trenches into the silicon of the semiconductor substrate using the mask. In one embodiment, the plasma etching includes forming an etching plasma using precursor gases which include SF2009-06-04
20090142903CHIP ON WAFER BONDER - The present disclosure provides a bonding apparatus. The bonding apparatus includes a cleaning module designed for cleaning chips; and a chip-to-wafer bonding chamber configured to receive the chips from the cleaning module and designed for bonding the chips to a wafer.2009-06-04
20090142904METHOD FOR MANUFACTURING SOI SUBSTRATE - A second single crystal semiconductor film is formed over a first single crystal semiconductor film; a separation layer is formed by addition of ions into the second single crystal semiconductor film; a second insulating film functioning as a bonding layer is formed over the second single crystal semiconductor film; a surface of a first SOI substrate and a surface of a second substrate are made to face each other, so that a surface of the second insulating film and the surface of the second substrate are bonded to each other; and then heat treatment is performed to cause cleavage at the separation layer, so that a second SOI substrate in which a part of the second single crystal semiconductor film is provided over the second substrate with the second insulating film interposed therebetween is formed.2009-06-04
20090142905METHOD FOR MANUFACTURING SOI SUBSTRATE - Adhesion defects between a single crystal semiconductor layer and a support substrate are reduced to manufacture an SOI substrate achiving high bonding strength between the single crystal semiconductor layer and the support substrate. Plasma is produced by exciting a source gas, ion species contained in the plasma are added from one surface of a single crystal semiconductor substrate, and thereby forming a damage region in the single crystal semiconductor substrate; forming an insulating layer over one surface of the single crystal semiconductor substrate; a support substrate is bonded so as to face the single crystal semiconductor substrate with the insulating layer therebetween; the single crystal semiconductor substrate is heated to separate the single crystal semiconductor substrate into a single crystal semiconductor layer bonded to the support substrate and a single crystal semiconductor substrate, in the damage region; and the single crystal semiconductor layer bonded to the support substrate is pressed.2009-06-04
20090142906METHOD OF DIVIDING WAFER - A method of dividing a wafer includes: a denatured layer forming step of forming a denatured layer in the inside of the wafer along streets; a first feeding step in which the whole area of the wafer's back-side surface is suction held, and the wafer is mounted on a support base of a tape adhering unit, with the wafer's back-side surface on the upper side; a dicing tape adhering step of adhering a dicing tape to the wafer's back-side surface and an annular frame; a wafer reversing step of reversing the wafer and the annular frame face side back; a second feeding step of feeding said wafer and said annular frame to a tape expanding unit whole holding them by suction; a protective tape peeling step of peeling off a protective tape adhered to the wafer's face-side surface; and a wafer dividing step of expanding the dicing tape so as to divide the wafer along the streets along which the denatured layer has been formed.2009-06-04
20090142907SEMICONDUCTOR MANUFACTURING APPARATUS AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - The present invention provides means for making appropriate a preheat condition at a sapphire substrate preheating step and thereby smoothing sucking and holding of a sapphire substrate. The means includes a hot plate for heating up a sapphire substrate in the atmosphere, support portions for supporting the sapphire substrate with a back surface thereof being opposite to the hot plate and a predetermined spacing being defined therebetween, and a jet hole provided in the hot plate and for jetting gas toward a central part of the sapphire substrate. When the sapphire substrate is preheated by the hot plate, a preheat condition for the sapphire substrate is set assuming that the predetermined spacing is 1 mm or less and the jet amount of the gas from the jet hole is 20 L/min or more. An end condition for the preheat is set as the time when the temperature of the central part of the sapphire substrate becomes lower 65° C. or more than that of an outer peripheral edge portion thereof.2009-06-04
20090142908METHOD OF MANUFACTURING PHOTOELECTRIC CONVERSION DEVICE - A photoelectric conversion device having an excellent photoelectric conversion characteristic is provided while effectively utilizing limited resources. A fragile layer is formed in a region at a depth of less than 1000 nm from one surface of a single crystal semiconductor substrate, and a first impurity semiconductor layer, a first electrode, and an insulating layer are formed on the one surface side of the single crystal semiconductor substrate. After bonding the insulating layer to a supporting substrate, the single crystal semiconductor substrate is separated with the fragile layer or its vicinity used as a separation plane, thereby forming a first single crystal semiconductor layer over the supporting substrate. A second single crystal semiconductor layer is formed by epitaxially growing a semiconductor layer on the first single crystal semiconductor layer in accordance with a plasma CVD method in which a silane based gas and hydrogen with a flow rate 50 times or more that of the silane gas are used as a source gas. A second impurity semiconductor layer which has a conductivity type opposite to that of the first impurity semiconductor layer is formed over the second single crystal semiconductor layer. A second electrode is formed over the second impurity semiconductor layer.2009-06-04
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