22nd week of 2022 patent applcation highlights part 55 |
Patent application number | Title | Published |
20220172950 | Method of Manipulating Deposition Ratges of Poly-Silicon and Method of Manufacturing a SiGe HBT Device | 2022-06-02 |
20220172951 | HEAT TREATMENT METHOD AND HEAT TREATMENT APPARATUS | 2022-06-02 |
20220172952 | PROCESSING METHOD OF WAFER | 2022-06-02 |
20220172953 | FIN PATTERNING TO REDUCE FIN COLLAPSE AND TRANSISTOR LEAKAGE | 2022-06-02 |
20220172954 | METHOD AND APPARATUS FOR TREATING SUBSTRATE | 2022-06-02 |
20220172955 | NOVEL ETCHING PATTERN FORMING METHOD IN SEMICONDUCTOR MANUFACTURING PROCESS | 2022-06-02 |
20220172956 | DRY ETCHING METHOD | 2022-06-02 |
20220172957 | SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2022-06-02 |
20220172958 | Method of Gap Filling Using Conformal Deposition-Annealing-Etching Cycle for Reducing Seam Void and Bending | 2022-06-02 |
20220172959 | METHOD FOR INCREASING THE SURFACE ROUGHNESS OF A METAL LAYER | 2022-06-02 |
20220172960 | METHOD FOR PRODUCING A CONNNECTION STRUCTURE AND SEMICONDUCTOR DEVICE | 2022-06-02 |
20220172961 | SEMICONDUCTOR PACKAGE HAVING SIDE WALL PLATING | 2022-06-02 |
20220172962 | EMBEDDED SEMICONDUCTIVE CHIPS IN RECONSTITUTED WAFERS, AND SYSTEMS CONTAINING SAME | 2022-06-02 |
20220172963 | SEMI-EMBEDDED TRACE STRUCTURE WITH PARTIALLY BURIED TRACES | 2022-06-02 |
20220172964 | SUBSTRATE DELIVERY METHOD AND SUBSTRATE DELIVERY DEVICE | 2022-06-02 |
20220172965 | CLEANING UNIT AND SUBSTRATE PROCESSING APPARATUS INCLUDING SAME | 2022-06-02 |
20220172966 | APPARATUS FOR TREATING SUBSTRATE | 2022-06-02 |
20220172967 | WAFER PLACEMENT CORRECTION IN INDEXED MULTI-STATION PROCESSING CHAMBERS | 2022-06-02 |
20220172968 | IN-CHAMBER LOW-PROFILE SENSOR ASSEMBLY | 2022-06-02 |
20220172969 | CONCENTRATION MEASUREMENT DEVICE | 2022-06-02 |
20220172970 | ADSORPTION DEVICE, TRANSFERRING SYSTEM HAVING SAME, AND TRANSFERRING METHOD USING SAME | 2022-06-02 |
20220172971 | HERMETICALLY SEALED HOUSING WITH A SEMICONDUCTOR COMPONENT AND METHOD FOR MANUFACTURING THEREOF | 2022-06-02 |
20220172972 | SUBSTRATE PROCESSING APPARATUS | 2022-06-02 |
20220172973 | METHOD AND APPARATUS FOR SUBSTRATE TRANSPORT APPARATUS POSITION COMPENSATION | 2022-06-02 |
20220172974 | LID OPENING-AND-CLOSING DEVICE | 2022-06-02 |
20220172975 | SUBSTRATE SUPPORT CARRIER WITH IMPROVED BOND LAYER PROTECTION | 2022-06-02 |
20220172976 | Arrangement and Method for Producing an Arrangement and a Component | 2022-06-02 |
20220172977 | SUBSTRATE TRANSFER APPARATUS | 2022-06-02 |
20220172978 | TEST DEVICE, CHANGE KIT, AND METHOD OF EXCHANGING CHANGE KIT | 2022-06-02 |
20220172979 | SUBSTRATE TREATING APPARATUS | 2022-06-02 |
20220172980 | SELF-CENTERING SUSCEPTOR RING ASSEMBLY | 2022-06-02 |
20220172981 | METHOD FOR MANUFACTURING A POLYSILICON SOI SUBSTRATE INCLUDING A CAVITY | 2022-06-02 |
20220172982 | Method for Manufacturing Shallow Trench Isolations | 2022-06-02 |
20220172983 | METHOD FOR TRANSFERRING A USEFUL LAYER ONTO A SUPPORT SUBSTRATE | 2022-06-02 |
20220172984 | LOW-TEMPERATURE METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR SUBSTRATE | 2022-06-02 |
20220172985 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2022-06-02 |
20220172986 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | 2022-06-02 |
20220172987 | TUNGSTEN FEATURE FILL WITH INHIBITION CONTROL | 2022-06-02 |
20220172988 | CONFORMAL AND SMOOTH TITANIUM NITRIDE LAYERS AND METHODS OF FORMING THE SAME | 2022-06-02 |
20220172989 | Nucleation-Free Gap Fill ALD Process | 2022-06-02 |
20220172990 | Method of Manufacturing a Semiconductor Structure | 2022-06-02 |
20220172991 | Method for Recessing a Fill Material Within Openings Formed on a Patterned Substrate | 2022-06-02 |
20220172992 | SEMICONDUCTOR DIE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | 2022-06-02 |
20220172993 | METHOD OF DICING WAFER | 2022-06-02 |
20220172994 | METHODS OF ALIGNING A SEMICONDUCTOR WAFER FOR SINGULATION | 2022-06-02 |
20220172995 | CHIP MANUFACTURING METHOD | 2022-06-02 |
20220172996 | TUNNEL POLARIZATION JUNCTION III-N TRANSISTORS | 2022-06-02 |
20220172997 | Semiconductor Structure and Manufacturing Method Thereof | 2022-06-02 |
20220172998 | SEMICONDUCTOR DEVICE INCLUDING A FIN-FET AND METHOD OF MANUFACTURING THE SAME | 2022-06-02 |
20220172999 | SEMICONDUCTOR DEVICE WITH CONTRACTED ISOLATION FEATURE | 2022-06-02 |
20220173000 | MANUFACTURING METHOD OF PACKAGE CIRCUIT | 2022-06-02 |
20220173001 | SiC EPITAXIAL WAFER AND METHOD FOR PRODUCING SiC EPITAXIAL WAFER | 2022-06-02 |
20220173002 | INTEGRATED CIRCUIT DEVICES | 2022-06-02 |
20220173003 | Warpage Control of Packages Using Embedded Core Frame | 2022-06-02 |
20220173004 | Semiconductor Packaging Method, Semiconductor Assembly and Electronic Device Comprising Semiconductor Assembly | 2022-06-02 |
20220173005 | Semiconductor Packaging Method, Semiconductor Assembly and Electronic Device Comprising Semiconductor Assembly | 2022-06-02 |
20220173006 | CHIP PACKAGE, SEMICONDUCTOR ARRANGEMENT, METHOD OF FORMING A CHIP PACKAGE, AND METHOD OF FORMING A SEMICONDUCTOR ARRANGEMENT | 2022-06-02 |
20220173007 | SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING SEMICONDUCTOR MODULE | 2022-06-02 |
20220173008 | SEMICONDUCTOR PACKAGE INCLUDING HIGH THERMAL CONDUCTIVITY LAYER | 2022-06-02 |
20220173009 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2022-06-02 |
20220173010 | METHOD OF MANUFACTURING BONDED BODY FOR INSULATION CIRCUIT SUBSTRATE BOARD AND BONDED BODY FOR INSULATION CIRCUIT SUBSTRATE BOARD | 2022-06-02 |
20220173011 | SEMICONDUCTOR DEVICE | 2022-06-02 |
20220173012 | SEMICONDUCTOR DEVICE | 2022-06-02 |
20220173013 | COOLER AND SEMICONDUCTOR APPARATUS | 2022-06-02 |
20220173014 | LIQUID COOLING SYSTEM | 2022-06-02 |
20220173015 | LIQUID COOLED COLD PLATE FOR MULTIPLE SEMICONDUCTOR CHIP PACKAGES | 2022-06-02 |
20220173016 | SEMICONDUCTOR DEVICE INCLUDING TSV AND METHOD OF MANUFACTURING THE SAME | 2022-06-02 |
20220173017 | SEMICONDUCTOR DEVICE | 2022-06-02 |
20220173018 | SEMICONDUCTOR PACKAGE WITH DIE STACKED ON SURFACE MOUNTED DEVICES | 2022-06-02 |
20220173019 | LEAD FRAME, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF LEAD FRAME | 2022-06-02 |
20220173020 | AN ELECTRICAL CONNECTION STRUCTURE AND AN ELECTRONIC DEVICE INCLUDING THE SAME | 2022-06-02 |
20220173021 | SEMICONDUCTOR DEVICE, CORRESPONDING MANUFACTURING METHODS AND COMPONENT | 2022-06-02 |
20220173022 | CLIPS FOR SEMICONDUCTOR PACKAGE AND RELATED METHODS | 2022-06-02 |
20220173023 | PACKAGE WITH LOAD TERMINALS ON WHICH COUPLED POWER COMPONENT AND LOGIC COMPONENT ARE MOUNTED | 2022-06-02 |
20220173024 | SEMICONDUCTOR PACKAGE | 2022-06-02 |
20220173025 | PRINTED CIRCUIT BOARD AND ELECTRONIC COMPONENT PACKAGE | 2022-06-02 |
20220173026 | PACKAGE SUBSTRATE FILM AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME | 2022-06-02 |
20220173027 | SYSTEMS, METHODS, AND APPARATUSES FOR IMPLEMENTING A PAD ON SOLDER MASK (POSM) SEMICONDUCTOR SUBSTRATE PACKAGE | 2022-06-02 |
20220173028 | SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME | 2022-06-02 |
20220173029 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING PATTERNS FOR A SEMICONDUCTOR DEVICE | 2022-06-02 |
20220173030 | STORAGE SYSTEM INCLUDING A DECOUPLING DEVICE HAVING A PLURALITY OF UNIT CAPACITORS | 2022-06-02 |
20220173031 | DEVICE, METHOD AND SYSTEM TO PREVENT PATTERN COLLAPSE IN A SEMICONDUCTOR STRUCTURE | 2022-06-02 |
20220173032 | SEMICONDUCTOR MEMORY DEVICE | 2022-06-02 |
20220173033 | PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME | 2022-06-02 |
20220173034 | SELF ALIGNED GRATINGS FOR TIGHT PITCH INTERCONNECTS AND METHODS OF FABRICATION | 2022-06-02 |
20220173035 | MAGNETIC CORE WITH HARD FERROMAGNETIC BIASING LAYERS AND STRUCTURES CONTAINING SAME | 2022-06-02 |
20220173036 | METAL LOSS PREVENTION IN CONDUCTIVE STRUCTURES | 2022-06-02 |
20220173037 | SEMICONDUCTOR DEVICE WITH ANTI-FUSE AND METAL-INSULATOR-METAL (MIM) CAPACITOR CONNECTED TO REDISTRIBUTION LAYER (RDL) AND METHOD FOR FORMING THE SAME | 2022-06-02 |
20220173038 | BONDING ALIGNMENT MARKS AT BONDING INTERFACE | 2022-06-02 |
20220173039 | SELF-ALIGNED LOW RESISTANCE BURIED POWER RAIL THROUGH SINGLE DIFFUSION BREAK DUMMY GATE | 2022-06-02 |
20220173040 | MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2022-06-02 |
20220173041 | METHOD FOR PREPARING SEMICONDUCTOR DEVICE STRUCTURE WITH MANGANESE-CONTAINING LINLING LAYER | 2022-06-02 |
20220173042 | Interconnect Structure with Vias Extending Through Multiple Dielectric Layers | 2022-06-02 |
20220173043 | SEMICONDUCTOR MODULE PARALLEL CIRCUIT AND SEMICONDUCTOR MODULE CONNECTION SUBSTRATE | 2022-06-02 |
20220173044 | SEMICONDUCTOR PACKAGE HAVING DUMMY PADS AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE HAVING DUMMY PADS | 2022-06-02 |
20220173045 | SEMICONDUCTOR DEVICE WITH PROGRAMMABLE UNIT AND METHOD FOR FABRICATING THE SAME | 2022-06-02 |
20220173046 | INTEGRATED CIRCUIT ASSEMBLIES WITH DIRECT CHIP ATTACH TO CIRCUIT BOARDS | 2022-06-02 |
20220173047 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH PROGRAMMABLE UNIT | 2022-06-02 |
20220173048 | SEMICONDUCTOR PACKAGE DEVICE | 2022-06-02 |
20220173049 | REDUCING STRESS CRACKS IN SUBSTRATES | 2022-06-02 |