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22nd week of 2012 patent applcation highlights part 17
Patent application numberTitlePublished
20120133317SPEED ADJUSTMENT CIRCUIT FOR A PLURALITY OF FANS - A speed adjustment circuit for a plurality of fans includes a voltage input terminal, a plurality of speed control modules, and a fan tachometer. Each of the speed control modules includes a fan connector, a speed adjusting unit, and a detector switch unit. The speed adjusting unit includes a switching control unit, a voltage adjusting chip, and a variable resistor. The detector switch unit includes a first switch. The voltage input terminal connects to the input terminal of the voltage adjusting chip through the switching control unit. The output terminal of the voltage adjusting chip connects to the power pin of the fan connector. The adjusting terminal of the voltage adjusting chip connects to ground through the variable resistor, and connects to the output terminal of the voltage adjusting chip through a resistor. The detection pin of the fan connector connects to the fan tachometer through the first switch.2012-05-31
20120133318CONTROL APPARATUS, CONTROL METHOD, AND CONTROL PROGRAM FOR ELASTIC ACTUATOR DRIVE MECHANISM - An abnormality determination unit that determines whether or not an output measurement unit is abnormal is provided, and whether or not the output measurement unit is abnormal is determined. When the output measurement unit is abnormal, an elastic actuator is controlled based on a desired internal state decision unit and an internal state error compensation unit. Accordingly, it becomes possible to control the elastic actuator to continuously operate to a predetermined position without instantaneously stopping even when the output measurement unit is abnormal.2012-05-31
20120133319METHODS, SYSTEMS, AND DEVICES FOR A MOTOR CONTROL SYSTEM - Systems, devices, and methods for controlling a motor are disclosed. A method may include determining a rotational direction of a motor from a pair of quadrature signals sent to a microprocessor. The method further includes adjusting an internal count stored in the microprocessor at each edge of each of the pair of quadrature signals. The method further includes adjusting an external count stored in the microprocessor and transmitting an interrupt to a main controller after the first phase signal and the second phase signal have transitioned through each combinational logic state in one of a forward rotational direction and a reverse rotational direction. The method further includes transmitting a signal comprising the rotational direction of the motor and the external count from the microprocessor to a main controller.2012-05-31
20120133320Electric Machine and Current Source Inverter Drive System - A drive system includes an electric machine and a current source inverter (CSI). This integration of an electric machine and an inverter uses the machine's field excitation coil for not only flux generation in the machine but also for the CSI inductor. This integration of the two technologies, namely the U machine motor and the CSI, opens a new chapter for the component function integration instead of the traditional integration by simply placing separate machine and inverter components in the same housing. Elimination of the CSI inductor adds to the CSI volumetric reduction of capacitors and the elimination of PMs for the motor further improve the drive system cost, weight, and volume.2012-05-31
20120133321SOLAR POWERED RECHARGEABLE DEVICE FOR USE WITH AN ELECTRONIC DEVICE AND METHOD THEREOF - A solar powered device comprising a solar radiation collection portion, wherein the solar radiation collection portion includes: a first solar panel to collect solar radiation, a concentrator positioned a distance above the first solar panel to concentrate the solar radiation, and a charge controller coupled to the first solar panel, the charge controller electrically coupled to a first receptacle, a base portion, the base portion including a battery unit having a plurality of legs, wherein a second receptacle is electrically coupled to the battery unit, and a connection portion operably connecting the solar radiation collection portion to the base portion, the connection portion including a connection member having a first end and a second end. Furthermore, an associated method is also provided.2012-05-31
20120133322SOLAR POWER MANAGEMENT FOR A VEHICLE - A photovoltaic storage and charging system for a vehicle includes a photovoltaic apparatus disposed on the vehicle for absorbing radiant energy and converting the absorbed radiant energy into electrical energy. At least one energy storage device stores the electrical energy from the photovoltaic apparatus, and the stored electrical power is available for use by the vehicle. An electrical energy converter is disposed between the photovoltaic apparatus and the energy storage device, to receive the electrical energy from the photovoltaic apparatus, boost the energy to a predetermined level for charging the energy storage device and deliver the boosted electrical energy to the energy storage device.2012-05-31
20120133323NON-DIFFUSION LIQUID ENERGY STORAGE DEVICE - Disclosed herein is an efficient and high capacity electrical energy storage device consisting of diaphragm-less anode and cathode cells charging and discharging an electrolyte containing suitable ions that store electrical energy during the charging cycle and release the electrical energy during the discharge cycle. The charge-discharge reactions are reversible so that the efficiency does not reduce with the number of cycles and efficiency is maintained until the last of the charged electrolyte passes through the cells.2012-05-31
20120133324INDUCTIVE POWER SUPPLY SYSTEM WITH BATTERY TYPE DETECTION - An inductive power supply system to wirelessly charge a remote device based on detected battery characteristics. The system includes an inductive power supply with a primary coil capable of inductively providing power to a secondary coil in a remote device. The inductive power supply and remote device include communication means for wirelessly communicating. The system further includes a remote device, having a battery with detectable battery characteristics. In operation, the remote device is capable of detecting the battery characteristics by applying a qualification charge to the battery. The inductive power supply system is capable of identifying the battery installed in the remote device by analyzing the detected battery characteristics. The inductive power supply system selects an appropriate charging algorithm based on the analyzed characteristics.2012-05-31
20120133325Methods and Systems for Charging an Energy Storage Device - A charging device for charging an energy storage device is described. The charging device includes a memory for storing a plurality of state machines and a processing device coupled to the memory. The processing device is configured to select a state machine of the plurality of state machines and to operate the charging device in accordance with the selected state machine.2012-05-31
20120133326CHARGING SYSTEM - A charging system includes a locking device locking a connector provided at the end of a cable in the state where the connector is connected to an inlet provided in a vehicle; a release button for releasing locking by the locking device; a switch generating a signal indicating that the connector and the inlet are connected; a horn; and an ECU. In response to the operation of the release button, the switch stops generation of the signal. The ECU controls charging of a power storage device and detects whether the signal is issued or not. In the case where the ECU detects that generation of the signal is stopped during charging of the power storage device, the ECU causes the horn to issue an alarm.2012-05-31
20120133327ELECTROMAGNETIC TOUCH INPUT PEN HAVING A USB INTERFACE - An electromagnetic touch input pen having a USB interface, used to provide touch input to an information processing device, the pen including: an electromagnetic touch input pen, having a battery module; and a USB plug, coupled with the battery module, wherein the battery module can access a charging power with the USB plug inserted into a USB socket of the information processing device.2012-05-31
20120133328Charging Cradle - A charging cradle for a rechargeable medium having a charging contact. The charging cradle including a cradling-body, which includes a receiving area shaped to receive the rechargeable medium; a charging circuit having a charging and a non-charging state; a charging contact electrically coupled to the charging circuit and positioned to be alignable with the charging contact of the rechargeable medium; and a switch coupled to the cradling-body for interacting with the rechargeable medium to place the charging circuit in the charging state or the non-charging state. When the rechargeable medium is fully inserted into the receiving area such that the charging contact of the rechargeable medium is aligned with the charging contact of the cradling-body, the rechargeable medium, via the switch, places the charging circuit in the charging state, and when the rechargeable medium is not fully inserted, the switch places the charging circuit in the non-charging state to prevent short-circuiting of the charging circuit.2012-05-31
20120133329BATTERY SYSTEM - A battery system is provided that can prevent overcharging during charging, and that can demonstrate appropriate charging performance and output performance of a secondary battery even when the battery system is used in a low-temperature environment. The battery system includes a secondary battery and a protection circuit. The protection circuit includes a bypass electrical path that connects an upstream-side main electrical path that is connected to a positive terminal of the secondary battery to a downstream-side main electrical path that is connected to a negative terminal of the secondary battery. The battery system is configured so that, when the voltage of the secondary battery exceeds a predetermined voltage during charging, current flowing through the secondary battery decreases while current flowing through the bypass electrical path increases, and when the voltage of the secondary battery falls below the predetermined voltage during charging, the current flowing through the secondary battery increases while the current flowing through the bypass electrical path decreases. The bypass electrical path includes a heater that generates heat using the current flowing through the bypass electrical path, and the heater is arranged adjacent to or in close contact with the secondary battery so as to impart a thermal effect to the secondary battery.2012-05-31
20120133330CELL BALANCE CONTROL DEVICE - What is provided is a cell balance control device including: a bypass circuit including a direct circuit with a bypass resistance and a switching element, the bypass circuit being connected in parallel to each of a plurality of cells included in a battery; a cell voltage detection unit detecting a cell voltage of each of the plurality of cells; a temperature detection unit detecting a temperature of a substrate on which the bypass circuit is mounted; and a control unit controlling and computing a duty ratio of the switching element based on a value detected by the temperature detection unit and a cell voltage of a discharge-needed cell obtained by the cell voltage detection unit.2012-05-31
20120133331METHOD FOR CHECKING AND MODULATING BATTERY CAPACITY AND POWER BASED ON DISCHARGING/CHARGING CHARACTERISTICS - A method for checking and modulating battery capacity and power based on charging/discharging characteristics is provided. In terms of discharge, a relationship between an open circuit voltage and an output electric capacity of a battery is measured to obtain a first characteristic curve. A relationship between a voltage and the output electric capacity of a battery at a predetermined maximum charge/discharge current rate is measured to obtain a second characteristic curve. A characteristic boundary line passing the first and the second characteristic points respectively selected from the first and the second characteristic curves is established. A voltage value corresponding to the first characteristic point is higher than a voltage value corresponding to the second characteristic point. The first and the second characteristic curves, and the characteristic boundary line define an operation range. The battery is charged/discharged within the operation range.2012-05-31
20120133332STORAGE CAPACITY MANAGEMENT SYSTEM - A storage capacity management system includes an upper limit terminal voltage inducing part for inducing an upper limit terminal voltage which is a terminal voltage when the storage capacity of the battery is an upper limit storage capacity, a lower limit terminal voltage inducing part for inducing a lower limit terminal voltage which is a terminal voltage when the storage capacity of the battery is a lower limit storage capacity, an upper and lower limit voltage width calculating part for calculating an upper and lower limit voltage width by subtracting the lower limit terminal voltage from the upper limit terminal voltage, an intermediate voltage difference calculating part for calculating an intermediate voltage difference by subtracting the lower limit terminal voltage from a terminal voltage of the battery, an upper and lower limit voltage ratio calculating part for calculating an upper and lower limit voltage difference which is a ratio of the intermediate voltage difference to the upper and lower limit voltage width, an intermediate determination voltage ratio inducing part for inducing an intermediate determination voltage ratio according to upper and lower limit capacities of the battery, a voltage ratio comparing part for comparing the upper and lower voltage ratio with the intermediate determination voltage ratio, and an intermediate storage capacity inducing part for inducing an intermediate storage capacity based on the upper limit storage capacity, the lower limit storage capacity and the intermediate determination voltage ratio when the results of the comparison by the voltage ratio comparing part satisfy a predetermined condition. Consequently, the storage capacity of the battery can be managed with high accuracy.2012-05-31
20120133333ENERGY SYSTEM - An energy system having a plurality of storage batteries and renewable power supplies includes an information processor. Each of the storage batteries is individually set to a maximum SOC representing a charging limit and a minimum SOC representing a discharging limit. Each of the storage batteries is chargeable and dischargeable under the control of an external device and is capable of measuring SOC values. The information processor controls charging and discharging processes of the storage batteries individually to keep the storage batteries charged until SOC values acquired from the storage batteries reach the maximum SOC when the storage batteries are charged and to keep the storage batteries discharged until SOC values acquired from the storage batteries reach the minimum SOC when the storage batteries are discharged.2012-05-31
20120133334METHOD AND CHARGING APPARATUS FOR CHARGING A MOTOR VEHICLE BATTERY - The invention relates to a method for charging at least one motor vehicle battery (2012-05-31
20120133335ELECTRONIC DEVICE, METHOD, AND STORAGE MEDIUM - An electronic device includes a first unit that wirelessly receives power from a power supply apparatus, and a control unit that executes control, if an external apparatus, including a second unit that wirelessly receives power from the power supply apparatus, and the electronic device are connected, to select at least one of the first unit and the second unit.2012-05-31
20120133336RECHARGEABLE BATTERY CHECKER - A rechargeable battery checker for measuring the voltage of a rechargeable battery includes a PMIC, a charging switch, a voltage measuring switch, and a control circuit. The charging switch is connected to a charging terminal of the PMIC and the rechargeable battery, to control the PMIC to charge or pause charging the rechargeable battery. The voltage measuring switch is connected to a voltage measuring terminal of the PMIC and the rechargeable battery, to control the PMIC to measure or pause measuring the voltage of the rechargeable battery. The control circuit connects to the charging switch and the voltage measuring switch, and to output a modulated signal, and periodically change the signal to switch on/off the charging switch and the voltage measuring switch. The PMIC determines whether the rechargeable battery is fully charged according to the measured voltage of the rechargeable battery.2012-05-31
20120133337METHOD AND SYSTEM FOR CHARGING A FLEET OF BATTERIES - In a method for charging a fleet of batteries (2012-05-31
20120133338METHOD OF CHARGING NON-AQUEOUS ELECTROLYTE SECONDARY BATTERY, AND BATTERY PACK - In the present method, a non-aqueous electrolyte secondary battery is charged by repeating n+1 times a constant current charge and a subsequent constant voltage charge, where n is an integer of 1 or more. (1) An n2012-05-31
20120133339RADIOGRAPHIC IMAGE DETECTION DEVICE AND RADIOGRAPHIC IMAGE CAPTURING SYSTEM - A radiographic image capturing system having, a low-current electric power feeding section, a high-current electric power feeding section, and a cassette-type radiographic image detection device having a battery which feeds electric power, the radiographic image detection device including: a power receiving side connection section receiving electric power from an electric power feeding section having been connected; a first charging path converting electric power fed from the power feeding section into charging electric power which is fed to the battery; a second charging path feeding the electric power to the battery without the conversion; and a charging path switching section switching when the low-current electric power feeding section has been connected to the power receiving side connection section, electric power is fed via the first charging path and when the high-current electric power feeding section has been connected, electric power is fed via the second charging path.2012-05-31
20120133340CHARGING CONTROL CIRCUIT - A charging control apparatus controls charging of a battery connected to a battery terminal and supplies a voltage and a current necessary for a system circuit through an output terminal. The charging control apparatus has a switching control circuit that controls a DC-DC converter, the DC-DC converter performing DC-DC conversion with respect to an input voltage input through an input terminal and outputting an obtained output voltage to the output terminal. The charging control apparatus has an output voltage detection circuit that detects the output voltage. The charging control apparatus has a battery voltage detection circuit that detects a battery voltage of the battery terminal. The charging control apparatus has a first switch MOS transistor connected between the output terminal and the battery terminal. The charging control apparatus has a voltage control circuit that controls an operation of the first switch MOS transistor according to the battery voltage.2012-05-31
20120133341Control of Silver Vanadium Oxide Surface Areas as a Means of Controlling Voltage Delay and RDC Growth in an Electrochemical Cell - An electrochemical cell comprising a lithium anode, a cathode comprising a blank cut from a free-standing sheet of a silver vanadium oxide mixture contacted to a current collector. The active material has having a relatively lower surface area and an electrolyte activating the anode and the cathode is described. By optimizing the cathode active material surface area in a SVO-containing cell, the magnitude of the passivating film growth at the solid-electrolyte interphase (SEI) and its relative impermeability to lithium ion diffusion is reduced. Therefore, by using a cathode of an active material, in a range of from about 0.2 m2012-05-31
20120133342WIND TURBINE GENERATOR AND SURPLUS ENERGY CONTROL METHOD FOR WIND TURBINE GENERATOR - A wind turbine generator includes a synchronous generator that generates electric power via rotation of a rotor provided with blades that receive wind and that supplies the generated electric power to a utility grid, and a sea water resistor in which sea water serves as a resistive element. When the output power of the synchronous generator drops suddenly because of a momentary power interruption caused by a fault occurring on the utility grid, thus producing surplus energy, the sea water resistor consumes, in the form of electric power, the surplus energy that cannot be supplied to the utility grid from among the electric power generated at the synchronous generator. Because the sea water resistor uses sea water as the resistive element, the problem of heat generation hardly ever arises, and because the sea water can be easily exchanged, it is not affected by lifetime or on-time limitations.2012-05-31
20120133343WIND TURBINE HAVING A HIGH-VOLTAGE RIDE THROUGH (HVRT) MODE - A wind turbine connected to a power grid is provided. The wind turbine is selectively activated to operate at a high-voltage ride through (HVRT) mode. The wind turbine includes a grid voltage circuit, a DC bus, a voltage source, and a dynamic brake. The grid voltage circuit monitors a fundamental voltage of the power grid and activates the HVRT mode if the fundamental voltage is at least about equal to a threshold voltage value. The DC bus has a DC bus voltage. The voltage source provides a DC bus rated voltage. The dynamic brake has a brake chopper and a resistive element. The dynamic brake is connected to the DC bus. The dynamic brake is connected to the voltage source if the HVRT mode is activated.2012-05-31
20120133344SWITCHING POWER SUPPLY DEVICE - A switching power supply device of a nonlinear control manner is provided, which includes: a reference voltage generation portion, for generating a reference voltage; a ripple injection portion, for using a switch voltage at one end of a switch element to generate a ripple component, and injecting the ripple component into the reference voltage to generate a ripple reference voltage; a comparator, for comparing a feedback voltage corresponding to an output voltage with the ripple reference voltage; a switching control portion, for performing on/off control on the switch element based on an output signal of the comparator; and an offset adjustment portion for generating an offset voltage corresponding to the switch voltage, and setting any of the reference voltage, the feedback voltage, and the ripple reference voltage to the offset voltage.2012-05-31
20120133345HYSTERETIC POWER CONVERTER WITH CALIBRATION CIRCUIT - A hysteretic power converter includes a comparator, a calibration circuit, and an output node having an output voltage. The calibration circuit is configured to supply a calibrated voltage to the comparator. The comparator controls the output voltage based on the calibrated voltage and a feedback voltage representing at least a portion of the output voltage.2012-05-31
20120133346SUCCESSIVE APPROXIMATION REGISTER A/D CONVERTER AND DC/DC CONVERTER - The SAR control circuit of the successive approximation register A/D converter changes the digital value by the first conversion frequency in a first conversion range according to the comparison result signal, and outputs the digital value.2012-05-31
20120133347EFFICIENCY-OPTIMIZING, CALIBRATED SENSORLESS POWER/ENERGY CONVERSION IN A SWITCH-MODE POWER SUPPLY - An intelligent pulse width modulation (PWM) controller adapts a switch mode power supply (SMPS) system's operating parameters to optimize efficiency, remove hot spots and isolate faults by integrating a microcontroller, PWM digital circuits and analog circuits into a single integrated circuit, e.g., a mixed signal device, thereby reducing the number of external connections, silicon die area and integrated circuit packages. A lossless inductor current sense technique integrates a matched, tunable complimentary filter with the intelligent SMPS controller for accurately measuring current through the power inductor of the SMPS without introducing losses in the power circuit. The complimentary filter is adjusted by the microcontroller to significantly reduce the effects of component tolerances, accurately measuring the power inductor current for precise closed loop control and over current protection. The frequency pole and gain of the complimentary integrated filter can be adjusted on the fly in order to adapt to dynamically changing operating conditions of the SMPS system.2012-05-31
20120133348AUDIO-SKIPPING OF A CONSTANT ON-TIME POWER CONVERTER - When the switching frequency of a constant on-time power converter decreases to a threshold, the power converter is switched from the original operation of triggering a constant on-time of a high-side switch responsive to the output voltage of the power converter reaching a valley point to the operation of triggering a constant off-time of the high-side switch responsive to the output voltage reaching a peak point, to thereby prevent the power converter from operating in an audio frequency range.2012-05-31
20120133349MEASUREMENT CIRCUIT FOR BUCK CIRCUIT - A measurement circuit for overload protection is applied in a buck circuit. The buck circuit includes a pulse width modulation (PWM) controller and a voltage output terminal. The measurement circuit includes a resistance setting circuit to connect different resistances to the PWM controller of the buck circuit. A switch circuit turns the measurement circuit on or off. A current collection circuit receives a voltage from the voltage output terminal of the buck circuit and transforms the received voltage to a current, and amplifies the transformed current and outputs the amplified current to the resistance setting circuit. The resistance setting circuit chooses a resistance through comparison of the amplified current with a preset current. A display unit displays the chosen resistance.2012-05-31
20120133350DIRECT CURRENT VOLTAGE SUPPLY APPARATUS - A DC voltage supply apparatus including a voltage detection unit, an enable signal processing unit, a latch unit, a control unit and a voltage transforming unit is provided. The voltage detection unit receives and detects a DC input voltage to generate an input voltage state signal. The enable signal processing unit receives the input voltage state signal and an enable signal, and determines a state of the enable signal according to the input voltage state signal. When the enable signal is ineffective, the latch unit latches the enable signal to keep an ineffective state. The control unit receives the enable signal, and generates a control signal. When the control signal is effective, the voltage transforming unit receives the DC input voltage and transforms the DC input voltage into a DC output voltage. When the control signal is ineffective, the voltage transforming unit stops receiving the DC input voltage.2012-05-31
20120133351SWITCHING POWER SOURCE - A switching power source according to one embodiment includes a first transistor and a second transistor. The first transistor is connected to a positive electrode of a DC voltage source. The second transistor is connected between the first transistor and a negative electrode of the DC voltage source. The first transistor and the second transistor are alternately placed in conducting state. A gate signal is applied to a gate terminal of the first transistor with reference to a voltage of a terminal of the first transistor that is connected to the positive electrode. A gate signal is applied to a gate terminal of the second transistor with reference to a voltage of a terminal of the second transistor that is connected to the negative electrode. The first transistor and the second transistor are configured with wide bandgap semiconductors of mutually different materials, respectively.2012-05-31
20120133352VOLTAGE DETECTION - Techniques are disclosed relating to detecting a voltage change. In one embodiment, an integrated circuit may include a monitor circuit and a power management unit. The power management unit may be configured to request a voltage change. The monitor circuit may be configured to detect the requested voltage change and to provide an indication that the voltage change is complete. In response to the indication that the voltage change is complete, the power management unit may adjust a clock frequency.2012-05-31
20120133353POWER-SUPPLY-VOLTAGE DETECTING CIRCUIT - A power-supply-voltage detecting circuit in an embodiment includes a compensation circuit and a switching element which controls ON-and-OFF of the signal output of the signal circuit. The compensation circuit has a positive temperature coefficient to balance out the negative temperature coefficient that the switching element has.2012-05-31
20120133354LIPID BILAYER SENSOR ARRAY - An apparatus for sensing of an interaction of a molecular entity with a membrane protein in a lipid bilayer comprises an array of sensor elements (2012-05-31
20120133355VOLTAGE MEASUREMENT APPARATUS - A resistor element that is coupled between each of voltage measurement points of a measurement object and a voltage measurement circuit is further coupled to a path of a constant current between a power supply side constant current circuit and a ground side constant current circuit. By controlling the operation of the power supply side constant current circuit and the ground side constant current circuit with a control circuit, the control circuit switches the switch circuit on and off to prevent a voltage drop due to an electric current that turns on the switch circuit.2012-05-31
20120133356AUTO-CALIBRATING A MAGNETIC FIELD SENSOR - In one embodiment a method to compensate for the sensitivity drift of a magnetic field sensor for sensing a magnetic field comprises forming a reference magnetic field having first magnetic field parameters, e.g. a first amplitude and/or direction, in a first step and second magnetic field parameters, a second amplitude and/or direction, in a second step and a bias signal is formed without adjusting the bias signal with a feedback signal derived from an output signal of the magnetic field sensor.2012-05-31
20120133357HYBRID SENSOR ARRANGEMENT - A position-sensor and/or speed-sensor arrangement comprising a sensor with at least a first sensitive main plane and an encoder with at least one encoder track face. The sensor senses a magnetic field generated and/or modulated by the encoder, and the sensor has at least a first magnetic field sensor element and a second magnetic field sensor element. The first magnetic field sensor element has at least a first main sensing direction and the second magnetic field sensor element has an at least second main sensing direction different from the first main sensing direction. The first magnetic field sensor element and the second magnetic field sensor element are arranged such that at least an element output signal of the first magnetic field sensor element has a phase shift absolute value between 75° and 105° with respect to at least one element output signal of the second magnetic field sensor element.2012-05-31
20120133358Nuclear Magnetic Resonance Scanning of Metal Containers Using Medium-Field Technology - A method and apparatus are provided for medium-field NMR scanning of liquids that is capable of discriminating benign liquids such as lotions, drinks, and pharmaceutical liquids from threat liquids such as components of home-made explosives.2012-05-31
20120133359MAGNETIC RESONANCE IMAGING APPARATUS AND METHOD - A magnetic resonance imaging apparatus configured to divide a data acquisition region defined in a k2012-05-31
20120133360MAGNETIC RESONANCE DIAGNOSIS APPARATUS AND DATA ACQUISITION METHOD OF MAGNETIC RESONANCE SPECTROSCOPY - In one embodiment, a magnetic resonance diagnosis apparatus includes an application region calculation unit and a data generation unit. The application region calculation unit automatically calculates an application region of a prepulse based on “image data including a region of interest of an object generated by magnetic resonance imaging before application of a prepulse”. The data generation unit applies the prepulse according to the application region automatically calculated by the application region calculation unit, then receives a magnetic resonance signal from a data acquisition region including the region of interest, and generates magnetic resonance spectrum data indicative of concentration distribution per metabolic substance in the region of interest based on the magnetic resonance signal.2012-05-31
20120133361SUPPLEMENTATION OF ACQUIRED, UNDERSAMPLED MR DATA - In a computerized method and magnetic resonance (MR) system for the supplementation of acquired MR data, at least one supplemented MR data set is determined from multiple acquired, reduced MR data sets that can be acquired with an accelerated acquisition method (such as partially parallel acquisition method, ppa) in which k-space is undersampled. The acquisition can thereby take place in parallel with multiple acquisition coils. In the method and system, a reconstruction kernel is applied to the multiple acquired, reduced MR data sets in order to determine a reconstructed MR data set for an acquisition coil. The reduced MR data set acquired with the acquisition coil is reused in this reconstructed MR data set. The reuse takes place by a combination with weighting with the respective variances.2012-05-31
20120133362MAGNETIC RESONANCE METHOD AND SYSTEM FOR PHASE CORRECTION OF MAGNETIC RESONANCE SIGNALS ORIGINATING IN MIXED TISSUE - In a magnetic resonance (MR) system and method to separate an MR system-dependent phase influence from a subject-dependent phase influence in phase values of an MR phase image data set of an examination subject acquired, to which two different tissue types with different resonance frequencies make a signal contribution, the system-dependent phase influence is determined by selecting a contour around a region shown in the MR phase image data set, calculating the system-dependent phase influence in this region with the assumption that the spatial curve of the background phase corresponds to a harmonic or quasi-harmonic function, and subtracting the system-dependent phase influence from the acquired phase image data set to determine the subject-dependent phase influence.2012-05-31
20120133363MAGNETIC RESONANCE COMPATIBLE AND SUSCEPTIBILITY-MATCHED APPARATUS AND METHOD FOR MR IMAGING & SPECTROSCOPY - Electrodes, infusion cannula, and interventional MRI instrumentation, are constructed with multiple layers or mixtures of metals or alloys that allow the diamagnetic behavior of some metals to combine with the paramagnetic behavior of others, wherein the devices have a magnetic susceptibility which is close to that of the material, for example body tissue, being im The material may thereby be imaged using MRI with resultant images having greatly reduced distortion. Optimal metal composites are determined through mathematical modeling and measurements. In particular, MR compatible susceptibility-matched electrodes may be used for stimulation and for acquiring electroencephalography (EEG) data before, during and after MR image and spectroscopy measurements, with a significant reduction in distortion of the resulting images and spectra. In accordance with the invention, these electrodes may further be incorporated into micro-electrode arrays. In addition, MR compatible susceptibility-matched cannula can implanted before, during and after MR image and spectroscopy measurements, with a significant reduction in distortion of the resulting images and spectra.2012-05-31
20120133364METHOD OF AND APPARATUS FOR IN-SITU MEASUREMENT OF DEGRADATION OF AUTOMOTIVE FLUIDS AND THE LIKE BY MICRO-ELECTRON SPIN RESONANCE (ESR) SPECTROMETRY - A method of and miniaturized apparatus adapted for in-situ measurement of degradation of automotive fluids and the like by micro-electron spin resonance (ESR) spectrometry, wherein the use of a modulated constant magnetic field in an RF resonating variable frequency microwave cavity resonator through which a fluid sample is passed, enables direct detection of molecular changes in such fluid sample resulting from fluid degradation during use.2012-05-31
20120133365SYSTEM OF RECEIVE COILS AND PADS FOR USE WITH MAGNETIC RESONANCE IMAGING - There is described embodiments of a coil and pad system for use with an MRI machine. The coil and pad system includes a plurality of coils sized to accommodate a plurality of patient ranges of various heights and body weights. There is also a plurality of pads designed to work in conjunction with the plurality of coils to accommodate patient ranges of various heights and body weights.2012-05-31
20120133366SYSTEM OF RECEIVE COILS AND PADS FOR USE WITH MAGNETIC RESONANCE IMAGING - There is described embodiments of a coil and pad system for use with an MRI machine. The coil and pad system includes a plurality of coils sized to accommodate a plurality of patient ranges of various heights and body weights. There is also a plurality of pads designed to work in conjunction with the plurality of coils to accommodate patient ranges of various heights and body weights.2012-05-31
20120133367Fracture Characterization Using Directional Electromagnetic Resistivity Measurements - A disclosed fracture characterization method includes: collecting three-dimensional resistivity measurements of a volume surrounding an open borehole; analyzing the measurements to determine parameters describing fractures in the volume; and providing a report to a user based at least in part on said parameters. A fluid with a contrasting resistivity is employed to make the fractures detectable by a directional electromagnetic logging tool in the borehole. illustrative parameters include fracture direction, height, extent, length, and thickness. The resistivity measurements can be augmented using a borehole wall image logging tool. Also disclosed are fracturing methods that include: positioning a directional electromagnetic logging tool proximate to a formation; fracturing the formation; monitoring fracture progression with said tool; and halting the fracturing when measurements by said tool indicate that a predetermined set of criteria have been satisfied.2012-05-31
20120133368Reservoir Navigation Using Magnetic Field of DC Currents - A method and apparatus for steering a drilling assembly within a reservoir of an earth formation is disclosed. The drilling assembly is positioned within the reservoir between a conductive upper layer having a DC magnetic field and a conductive lower layer having a DC magnetic field. A sensor of the drilling assembly measures a magnetic field in the reservoir resulting from the DC magnetic field of the conductive upper layer and the DC magnetic field of the conductive lower layer. A processor uses the measured magnetic field to steer the drilling assembly within the reservoir.2012-05-31
20120133369ALGORITHM FOR DETERMINING THE CAPACITY OF A BATTERY WHILE IN SERVICE - A method for estimating the capacity of a vehicle battery while in service. The method includes providing a previous battery state-of-charge, battery temperature and integrated battery current amp-hours, and determining that battery contactors have been closed after they have been opened and disconnected from a load. The method determines if the battery has been at rest for a long enough period of time while the contactors were open, where the battery rest time is based on battery temperature, and determines an initial battery voltage from a last time step when the battery contactors were closed prior to the contactors being open during the battery rest time. The method determines a present battery state-of-charge from the initial battery voltage and the battery temperature and calculates the battery capacity based on the battery integrated current amp-hours divided by the difference between the present battery state-of-charge and the previous battery state-of-charge.2012-05-31
20120133370Battery System for Vehicle, On-Vehicle Battery Module, and Cell Controller - A battery system for vehicle comprises a battery unit that is constituted with a plurality of serially connected cell groups each include a plurality of serially connected battery cells, integrated circuits that are each disposed in correspondence to one of the cell groups of the battery unit and each measure terminal voltages at the battery cells in the corresponding cell group, and a signal transmission path through which one of the integrated circuits is connected to another one of the integrated circuits or to a circuit other than that of the integrated circuits.2012-05-31
20120133371Method and System for Assembling a Battery Module - A test fixture for testing a plurality of longitudinal battery cells includes: a base plate; a plurality of holding structures for holding the battery cells, the holding structures being mounted on the base plate and configured to hold the battery cells with their longitudinal axes being perpendicular with respect to the base plate; and a plurality of contacts arranged on the base plate to electrically contact positive and negative terminals of each of the battery cells.2012-05-31
20120133372Solar Photovoltaic Panel Test Platform - A solar photovoltaic panel test platform includes a test section and a signal processing section. The test section has a frame, a light-emitting unit disposed on the frame, a first angle adjustment unit and a second angle adjustment unit arranged on the frame, an air-cooling unit mounted on the first angle adjustment unit for connecting with a first solar photovoltaic panel, and a water-cooling unit mounted on the second angle adjustment unit for connecting with a second solar photovoltaic panel. The signal processing section is connected to the first and second angle adjustment units, the light-emitting unit, the air-cooling unit, the water-cooling unit, and the first and second solar photovoltaic panels. The signal processing section serves to receive sensing signals and transmit control signals. The solar photovoltaic panel test platform can provide different illuminations, angles of incidence and heat dissipation modes to test the efficiency of the solar photovoltaic panels.2012-05-31
20120133373Non-Intrusive Cable Fault Detection and Methods - In accordance with certain embodiments of the present disclosure, a cable fault detection device is described. The device includes a conformal monopole structure and a ground plane structure. The ground plane structure is configured to be generally parallel to the cable longitudinal axis.2012-05-31
20120133374METHOD FOR DETECTING CAPACITOR LOSS - A method for detecting a capacitor loss is applicable to detecting a plurality of by-pass capacitors connected in parallel to each other. The detection method includes the following steps, an alternating current (AC) signal is input into the by-pass capacitors, in which the AC signal has a plurality of test frequencies; test voltages of the by-pass capacitors at each of the test frequencies are recorded, so as to form a test result table; it is determined whether the test result table is the same as a standard voltage table; and when a result of the determination is NO, a fail signal is output. By applying the detection method, whether a loss exists in the by-pass capacitors can be effectively identified, thereby solving the problem that small capacitors are undetectable when large capacitors are connected in parallel to the small capacitors.2012-05-31
20120133375LIQUID-DISCHARGING DEVICE, INSPECTION METHOD OF LIQUID-DISCHARGING DEVICE, AND PROGRAM - To reduce erroneous inspection caused by particular noise occurring when plate-shaped electrodes are used, the invention is related to a liquid-discharging device in which a discharge judgment for judging whether or not a liquid has been discharged from a nozzle is performed on the basis of a change in electric potential occurring in at least one of a first electrode and a second electrode when the liquid has been discharged from the nozzle. The discharge judgment is performed continuously a plurality of times for the nozzle that is an inspection target. Even if the liquid is judged to have been discharged in any of the plurality of discharge judgments, the liquid will be determined not to have been discharged from the nozzle that is an inspection target as long as a judgment that the liquid has not been discharged has been made in any of the plurality of discharge judgments.2012-05-31
20120133376Sensing Device and Method - A sensing device includes an oscillator, a driver, a switch, a counter and a timer. The oscillator includes an input coupled to a reference capacitor. The driver alternately sources and sinks current in accordance with an oscillation signal outputted by the oscillator. The switch connects or disconnects the reference capacitor with a sensing capacitor. The counter counts value for the oscillation signal. The timer counts operation periods respectively when the switch connects the reference capacitor with the sensing capacitor and when the switch disconnects the reference capacitor with the sensing capacitor, and the counter counts values corresponding to conditions of the switch connecting and disconnecting the reference capacitor with the sensing capacitor during the operation periods, respectively.2012-05-31
20120133377TRANSMISSION LINE BASED ELECTRIC FENCE WITH INTRUSION LOCATION ABILITY - An electric security fence. An electric signal generator generates an initial electric signal. The generated initial electric signal is transmitted through a transmission line. The transmission line will generate a reflected electric signal when the transmission line is disturbed by the presence of a human or animal at a disturbance area. A receiver receives the reflected electric signal and forwards it to a signal processing unit. The signal processing unit calculates the location of the disturbance area after receiving the reflected electric signal. In one preferred embodiment, the signal processing unit calculates the location of the disturbance area by determining the amount of time required for the reflected signal to travel from the disturbance area. In another preferred embodiment, the signal processing unit calculates the location of the disturbance area by determining the frequency difference between an initial Frequency Modulated Continuous Wave signal and the reflected Frequency Modulated Continuous Wave signal. In another preferred embodiment the transmission wire is utilized to send coded communication signals and distance information back to a base station for monitoring and information transmission.2012-05-31
20120133378TRANSMISSION LINE BASED ELECTRIC FENCE WITH INTRUSION LOCATION ABILITY - An electric security fence. An electric signal generator generates an initial electric signal. The generated initial electric signal is transmitted through a transmission line. The transmission line will generate a reflected electric signal when the transmission line is disturbed by the presence of a human or animal at a disturbance area. A receiver receives the reflected electric signal and forwards it to a signal processing unit. The signal processing unit calculates the location of the disturbance area after receiving the reflected electric signal. In one preferred embodiment, the signal processing unit calculates the location of the disturbance area by determining the amount of time required for the reflected signal to travel from the disturbance area. In another preferred embodiment, the signal processing unit calculates the location of the disturbance area by determining the frequency difference between an initial Frequency Modulated Continuous Wave signal and the reflected Frequency Modulated Continuous Wave signal. In another preferred embodiment the transmission wire is utilized to send coded communication signals and distance information back to a base station for monitoring and information transmission.2012-05-31
20120133379MECHANISMS FOR RESISTIVITY MEASUREMENT OF BUMP STRUCTURES - The embodiments described above provide mechanisms for bump resistivity measurement. By using designated bumps on one or more corners of dies, the resistivity of bumps may be measured without damaging devices and without a customized probing card. In addition, bump resistivity may be collected across the entire wafer. The collected resistivity data may be used to monitor the stability and/or health of processes used to form bumps and their underlying layers.2012-05-31
20120133380TEST APPARATUS AND TEST METHOD - Provided is a test apparatus comprising a plurality of testing sections and a synchronizing section that synchronizes operation of at least two testing sections among the plurality of testing sections. Each testing section transmits a synchronization standby command to the synchronizing section when a predetermined condition is fulfilled during execution of the corresponding program and the testing section enters a synchronization standby state, and on a condition that the synchronization standby commands have been received from all of one or more predetermined testing sections among the plurality of testing sections, the synchronizing section supplies a synchronization signal, which ends the synchronization standby state, in synchronization to two or more predetermined testing sections among the plurality of testing sections.2012-05-31
20120133381STACKABLE SEMICONDUCTOR CHIP WITH EDGE FEATURES AND METHODS OF FABRICATING AND PROCESSING SAME - A method of performing a function on a three-dimensional semiconductor chip package as well as on individual chips in the package is disclosed. That method involves the creation of an operative relationship between a function performer and an edge feature on the chip or chips wherein the edge feature consists of one or more of an electrically conductive pad, thermally conductive pad, a probe pad, a fuse, a resistor, a capacitor, an inductor, an optical emitter, an optical receiver, a test pad, a bond pad, a contact pin, a heat dissipator, an alignment marker, a metrology feature and a function performer may be any one or more of a test probe, the laser, a programming device, an interrogation device, a loading device or a tuning device. In addition, a chip per se with edge features is disclosed along with a three-dimensional stack of such chips in either of several different configurations. The disclosure provides information regarding the formation of edge feature, the singulation of dice having incipient edge features, the stacking of dice and the handling or dice with edge features.2012-05-31
20120133382TEST APPARATUS - A test apparatus that test a device under test, comprising a test head that is arranged facing the device under test and that includes a test module for testing the device under test, and a probe assembly that transmits a signal and that is arranged between the test head and the device under test. The probe assembly includes a plurality of low voltage pins arranged at prescribed intervals from each other, and a plurality of high voltage pins that are arranged such that distance between each high voltage pin and each low voltage pin is greater than the prescribed interval, and that transmit a signal with a higher voltage than a signal transmitted by the low voltage pins. All of the high voltage pins are arranged in only one of two regions formed by dividing a surface of the probe assembly in half.2012-05-31
20120133383PROBE, PROBE CARD AND ELECTRONIC DEVICE TESTING APPARATUS - A probe includes: a single base portion; a plurality of beam portions whose rear end sides are supported by the base portion and whose front end sides protrude from the base portion; and a plurality of conductive patterns formed on surfaces of the beam portions. At least a part of the plurality of beam portions has a beam bent portion which is bent in a direction inclined to or substantially perpendicular to a protruding direction of the beam portions.2012-05-31
20120133384ELECTRICALLY MODULATABLE EXTENDED LIGHT SOURCE AND A MEASUREMENT DEVICE FOR CHARACTERIZING A SEMICONDUCTOR INCLUDING ONE SUCH SOURCE - A light source for injecting excess carriers into a semiconductor wafer, fully illuminating a surface of the wafer. According to the disclosed embodiments, the source includes at least one set of point sources which are spaced apart at regular intervals along the X and Y axes, such that the source emits a monochromatic beam of a size that is at least equal to that of the semiconductor wafer surface to be illuminated. Each of the point sources is sinusoidally modulated by a common electrical modulator, the distance between two point sources and the distance between the source and the semiconductor wafer surface to be illuminated being selected such that the monochromatic light beam uniformly illuminates the surface.2012-05-31
20120133385TEST APPARATUS, CIRCUIT MODULE AND MANUFACTURING METHOD - An apparatus comprising a test circuit that is provided on a test substrate and tests the device under test; a sealing section that covers a region of the test substrate on which the test circuit is formed, and seals the test circuit to form a sealed space that is filled with a cooling agent; and a through-connector that passes through the sealing section and electrically connects the test circuit to an element provided outside the sealing section, such that the connection is not through the test substrate.2012-05-31
20120133386MAGNETIC FIELD SIMULATOR FOR TESTING SINGULATED OR MULTI-SITE STRIP SEMICONDUCTOR DEVICE AND METHOD THEREFOR - A system for testing a magnetic sensor has a plurality of coils, wherein the coils are positioned along perpendicular planes. A magnetic field is generated along each of the perpendicular planes when a current is sent to each of the plurality of coils.2012-05-31
20120133387RECONFIGURABLE CONNECTIONS FOR STACKED SEMICONDUCTOR DEVICES - Some embodiments include apparatus, systems, and methods comprising semiconductor dice arranged in a stack, a number of connections configured to provide communication among the dice, at least a portion of the connections going through at least one of the dice, and a module configured to check for defects in the connections and to repair defects the connections.2012-05-31
20120133388TRANSISTOR POWER SWITCH DEVICE AND METHOD OF MEASURING ITS CHARACTERISTICS - A transistor power switch device comprising an array of vertical transistor elements for carrying current between first and second faces of a semiconductor body. The device also comprises a semiconductor monitor element comprising first and second semiconductor monitor regions in the semiconductor body and a monitor conductive layer distinct from the current carrying conductive layer of the transistor array. The semiconductor monitor element presents semiconductor properties representative of the transistor array. Characteristics of the semiconductor monitor element are measured as representative of characteristics of the transistor array. Source metal ageing of a transistor power switch device is monitored by measuring and recording a parameter which is a function of a sheet resistance of the monitor conductive layer when the transistor power switch device is new and comparing it with its value after operation of the device. A measured current is applied between a first location on an elongate strip element of the monitor conductive layer and a first location on one of a pair of lateral extensions of the strip, and the corresponding voltage developed between a second location on the elongate strip element and the other of said pair of lateral extensions is measured.2012-05-31
20120133389METHODS AND APPARATUS FOR TESTING ELECTRIC POWER DEVICES - A method of assembling a testing apparatus for a full-power converter assembly includes coupling an electric power supply apparatus to an electric power grid. The method also includes coupling a direct current (DC) generation apparatus to the electric power supply apparatus. The method further includes coupling an electric power grid simulation device to the DC generation apparatus. The method also includes coupling a full-power converter assembly test connection to the electric power grid simulation device.2012-05-31
20120133390ULTRA-LOW POWER MULTI-THRESHOLD ASYNCHRONOUS CIRCUIT DESIGN - A Multi-Threshold CMOS NULL Convention Logic asynchronous circuit (MTNCL). The MTNCL circuit provides delay-insensitive logic operation with significant leakage power and active energy reduction. The MTNCL circuit is also capable of functioning properly under extreme supply voltage scaling down to the sub-threshold region for further power reduction. Four MTNCL architectures and four MTNCL threshold gate designs offer an asynchronous logic design methodology for glitch-free, ultra-low power, and faster circuits without area overhead.2012-05-31
20120133391CIRCUIT AND METHOD FOR ADDING DITHER TO VERTICAL DROOP COMPENSATION USING LINEAR FEEDBACK SHIFT REGISTERS - Vertical dithering is performed for vertical droop compensation in image processing using Linear Feedback Shift Registers (LFSRs). Line memories are not used. A compensation circuit includes a signature reload input signal coupled to the input of five LFSRs. Each LFSR includes a signature store. The output of each LFSR provides a sequence output signal that is gated with a corresponding enable signal in a first logic circuit. The output of all of the first logic circuits are combined in a second logic circuit to provide a control signal output.2012-05-31
20120133392MULTIPLEX GATE DRIVING CIRCUIT - A multiplex gate driving circuit includes plural driving modules. In comparison with the prior art, each driving stage of the driving module has less number of transistors. From the first to the seventh example, each driving stage is implemented by only four transistors. In the eighth example and the ninth example, each driving stage is implemented by only two transistors. In other words, the driving stage of the multiplex gate driving circuit has less number of transistors, thereby reducing the layout area of the invisible zone of the LCD panel.2012-05-31
20120133393SEMICONDUCTOR DEVICE - A semiconductor device includes a core circuit including an integrated circuit; output drivers, each including sub-drivers to output digital data transferred from the core circuit, as output data; and a selector that selects a sub-driver to be driven from among the plurality of sub-drivers. Each of the sub-drivers includes: an output transistor connected between a first power supply and an output wiring line to allow the output data to rise or fall according to the digital data; and a switching transistor and a slew-rate control transistor which are connected in series between a gate of the output transistor and a second power supply. The switching transistor turns on or off the output transistor according to the digital data. A gate potential adjusted to determine a slew rate for rise or fall of the output data is selectively provided by the selector to each slew-rate control transistor.2012-05-31
20120133394DATA JUDGMENT/PHASE COMPARISON CIRCUIT - The invention relates to a clock generation circuit and a signal reproduction circuit including the clock generation circuit, and, more particularly, the invention provides a data judgment/phase comparison circuit capable of performing both of data judgment and phase comparison by a single-phase clock, and provides a CDR (Clock Data Recovery) circuit including the data judgment/phase comparison circuit. The same data and clock are inputted to two data judging units C GOOD and C BAD each having a different data determination period (setup/hold time) required for correctly judging a data, and an output of the data judging unit C GOOD having a shorter required data determination period is taken as a data output of the data judgment/phase comparison circuit. When the outputs of both of the data judging units are different from each other, a signal Early indicating that a clock phase is too early or a signal Late indicating that the clock phase is too late is outputted. Depending on a relation among data outputs of total three symbols obtained by combining a symbol and symbols previous and subsequent thereto, it is selected that either the Early or the Late is to be outputted by a decision logic EL_LOGIC.2012-05-31
20120133395High speed dynamic comparative latch - A dynamic high-speed comparative latch comprises a pre-amplifier unit for enlarging input differential signals, a regenerating latch unit for latching outputted differential signals from the pre-amplifier unit by using a positive feedback, specifically, converting the output of the pre-amplifier unit into a latched result at a first state of a clock cycle, and then retaining the latched result and simultaneously resetting relevant nodes at a second state opposite to the first state of the clock cycle, and a latch unit for outputting the effective outputted value of the regenerating latch unit when the regenerating latch unit being in a retaining state. The pre-amplifier unit is connected with the regenerating latch unit, and the regenerating latch unit is connected with the latch unit. The pre-amplifier unit comprises only one input clock signal. The present invention has a simple structure, and ensures the correctness of the output result of the latch.2012-05-31
20120133396COMPARATOR - A comparator comprises a current mirror, a differential input pair, and a auxiliary circuit. The current mirror has a biasing end coupled to a power voltage, a first end, and a current outputting end coupled to an output node of the comparator. The differential input pair has a first and second input ends for respectively receiving a first voltage and a second voltage, a second and third ends, and a ground end, wherein the third end is coupled to the first end. The auxiliary circuit is coupled between the output node and the second end, and provides a minimum voltage of a comparison result output at the output node. The comparison result is the power voltage when the first voltage is larger than the second voltage, and the comparison result is the minimum voltage when the first voltage is less than the second voltage.2012-05-31
20120133397System and Method for Driving a Switch - In accordance with an embodiment, a circuit for driving a switch includes a driver circuit. The driver circuit includes a first output configured to be coupled to a gate of the JFET, a second output configured to be coupled to a gate of the MOSFET, a first power supply node, and a bias input configured to be coupled to the common node. The switch to be driven includes a JFET coupled to a MOSFET at a common node.2012-05-31
20120133398System and Method for Driving a Cascode Switch - In accordance with an embodiment, a method of driving switches includes sensing a control node of a first switch, sensing a control node of a second switch, and driving the control node of the first switch to a first active state after the control node of the second switch transitions to a second active state. The method also includes driving the control node of the second switch to a second inactive state after the control node of the first switch transitions to a first inactive state. Driving the control node of the first switch is based on sensing the control node of the second switch, and driving the control node of the second switch is based on based on sensing the control node of the first switch.2012-05-31
20120133399SEMICONDUCTOR DEVICE HAVING SENSE AMPLIFIER - A semiconductor device includes a first driver circuit for supplying a first potential to a first power supply node of the sense amplifier, second and third driver circuits for supplying a second potential and a third potential to a second power supply node of the sense amplifier, and a timing control circuit for controlling operations of the first to third driver circuits. The timing control circuit includes a delay circuit for deciding an ON period of the third driver circuit. The delay circuit includes a first delay circuit having a delay amount that depends on an external power supply potential and a second delay circuit having a delay amount that does not depend on the external power supply potential, and the ON period of the third driver circuit is decided based on a sum of the delay amounts of the first and second delay circuits.2012-05-31
20120133400FREQUENCY MULTIPLIER - A frequency multiplier includes an input circuit, an output circuit, and a resonance circuit. The input circuit is coupled to an input node and a middle node. The middle node provides a middle signal that has a signal component having the same frequency as an input signal that is provided to the input node. The middle signal further has an even number “n” multiple of the input signal frequency. The output circuit has a predetermined input impedance for the middle node. The resonance circuit includes an inductor that is coupled in series with a capacitor, where the capacitor is in a parallel connection to the middle node. The resonance circuit has a resonance frequency that is equal to a frequency of the input signal, and such resonance circuit also has an output impedance that matches with the predetermined input impedance of the output circuit.2012-05-31
20120133401PLL CIRCUIT, ERROR CORRECTING METHOD FOR THE SAME, AND COMMUNICATION APPARATUS INCLUDING THE SAME - A PLL circuit includes: the number-of-accumulated clocks detecting portion detecting the number of accumulated clocks of an oscillation circuit as a digital value; a periodicity detecting portion detecting periodicity of a digital value of a fractional portion of the number of accumulated clocks of the oscillation circuit with a first reference clock as a reference; a corrected value calculating portion calculating a corrected value; and an adding portion adding the corrected value to the fractional portion of the number of accumulated clocks with the first reference clock from the starting points of the periods of the periodicity.2012-05-31
20120133402SEMICONDUCTOR DEVICE HAVING MULTIPLEXER - A semiconductor device includes: a DLL circuit that generates an internal clock signal based on an external clock signal; a clock dividing circuit that generates two complementary internal clock signals having different phases based on the internal clock signal; and a multiplexer that outputs two internal data signals in synchronization with the two clock signals based on internal data signals, respectively. An internal power supply voltage supplied to the clock dividing circuit and an internal power supply voltage supplied to the multiplexer are generated by respective different power supply circuits and are separated from each other in the semiconductor device. This prevents interaction among noises.2012-05-31
20120133403TWO-POINT MODULATION DEVICE USING VOLTAGE CONTROLLED OSCILLATOR, AND CALIBRATION METHOD - Included are: a modulation section including a feedback circuit configured to conduct feedback control of an output signal from a voltage controlled oscillator based on an inputted modulation signal, and a feed-forward circuit configured to calibrate the modulation signal and outputting the calibrated modulation signal to the voltage controlled oscillator; a signal output section configured to output, to the modulation section, a predetermined reference signal instead of the modulation signal when a calibration is conducted; and a gain correction section configured to, in a state where the feedback circuit is forming an open loop, calculate a frequency transition amount of the reference signal outputted by the voltage controlled oscillator, and correct a gain used for calibrating the modulation signal at the feed-forward circuit based on the calculated frequency transition amount.2012-05-31
20120133404CHARGE PUMP, PHASE FREQUENCY DETECTOR AND CHARGE PUMP METHODS - A charge pump being disposed in a phase locking system. The charge pump includes a sourcing element, a draining element and an offset element. The sourcing element is arranged to selectively source a first current into an output terminal of the charge pump according to a first control signal, and the draining element is arranged to selectively drain a second current from the output terminal according to a second control signal. The offset element is arranged to selectively conduct an offset current via the output terminal according to a third control signal, and one of the sourcing element and the draining element is disabled when the phase locking system is in a phase-locked state.2012-05-31
20120133405PLL START-UP CIRCUIT - A start-up circuit for a PLL includes a phase-frequency detector (PFD), one or more logic gates, a flip-flop and a false detection circuit. The false detection circuit includes a set of series connected flip-flops. The PFD receives a reference signal and a feedback signal. The PFD compares the frequency of a reference signal with that of a feedback signal. If the frequency of the reference signal is greater than the frequency of the feedback signal then a start-up signal is generated and transmitted to the PLL. The PLL increases the frequency of the feedback signal until it is greater than the frequency of the reference signal. The generation of the start-up signal is halted when the frequency of the feedback signal is greater than the frequency of the reference signal.2012-05-31
20120133406Configurable System for Cancellation of the Mean Value of a Modulated Signal - Some embodiments of the invention relate to a DC offset correction circuit comprising a feedback loop having a DAC controlled by a reconfigurable ADC, which determines (e.g., tracks) the mean value of a modulated input signal. The circuit operates according to two phase process. In a first “pre-modulation” tracking phase, an input signal is tracked by the ADC, which is configured to output the input signal's mean value as a digital code equivalent to the input mean value. The output of the ADC is provided to a DAC, which provides an analog representation of the mean value to an adder that subtracts the mean value from the modulated input signal to generate a bipolar adjusted input signal. In a second “modulation” phase, the estimated mean value is held constant, so that the bipolar adjusted input signal may be provided to an activated modulation circuit for improved system performance.2012-05-31
20120133407SEMICONDUCTOR INTEGRATED CIRCUIT - An input buffer chooses, in accordance with first control clocks, to output an input data signal or output a high-impedance signal. A master flip-flop chooses, in accordance with second control clocks, to output a data signal received from the input buffer or retain a currently output data signal. A master-slave switch chooses, in accordance with the second control clocks, to output a high-impedance signal or output a data signal received from the master flip-flop. A slave flip-flop chooses, in accordance with the second control clocks, to retain a currently output data signal or output a data signal received from the master-slave switch. A clock buffer inputs the second control clocks, and generates and outputs the first control clocks.2012-05-31
20120133408RACE FREE SEMI-DYNAMIC D-TYPE FLIP-FLOP - Some of the embodiments of the present disclosure provide a D-type flip-flop, comprising a first latch configured to generate a sample enable signal, based on logical states of an input signal, and generate a sampled signal, based on logical states of the input signal and the sample enable signal; and a second latch configured to generate an output signal responsively to the sampled signal. Other embodiments are also described and claimed.2012-05-31
20120133409DELAY CIRCUIT AND SCHEDULE CONTROLLER EMPLOYING THE SAME - A delay circuit used in a schedule controller includes a voltage detection unit, a timer, and a first electronic switch. The voltage detection unit receives an input voltage and compares the input voltage with a predetermined voltage. The timer is controlled by the voltage detection unit to calculate duration of an interval time. The first electronic switch is switched on or off under the control of the timer. When the input voltage substantially equals or exceeds the predetermined voltage, the timer calculates duration of the interval time, the timer generates and transmits a switch signal to the first electronic switch when the timing is reached, and the first electronic switch is switched on by the switch signal and provides an output voltage.2012-05-31
20120133410Clock Generation Circuit - A clock generation circuit, includes a first current source, a resistor connected to the first current source, a second current source, a first demux circuit connected to the second current source, a second demux circuit connected to the second current source, a capacitor connected to the first demux circuit and the second demux circuit, a first comparator connected to the first current source and the capacitor, a second comparator connected to the first current source and the capacitor, and a RS trigger connected both to the first comparator and the second comparator. The present invention has simple structure, small process variation, and lower cost, and is able to improve the accuracy of the clock with maximum possibility.2012-05-31
20120133411ADAPTIVE GAIN ADJUSTMENT SYSTEM - Techniques for adaptive gain adjustment in a signal processing path to achieve greater dynamic range. In an exemplary embodiment, a digital gain is applied to a digital input signal based on a detected level of the digital input signal. A corresponding analog gain is applied to the output of a digital-to-analog converter for converting the digital input signal to an analog signal, the product of the digital gain and the analog gain being kept constant. In an exemplary embodiment, a zero cross detector is employed to update the digital and analog gains only in the vicinity of zero crossings detected in the signal. In a further exemplary embodiment, a peak detector is employed to instantaneously adjust the digital and analog gains to avoid clipping in the signal path.2012-05-31
20120133412Square Wave Signal Component Cancellation - Some embodiments of the invention a circuit configured to apply a time domain processing sequence to a modulated input signal to estimate a mean value of the modulated input signal and to subtract the estimated mean value from the modulated input signal, thereby removing the DC offset from the input signal. In one particular embodiment, the time domain processing sequence is based on integration and differentiation of a demodulated output signal. In such an embodiment, a circuit is configured to integrate a demodulated signal to generate an integrated signal having a triangular shaped output signal. The circuit then measures the slopes of the integrated signal, by differentiation of the triangular shaped integrated signal, and generates an appropriate DC offset correction signal based upon the measured slopes. The DC offset correction signal may be added on top of the actual input signal to cancel the unwanted DC offset component.2012-05-31
20120133413DESIGN STRUCTURE FOR A FREQUENCY ADAPTIVE LEVEL SHIFTER CIRCUIT - The present invention provides an apparatus and method for a frequency adaptive level shifter circuit. The frequency adaptive level shifter circuit includes a first inverter, a second inverter coupled to the output of the first inverter, a capacitor coupled to the output of the second inverter, and a resistor coupled to the output of the capacitor. The frequency adaptive level shifter circuit further includes a transistor coupled to the output of the resistor, wherein the transistor has a gate connected to a reference voltage, a third inverter coupled to the output of the capacitor, and a fourth inverter coupled to the output of the third inverter and the transistor and outputting the signal.2012-05-31
20120133414COMPENSATING FOR WANDER IN AC COUPLING DATA INTERFACE - Techniques are disclosed relating to reducing wander created by AC couplers. In one embodiment, an integrated circuit is disclosed that includes an AC coupler and a DC-level shifter. The AC coupler is configured to receive a differential input signal at first and second nodes, and to shift a common-mode voltage of the differential input signal. The DC-level shifter is coupled to the first and second nodes, and configured to reduce wander of the AC coupler. In various embodiments, the DC-level shifter is configured to supply a differential reference signal to the AC coupler, and to create the differential reference signal from the differential input signal at the first and second nodes by changing a common-mode voltage of the differential input signal.2012-05-31
20120133415LEVEL SHIFTER - A level shifter includes a driving signal generating unit, a driving unit, and a current path forming unit. The driving signal generating unit is configured to generate a pull-up signal and a pull-down signal in response to an input signal, which may swing between a first high level and a first low level. The driving unit is configured to generate an output signal swinging between a second high level and a second low level in response to the pull-up signal and the pull-down signal. The current path forming unit is configured to form a current path between the pull-up signal and the pull-down signal in response to the pull-up signal and the pull-down signal.2012-05-31
20120133416LEVEL SHIFT CIRCUIT AND SEMICONDUCTOR DEVICE - A level shift circuit including a level conversion unit that converts an input signal having a signal level of a first voltage into a signal having a signal level of a second voltage that is higher than the first voltage. The level conversion unit includes first and second MOS transistors of a first conductivity type and third and fourth MOS transistors of a second conductivity type, which differs from the first conductivity type and of which switching is controlled in accordance with the input signal. The third and fourth MOS transistors include drains supplied with the second voltage via the first and second MOS transistors, respectively. A control unit, when detecting a decrease in the first voltage, controls a body bias of the third and fourth MOS transistors to decrease a threshold voltage of the third and fourth MOS transistors.2012-05-31
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