21st week of 2021 patent applcation highlights part 55 |
Patent application number | Title | Published |
20210158832 | METHOD AND DEVICE FOR EVALUATING PERFORMANCE OF SPEECH ENHANCEMENT ALGORITHM, AND COMPUTER-READABLE STORAGE MEDIUM - A method for evaluating performance of a speech enhancement algorithm includes: acquiring a first speech signal including noise and a second speech signal including noise, wherein the first speech signal is acquired from a near-end audio acquisition device close to a sound source, the second speech signal is acquired from a far-end audio acquisition device far from the sound source, and the near-end audio acquisition device is closer to the sound source than the far-end audio acquisition device; acquiring a pseudo-pure speech signal based on the first speech signal and the second speech signal, as a reference speech signal; enhancing the second speech signal by using a preset speech enhancement algorithm, to obtain a denoised speech signal to be tested; and acquiring a correlation coefficient between the reference speech signal and the speech signal to be tested, for evaluating the speech enhancement algorithm. | 2021-05-27 |
20210158833 | Audio Signal - A computer device ( | 2021-05-27 |
20210158834 | DIAGNOSING AND TREATMENT OF SPEECH PATHOLOGIES USING ANALYSIS BY SYNTHESIS TECHNOLOGY - There are provided herein, a method and system for creating a speech/language pathologies classifier, the method comprising: producing a pathological speech repository of pathological speech samples of multiple impairments; computing speech qualities/pathologies, based on data receive from the pathological speech repository; producing a text repository, the text repository comprises multiple known text passages; converting each one of a selection of the text passages from the multiple known text passages, to a speech segment, while introducing to the speech segment one or more of the computed speech pathologies, thereby creating multiple synthetic impaired speech segments; and training a classifier with the multiple synthetic impaired speech segments thereby creating a speech/language pathologies classifier. | 2021-05-27 |
20210158835 | INTENT-BASED NETWORK VALIDATION - A network validation system is described which may perform operations such as generating, analyzing, verifying, correcting, recommending, and deploying language, symbols, etc., such as domain specific language, configured to allow users to express their intent on the configuration and operation of a network, such as a cloud-based network. The network validation system may provide domain specific language that includes rules, statements, symbols, data, etc., configured to convey the intent of users on the configuration and operation of networks for purposes such as configuring and/or validating communication paths, testing or setting associated network object configurations, and may be employed to report violations in such configurations relative to user intent of the one or more users. The network validation system may also be employed to monitor such domain specific language and generate telemetry signaling, for example, that a rule has or has not been violated, actions a user may take, etc. | 2021-05-27 |
20210158836 | INFORMATION PROCESSING DEVICE AND INFORMATION PROCESSING METHOD - Provided is an information processing device including an output control unit that controls presentation of content to a user, and when a non-viewing/listening period is detected in a viewing and listening behavior of the user corresponding to the content, causes a summary of the content to be output. The output control unit determines an amount of information in the summary of the content, based on the length of the non-viewing/listening period. Moreover, provided is an information processing method including: by a processor, controlling presentation of content to a user; and when a non-viewing/listening period is detected in a viewing and listening behavior of the user corresponding to the content, causing a summary of the content to be output. The causing the summary of the content to be output further includes determining an amount of information in the summary of the content, based on the length of the non-viewing/listening period. | 2021-05-27 |
20210158837 | SOUND EVENT DETECTION LEARNING - A device includes a processor configured to receive audio data samples and provide the audio data samples to a first neural network to generate a first output corresponding to a first set of sound classes. The processor is further configured to provide the audio data samples to a second neural network to generate a second output corresponding to a second set of sound classes. A second count of classes of the second set of sound classes is greater than a first count of classes of the first set of sound classes. The processor is also configured to provide the first output to a neural adapter to generate a third output corresponding to the second set of sound classes. The processor is further configured to provide the second output and the third output to a merger adapter to generate sound event identification data based on the audio data samples. | 2021-05-27 |
20210158838 | HEAD SHELL - A head shell enabling easy and accurate regulation of overhang is provided. | 2021-05-27 |
20210158839 | DUAL WRITER FOR ADVANCED MAGNETIC RECORDING - The present disclosure generally relates to a magnetic media drive employing a magnetic recording head. The magnetic recording head comprises a first write head, a second write head, at least one read head, and a thermal fly height control element. The first write head is a wide writing write head comprising a first main pole and a first trailing shield. The second write head a narrow writing write head comprising a second main pole, a trailing gap, a second trailing shield, and one or more side shields. The first main pole has a shorter height and a greater width than the second main pole. The second main pole has a curved or U-shaped surface disposed adjacent to the trailing gap. The thermal fly height control element and the at least one read head are aligned with a center axis of the second main pole of the second write head. | 2021-05-27 |
20210158840 | MAGNETIC TAPE HEAD WITH SOFT BIAS - An approach to forming a tape head with a first soft bias pinning layer in a tape head structure. The tape head structure includes an antiferromagnetic material forming the first soft bias pinning layer over a sensor and stitching into a soft bias layer surrounding the sensor where the antiferromagnetic material of the first soft bias pinning layer has a lower magnetic reluctance than a material forming a freelayer in the sensor. Furthermore, the tape head structure includes a first spacer separated from the first soft bias pinning layer by the sensor in the tape head structure and a second spacer layer over the first soft bias pinning layer where a thickness of the first spacer and the second spacer is determined by an optimum shield to shield distance in the tape head structure. | 2021-05-27 |
20210158841 | HARD DISK FAULT HANDLING METHOD, ARRAY CONTROLLER, AND HARD DISK - A storage array includes a plurality of hard disks, each of the hard disks is divided into a plurality of chunks, and a plurality of chunks of different hard disks form a chunk group by using a redundancy algorithm. The storage array obtains fault information of a faulty area in a first hard disk, and determines a faulty chunk storing the lost data according to the fault information. The storage array recovers the data in the faulty chunk by using another chunk in a chunk group to which the faulty chunk belongs and stores the recovered data in a recovered chunk. The recovered chunk is located in a second hard disk which is not a hard disk for forming the chunk group. | 2021-05-27 |
20210158842 | METHOD FOR CONTROLLING VIDEO EDITING DEVICE, VIDEO EDITING DEVICE, AND PROGRAM - An information processing device functioning as a video editing device editing a video to be projected by a projector includes a display control unit, an acquisition unit, and a decision unit. The display control unit causes a display device of a touch panel to display an editing screen including a video display area where a video to be projected by a projector is displayed. The acquisition unit acquires, from the projector, information representing an aspect ratio of a projected video projected by the projector. The decision snit decides the video display area according to the aspect ratio represented by the information acquired by the acquisition unit. | 2021-05-27 |
20210158843 | MOBILE APPLICATION FOR FUTURE INTERACTION - A future thinking mobile application, which may allow one or more users to interact with their loved ones as if it is happening in real time is presented. The application may allow or enable a user to record one or more circular images or videos. The application may further facilitate to have a series of prerecorded video or audio questions that can be loaded into the application. This can be used by the user to conduct own personal interviews. The application may further ensure a delivery of multiple digital content to respective recipients when the user is inactive in the application for a defined time duration. The application may further facilitate a circular media player which layouts media content in an orbital fashion. The application may further enable or allow the user to add voice or audio components to a static image. | 2021-05-27 |
20210158844 | SYSTEMS AND METHODS FOR ENHANCED VIDEO BOOKS - An enhanced video book and a system and method for creating an enhanced video book are described. Artwork and text corresponding to a storyline can be converted into a format that can be animated. A timing is established at which the converted artwork can be displayed, at a pace corresponding to the timing at which the converted text can be read. The converted artwork and/or the converted text are animating, and voice-over narration corresponding to the converted text is generated. The display of the converted artwork or the converted text is adjusted and synchronized with the voice-over narration based on the timing at which the converted artwork can be displayed. Audio is added and synchronized to the converted artwork. The converted artwork, the converted text, the animated or converted artwork, the animated converted text, the voice-over narration, and the audio are combined into an enhanced video book. | 2021-05-27 |
20210158845 | AUTOMATICALLY SEGMENTING AND INDEXING A VIDEO USING MACHINE LEARNING - In some examples, a server retrieves a video and performs an audio analysis of an audio portion of the video and a video analysis of a video portion of the video. The video may provide information on modifying a hardware configuration and/or a software configuration of a computing device. The audio analysis performs natural language processing to the audio portion to determine a set of words indicative of a start and/or end of a segment. The video analysis uses a convolutional neural network to analyze the video portion to determine frames in the video portion indicative of a start and/or end of a segment. Machine learning segments the video by adding chapter markers based on the video analysis and the audio analysis. The video is indexed, hyperlinks are associated with each segment, and each hyperlink named to enable a user to select and stream a particular segment. | 2021-05-27 |
20210158846 | MEMORY DEVICE - A memory device that operates at high speed is provided. | 2021-05-27 |
20210158847 | MEMORY DEVICE INCLUDING PLURALITY OF LATCHES AND SYSTEM ON CHIP INCLUDING THE SAME - A memory device includes a plurality of latches arranged in a plurality of columns including a first column and a second column and in a plurality of rows, a first flip flop configured to output first data, to first latches arranged in the first column, among the plurality of latches, based on a clock, and a second flip flop configured to output second data, to second latches arranged in the second column, among the plurality of latches, based on the clock. The first flip flop is further configured to, in a lock time section in which the first latches and the second latches maintain an output regardless of an input, block output of the first data to the first latches, and the second flip flop is further configured to, in the lock time section, block output of the second data to the second latches. | 2021-05-27 |
20210158848 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device operated under control of a controller. The semiconductor memory device including a control logic and a data input/output circuit. The control logic configured to store logic data and generate a plurality of pieces of circular data based on the logic data in response to an output command of the logic data that is received from the controller. The data input/output circuit configured to select circular data corresponding to a set warm-up cycle among the plurality of pieces of circular data and output the selected circular data to the controller. | 2021-05-27 |
20210158849 | MAGNETORESISTIVE ELEMENT, MAGNETIC MEMORY DEVICE, AND WRITING AND READING METHOD FOR MAGNETIC MEMORY DEVICE - Provided are a magnetoresistive element, a magnetic memory device, and a writing and reading method for a magnetic memory device, in which an aspect ratio of a junction portion can be decreased. A magnetoresistive element | 2021-05-27 |
20210158850 | NANOSECOND NON-DESTRUCTIVELY ERASABLE MAGNETORESISTIVE RANDOM-ACCESS MEMORY - An erasable magnetoresistive random-access memory (MRAM) structure and a method of making the same includes an MRAM cell disposed between bit line and word line circuit elements, and a vertical-cavity surface-emitting laser (VCSEL) element disposed above the MRAM cell. A laser output of the VCSEL is directed toward the MRAM cell. | 2021-05-27 |
20210158851 | APPARATUSES, SYSTEMS, AND METHODS FOR ANALOG ROW ACCESS RATE DETERMINATION - Embodiments of the disclosure are drawn to apparatuses, systems, and methods for analog row access rate determination. Accesses to different row addresses may be tracked by storing one or more received addresses in a slice of stack. Each slice includes an accumulator circuit which provides a voltage based on charge on a capacitor. When a row address is received, it may be compared to the row addresses stored in the stack, and if there is a match, the charge on the capacitor in the associated accumulator circuit is increased. Each slice may also include a voltage to time (VtoT) circuit which may be used to identify the highest of the voltages provided by the accumulator circuits. The row address stored in the slide with the highest voltage may be refreshed. | 2021-05-27 |
20210158852 | ARITHMETIC DEVICES CONDUCTING AUTO-LOAD OPERATION - An arithmetic device includes an auto-command/address generation circuit, a first data storage circuit, and a second data storage circuit. The auto-command/address generation circuit generates an auto-load selection signal that activates an auto-load operation based on a level of a power source voltage. In addition, the auto-command/address generation circuit generates an auto-load command for the auto-load operation. The first data storage circuit outputs look-up table data, to which an activation function is applied, based on the auto-load command. The second data storage circuit stores the look-up table data, output from the first data storage circuit, based on the auto-load command. | 2021-05-27 |
20210158853 | METHOD AND APPARATUS FOR ACCUMULATING AND STORING RESPECTIVE ACCESS COUNTS OF WORD LINES IN MEMORY MODULE - A method and apparatus for accumulating and storing respective access counts of a plurality of word lines in a memory module are provided. The method may include: within a memory bank positioned in the memory module, providing a plurality of extraordinary storage cells coupled to the plurality of word lines; and utilizing the plurality of extraordinary storage cells to accumulate and store the respective access counts of the plurality of word lines, wherein multiple sets of extraordinary storage cells in the plurality of extraordinary storage cells correspond to the plurality of word lines, respectively. | 2021-05-27 |
20210158854 | COMPUTE IN MEMORY SYSTEM - A computing device in some examples includes an array of memory cells, such as 8-transistor SRAM cells, in which the read bit-lines are isolated from the nodes storing the memory states such that simultaneous read activation of memory cells sharing a respective read bit-line would not upset the memory state of any of the memory cells. The computing device also includes an output interface having capacitors connected to respective read bit-lines and have capacitance that differ, such as by factors of powers of 2, from each other. The output interface is configured to charge or discharge the capacitors from the respective read bit-lines and to permit the capacitors to share charge with each other to generate an analog output signal, in which the signal from each read bit-line is weighted by the capacitance of the capacitor connected to the read bit-line. The computing device can be used to compute, for example, sum of input weighted by multi-bit weights. | 2021-05-27 |
20210158855 | Static Random Access Memory Read Path with Latch - A read path for reading data from a memory includes a sense amplifier having data (SAT) and data complement (SAC) output nodes and a latch. The latch includes an input tri-state inverter including first and second PMOS transistors connected between VDD and an intermediate node, and first and second NMOS transistors connected between VSS and the intermediate node. A gate connection of the first PMOS and NMOS transistors is connected to the SAT node; a gate connection of the second PMOS transistor is connected to a sense amplifier enable complement input; and a gate connection of the second NMOS transistor is connected to a sense amplifier enable input. The latch also includes an output driver with an input connected to the intermediate node and an output connected to a data output node. The latch thus has two gate delays between the SAT node and the data output node. | 2021-05-27 |
20210158856 | APPARATUS FOR ENHANCING PREFETCH ACCESS IN MEMORY MODULE - An apparatus for enhancing prefetch access in a memory module may include a memory chip. The memory chip includes a memory cell array, a plurality of bit lines and a plurality of word lines, a plurality of BLSAs, and a plurality of main data lines. The memory cell array may be arranged to store data, and the plurality of bit lines and the plurality of word lines may be arranged to perform access control of the memory cell array. The plurality of BLSAs may sense a plurality of bit-line signals restored from the plurality of memory cells and convert the plurality of bit-line signals into a plurality of amplified signals, respectively. The main data lines may directly output the amplified signals, through selection of CSLs of the BLSAs on the memory chip, to a secondary semiconductor chip, for performing further processing of the memory module, thereby enhancing the prefetch access. | 2021-05-27 |
20210158857 | IN-MEMORY COMPUTING DEVICE - An in-memory computing device including a plurality of memory cell arrays and a plurality of sensing amplifiers are provided. The memory cell arrays respectively receive a plurality of input signals. The input signals are divided into a plurality of groups. The groups respectively have at least one partial input signal. The at least one partial input signal of each of the groups has a same value. Numbers of the at least one partial input signal in the groups sequentially form a geometric sequence with a common ration equal to 2. The memory cell arrays respectively provide a plurality of weightings, and perform multiply-add operations respectively according to the received input signals and the weightings to generate a plurality of computation results. The sensing amplifiers respectively generate a plurality of sensing results according to the computation results. | 2021-05-27 |
20210158858 | DISTRIBUTED BIAS GENERATION FOR AN INPUT BUFFER - Devices and methods include distributing biases for input buffers of a memory device. The devices include multiple input buffers configured to buffer data for storage in the multiple memory banks. The devices also include biasing generation and distribution circuitry configured to generate and distribute biases to the multiple input buffers. The biasing generation and distribution circuitry includes bias voltage generation circuitry and multiple remote resistor stacks each located at a corresponding input buffer of the input buffers and remote from the bias voltage generation circuitry. | 2021-05-27 |
20210158859 | NON-VOLATILE STATIC RANDOM ACCESS MEMORY - The disclosed technology relates to a non-volatile (NV) static random-access memory (SRAM) device, and to a method of operating the same. The NV-SRAM device includes a plurality of bit-cells, wherein each bit-cell comprises: an SRAM bit-cell; a first bit-line connected via a first access element to the SRAM bit-cell; a NV bit-cell connected via a switch to the SRAM bit-cell; and a second bit-line connected via a second access element to the NV bit-cell. The NV-SRAM device is configured to independently write data from the first bit-line into the SRAM bit-cell through the first access element, and respectively from the second bit-line into the NV bit-cell through the second access element. | 2021-05-27 |
20210158860 | APPARATUSES AND METHODS FOR ANALOG ROW ACCESS TRACKING - Embodiments of the disclosure are drawn to apparatuses and methods for analog row access tracking. A plurality of unit cells are provided, each of which contains one or more analog circuits used to track accesses to a portion of the wordlines of a memory device. When a wordline in the portion is accessed, the unit cell may update an accumulator voltage, for example by adding charge to a capacitor. A comparator circuit may determine when one or more accumulator voltages cross a threshold (e.g., a reference voltage). Responsive to the accumulator voltage crossing the threshold, an aggressor address may be loaded in a targeted refresh queue, or if the aggressor address is already in the queue, a priority flag associated with that address may be set. Aggressor addresses may be provided to have their victims refreshed in an order based on the number of set priority flags. | 2021-05-27 |
20210158861 | SEMICONDUCTOR MEMORY DEVICES AND METHODS OF OPERATING THE SEMICONDUCTOR MEMORY DEVICES - The present disclosure relates to a semiconductor memory device. The semiconductor memory device includes memory cell array, error correction code (ECC) engine, refresh control circuit and control logic circuit. The memory cell array includes memory cell rows. The refresh control circuit performs a refresh operation on the memory cell rows. The control logic circuit controls the ECC engine such that the ECC engine generates an error generation signal by performing ECC decoding on sub-pages in at least one first memory cell row during a read operation. The control logic circuit compares an error occurrence count of the first memory cell row with a threshold value and provides the refresh control circuit with a first address of the first memory cell row as an error address based on the comparison. The refresh control circuit increases a number of refresh operations performed in the first memory cell row during a refresh period. | 2021-05-27 |
20210158862 | APPARATUS WITH A ROW-HAMMER ADDRESS LATCH MECHANISM - A refresh tracking circuit and associated methods are disclosed herein. The tracking circuit may be configured to track a primary count value and a secondary count value based on addresses associated with received commands. The primary and secondary count values may be configured to control corresponding refresh operations respectively associated with a primary address and a secondary address. | 2021-05-27 |
20210158863 | MEMORY WITH PARTIAL BANK REFRESH - Memory devices and systems with partial array refresh control over memory regions in a memory array, and associated methods, are disclosed herein. In one embodiment, a memory system includes a memory controller and a memory device operably connected to the memory controller. The memory device includes (i) a memory array having a memory bank with a plurality of memory cells arranged in a plurality of memory row and (ii) circuitry. In some embodiments, the circuitry is configured to disable at least one memory row of the memory bank from receiving refresh commands such that memory cells of the at least one row are not refreshed during refresh operations of the memory device. In some embodiments, the memory controller is configured to track memory rows that include utilized memory cells and/or to write data to the memory rows in accordance with a programming sequence of the memory device. | 2021-05-27 |
20210158864 | BITCELL SUPPORTING BIT-WRITE-MASK FUNCTION - An SRAM includes multiple memory cells, each memory cell includes a data storage unit; a data I/O control adapted to input data to, and output data from, a data line (BL); and multiple access controls respectively connected to at least two access control lines (WL's) and adapted to enable and disable the data input and output from the at least two WL's (WX and WY). The access controls are configured to permit data input only when both WL's are in their respective states that permit data input. A method of writing to a group of SRAM cells include sending a first write-enable signal to the cells via a first WL, sending a group of respective second write-enable signals to the respective cells, and, for each of the cells, preventing writing data to the cell if either of the first write-enable signal and respective second write enable signal is in a disable-state. | 2021-05-27 |
20210158865 | Write Assist Circuitry - Various implementations described herein are directed to a device having memory circuitry with a core array of bitcells. The device may include write assist circuitry having passgates coupled to the bitcells via bitlines. The passgates may include a first passgate coupled to the bitcells via a first bitline and a second passgate coupled to the bitcells via a second bitline, and a gate of the second passgate may be coupled to the first bitline. | 2021-05-27 |
20210158866 | METHOD AND SYSTEM TO IMPROVE READ RELIABILITY IN MEMORY DEVICES - A system and method for storing data that includes at least one memory device having a plurality of memory cells for storing data; and a memory control circuit that manages the read current and read pulse width applied to the memory cells, wherein the at least one memory device has a read current circuit configured to utilize adjustments to at least one of the read current or the read pulse width applied to the memory cells. In response to a request to read a group of the memory cells, the memory control circuit in an example, in response to determining that a comparative temperature value exceeds a first threshold, is configured to perform at least one of reducing the read current and/or increasing the read pulse width to be applied to the group of memory devices to be read. | 2021-05-27 |
20210158867 | MEMORY SYSTEM - A memory system includes a nonvolatile memory which comprises a plurality of memory cells capable of storing 4-bit data represented by first to fourth bits by sixteen threshold regions, and a memory controller configured to cause the nonvolatile memory to execute a first program for writing data of the first bit, the second bit, and the fourth bit and then causes the nonvolatile memory to execute a second program for writing data of the third bit. In fifteen boundaries existing between adjacent threshold regions among the first to sixteenth threshold regions, a maximum value of the number of first boundaries used for determining a value of the data of the first bit, the number of second boundaries used for determining a value of the data of the second bit, the number of third boundaries used for determining a value of the data of the third bit. | 2021-05-27 |
20210158868 | SILICON-OXIDE-NITRIDE-OXIDE-SILICON BASED MULTI-LEVEL NON-VOLATILE MEMORY DEVICE AND METHODS OF OPERATION THEREOF - A semiconductor device that has a semiconductor-oxide-nitride-oxide-semiconductor (SONOS) based non-volatile memory (NVM) array including NVM cells arranged in rows and columns, in which NVM transistors of the NVM cells are configured to store N×analog values corresponding to the N×levels of their drain current (I | 2021-05-27 |
20210158869 | ELECTRON DEVICE AND DATA PROCESSING METHOD USING CROSSBAR ARRAY - An electron device using a crossbar array and capable of implementing a high-speed and high-reliability process is provided. An operational processing device ( | 2021-05-27 |
20210158870 | DYNAMIC DIGITAL PERCEPTRON - A dynamic digital perceptron device is disclosed. The dynamic digital perceptron device of the invention comprises a volatile content memory array, a detection and driver circuit and a volatile response memory array. The dynamic digital perceptron device processes input digital information according to a database of the digital content data stored in the volatile content memory array and outputs the correspondent digital data stored in the volatile response memory array by the detection and driver circuit. Moreover, the volatile content memory array and the volatile response memory array in the dynamic digital perceptron device are constructed by the latch-types of memory cells to handle the rapid and frequent changing digital processing environments. | 2021-05-27 |
20210158871 | MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A memory device includes a memory block, a peripheral circuit, and a program operation controller. The memory block includes a first sub block connected to a first drain select line and a first source select line, and a second sub block connected to a second drain select line and a second source select line, and is connected to a plurality of word lines and a common source line. The program operation controller controls the peripheral circuit to transfer a precharge voltage to the channel region through the common source line or a plurality of bit lines connected the memory block, and to apply a control voltage to the first and second source select lines at different time points or to apply the control voltage to the first and second drain select lines at different time points in the step of precharging the channel region. | 2021-05-27 |
20210158872 | MEMORY DEVICE AND METHOD OF OPERATION - Discussed herein are systems and methods for charging an access line to a non-volatile memory cell during a standby state, such as to prevent or mitigate standby-state charge loss. An embodiment of a memory device comprises a memory cell, a string driver circuit, and a charging circuit. The string driver circuit is coupled to the memory cell via a local word line, and has a common p-well. The charging circuit, in response to a voltage of a global word line of the memory device falling below a reference voltage during a standby state, couple a supply voltage to the common p-well of the string driver circuit to charge the global word line to a positive bias potential. The memory device includes a leakage compensation circuit to compensate for the junction leakage. | 2021-05-27 |
20210158873 | MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A memory device, in accordance with a method of operation, may include: a plurality of pages coupled to a common word line and configured to be sequentially selected by different select lines; a program operation controller configured to perform a program operation on a first page that is to be programmed first, among the plurality of pages; and a start loop manager configured to generate start loop information about a program loop in which program verification corresponding to each of a plurality of program states to be formed by threshold voltages of memory cells included in the first page starts, during the program operation on the first page. The program operation controller is further configured to perform a program operation on a second page to be programmed subsequent to the first page, among the plurality of pages, based on the start loop information. | 2021-05-27 |
20210158874 | OPERATING METHOD OF MEMORY SYSTEM INCLUDING MEMORY CONTROLLER AND NONVOLATILE MEMORY DEVICE - An operating method of a memory system includes preprogramming multi-page data of a memory controller to a nonvolatile memory device, generating a state group code based on multi-bit data of the multi-page data, and each state group data of the state group code having less number of bits than corresponding multi-bit data, detecting sudden power-off occurring after the preprogramming, backing up, in response to the detecting of the sudden power-off occurring, the state group code to the nonvolatile memory device, recovering, after power is recovered from the sudden power-off, the multi-page data from the nonvolatile memory device, based on the state group code, reprogramming the multi-page data to the nonvolatile memory device, and reprogramming, in response to the detecting of the sudden power-off not occurring, the multi-page data of the memory controller to the nonvolatile memory device. | 2021-05-27 |
20210158875 | MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A memory device may include: memory cells each having any one of first and second programmed states as a target programmed state; a peripheral circuit configured to perform a program operation so that each memory cell has a threshold voltage corresponding to the target programmed state; and a control circuit configured to control the peripheral circuit. The control circuit may include a program operation controller configured to control the peripheral circuit so that, during the program operation, an intermediate program operation is performed on the memory cells using an intermediate verify voltage, an additional program operation is performed on memory cells each having the second programmed state as a target programmed state if an intermediate verify operation passes, and a final program operation is performed on the memory cells such that each memory cell has a threshold voltage corresponding to the target programmed state. | 2021-05-27 |
20210158876 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes separate first and second word lines respectively facing first and second portions of a semiconductor and sandwiching the semiconductor; and first and second cell transistors respectively located in the first and second portions and respectively coupled to the first and second word lines. In a first operation, a first read is executed on the second cell transistor while a first voltage and a higher second voltage are being respectively applied to the first and second word lines. In a second operation, a second read is executed on the first cell transistor while a third voltage between the first and second voltages is being applied to the second word line. | 2021-05-27 |
20210158877 | NON-VOLATILE MEMORY DEVICE AND A READ METHOD THEREOF - A non-volatile memory device including: a page buffer configured to latch a plurality of page data constituting one bit page of a plurality of bit pages, and a control logic configured to compare results of a plurality of read operations performed in response to a high-priority read signal set to select one of a plurality of read signals included in the high-priority read signal set as a high-priority read signal, and determine a low-priority read signal corresponding to the high-priority read signal, wherein the high-priority read signal set is for reading high-priority page data, and the low-priority read signal is for reading low-priority page data. | 2021-05-27 |
20210158878 | FLASH MEMORY SYSTEM - A flash memory system includes a memory controller, flash memory, power supply circuit, and control circuit. The power supply circuit includes a power supply terminal fed with external power, a step-up circuit for boosting a first voltage associated with the external power and thereby generating a second voltage higher than the first voltage, a capacitor charged at the second voltage, and a first step-down circuit for lowering the second voltage and thereby generating a third voltage lower than the second voltage, and supplying the generated third voltage to the flash memory as the operating voltage. The control circuit includes a circuit for controlling the active or inactive state of the flash memory based on the level of the third voltage, and a circuit for controlling the active or inactive state of the memory controller based on both the levels of the voltage of the external power and the third voltage. | 2021-05-27 |
20210158879 | MEMORY DEVICE WHICH GENERATES OPERATION VOLTAGES IN PARALLEL WITH RECEPTION OF AN ADDRESS - A method of controlling a memory device includes receiving an address indicating a region in a memory cell array and generating one or more voltages supplied to the memory cell array in parallel with receiving the address. | 2021-05-27 |
20210158880 | METHOD OF PROGRAMMING AND VERIFYING MEMORY DEVICE AND RELATED MEMORY DEVICE - When programming and verifying a memory device which includes a plurality of memory cells and a plurality of word lines, a first coarse programming is first performed on a first memory cell among the plurality of memory cells which is controlled by a first word line among the plurality of word lines, and then a second coarse programming is performed on a second memory cell among the plurality of memory cells which is controlled by a second word line among the plurality of word lines. Next, a first coarse verify current is used for determining whether the first memory cell passes a coarse verification and a second coarse verify current is used for determining whether the second memory cell passes a second coarse verification, wherein the second coarse verify current is smaller than the first coarse verify current. | 2021-05-27 |
20210158881 | ANTI-FUSE ONE-TIME PROGRAMMABLE MEMORY CELL AND RELATED ARRAY STRUCTURE - An one-time programmable memory cell includes: an upper electrode; an insulating layer beneath the upper electrode; and a lower electrode with electrical field enhancement structure beneath the insulating layer, wherein the electrical field enhancement structure has a least one tip portion. The one-time programmable memory cell also includes a shallow trench isolation region, disposed adjacent to the insulating layer and the lower electrode, wherein the electrical field enhancement structure is surrounded by the shallow trench isolation region and the upper electrode partially covers the shallow trench isolation region. | 2021-05-27 |
20210158882 | TESTING MEMORY CELLS BY ALLOCATING AN ACCESS VALUE TO A MEMORY ACCESS AND GRANTING AN ACCESS CREDIT - A method for testing memory cells under test of an integrated circuit includes allocating an access value to a memory access and granting an access credit. If the access value of the memory access does not exceed the access credit, the memory access is performed and the access credit is reduced by the access value. The memory access is performed to one memory cell or at bit level to a plurality of memory cells. A processor is connectable to a memory having a plurality of memory cells. The processor is configured to test memory cells of a protected memory area of the memory by performing memory accesses at bit level, control a counting register in such a way that a value stored in the counting register is modified according to a number of performed memory accesses, and test memory cells of the protected memory area of the memory only if the value stored in the counting register lies within a permissible value range | 2021-05-27 |
20210158883 | PARALLEL TEST DEVICE - A parallel test device is provided. The parallel test device of the disclosure includes an I/O pad, a plurality of input buffers, and a plurality of output drivers. The I/O pad is configured to perform input/output operations in the parallel test device. The input buffers are configured to enable write data. The output drivers are configured to enable read data and output the read data to the I/O pad. A test signal corresponds to the data from an external device is transferred to the output drivers through the I/O pad in the parallel test device during a test mode. | 2021-05-27 |
20210158884 | SEMICONDUCTOR DEVICE AND MEMORY ABNORMALITY DETERMINATION SYSTEM - Disclosed herein is a semiconductor device including a non-volatile memory unit. The non-volatile memory unit has a subject current path disposed in a semiconductor integrated circuit and a fuse element inserted in series on the subject current path, and changes output data according to a voltage between both ends of the fuse element when supply of a subject current to the subject current path is intended. A current supply part that switches the subject current between a plurality of stages is disposed in the non-volatile memory unit. | 2021-05-27 |
20210158885 | MEMORY SYSTEM - A memory system is provided. In the memory system, a memory controller transmits a write enable signal and a data strobe signal to a flash memory device, a command or an address is transmitted at a rising edge or a falling edge of the write enable signal through a data line in a single data rate (SDR) scheme, and input data is transmitted at each of a rising edge and a falling edge of the data strobe signal through the data line in a double data rate (DDR) scheme. The memory controller includes a parity signal generation unit configured to receive the write enable signal transmitted in the DDR scheme and output a parity signal by generating a first parity bit for the input data. The flash memory device includes a bit error detection unit configured to receive the parity signal output from the memory controller, generate a second parity bit for the input data received by the flash memory device, and determine whether a bit error has occurred to the input data by performing a parity check. | 2021-05-27 |
20210158886 | MEMORY, MEMORY SYSTEM, OPERATION METHOD OF THE MEMORY, AND OPERATION OF THE MEMORY SYSTEM - A method for operating a memory includes determining to perform an error correction operation; determining whether to perform an error correction operation; generating an internal address when the error correction operation is performed; reading data from memory cells that are selected based on the internal address and an error correction code corresponding to the data; performing an error correction operation on the data based on the error correction code to produce an error-corrected data; writing the error-corrected data and an error correction code corresponding to the error-corrected data into the memory cells; determining one or more regions among regions in the memory as a repair-requiring region based on an error detected when the error correction operation is performed; receiving a first command; backing up the data and the error correction code into a redundant region in response to the first command; and repairing the repair-requiring region with the redundant region. | 2021-05-27 |
20210158887 | METHOD FOR WRITING IN A VOLATILE MEMORY AND CORRESPONDING INTEGRATED CIRCUIT - An embodiment method for writing to a volatile memory comprises at least receiving a request to write to the memory, and, in response to each request to write to the memory: preparation of data to be written to the memory, this comprising computing an error correction code; storing in a buffer register the data to be written to the memory; and, if no new request to write to or to read from the memory is received after the storage, writing to the memory of the data to be written stored in the buffer register. | 2021-05-27 |
20210158888 | MEMORY DEVICE WITH A MEMORY REPAIR MECHANISM AND METHODS FOR OPERATING THE SAME - Methods, apparatuses and systems related to managing access to a memory device are described. A memory device includes fuses and latches for storing a repair segment locator and a repair address for each repair of one or more defective memory cells. A segment-address determination circuit generate an active segment address based on the repair address according to the repair segment locator and an address for a read or a write operation. A comparator circuitry is configured to determine whether the active segment address matches the address for the read or the write operation for replacing the one or more defective memory cells with the plurality of redundant cells when the address for the read/write operation corresponds to the one or more defective memory cells. | 2021-05-27 |
20210158889 | SYSTEMS AND METHODS FOR IMPLEMENTING REDUNDANCY FOR TILE-BASED INTELLIGENCE PROCESSING COMPUTING ARCHITECTURE - A system and method for virtually addressing an array of accelerator tiles of a mixed-signal integrated circuit includes testing each of a plurality of distinct matrix multiply accelerator (MMA) tiles of a grid of MMA tiles, the grid of MMA tiles being defined by the plurality of distinct grid of MMA tiles being arranged in a plurality of rows and a plurality of columns along an integrated circuit, each of the plurality of distinct MMA tiles within the grid of MMA tiles having a distinct physical address on the integrated circuit; identifying one or more defective MMA tiles within the grid of MMA tiles based on the testing; and configuring the grid of MMA tiles with a plurality of virtual addresses for routing data to or routing data from one or more non-defective MMA tiles of grid of MMA tiles based on identifying the one or more defective MMA tiles. | 2021-05-27 |
20210158890 | LATENT VARIABLE MODELING TO SEPARATE PCR BIAS AND BINDING AFFINITY - The present disclosure relates to development of aptamers, and in particular to developing machine-learning models to describe characteristics of a given sequence for an aptamer and based on the characteristics find other sequences for aptamers not observed experimentally, and techniques for separating out sequences for aptamers that are present primarily due to PCR bias and/or binding affinity. Particularly, aspects of the present disclosure are directed to obtaining sequence data for an aptamer sequence that binds to a target, generating a binding affinity latent variable and a PCR bias latent variable based on the sequence data, generating a predicted count of the aptamer sequence based on the binding affinity latent variable and PCR bias latent variable, determining that the binding affinity latent variable is greater than the PCR bias latent variable, and in response to the determining, accepting the predicted count of the aptamer sequence. | 2021-05-27 |
20210158891 | STRUCTURE SEARCH METHOD AND STRUCTURE SEARCH APPARATUS - A structure search method includes: sequentially arranging, by a computer, n compound groups at each lattice point of a three-dimensional lattice space to create a three-dimensional structure of a compound in the three-dimensional lattice space, the n compound groups being coupled to each other in the compound; and calculating a minimum energy of an Ising model by performing a ground state search using an annealing method on the Ising model transformed based on constraint conditions for each of the lattice points, the constraint conditions including: a first constraint that each of the n compound groups is arranged at only one lattice point; a second constraint that the n compound groups do not overlap with each other at each of the lattice points; and a third constraint that relates to coupling of the n compound groups and increases energy of the Ising model calculated when the constraint is not satisfied. | 2021-05-27 |
20210158892 | METHODS AND TOOLS FOR DETECTING, DIAGNOSING, PREDICTING, PROGNOSTICATING, OR TREATING A NEUROBEHAVIORAL PHENOTYPE IN A SUBJECT - The present tools and methods for detecting, diagnosing, predicting, prognosticating, or treating a neurobehavioral phenotype in a subject. These tools and methods relates to a genotype and neurophenotype topography-based approach for analyzing brain neuroimaging and gene expression maps to identify drug targets associated with neurobehavioral phenotypes and, conversely, neurobehavioral phenotypes associated with potential drug targets, to develop rational design and application of pharmacological therapeutics for brain disorders, and to provide methods and tools for treatment of subjects in need of neurological therapy. | 2021-05-27 |
20210158893 | METHOD FOR DETERMINING PHARMACOKINETICS OF AXITINIB AND METHOD FOR PREDICTING THERAPEUTIC EFFECT OF AXITINIB BASED ON PHARMACOKINETICS OF AXITINIB - It is intended to conveniently determine the pharmacokinetics of axitinib and to predict the therapeutic effect of axitinib. The present invention provides a method for determining the pharmacokinetics of axitinib, comprising the step of calculating a predicted pharmacokinetic parameter of axitinib using specific gene polymorphisms and background factors regarding a test subject. | 2021-05-27 |
20210158894 | Processes for Genetic and Clinical Data Evaluation and Classification of Complex Human Traits - Processes to identify a subset of trait-related genes and classify individuals are described. Generally, systems generate classification models which are used to identify the subset of trait-related genes and classify individuals. The classification models are also used in various applications, including developing research tools, performing diagnostics, and treating individuals. | 2021-05-27 |
20210158895 | ULTRA-SENSITIVE DETECTION OF CANCER BY ALGORITHMIC ANALYSIS - Ultra-sensitive detection of cancer by algorithmic analysis. In various embodiments, a sample comprising a plurality of polynucleotides is analyzed. A plurality of sequences of the plurality of polynucleotides is received. The plurality of sequences is provided to a trained classifier. The trained classifier is adapted to accept a plurality of sequences and output a class label indicative of the presence of a somatic variant within the plurality of sequences. A class label is received from the trained classifier indicative of the presence of a somatic clone within the plurality of sequences. | 2021-05-27 |
20210158896 | INFORMATION PROCESSING SYSTEM, MUTATION DETECTION SYSTEM, STORAGE MEDIUM, AND INFORMATION PROCESSING METHOD - Provided is an information processing system including: a functionality prediction result acquisition unit configured to acquire a result of predicting a functionality of a test target gene in a sequence of a test genome, the test target gene having a sequence different from a reference genome; and a determination unit configured to determine an introduction of an artificial mutation based on the result acquired by the functionality prediction result acquisition unit. | 2021-05-27 |
20210158897 | BIOACTIVE COMPOUND EFFECT AND DISEASE TARGET PREDICTIONS - The present disclosure provides for generation of predictions for a compound based on input data corresponding to the compound. A cell digital twin receives the input data corresponding to the compound and generates predictions based on the input data. The cell digital twin comprises a prediction engine including a model generated using reduced representations of known cell response profiles corresponding to tested compounds. The model is updated by a feedback loop between a validation engine of the cell digital twin and the model. | 2021-05-27 |
20210158898 | METHODS AND PROCESSES FOR NON-INVASIVE ASSESSMENT OF GENETIC VARIATIONS - Provided herein are methods, processes, systems and machines for non-invasive assessment of genetic variations. | 2021-05-27 |
20210158899 | BIOMARKER DETECTION METHOD, DISEASE ASSESSMENT METHOD, BIOMARKER DETECTION DEVICE, AND COMPUTER READABLE MEDIUM - Provided is a method for detecting a biomarker indicating states of a target biological system based on data acquired by measuring the target biological system. The method includes the steps of: preparing a reference dataset based on data acquired from one or more reference biological systems; generating a target dataset by adding, to the reference dataset, target biological data acquired from the target biological system; acquiring first correlation coefficients between a plurality of factor items in the reference dataset; acquiring second correlation coefficients between the plurality of factor items in the target dataset; acquiring difference correlation coefficients that are differences between the first correlation coefficients and the second correlation coefficients; acquiring indexes respectively for the plurality of factor items based on the difference correlation coefficients; and selecting the biomarker based on the indexes. | 2021-05-27 |
20210158900 | A METHOD AND SYSTEM FOR GENE SIGNATURE MARKER SELECTION | 2021-05-27 |
20210158901 | UTILIZING A NEURAL NETWORK MODEL AND HYPERBOLIC EMBEDDED SPACE TO PREDICT INTERACTIONS BETWEEN GENES - In some implementations, a prediction system may receive a gene regulatory network associated with genes. The prediction system may determine interactions between the genes associated with the gene regulatory network. The prediction system may generate a hyperbolic embedded space based on the gene regulatory network and the interactions between the genes. The prediction system may determine a hyperbolic distance measure based on the hyperbolic embedded space. The prediction system may process the hyperbolic embedded space and the hyperbolic distance measure, with a neural network model, to generate predictions of interactions between the genes. The prediction system may perform one or more actions based on the predictions of interactions between the genes. | 2021-05-27 |
20210158902 | SYSTEM AND METHOD FOR ALLELE INTERPRETATION USING A GRAPH-BASED REFERENCE GENOME | 2021-05-27 |
20210158903 | INFORMATION PROCESSING SYSTEM AND SEARCH METHOD - An information processing system, in which information related to an input metabolic pathway is input, includes: a main metabolic map including a pathway most similar to or the same as the input metabolic pathway is selected from a database of a metabolic map represented by a directed graph in which a compound that is a reaction compound in a metabolic reaction is set as a node, and an enzyme that acts when a node used in reaction is moved to a node produced by reaction is set as an edge, a compound in a vicinity of the input metabolic pathway is selected from the main metabolic map as a peripheral compound, and a search expression is generated based on information on the selected peripheral compound and information of the compound and enzyme related to the input metabolic pathway so as to search the literature database for a literature. | 2021-05-27 |
20210158904 | COMPOUND PROPERTY PREDICTION METHOD AND APPARATUS, COMPUTER DEVICE, AND READABLE STORAGE MEDIUM - A compound property prediction method is provided for an electronic device. The method includes obtaining chemical structure information of a target compound, the chemical structure information including an atom and a chemical bond, modeling a chemical structure graph according to the chemical structure information, the chemical structure graph including a first node corresponding to the atom and a first edge corresponding to the chemical bond, constructing an original node feature of the first node and an original edge feature of the first edge, performing a message propagation on the first edge according to the original node feature of the first node and the original edge feature of the first edge to obtain propagation state information of the first edge, and predicting properties of the target compound according to the propagation state information of the first edge. | 2021-05-27 |
20210158905 | Systems and Methods for Preparing a Product - A system, apparatus, and/or method is disclosed for producing a personal care product. An identity of a considered chemical composition may be input into a model (e.g., a machine learning model). The identity of the considered chemical composition may include ingredients. Each of the ingredients of the considered chemical composition may be associated with a value of a chemoinformatic property of chemoinformatic properties of the considered chemical composition. A value of the property of the considered chemical composition may be determined via the model. The value may be based on the identity of the considered chemical composition. The property of the considered chemical composition may be affected by an interaction of at least two of the ingredients of the considered chemical composition. A personal care product comprised of the considered chemical composition may be produced. | 2021-05-27 |
20210158906 | SYSTEMS, METHODS AND PROCESSES FOR DYNAMIC DATA MONITORING AND REAL-TIME OPTIMIZATION OF ONGOING CLINICAL RESEARCH TRIALS - This invention relates to a method and process which dynamically monitors data from an on-going randomized clinical trial associated with a drug, device, or treatment. In one embodiment, the present invention automatically and continuously unblinds the study data without human involvement. In one embodiment, a complete trace of statistical parameters such as treatment effect, trend ratio, maximum trend ratio, mean trend ratio, minimum sample size ratio, confidence interval and conditional power are calculated continuously at all points along the information time. In one embodiment, the invention discloses a graphical user interface-based method and system to early conclude a decision, i.e., futile, promising, sample size re-estimate, for an on-going clinical trial. In one embodiment, exact type I error rate control, median unbiased estimate of treatment effect, and exact two-sided confidence interval can be continuously calculated. | 2021-05-27 |
20210158907 | SYSTEMS AND METHODS FOR PATIENT RECORD MATCHING - A method for associating patient records with one or more persons is provided. The method involves obtaining different patient records each having demographic information at a healthcare management system, determining that the demographic information in the different records do not match, and determining whether the demographic information in the different records are linked with a common household using matching rules. The method also includes determining whether the demographic information in the records includes exclusionary intra-family overmatching data. The overmatching data represent names of different persons that match each other according to the matching rules. The method also includes determining whether the different records are associated with different persons or the same person based on the common household and the overmatching data. | 2021-05-27 |
20210158908 | SYSTEM AND METHOD FOR EXPANDING SEARCH QUERIES USING CLINICAL CONTEXT INFORMATION | 2021-05-27 |
20210158909 | PRECISION COHORT ANALYTICS FOR PUBLIC HEALTH MANAGEMENT - Provided is a method, a computer program product, and a system for generating personalized treatment options and associated outcome estimates for patients. The method includes retrieving information from an electronic health records database relating to a patient cohort, detecting decision points from the information retrieved, and computing actual treatment options from the decision points. The method also includes computing precision cohort treatment options from the decision points using precision cohort analytics on a patient group and analyzing the decision points by comparing the actual treatment options with the precision cohort treatment options for each of the decision points to determine recommended measures. The method further includes generating a precision population analysis report based on the recommended measure. | 2021-05-27 |
20210158910 | Providing Secure and Seamless Authentication and Workflow for Medical Records and Affiliated Systems - Methods and systems are provided that are related to electronic health records (EHRs). A first EHR system can receive a request to report information to a second EHR system. Responsive to the request, the first EHR system can generate an EHR report that includes one or more EHR identifiers. The one or more EHR identifiers can include an EHR-user identifier, an EHR-patient identifier, and a behavior identifier. The first EHR system can send the EHR report to the second EHR system. The second EHR system can: access information based on the EHR-user identifier and/or the EHR-patient identifier, generate an output based on the accessed information, and provide the output. | 2021-05-27 |
20210158911 | DETERMINING COHESION OF HEALTHCARE GROUPS AND CLINICS BASED ON BILLED CLAIMS - Determining cohesion of healthcare groups and clinics based on billed claims. A method includes determining a target office billing identifier associated with one or more of a healthcare group or a healthcare clinic and determining a practitioner billing a carrier claim comprising the target office billing identifier. The method includes identifying a plurality of carrier claims billed by the practitioner over a time period. The method includes calculating a proportion of the plurality of carrier claims that comprise the target office billing identifier. | 2021-05-27 |
20210158912 | DETERMINING COHESION OF A HEALTHCARE SYSTEM IN CAPTURING PROCEDURE WORK BILLED BY AFFILIATED PRACTITIONERS - Determining cohesion of healthcare systems and facilities based on billed claims. A method includes determining a target procedure billing identifier associated with one or more of a healthcare system or a healthcare facility and identifying a practitioner associated with a facility claim comprising the target procedure billing identifier. The method includes identifying a plurality of facility claims billed by the practitioner over a time period and calculating a proportion of the plurality of facility claims that comprise the target procedure billing identifier. | 2021-05-27 |
20210158913 | MATCHING HEALTHCARE GROUPS AND SYSTEMS BASED ON BILLED CLAIMS - Matching healthcare groups and healthcare systems based on billed claims and calculating capture of billed procedures for healthcare groups and systems. A method includes identifying one or more office practitioners billing carrier claims comprising a certain office billing identifier and identifying one or more procedure practitioners associated with facility claims for procedures performed under a certain procedure billing identifier. The method includes identifying a common practitioner billing carrier claims comprising the certain office billing identifier and associated with facility claims for procedures performed under the certain procedure billing identifier. The method includes generating an office-procedure pair by matching the certain office billing identifier with the certain procedure billing identifier based on an existence of the common practitioner. | 2021-05-27 |
20210158914 | SELF-REFERENTIAL CLINICAL SUPPORT AND QUERY SYSTEM - A method of identifying and selecting a singular medical diagnosis to be entered into a medical record as a part of a structured systematic clinical documentation improvement program, utilizing a dataset compiled from industry standard databases. A system embodying the method provides a unique healthcare provider self-querying device capable of identifying a singularly unique medical diagnosis to the exclusion of others within a classification. The invention provides the ability to clinically support the diagnosis selection process at the point of care with customization based on location of service and episode of care type. | 2021-05-27 |
20210158915 | REGENERATIVE MEDICINE SUPPORT SYSTEM, REGENERATIVE MEDICINE SUPPORT METHOD, AND REGENERATIVE MEDICINE SUPPORT PROGRAM - Provided are a regenerative medicine support system, a regenerative medicine support method, and a regenerative medicine support program capable of obtaining an appropriate treatment policy according to a target animal that is a target of regenerative medicine. The regenerative medicine support system includes a CPU and a storage unit that stores a command executable by the CPU in an information processing apparatus. The CPU collects a plurality of pieces of treatment record information including content of treatment based on a regenerative medicine and a treatment result by the treatment for each breed of an animal that is a target of the treatment, acquires breed information indicating the breed of the target animal that is the target of the treatment, and provides a treatment policy of the target animal, which is derived on the basis of the treatment record information in which the breed represented by the breed information is the treatment target among the plurality of pieces of collected treatment record information. | 2021-05-27 |
20210158916 | SYSTEMS AND METHODS FOR PATIENT RECORD MATCHING - A system and method for identifying patient records within a pharmacy benefit plan that are candidates for correction are provided. The system and method identify candidate patient records that satisfy undermatch criteria. Last change dates are determined for the candidate records that satisfy the undermatch criteria. The last change dates indicate when demographic information within the candidate records last changed. Last usage dates are determined for a lesser-utilized subset of the patient identifiers in the set. A correction subset of the candidate records is prioritized for correction. The candidate records are prioritized for correction being the candidate records that satisfy the undermatch criteria, that were not corrected since the last change date, and that have the patient identifiers within the lesser-utilized subset. A portion of the correction subset is supplied to a correction engine based on prioritization of the correction subset and a capacity constraint of the correction engine. | 2021-05-27 |
20210158917 | SYSTEM AND METHOD FOR CARE PATH PERFORMANCE ANALYSIS AND OPTIMAL PROVIDER NETWORK FORMATION - A method of obtaining a virtual provider cluster is provided. The method includes obtaining a medical effectiveness per member, obtaining a preliminary virtual provider cluster, for each preliminary virtual provider cluster, calculating a MedicalEffectiveness as: MedicalEffectiveness=mean of the MedicalEffectiveness per member for all members associated with the preliminary virtual cluster; for each preliminary virtual provider cluster, calculating a RiskAdjustedCostEfficiency as RiskAdjustedCostEfficiency=sum of all MemberExpectedClaimAmount/sum of all MemberAllowedClaimAmount; and obtaining a virtual provider cluster by updating each preliminary virtual provider cluster with its corresponding MedicalEffectiveness and corresponding RiskAdjustedCostEfficiency. | 2021-05-27 |
20210158918 | METHODS AND SYSTEMS FOR IDENTIFYING COMPATIBLE MEAL OPTIONS - A system for identifying compatible meal options the system comprising a processor the processor configured to receive a user selection identifying a dietary preference; select a meal option as a function of the dietary preference; calculate a user effective age measurement using a first machine-learning process, wherein the first machine-learning process is trained with training data correlating a plurality of biological markers to a plurality of effective age measurements; determine a numerical food tolerance score as a function of the user effective age measurement; and identify a plurality of compatible meal options as a function of the numerical food tolerance score. | 2021-05-27 |
20210158919 | MEDICAL PROCESSING SYSTEMS AND METHODS - A content analysis system includes a processor executing instructions from memory. The instructions include, in response to receiving a request signal from a user device, obtaining feedback items, each having a source indicator; identifying unique source indicators; and, for each source indicator, aggregating corresponding ones of the feedback items. A set of filtered feedback items is generated according to either first or second access levels associated with a user of the user device. A subset of filtered feedback items is selected according to a date range specified by the request signal, a set of automated rules is applied, and natural language processing is performed based on frequency of presence of salient terms to identify themes. A control signal is transmitted to a user interface of the user device instructing display of a representation that indicates a change in the frequency of the identified themes over the specified date range. | 2021-05-27 |
20210158920 | CONTROL SYSTEM FOR CONTROL OF DISTRIBUTION OF MEDICATION - A system of controlling distribution of a medication in the treatment or prevention of epilepsy is provided. A central controller of the system has a data store and one or more processors for reading and writing data to the data store. The data store comprises a database of patient records, each patient record having a medication authorization field. The central controller can output an authorization of a first prescription of epilepsy medication to a patient in dependence upon genetic test results for the patient and schedules a subsequent test for the patient prior to authorization of a subsequent prescription of epilepsy medication. Also provided are methods in which the subject systems find use. The systems and methods find use in the treatment of severe subtypes of epilepsy or refractory epilepsy, such as Dravet Syndrome. | 2021-05-27 |
20210158921 | APPARATUS FOR FACILITATING SECURE EXCHANGE OF MEDICAL DATA PERTAINING TO A USER, SYSTEM AND METHOD THEREOF - The present disclosure provides an apparatus and system for remote health applications that are compliant with Health Insurance Portability and Accountability Act (HIPAA). The apparatus includes an adjustable stand to accommodate a digital communications device such as a tablet or smart phone. The dock is further operatively coupled to one or more sensors attached to a patient to monitor health parameters of the patient. A similar dock s provided with a medical care provider. The docks are registered, and as authentication, any exchange of information can occur only between registered docks. A simultaneous audio-video communication between the patient and the medical care provider and exchange medical and non-medical data that is governed by HIPAA can occur between the registered docks. | 2021-05-27 |
20210158922 | SUMMARIZING MEDICATION EVENTS BASED ON MULTIDIMENSIONAL INFORMATION EXTRACTED FROM A DATA SOURCE - Systems, computer-implemented methods, and computer program products that can facilitate summarization of medication events based on multidimensional medication event data extracted from a data source are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise an extraction component that employs a model to extract multidimensional medication event data of one or more medication events from at least one data source. The computer executable components can further comprise a classification component that classifies the one or more medication events into orthogonal dimensions based on the multidimensional medication event data. | 2021-05-27 |
20210158923 | DISTRIBUTED USER MONITORING SYSTEM - The present invention relates to a system and devices for monitoring medical conditions of patients. More particularly, the present invention relates to the monitoring of the behaviours and relevant diagnostics data relating to patients with or at risk of type 2 diabetes, and its associated cardiovascular disease and/or weight management, including using in-vitro diagnostics (IVD) devices. According to a first aspect, there is provided a method of monitoring one or more users comprising the steps of: receiving user variable data for each of the one or more users; receiving data from one or more user devices for each of the one or more users; predicting effectiveness data for each of the one or more users based on the user variable data for each of the one or more users; comparing received data with predicted effectiveness data for each of the one or more users; and determining an effectiveness value for each of the one or more users based on the comparison of the received data with the predicted effectiveness data. | 2021-05-27 |
20210158924 | MANAGING HEALTHCARE SERVICES - System and method for facilitating a medical order/prescription of a prescription product, including a memory device to store predefined forms for the prescription product corresponding to a plurality of providers. A receiver receives prescription product information for the prescription product, patient intake information for the patient, including provider information for the patient, and a benefits summary related to the patient. A transmitter transmits the benefits verification request. A processor can be configured to generate the benefits verification request for the patient based on the patient intake information, select one of the predefined forms based on at least the patient provider information, populate at least one field of the selected predefined form based on the user intake information, and release the populated predefined form to facilitate a medical order/prescription of the prescription product to the patient. | 2021-05-27 |
20210158925 | MEDICATION ADHERENCE MONITORING SYSTEM AND METHOD - A medication management system is described that is operable to determine whether a user is actually following a protocol, provide additional assistance to a user, starting with instructions, video instructions, and the like, and moving up to contact from a medication administrator if it is determined that the user would need such assistance in any medical adherence situation, including clinical trial settings, home care settings, healthcare administration locations, such as nursing homes, clinics, hospitals and the like. Suspicious activity on the part of a patient or other user of the system is identified and can be noted to a healthcare provider or other service provider where appropriate. | 2021-05-27 |
20210158926 | DEVICE FOR MONITORING MEDICAMENT DELIVERY DEVICES - The present disclosure relates to a device for handling medicament delivery devices and is to be used with a safety container, where the medicament delivery devices have information retaining elements having information that is unique to specific medicament delivery devices, and which medicament delivery devices are to be put in a safety container after use. The disclosed device has an information obtaining mechanism operably arranged to obtain information from the medicament delivery devices placed into the safety container. | 2021-05-27 |
20210158927 | STATE CHARACTERIZATION BASED ON MULTI-VARIATE DATA FUSION TECHNIQUES - The ingestible event marker data framework provides a uniform, comprehensive framework to enable various functions and utilities related to ingestible event marker data (IEM data). Included are a receiver adapted to be associated with a body of an individual, the receiver configured to receive IEM data; a hub to receive the IEM data; and at least one IEM data system to receive the data from the hub. Among other information, behavioral data and predictive inferences may be provided. | 2021-05-27 |
20210158928 | DEVICE, SYSTEM AND METHOD FOR STORING CLINICAL-SURGICAL DATA - The present invention describes a device, a system, and a process for storing clinical-surgical data from clinical-surgical environment. Specifically, the present invention comprises an integrating means provided with a processor capable for receiving clinical-surgical data from a plurality of signal sources and for generating integrated and resized data to promote the storage of such data, providing a high degree of security in order to prevent frauds or damage to data/signals generated in the clinical-surgical event. The present invention pertains to the fields of health, medicine, and information technology.t | 2021-05-27 |
20210158929 | PARAMETER SEARCH IN RADIOTHERAPY TREATMENT PLAN OPTIMIZATION - Techniques for generating a radiotherapy treatment plan are provided. The techniques include receiving a radiotherapy optimization problem, the radiotherapy problem comprising a plurality of parameters; processing the radiotherapy optimization problem to instantiate a first set of candidate parameters; converting the first set of candidate parameters into an adapted representation; defining an adapted radiotherapy optimization problem as a function of the adapted representation such that a given solution to the adapted optimization problem estimates a solution to the radiotherapy optimization problem; processing the adapted radiotherapy optimization problem to estimate a function of the solution to the adapted radiotherapy optimization problem; and processing the estimated function of the solution to the adapted optimization problem to generate a deliverable radiotherapy treatment plan. | 2021-05-27 |
20210158930 | Systems and Methods for Processing Medical Images Using Relevancy Rules - A system and method for processing medical images using relevancy rules, the relevancy rules used for determining relevant studies for a plurality of clinical software applications. The relevancy rules may apply to the various aspects of study, series, and/or image metadata to determine whether prior images should be processed in an assembled matched set by the clinical application. The relevancy rules may further apply to metadata generated by the clinical software applications in association with the study, series, and/or image data or associated metadata. | 2021-05-27 |
20210158931 | Systems and Methods for Processing Medical Images For In-Progress Studies - A system and method for processing a plurality of medical images using a plurality of clinical applications. A current study is received by a first server, the current study having first image series metadata. The first server can determine, based on several different techniques, that the current study is in progress. The system and method generates an assembled study set comprising the current study that is processed using a clinical application, the current study having a first series and a second series. | 2021-05-27 |