21st week of 2017 patent applcation highlights part 59 |
Patent application number | Title | Published |
20170148694 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF | 2017-05-25 |
20170148695 | USE OF AN EXTERNAL GETTER TO REDUCE PACKAGE PRESSURE | 2017-05-25 |
20170148696 | FINE PITCH BVA USING RECONSTITUTED WAFER WITH AREA ARRAY ACCESSIBLE FOR TESTING | 2017-05-25 |
20170148697 | SEMICONDUCTOR DEVICE AND METHOD OF MAKING A SEMICONDUCTOR DEVICE | 2017-05-25 |
20170148698 | CONDUCTIVE PATHS THROUGH DIELECTRIC WITH A HIGH ASPECT RATIO FOR SEMICONDUCTOR DEVICES | 2017-05-25 |
20170148699 | FAN-OUT SEMICONDUCTOR PACKAGE AND ELECTRONIC DEVICE INCLUDING THE SAME | 2017-05-25 |
20170148700 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE | 2017-05-25 |
20170148701 | SEMICONDUCTOR DEVICE | 2017-05-25 |
20170148702 | DISPLAY DEVICE | 2017-05-25 |
20170148703 | SEMICONDUCTOR DEVICE | 2017-05-25 |
20170148704 | ELECTRICAL PACKAGE INCLUDING BIMETAL LID | 2017-05-25 |
20170148705 | SEMICONDUCTOR PACKAGE WITH INTEGRATED OUTPUT INDUCTOR ON A PRINTED CIRCUIT BOARD | 2017-05-25 |
20170148706 | SILICONE-BASED THERMAL INTERFACE MATERIALS | 2017-05-25 |
20170148707 | SEMICONDUCTOR DEVICE | 2017-05-25 |
20170148708 | STRETCHABLE SEMICONDUCTOR PACKAGES AND SEMICONDUCTOR DEVICES INCLUDING THE SAME | 2017-05-25 |
20170148709 | LEAD FRAME AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | 2017-05-25 |
20170148710 | Power electronic switching device comprising a plurality of potential surfaces | 2017-05-25 |
20170148711 | SEMICONDUCTOR PACKAGE | 2017-05-25 |
20170148712 | METHOD AND SYSTEM FOR IMPROVED MATCHING FOR ON-CHIP CAPACITORS | 2017-05-25 |
20170148713 | CONNECTION MEMBER, SEMICONDUCTOR DEVICE, AND STACKED STRUCTURE | 2017-05-25 |
20170148714 | GROUND VIA CLUSTERING FOR CROSSTALK MITIGATION | 2017-05-25 |
20170148715 | PACKAGE SYSTEM FOR INTEGRATED CIRCUITS | 2017-05-25 |
20170148716 | ELECTRONIC PACKAGE AND METHOD OF FABRICATING THE SAME | 2017-05-25 |
20170148717 | METHOD OF MANUFACTURING WIRING SUBSTRATE AND WIRING SUBSTRATE | 2017-05-25 |
20170148718 | WIRING BOARD, ELECTRONIC DEVICE, AND ELECTRONIC MODULE | 2017-05-25 |
20170148719 | THROUGH-ELECTRODE SUBSTRATE, METHOD FOR MANUFACTURING SAME, AND SEMICONDUCTOR DEVICE IN WHICH THROUGH-ELECTRODE SUBSTRATE IS USED | 2017-05-25 |
20170148720 | CIRCUIT SUBSTRATE AND SEMICONDUCTOR PACKAGE STRUCTURE | 2017-05-25 |
20170148721 | Semiconductor Device and Method of Forming Openings Through Insulating Layer Over Encapsulant for Enhanced Adhesion of Interconnect Structure | 2017-05-25 |
20170148722 | SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES | 2017-05-25 |
20170148723 | MATERIALS, STRUCTURES AND METHODS FOR MICROELECTRONIC PACKAGING | 2017-05-25 |
20170148724 | Package Substrate | 2017-05-25 |
20170148725 | PACKAGE OF A CONTROLLER AND SCREEN CONTROL MODULE WITH THE SAME | 2017-05-25 |
20170148726 | SEMICONDUCTOR PROCESSING METHOD AND SEMICONDUCTOR DEVICE | 2017-05-25 |
20170148727 | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME | 2017-05-25 |
20170148728 | DECOUPLING CAPACITORS AND ARRANGEMENTS | 2017-05-25 |
20170148729 | ADVANCED METALLIZATION FOR DAMAGE REPAIR | 2017-05-25 |
20170148730 | CRITICAL DIMENSION SHRINK THROUGH SELECTIVE METAL GROWTH ON METAL HARDMASK SIDEWALLS | 2017-05-25 |
20170148731 | Methods Of Forming A Semiconductor Device Comprising First And Second Nitride Layers | 2017-05-25 |
20170148732 | SEMICONDUCTOR DEVICE | 2017-05-25 |
20170148733 | METHOD OF FABRICATING ANTI-FUSE FOR SILICON ON INSULATOR DEVICES | 2017-05-25 |
20170148734 | METHOD OF FABRICATING ANTI-FUSE FOR SILICON ON INSULATOR DEVICES | 2017-05-25 |
20170148735 | Interconnect Structure for Semiconductor Devices | 2017-05-25 |
20170148736 | STRUCTURE AND PROCESS FOR W CONTACTS | 2017-05-25 |
20170148737 | METHOD AND STRUCTURE FOR ESTABLISHING INTERCONNECTS IN PACKAGES USING THIN INTERPOSERS | 2017-05-25 |
20170148738 | ADVANCED COPPER INTERCONNECTS WITH HYBRID MICROSTRUCTURE | 2017-05-25 |
20170148739 | SELECTIVE DIFFUSION BARRIER BETWEEN METALS OF AN INTEGRATED CIRCUIT DEVICE | 2017-05-25 |
20170148740 | ADVANCED METALLIZATION FOR DAMAGE REPAIR | 2017-05-25 |
20170148741 | ADVANCED METALLIZATION FOR DAMAGE REPAIR | 2017-05-25 |
20170148742 | SEMICONDUCTOR CHIP, METHOD OF MANUFACTURING THE SEMICONDUCTOR CHIP, AND SEMICONDUCTOR PACKAGE AND DISPLAY APPARATUS INCLUDING THE SEMICONDUCTOR CHIP | 2017-05-25 |
20170148743 | Semiconductor chip package comprising side wall marking | 2017-05-25 |
20170148744 | SUBSTRATE-LESS INTEGRATED COMPONENTS | 2017-05-25 |
20170148745 | ELECTRICAL PACKAGE INCLUDING BIMETAL LID | 2017-05-25 |
20170148746 | SEMICONDUCTOR DEVICE PACKAGE | 2017-05-25 |
20170148747 | STRESS RELIEF IN SEMICONDUCTOR WAFERS | 2017-05-25 |
20170148748 | THREE-DIMENSIONAL SEMICONDUCTOR DEVICES WITH SCRIBE LINE REGION STRUCTURES | 2017-05-25 |
20170148749 | REDUCED-WARPAGE LAMINATE STRUCTURE | 2017-05-25 |
20170148750 | ON-DIE INDUCTOR WITH IMPROVED Q-FACTOR | 2017-05-25 |
20170148751 | SEMICONDUCTOR DEVICE | 2017-05-25 |
20170148752 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF | 2017-05-25 |
20170148753 | SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME | 2017-05-25 |
20170148754 | EXTRUSION-RESISTANT SOLDER INTERCONNECT STRUCTURES AND METHODS OF FORMING | 2017-05-25 |
20170148755 | FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICE | 2017-05-25 |
20170148756 | SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME | 2017-05-25 |
20170148757 | SEMICONDUCTOR DEVICE AND METHOD FOR MAKING SEMICONDUCTOR DEVICE | 2017-05-25 |
20170148758 | Circuit Card Attachment for Enhanced Robustness of Thermal Performance | 2017-05-25 |
20170148759 | BONDING APPARATUS AND BONDING METHOD | 2017-05-25 |
20170148760 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-05-25 |
20170148761 | METHOD OF FABRICATING SEMICONDUCTOR PACKAGE | 2017-05-25 |
20170148762 | METHOD AND STRUCTURE FOR SEMICONDUCTOR DIE REMOVAL REWORK | 2017-05-25 |
20170148763 | HYBRID 3D/2.5D INTERPOSER | 2017-05-25 |
20170148764 | MULTI-CHIP MICROELECTRONIC ASSEMBLY WITH BUILT-UP FINE-PATTERNED CIRCUIT STRUCTURE | 2017-05-25 |
20170148765 | Singulation and Bonding Methods and Structures Formed Thereby | 2017-05-25 |
20170148766 | SEMICONDUCTOR PACKAGE | 2017-05-25 |
20170148767 | 3DIC Packages with Heat Dissipation Structures | 2017-05-25 |
20170148768 | INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING SAME | 2017-05-25 |
20170148769 | INTERCONNECT STRUCTURES WITH INTERMETALLIC PALLADIUM JOINTS AND ASSOCIATED SYSTEMS AND METHODS | 2017-05-25 |
20170148770 | SEMICONDUCTOR MODULE | 2017-05-25 |
20170148771 | LIGHT SOURCE MODULE, DISPLAY PANEL, AND DISPLAY APPARATUS INCLUDING THE SAME | 2017-05-25 |
20170148772 | LIGHT EMITTING APPARATUS | 2017-05-25 |
20170148773 | LIGHT EMITTING DEVICE REFLECTIVE BANK STRUCTURE | 2017-05-25 |
20170148774 | PACKAGE-ON-PACKAGE MODULES, ELECTRONIC SYSTEMS INCLUDING THE SAME, AND MEMORY CARDS INCLUDING THE SAME | 2017-05-25 |
20170148775 | LED LIGHT EMITTING DEVICE MANUFACTURING METHOD AND LED LIGHT EMITTING DEVICE | 2017-05-25 |
20170148776 | LED LIGHTING APPARATUS | 2017-05-25 |
20170148777 | OPTOELECTRONIC DEVICE WITH LIGHT-EMITTING DIODES COMPRISING AT LEAST ONE ZENER DIODE | 2017-05-25 |
20170148778 | Package Structures and Methods of Forming the Same | 2017-05-25 |
20170148779 | Cell Circuit and Layout with Linear Finfet Structures | 2017-05-25 |
20170148780 | ELECTRONIC DEVICE, IN PARTICULAR FOR PROTECTION AGAINST OVERVOLTAGES | 2017-05-25 |
20170148781 | DRIVER CIRCUIT, METHOD OF MANUFACTURING THE DRIVER CIRCUIT, AND DISPLAY DEVICE INCLUDING THE DRIVER CIRCUIT | 2017-05-25 |
20170148782 | Six-Transistor SRAM Semiconductor Structures and Methods of Fabrication | 2017-05-25 |
20170148783 | FIELD EFFECT TRANSISTOR (FET) STRUCTURE WITH INTEGRATED GATE CONNECTED DIODES | 2017-05-25 |
20170148784 | INTEGRATION OF ACTIVE POWER DEVICE WITH PASSIVE COMPONENTS | 2017-05-25 |
20170148785 | SEMICONDUCTOR DEVICE | 2017-05-25 |
20170148786 | SEMICONDUCTOR DEVICE | 2017-05-25 |
20170148787 | MULTI-VT GATE STACK FOR III-V NANOSHEET DEVICES WITH REDUCED PARASITIC CAPACITANCE | 2017-05-25 |
20170148788 | FIN PITCH SCALING FOR HIGH VOLTAGE DEVICES AND LOW VOLTAGE DEVICES ON THE SAME WAFER | 2017-05-25 |
20170148789 | EFFECTIVE DEVICE FORMATION FOR ADVANCED TECHNOLOGY NODES WITH AGGRESSIVE FIN-PITCH SCALING | 2017-05-25 |
20170148790 | Stop Layer Through Ion Implantation For Etch Stop | 2017-05-25 |
20170148791 | MACRO-TRANSISTOR DEVICES | 2017-05-25 |
20170148792 | Semiconductor Devices Including Gate Structures With Oxygen Capturing Films | 2017-05-25 |
20170148793 | DUAL CHANNEL MATERIAL FOR finFET FOR HIGH PERFORMANCE CMOS | 2017-05-25 |