21st week of 2015 patent applcation highlights part 18 |
Patent application number | Title | Published |
20150137089 | SHEET-LIKE ADHESIVE AND ORGANIC EL PANEL USING THE SAME - [Problem] A conventional sheet-like adhesive has low adhesion to an adherend and, at the same time, is required to be heated at a high temperature of 100° C. or higher when adhered to an adherend, and hence, when an adherend is an electronic part with deterioration by a high temperature, damage to the adherend is large. In addition, since a sheet-like adhesive in the B-stage hardly exhibited flowability when heating, bubbles may be remained when there is unevenness on an adherend. | 2015-05-21 |
20150137090 | ORGANIC LIGHT-EMITTING DIODE (OLED) DISPLAY AND METHOD OF MANUFACTURING THE SAME - An organic light-emitting diode (OLED) display and method of manufacturing the same are disclosed. In one aspect, the OLED display includes a substrate, a thin film transistor (TFT) formed over the substrate, and a first pixel defining layer formed over the TFT and having an opening. The OLED display also includes an insulating layer formed in the opening and including a top surface having a dome shape and an OLED formed over the insulating layer. | 2015-05-21 |
20150137091 | ORGANIC LIGHT-EMITTING DIODE DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - An organic light-emitting diode display device includes a substrate, a light-absorption layer, an active array structure, and an organic light-emitting diode. The substrate has a first and a second surface opposite to each other. The light-absorption layer is disposed on the first surface, and has at least one opening exposing a portion of the first surface. The active array structure is positioned on the second surface, and includes at least one data line, at least one gate line, and at least one switching device electrically connected to the gate and data lines. The light-absorption layer overlaps at least one of the data line and the gate line when viewed in a direction perpendicular to the substrate. The organic light-emitting diode is electrically connected to the switching device, and the organic light-emitting diode overlaps the opening when viewed in the direction perpendicular to the substrate. | 2015-05-21 |
20150137092 | TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A transistor structure disposed on a substrate includes a gate electrode, an organic semiconductor layer, a gate insulation layer and a patterned metal layer. The gate insulation layer is disposed between the gate and the organic semiconductor layer. The patterned metal layer has a conductive oxidation surface and is divided into a source electrode and a drain electrode. A portion of the organic semiconductor layer is exposed between the source electrode and the drain electrode. The conductive oxidation surface directly contacts with the organic semiconductor layer. | 2015-05-21 |
20150137093 | ORGANIC LIGHT EMITTING DISPLAY DEVICE - An organic light emitting display device comprises a substrate that includes a plurality of pixel regions; a conductive line arranged on the substrate; and an anti-reflective layer arranged on the conductive line, wherein the anti-reflective layer includes an intermediate layer arranged on the conductive line and a semi-transparent layer arranged on the intermediate layer, and the conductive line is electrically connected with the semi-transparent layer. | 2015-05-21 |
20150137094 | MATERIAL FOR ORGANIC ELECTROLUMINESCENCE DEVICE AND ORGANIC ELECTROLUMINESCENCE DEVICE USING THE SAME - A material for an organic electroluminescence (EL) device and an organic electroluminescence (EL) device, the material being represented by Formula 1: | 2015-05-21 |
20150137095 | ORGANIC ELECTROLUMINESCENT MATERIALS AND DEVICES - A compound having the formula Ir(L | 2015-05-21 |
20150137096 | ORGANIC ELECTROLUMINESCENT MATERIALS AND DEVICES - According to one embodiment, a compound comprising a ligand L | 2015-05-21 |
20150137097 | ORGANIC LIGHT-EMITTING DIODE (OLED) DISPLAY AND METHOD OF MANUFACTURING THE SAME - An organic light-emitting diode (OLED) display and a method of manufacturing the OLED display are disclosed. In one aspect, the OLED display includes a substrate including a display region and a peripheral region, a first auxiliary electrode formed in the peripheral region, and a protecting electrode. The protecting electrode can be formed in the display region and the peripheral region, wherein at least a portion of the protecting electrode can be formed above the first auxiliary electrode. | 2015-05-21 |
20150137098 | DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A display device according to the present disclosure includes: a first substrate including a front surface and a rear surface, the front surface defining thereon a first region, a second region, and a third region, the rear surface defining thereon a fourth region, a fifth region, and a sixth region respectively opposing the first region, the second region and the third region; a display element provided on the first region; a wire provided on the second region and electrically connected to the display element; a driving element provided above the third region; and a second substrate provided to be in contact with the fourth region, the fifth region, and the six region, and being composed of a material with higher rigidity than the first substrate, a portion thereof in contact with the sixth region having a smaller thickness than a portion thereof in contact with the fourth region. | 2015-05-21 |
20150137099 | ORGANIC LIGHT EMITTING DISPLAY DEVICE - An organic light emitting display device comprises a driving transistor for driving an organic light emitting diode; a first transistor controlled by a scan signal and connected between a reference voltage line and a first node of the driving transistor; a second transistor controlled by the scan signal and connected between a data line and a second node of the driving transistor; a first plate with an improved conductive characteristic and connected to the semiconductor layer of the driving transistor and the semiconductor layer of the first transistor; a second plate positioned on the first plate, and connected to the semiconductor layer of the second transistor and a gate electrode of the driving transistor; and a pixel electrode of the organic light emitting diode, positioned on the second plate and connected to the first plate through a contact hole. | 2015-05-21 |
20150137100 | Organic Electroluminescent Device - An organic electroluminescence device of the present invention adapts a new concept in its configuration to improve its efficiency in addition to obtain a high reliability and good yielding. The organic electroluminescent device having an electroluminescent film containing an organic material capable of causing an electroluminescence and being arranged between a first electrode and a second electrode, includes: a carrier generation layer, which is a floating electrode, is embodied in the electroluminescent film; an insulting film between the first electrode and the electroluminescent film, and an insulating film between the second electrode and the electroluminescent film, wherein the organic electroluminescent device is driven by an alternating current bias. | 2015-05-21 |
20150137101 | ORGANIC LIGHT EMITTING DISPLAY DEVICE - An organic light emitting display device includes a scan line, a data line, a power supply line, and a pixel. The scan line extends in one direction. The data line crosses the scan line. The power supply line crosses the scan line and the data line. The pixel is electrically coupled to the scan line, the data line, and the power supply line. The pixel includes an organic light emitting diode including a first electrode on a substrate, an organic layer on the first electrode, and a second electrode on the organic layer. The pixel further includes at least two domains configured to radiate light in directions different from each other. | 2015-05-21 |
20150137102 | ORGANIC LIGHT-EMITTING DISPLAY DEVICE AND METHOD FOR MANUFACTURING ORGANIC LIGHT-EMITTING DISPLAY DEVICE - Provided are an organic light-emitting display device and a method for manufacturing the same. A flexible substrate of the organic light-emitting display device is bent across a bend line and includes a first area, a first bending area adjacent to the first area, a second bending adjacent to the first bending area, and a second area adjacent to the second bending area. A wiring is formed over the first area, the first bending area, the second bending area, and the second area of the flexible substrate to electrically connect a display unit formed in the first area and a pad unit formed in the second area. A first alignment key is formed over the flexible substrate, and a second alignment is formed over the flexible substrate. The first alignment key is positioned to overlap the second alignment key with the flexible substrate bent across the bend line. | 2015-05-21 |
20150137103 | ORGANIC ELECTROLUMINESCENCE ELEMENT - A light emitting device including an organic electroluminescence element is provided. The light emitting device may be a display device or a lighting device. The organic electroluminescence element includes an anode, a light emitting layer, and a cathode that are arranged in this order. An electron injection layer is arranged between the light emitting layer and the cathode. The electron injection layer is made of an amorphous C12A7 electride. | 2015-05-21 |
20150137104 | ORGANIC ELECTROLUMINESCENCE DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are an organic electroluminescence device capable of enhancing reflectance of an anode, thereby resulting in improved light-emitting efficiency and a method of manufacturing the same. An anode ( | 2015-05-21 |
20150137105 | ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD FOR MANUFACTURING THE SAME - An organic light emitting diode display includes a substrate; a first capacitor electrode provided over the substrate and including polysilicon; an insulating layer provided over the first capacitor electrode; and a second capacitor electrode provided over the insulating layer and including a first lower metal layer overlapping with the first capacitor electrode and a first upper metal layer. The first upper metal layer includes a doping opening configured to expose at least a portion of the first lower metal layer. | 2015-05-21 |
20150137106 | METHOD FOR MANUFACTURING A DISPLAY UNIT - A method for manufacturing a display unit is provided, and the method includes forming a first insulating film, forming a plurality of first electrodes on the first insulating film, forming a second insulating film on the first electrodes, forming a plurality of openings corresponding to the first electrodes, forming a plurality of organic layers formed in a shape of a stripe having notch parts, forming a second electrode on the organic layer having the notch parts is formed, and forming a protective film on the second electrode. | 2015-05-21 |
20150137107 | METHOD OF FABRICATING A DISPLAY DEVICE WITH STEP CONFIGURATION IN THE INSULATING LAYER - A display device includes: a substrate; a plurality of light-emission elements arranged, on the substrate, in a first direction and a second direction intersecting each other, each of the light-emission elements having a first electrode layer, an organic layer including a luminous layer, and a second electrode layer which are laminated in that order; and a separation section disposed, on the substrate, between the light-emission elements adjacent to each other in the first direction, the separation section having two or more pairs of steps. The first electrode layers in the light-emission elements are separated from each other, and the organic layers as well as the second electrode layers in the light-emission elements adjacent to each other in the first direction are separated from each other by the steps included in the separation section. | 2015-05-21 |
20150137108 | FUNCTIONAL FILM AND ORGANIC EL DEVICE - A functional film of the present invention includes a support body of which a retardation value is less than or equal to 300 nm; a protective inorganic layer which is formed on the support body; one or more combinations of an inorganic layer and an organic layer which are formed on the protective inorganic layer; and a mixed layer having a thickness of 1 to 100 nm which is formed between the support body and the underlying inorganic layer, and is mixed with a component of the support body and a component of the protective inorganic layer. | 2015-05-21 |
20150137109 | SUBSTRATE FOR ORGANIC ELECTRONIC DEVICE - Provided are a substrate for an organic electronic device (OED), an organic electronic system, and a light. The substrate capable of forming an OED ensuring excellent performances and reliability because it may have excellent performances including light extraction efficiency, permeation of moisture or a gas from an external environment may be inhibited, and growth of dark spots may be controlled may be provided. | 2015-05-21 |
20150137110 | SUBSTRATE FOR ORGANIC ELECTRONIC DEVICE - The present application relates to a substrate for an organic electronic device, an organic electronic device, and a lighting device. In an embodiment of the present application, a substrate or an organic electronic device which may form an organic electronic device capable of ensuring performance including light extraction efficiency or the like and reliability by applying a scattering layer capable of exhibiting different scattering properties according to an angle of incident light may be provided. | 2015-05-21 |
20150137111 | COMPOUND FOR ORGANIC OPTOELECTRONIC DEVICE, ORGANIC LIGHT-EMITTING DEVICE CONTAINING THE SAME, AND DISPLAY DEVICE INCLUDING SAID ORGANIC LIGHT-EMITTING DEVICE - A compound for an organic optoelectronic device, an organic light-emitting device including the same and a display device including the organic light-emitting device are provided, and the compound for an organic optoelectronic device represented by a combination of the following Chemical Formulae 1 and 2 is provided and thus an organic light-emitting device has improved life-span characteristics due to excellent electrochemical and thermal stability, and high luminous efficiency at a low driving voltage. | 2015-05-21 |
20150137112 | Method for Manufacturing Thin-Film Transistor and Thin-Film Transistor Manufactured with Same - The present invention provides a method for manufacturing a thin-film transistor and a thin-film transistor manufactured with same. The method includes (1) providing a substrate; (2) forming a first metal layer on the substrate and applying a masking operation to form a gate terminal; (3) forming a gate insulation layer on the gate terminal; (4) forming an oxide semiconductor layer on the gate insulation layer and forming a second metal layer on the oxide semiconductor layer, wherein the second metal layer includes a titanium layer formed on the oxide semiconductor layer and a copper layer formed on the titanium layer and is subjected to a masking operation to form a data line and source/drain terminal; and (5) forming a transparent conductive layer on the second metal layer and applying a masking operation to patternize the transparent conductive layer to form the thin-film transistor. | 2015-05-21 |
20150137113 | MOTFT WITH UN-PATTERNED ETCH-STOP - A method of fabricating a high mobility semiconductor metal oxide thin film transistor including the steps of depositing a layer of semiconductor metal oxide material, depositing a blanket layer of etch-stop material on the layer of MO material, and patterning a layer of source/drain metal on the blanket layer of etch-stop material including etching the layer of source/drain metal into source/drain terminals positioned to define a channel area in the semiconductor metal oxide layer. The etch-stop material being electrically conductive in a direction perpendicular to the plane of the blanket layer at least under the source/drain terminals to provide electrical contact between each of the source/drain terminals and the layer of semiconductor metal oxide material. The etch-stop material is also chemical robust to protect the layer of semiconductor metal oxide channel material during the etching process. | 2015-05-21 |
20150137114 | ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment of the present invention, an electronic device includes: a carbon layer including graphene, a thin film layer formed on the carbon layer, a channel layer formed on the thin film layer, a current cutoff layer formed between the thin film layer and the channel layer so as to cut off the flow of current between the thin film layer and the channel layer, and a source electrode and a drain electrode formed on the channel layer. | 2015-05-21 |
20150137115 | METAL OXIDE THIN FILM, METHOD FOR MANUFACTURING THE SAME, AND SOLUTION FOR METAL OXIDE THIN FILM - The present disclosure provides a solution for a metal oxide semiconductor thin film, including metal hydroxides dissolved in an aqueous or nonaqueous solvent and an acid/base titrant for controlling solubility of metal hydroxides. A solution is synthesized to improve stability and semiconductive performance of a device through addition of other metal hydroxides. The solution is applied on a substrate and annealed by using various annealing apparatuses to obtain a high-quality metal oxide thin film at low temperatures. The thin film is optically transparent, and thus can be applied to thin films for various electronic devices, solar cells, various sensors, memory devices, and the like. | 2015-05-21 |
20150137116 | ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME AND DISPLAY DEVICE - An array substrate includes a display area and a peripheral area adjacent to the display area; the display area includes a plurality of pixel units; each pixel unit includes a thin-film transistor (TFT) and a pixel electrode; and a drain electrode of the TFT directly contacts with the pixel electrode. In the array substrate, the drain electrode of the TFT directly contacts with the pixel electrode, and hence a uniformly distributed electric field will be generated between common electrodes and the pixel electrodes. | 2015-05-21 |
20150137117 | DISPLAY PANEL - A display panel includes a first substrate and a plurality of pixels disposed on the first substrate. At least one of the pixels includes a gate line region, an active layer, an etch stop layer, a first and second source/drain layer. The gate line region is disposed on the first substrate and includes a first region and a second region. The first region includes a first portion having a first width and the second region includes a second portion having a second width. The first width is greater than the second width. The active layer is disposed on the gate line region and includes a channel region disposed on the first region. The etch stop layer and first and second source/drain layers are disposed on the active layer, and the portion of the active layer between the first and second source/drain layers is the channel region. | 2015-05-21 |
20150137118 | DISPLAY DEVICE - To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor; a clock signal is input to a gate electrode of the first switching transistor; and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates. | 2015-05-21 |
20150137119 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer. | 2015-05-21 |
20150137120 | SEMICONDUCTOR DEVICE - Oxide layers which contain at least one metal element that is the same as that contained in an oxide semiconductor layer including a channel are formed in contact with the top surface and the bottom surface of the oxide semiconductor layer, whereby an interface state is not likely to be generated at each of an upper interface and a lower interface of the oxide semiconductor layer. Further, it is preferable that an oxide layer, which is formed using a material and a method similar to those of the oxide layers be formed over the oxide layers Accordingly, the interface state hardly influences the movement of electrons. | 2015-05-21 |
20150137121 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A highly reliable transistor which includes an oxide semiconductor and has high field-effect mobility and in which a variation in threshold voltage is small is provided. By using the transistor, a high-performance semiconductor device, which has been difficult to realize, is provided. The transistor includes an oxide semiconductor film which contains two or more kinds, preferably three or more kinds of elements selected from indium, tin, zinc, and aluminum. The oxide semiconductor film is formed in a state where a substrate is heated. Further, oxygen is supplied to the oxide semiconductor film with an adjacent insulating film and/or by ion implantation in a manufacturing process of the transistor, so that oxygen deficiency which generates a carrier is reduced as much as possible. In addition, the oxide semiconductor film is highly purified in the manufacturing process of the transistor, so that the concentration of hydrogen is made extremely low. | 2015-05-21 |
20150137122 | SEMICONDUCTOR DEVICE - A semiconductor device in which release of oxygen from side surfaces of an oxide semiconductor film including c-axis aligned crystal parts can be prevented is provided. The semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film including c-axis aligned crystal parts, and an oxide film including c-axis aligned crystal parts. In the semiconductor device, the first oxide semiconductor film, the second oxide semiconductor film, and the oxide film are each formed using a IGZO film, where the second oxide semiconductor film has a higher indium content than the first oxide semiconductor film, the first oxide semiconductor film has a higher indium content than the oxide film, the oxide film has a higher gallium content than the first oxide semiconductor film, and the first oxide semiconductor film has a higher gallium content than the second oxide semiconductor film. | 2015-05-21 |
20150137123 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - In the transistor including an oxide semiconductor film, which includes a film for capturing hydrogen from the oxide semiconductor film (a hydrogen capture film) and a film for diffusing hydrogen (a hydrogen permeable film), hydrogen is transferred from the oxide semiconductor film to the hydrogen capture film through the hydrogen permeable film by heat treatment. Specifically, a base film or a protective film of the transistor including an oxide semiconductor film has a stacked-layer structure of the hydrogen capture film and the hydrogen permeable film. At this time, the hydrogen permeable film is formed on a side which is in contact with the oxide semiconductor film. After that, hydrogen released from the oxide semiconductor film is transferred to the hydrogen capture film through the hydrogen permeable film by the heat treatment. | 2015-05-21 |
20150137124 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - In a semiconductor device including a transistor in which an oxide semiconductor layer, a gate insulating layer, and a gate electrode layer on side surfaces of which sidewall insulating layers are provided are stacked in this order, a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor layer and the sidewall insulating layers. In a process for manufacturing the semiconductor device, a conductive layer and an interlayer insulating layer are stacked to cover the oxide semiconductor layer, the sidewall insulating layers, and the gate electrode layer. Then, parts of the interlayer insulating layer and the conductive layer over the gate electrode layer are removed by a chemical mechanical polishing method, so that a source electrode layer and a drain electrode layer are formed. Before formation of the gate insulating layer, cleaning treatment is performed on the oxide semiconductor layer. | 2015-05-21 |
20150137125 | SEMICONDUCTOR DEVICE - A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad. | 2015-05-21 |
20150137126 | TFT ARRAY SUBSTRATE, MANUFACTURING METHOD OF THE SAME AND DISPLAY DEVICE - According to embodiments of the invention, a TFT array substrate, a manufacturing method of the TFT array substrate and a display device are provided. The method comprises: depositing a metal film on a substrate, and forming a gate electrode and a gate line; forming a gate insulating layer and a passivation layer on the substrate; depositing a transparent conductive layer, a first source/drain metal layer and a first ohmic contact layer, and forming a drain electrode, a pixel electrode, a data line, and a first ohmic contact layer pattern provided on the drain electrode; and depositing a semiconductor layer, a second ohmic contact layer and a second source/drain metal layer, and forming a source electrode, a second ohmic contact layer pattern provided below the source electrode, and a semiconductor channel between the source electrode and the drain electrode. | 2015-05-21 |
20150137127 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a gate line disposed on a base substrate and extending in a direction. A data line crosses the gate line. A thin film transistor comprises a gate electrode, a semiconductor pattern, a source electrode, and a drain electrode. The thin film transistor is connected to the gate line and the data line. A pixel electrode is connected to the thin film transistor. A light blocking pattern overlaps the semiconductor pattern. The light blocking pattern includes a haze-processed material of substantially the same material as the pixel electrode. | 2015-05-21 |
20150137128 | THIN-FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD FOR REPAIRING THE SAME - The present disclosure disclosed a thin-film transistor array substrate and a method for repairing the same. The array substrate comprises: a substrate; a plurality of common lines, configured on the substrate; a plurality of scan lines and data lines, arranged on the substrate with each scan line and data line perpendicular to each other, to form a plurality of pixel areas; a plurality of pixel elements including a main pixel electrode, a sub pixel electrode, and a charge sharing unit including a charge capacitor which provides a voltage difference between the main pixel electrode and the sub pixel electrode. When the charge capacitor is defective, an upper electrode or a lower electrode of the defective capacitor is disconnected from a circuit connected thereto. The method enables the repairing process faster and simpler, which is different from the traditional repairing means. The pixel element repaired can still work normally. | 2015-05-21 |
20150137129 | TFT SUBSTRATE AND METHOD OF REPAIRING THE SAME - A thin film transistor (TFT) substrate includes; a substrate; a plurality of scan lines, disposed on the substrate; a plurality of data lines, disposed across the scan lines; a scan line insulting layer disposed between the scan lines and the data lines; a plurality of thin film transistors, each of thin film transistors disposed on an intersection of each scan line and each data, line; a data line insulting layer, disposed on a top surface of the scan line insulting layer and used to cover the data lines; and a common electrode, disposed on the data line insulting a layer, and comprising a plurality of positioning through holes, wherein the positioning through holes expose the data line insulting layer, and are located right above the data lines. | 2015-05-21 |
20150137130 | TFT ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE - The present invention discloses a TFT array substrate, comprising: a plurality of scan lines; a plurality of data lines; pixel units located in areas defined by adjacent scan lines and adjacent data lines; wherein each of the pixel units comprises a first electrode and a second electrode stacked and insulated from each other, the first electrode is flat shape, and the second electrode comprises a plurality of strip electrodes extending along a first direction and arranged along a second direction; a first pixel unit and a second pixel unit adjacent to each other form a unit group; the first pixel unit comprises a first part extending along the first direction and a second part extending from an end area of the first part to the second pixel unit; the second pixel unit comprises a third part extending along the first direction and a fourth part extending from an end area of the third part to the first pixel unit; and the second part is staggered with the fourth part. With such design, the color resistance compensation can not be needed, and also the transmittance is increased. | 2015-05-21 |
20150137131 | FLEXIBLE DISPLAY APPARATUS AND A MANUFACTURING METHOD THEREOF - A flexible display apparatus includes: a flexible substrate; a display unit on the flexible substrate; and a thin-film encapsulating layer on the display unit. The thin-film encapsulating layer includes at least one organic layer and at least one inorganic layer. The inorganic layer comprises carbon having a concentration gradient distributed at an interface between the at least one organic layer and the at least one inorganic layer. A manufacturing method of the flexible display apparatus is also disclosed. | 2015-05-21 |
20150137132 | ELECTROLUMINESCENCE DISPLAY DEVICE - Disclosed is an electroluminescence device having a substrate, a thin film transistor over the substrate, an insulating film over the thin film transistor, an electroluminescence element over the insulating film, a passivation film over the electroluminescence element, and a counter substrate over the passivation film. The electroluminescence element is configured to emit light through the counter substrate, and a space between the substrate and the counter substrate is filled with a filler. The electroluminescence device is featured by the tapered side surface of a gate electrode of the thin film transistor. | 2015-05-21 |
20150137133 | FORMING OF A HEAVILY-DOPED SILICON LAYER ON A MORE LIGHTLY-DOPED SILICON SUBSTRATE - A method of forming a heavily-doped silicon layer on a more lightly-doped silicon substrate including the steps of depositing a heavily-doped amorphous silicon layer; depositing a silicon nitride layer; and heating the amorphous silicon layer to a temperature higher than or equal to the melting temperature of silicon. | 2015-05-21 |
20150137134 | METHOD AND SYSTEM FOR INTERLEAVED BOOST CONVERTER WITH CO-PACKAGED GALLIUM NITRIDE POWER DEVICES - An electronic package includes a leadframe and a plurality of pins. The electronic package also includes a first gallium nitride (GaN) transistor comprising a source, gate, and drain and a second GaN transistor comprising a source, gate, and drain. The source of the first GaN transistor is electrically connected to the leadframe and the drain of the second GaN transistor is electrically connected to the leadframe. The electronic package further includes a first GaN diode comprising an anode and cathode and a second GaN diode comprising an anode and cathode. The anode of the first GaN diode is electrically connected to the leadframe and the anode of the second GaN diode is electrically connected to the leadframe. | 2015-05-21 |
20150137135 | SEMICONDUCTOR DEVICES WITH INTEGRATED SCHOTKY DIODES AND METHODS OF FABRICATION - An embodiment of a semiconductor device includes a semiconductor substrate that includes an upper surface and a channel, a gate electrode disposed over the substrate electrically coupled to the channel, and a Schottky metal layer disposed over the substrate adjacent the gate electrode. The Schottky metal layer includes a Schottky contact electrically coupled to the channel which provides a Schottky junction and at least one alignment mark disposed over the semiconductor substrate. A method for fabricating the semiconductor device includes creating an isolation region that defines an active region along an upper surface of a semiconductor substrate, forming a gate electrode over the semiconductor substrate in the active region, and forming a Schottky metal layer over the semiconductor substrate. Forming the Schottky metal layer includes forming at least one Schottky contact electrically coupled to the channel and providing a Schottky junction, and forming an alignment mark in the isolation region. | 2015-05-21 |
20150137136 | GALLIUM NITRIDE SEMICONDUCTOR SUBSTRATE WITH SEMICONDUCTOR FILM FORMED THEREIN - A method of fabricating a single crystal gallium nitride substrate the step of cutting an ingot of single crystal gallium nitride along predetermined planes to make one or more signal crystal gallium nitride substrates. The ingot of single crystal gallium nitride is grown by vapor phase epitaxy in a direction of a predetermined axis. Each predetermined plane is inclined to the predetermined axis. Each substrate has a minor polished primary surface. The primary surface has a first area and a second area. The first area is between an edge of the substrate and a line 3 millimeter away from the edge. The first area surrounds the second area. An axis perpendicular to the primary surface forms an off-angle with c-axis of the substrate. The off-angle takes a minimum value at a first position in the first area of the primary surface. | 2015-05-21 |
20150137137 | CURRENT APERTURE VERTICAL ELECTRON TRANSISTORS WITH AMMONIA MOLECULAR BEAM EPITAXY GROWN P-TYPE GALLIUM NITRIDE AS A CURRENT BLOCKING LAYER - A current aperture vertical electron transistor (CAVET) with ammonia (NH | 2015-05-21 |
20150137138 | TRANSISTOR AND METHOD FOR PRODUCING TRANSISTOR - A transistor that offers a high dielectric breakdown voltage of a gate insulating film with limited reduction of the current flowing between drain and source electrodes. The transistor has a semiconductor layer, a gate insulating film on the semiconductor layer, a gate electrode on the gate insulating film, and a source electrode and a drain electrode disposed on the semiconductor layer with the gate electrode therebetween. The concentration of the impurities contained in the gate insulating film is on a downward gradient starting at the surface of the gate insulating film on the semiconductor layer side and ending at the surface of the gate insulating film on the gate electrode side. | 2015-05-21 |
20150137139 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE - A semiconductor device is disclosed. In one embodiment, the semiconductor device includes two different semiconductor materials. The two semiconductor materials are arranged adjacent one another in a common plane. | 2015-05-21 |
20150137140 | VERTICAL GALLIUM NITRIDE JFET WITH GATE AND SOURCE ELECTRODES ON REGROWN GATE - A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure. | 2015-05-21 |
20150137141 | Gallium Nitride Devices - Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others. | 2015-05-21 |
20150137142 | Junction Field Effect Transistor Cell with Lateral Channel Region - A semiconductor device includes a junction field effect transistor cell with a top gate region, a lateral channel region and a buried gate region. The lateral channel region is arranged between the top gate region and the buried gate region along a vertical direction with respect to a first surface of a semiconductor body. The lateral channel region comprises at least two first zones of a first conductivity type and at least one second zone of a second conductivity type, wherein the first and second zones alternate along the vertical direction. The embodiments provide well-defined channel widths and facilitate the adjustment of pinch-off voltages as well as the manufacture of normally-off junction field effect transistor cells. | 2015-05-21 |
20150137143 | Junction Field Effect Transistor Cell with Lateral Channel Region - A junction field effect transistor cell of a semiconductor device includes a top gate region, a lateral channel region and a buried gate region arranged along a vertical direction. The lateral channel region includes first zones of a first conductivity type and second zones of a second conductivity type which alternate along a lateral direction perpendicular to the vertical direction. A pinch-off voltage of the junction field effect transistor cell does not depend, or only to a low degree depends, on a vertical extension of the lateral channel region. | 2015-05-21 |
20150137144 | Predetermined Kerf Regions and Methods of Fabrication Thereof - In one embodiment, the semiconductor die includes a selective epitaxial layer including device regions, and a masking structure disposed around sidewalls of the epitaxial layer. The masking structure is part of an exposed surface of the semiconductor die. | 2015-05-21 |
20150137145 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD - The invention provides an ultra-low-on-resistance, excellent-reliability semiconductor device that can finely be processed using SiC and a semiconductor device producing method. A semiconductor device includes: a silicon carbide substrate; a first-conductive-type first silicon carbide layer provided on a first principal surface of the silicon carbide substrate; a second-conductive-type first silicon carbide region formed at a surface of the first silicon carbide layer; a first-conductive-type second silicon carbide region formed at a surface of the first silicon carbide region; a second-conductive-type third silicon carbide region formed below the second silicon carbide region; a trench piercing through the second silicon carbide region to reach the third silicon carbide region; a gate insulating film; a gate electrode; an interlayer insulating film with which the gate electrode is covered; a first electrode that is formed on the second silicon carbide region and the interlayer insulating film in a side surface of the trench while containing a metallic element selected from a group consisting of Ni, Ti, Ta, Mo, and W; a second electrode that is formed on the third silicon carbide region in a bottom portion of the trench and the first electrode while containing Al; a first main electrode formed on the second electrode; and a second main electrode formed on a second principal surface of the silicon carbide substrate. | 2015-05-21 |
20150137146 | TRANSISTOR DEVICE - Various embodiments provide transistor devices and fabrication methods. An exemplary transistor device with improved carrier mobility can be formed by first forming a confining layer on a semiconductor substrate to confine impurity ions diffused from the semiconductor substrate to the confining layer. An epitaxial silicon layer can be formed on the confining layer, followed by forming a gate structure on the epitaxial silicon layer. A portion of the epitaxial silicon layer can be used as an intrinsic channel region. A source region and a drain region can be formed in portions of each of the epitaxial silicon layer, the confining layer, and the semiconductor substrate. | 2015-05-21 |
20150137147 | CMOS WITH DUAL RAISED SOURCE AND DRAIN FOR NMOS AND PMOS - An apparatus and a method for creating a CMOS with a dual raised source and drain for NMOS and PMOS. The spacers on both stack gates are of equal thickness. In this method, a first insulating layer is formed on the surface. The first region is then masked while the other region has the first layer etched away and has an epitaxial source and drain grown on the region. A second layer is formed to all exposed surfaces. The second region is then masked while the first region is etched away. The epitaxial source and drain is formed on the first region. The second region can also be masked by adding a thin layer of undoped silicon and then oxidize it. Another way to mask the second region is to use a hard mask. Another way to form the second source and drain is to use amorphous material. | 2015-05-21 |
20150137148 | OPTICAL SENSOR PACKAGE - One or more embodiments are directed to system in package (SiP) for optical devices, including proximity sensor packaging. One embodiment is directed to an optical package that includes a stacked arrangement with a plurality of optical devices arranged over an image sensor processor die that is coupled to a first substrate. Between the two optical devices and the image sensor processor die there is provided at least a second substrate. In one embodiment, the optical package is a proximity sensor package and the optical devices include a light-emitting diode die and a light-receiving diode die. In one embodiment, the light-emitting diode die is secured to a surface of the second substrate and the light-receiving diode die is secured to a surface of a third substrate. The second and the third substrate may be secured to a surface of the image sensor processor die or to a surface of encapsulation material. | 2015-05-21 |
20150137149 | LED MODULE AND METHOD OF PREPARING THE LED MODULE, LIGHTING DEVICE - An LED module includes a submount having a face in a thickness direction thereof, an LED chip bonded to the face of the submount with a first bond, and a patterned wiring circuit electrically connected to the LED chip. The first bond transmits light emitted from the LED chip. The submount is a light-transmissive member having light diffusing properties, and a planar size larger than a planar size of the LED chip. The patterned wiring circuit is provided on the face of the submount so as not to overlap the LED chip. The submount is constituted by a plurality of light-transmissive layers which are stacked in the thickness direction and have different optical properties so that a light-transmissive layer of the plurality of light-transmissive layers which is farther from the LED chip is higher in reflectance in a wavelength range of the light emitted from the LED chip. | 2015-05-21 |
20150137150 | VERTICAL MULTI-JUNCTION LIGHT EMITTING DIODE - An embodiment of the invention comprises a first III-V semiconductor structure including a first light emitting layer disposed between a first n-type region and a first p-type region, and a second III-V semiconductor structure including a second light emitting layer disposed between a second n-type region and a second p-type region. A first contact is formed on a top surface of the first III-V semiconductor structure. A second contact is formed on a bottom surface of the second III-V semiconductor structure. A bonding structure is disposed between the first and second III-V semiconductor structures. | 2015-05-21 |
20150137151 | HIGH POWER LEDS - LED chips and packages are disclosed having lenses made of materials that resist degradation at higher operation temperatures and humidity, and methods of fabricating the same. The lenses can be made of certain materials that can withstand high temperatures and high humidity, with the lenses mounted to the LED prior to certain critical metallization steps. This helps avoid damage to the metalized part that might occur as a result of the high mounting or bonding temperature for the lens. One embodiment of an LED chip comprises a flip-chip LED and a lens mounted to the topmost surface of the flip-chip LED. Lenses can be bonded to LEDs at the wafer level or at the chip level. Some of the LED chips and packages can have lenses of different materials with planar and/or curved surfaces. | 2015-05-21 |
20150137152 | LIGHT EMITTING ELEMENT AND LIGHT EMITTING ELEMENT ARRAY - A light emitting element includes a semiconductor including an active layer, and a planar shape of the light emitting elements including a concave polygon. The planar shape of the concave polygon has interior angles including at least one acute angle. | 2015-05-21 |
20150137153 | METHOD FOR INTEGRATING A LIGHT EMITTING DEVICE - Light emitting devices and methods of integrating micro LED devices into light emitting device are described. In an embodiment a light emitting device includes a reflective bank structure within a bank layer, and a conductive line atop the bank layer and elevated above the reflective bank structure. A micro LED device is within the reflective bank structure and a passivation layer is over the bank layer and laterally around the micro LED device within the reflective bank structure. A portion of the micro LED device and a conductive line atop the bank layer protrude above a top surface of the passivation layer. | 2015-05-21 |
20150137154 | Display Device and Method for Manufacturing the Same - It is an object of the present invention to provide a display device preventing the external invasion of water and/or oxygen and preventing the deterioration of a luminous element due to these invading substances and to provide a production method including simple production steps for producing the display device. The invention provides a display device having a sealing material on the rim of an exposed interlayer insulator for preventing the invasion of water and/or oxygen from the interlayer insulator. Further, the invention provides a display device having a barrier body on an exposed interlayer insulator for preventing the invasion of water and/or oxygen from the interlayer insulator. Furthermore, the application of droplet discharge technique in production steps for producing the display device can eliminate a photolithography step such as exposing and developing. Thus, a method of producing a display device having an improved yield is provided. | 2015-05-21 |
20150137155 | Semiconductor Light Source Comprising A First And Second Light-Emitting Diode Chip And A First And Second Phosphor Fluorescent Substance - A semiconductor light source comprising first and second light-emitting diode chips; and a conversion element containing a first phosphor and a second phosphor, wherein the conversion element is disposed downstream of the first and second light-emitting diode chips. The first light-emitting diode chip emits electromagnetic radiation with a first emission maximum. The second light-emitting diode chip emits electromagnetic radiation with a second emission maximum. The first phosphor has a first absorption maximum and a first radiating maximum. The second phosphor has a second absorption maximum, which differs from the first absorption maximum, and a second radiating maximum, which differs from the first radiating maximum. The degree of conversion of the first phosphor for the electromagnetic radiation of the first light-emitting diode chip is greater than the degree of conversion of the second phosphor for the electromagnetic radiation of the first light-emitting diode chip. | 2015-05-21 |
20150137156 | SEMICONDUCTOR LIGHT EMITTING DEVICE INCLUDING GaAs SUBSTRATE - A semiconductor light emitting device including: a substrate made of GaAs; and a semiconductor layer formed on the substrate, in which part of the substrate on a side opposite to the semiconductor layer is removed by etching so that the semiconductor light emitting device has a thickness of not more than 60 μm. | 2015-05-21 |
20150137157 | ILLUMINATING DEVICE - An illuminating device including a substrate, a light-emitting diode element disposed on the substrate, an electrode element, and a sealing ring. The substrate has a groove, and the electrode element has a retaining slot disposed in the groove. The sealing ring is embedded into the retaining slot and a part of the groove to tightly fix the electrode element on the groove. | 2015-05-21 |
20150137158 | LED PACKAGE FRAME AND LED PACKAGE STRUCTURE - A light-emitting diode (LED) package frame is provided, including a leadframe and an insulating member. The leadframe includes a first electrode and a second electrode separated from each other. The insulating member is disposed between the first electrode and the second electrode for insulation between the first and second electrodes, including a first protrusion and a second protrusion. The coefficient of thermal expansion of the insulating member is greater than that of the leadframe. Specifically, the first electrode and the second electrode respectively include a first recess and a second recess which abut the insulating member. The first protrusion and the second protrusion are respectively engaged with the first recess and the second recess. | 2015-05-21 |
20150137159 | LIGHT-EMITTING DEVICE, LIGHT-EMITTING DEVICE PACKAGE, AND LIGHT UNIT - A light-emitting device, according to one embodiment, comprises: a light-emitting structure comprising a first conductive semiconductor layer, an active layer which is underneath the first conductive semiconductor layer, and a second conductive semiconductor layer which is underneath the active layer; a reflective electrode, which is arranged under the light-emitting structure; and an electrode which is arranged inside the first conductive semiconductor layer and comprises a conductive ion injection layer. | 2015-05-21 |
20150137160 | LIGHT-EMITTING DEVICE, LIGHT-EMITTING DEVICE PACKAGE, AND LIGHT UNIT - A light-emitting device, according to one embodiment, comprises: a transparent conductive oxide film; an active layer which comes into contact with a lower surface of the transparent conductive oxide layer; a first conductive semiconductor layer which comes into contact with a lower surface of the active layer; a reflective electrode which is electrically connected to the first conductive semiconductor layer; and a first electrode electrically connected to the transparent conductive oxide layer. | 2015-05-21 |
20150137161 | LIGHT-EMITTING DEVICE - A surface mounted light emitting device having superior reliability with a focus on low cost producibility, in which a protective element can be formed without lowering the efficiency of light emission from a light emitting element, is provided. | 2015-05-21 |
20150137162 | Optoelectronic Semiconductor Component with Sapphire Flip-Chip - An optoelectronic semiconductor component has a volume-emitting sapphire flip-chip with an upper side and a lower side. This optoelectronic semiconductor component is embedded in an optically transparent mold body with an upper side and a lower side. | 2015-05-21 |
20150137163 | LED Cap Containing Quantum Dot Phosphors - An LED device has a cap containing one or more quantum dot (QD) phosphors. The cap may be sized and configured to be integrated with standard LED packages. The QD phosphor may be held within the well of the LED package, so as to absorb the maximum amount of light emitted by the LED, but arranged in spaced-apart relation from the LED chip to avoid excessive heat that can lead to degradation of the QD phosphor(s). The packages may be manufactured and stored for subsequent assembly onto an LED device. | 2015-05-21 |
20150137164 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME - Provided is a semiconductor light emitting device | 2015-05-21 |
20150137165 | LIGHT-EMITTING DEVICE - A light-emitting device includes a mounting board, a light-emitting element mounted on a main face of the mounting board, and a sealing member covering the light-emitting element. The sealing member includes a first sealing layer covering a part of the main face of the mounting board and the light-emitting element, and a second sealing layer covering the first sealing layer. The first sealing layer includes particles containing at least one material selected from a group consisting of cerium oxide, titanium oxide, iron oxide, and carbon, and silicone resin. The second sealing layer includes phosphor particles for converting a part of light emitted from light-emitting element into a long wavelength light and radiating it, and silicone resin. | 2015-05-21 |
20150137166 | EPOXY RESIN COMPOSITION FOR OPTICAL SEMICONDUCTOR DEVICE AND OPTICAL SEMICONDUCTOR DEVICE USING THE SAME - The present invention relates to an epoxy resin composition for an optical semiconductor device having an optical semiconductor element mounting region and having a reflector that surrounds at least a part of the region, the epoxy resin composition being an epoxy resin composition for forming the reflector, the epoxy resin composition including the following ingredients (A) to (E): (A) an epoxy resin; (B) a curing agent; (C) a white pigment; (D) an inorganic filler; and (E) a specific release agent. | 2015-05-21 |
20150137167 | LIGHT-EMITTING DEVICE - A light-emitting device, comprises a light-emitting stacked layer comprising a first conductivity type semiconductor layer; a light-emitting layer formed on the first conductivity type semiconductor layer; and a second conductivity type semiconductor layer formed on the light-emitting layer and comprising a first plurality of cavities; a first planarization layer formed on a first part of the second conductivity type semiconductor layer; a first transparent conductive oxide layer formed on the first planarization layer and on a second part of the second conductivity type semiconductor layer, the first transparent conductive oxide layer including a first portion in contact with the first planarization layer and including a second portion in contact with the upper surface of the second conductivity type semiconductor layer; a first electrode formed on the first portion; and a first reflective metal layer formed between the first transparent conductive oxide layer and the first electrode. | 2015-05-21 |
20150137168 | WAVELENGTH-CONVERTING LIGHT EMITTING DIODE (LED) CHIP AND LED DEVICE EQUIPPED WITH CHIP - A wavelength-converted light emitting diode (LED) chip is provided. The wavelength-converted LED chip includes an LED chip and a wavelength-converted layer. The LED chip emits light in a predetermined wavelength region. The wavelength-converted layer is formed of a resin containing phosphor bodies of at least one kind which convert a portion of the light emitted from the LED chip into light in a different wavelength region. The wavelength-converted layer is formed on an upper surface of the LED chip, and has a convex meniscus-shaped upper surface. | 2015-05-21 |
20150137169 | SEMICONDUCTOR LIGHT-EMITTING DEVICE - A semiconductor light-emitting device comprises a semiconductor stack having a first surface, wherein the first surface comprises multiple protrusion portions and multiple concave portions; a first electrode on the first surface and electrically connecting with the semiconductor stack; a second electrode on the first surface and electrically connecting with the semiconductor stack; and a transparent conduction layer conformally covering the first surface and between the first electrode and the semiconductor stack, wherein the first electrode comprises a first bonding portion and a first extending portion, and the first extending portion is between the first bonding portion and the transparent conduction layer and conformally covers the transparent conduction layer. | 2015-05-21 |
20150137170 | SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND MANUFACTURING METHOD FOR THE SAME - A semiconductor light-emitting element includes a substrate, a first metal layer, a second metal layer, a translucent conductive layer, and a semiconductor layer with a light-emitting region. The translucent conductive layer includes an end face intersecting a plane orthogonal to the thickness direction of the substrate. The substrate includes an end face intersecting a plane orthogonal to the thickness direction. The end face of the translucent conductive layer is located inwardly of the end face of the substrate as viewed in the thickness direction. | 2015-05-21 |
20150137171 | CURABLE COMPOSITION - Provided are a curable composition and its use. The curable composition has excellent processability, workability and adhesiveness, exhibits excellent light extraction efficiency, crack resistance, hardness, thermal and shock resistance and adhesiveness after curing, has long-lasting durability and reliability even under harsh conditions, and does not cause whitening or surface stickiness. The curable composition can be used as an encapsulant or adhesive material for an optical semiconductor such as an LED. | 2015-05-21 |
20150137172 | POLYCARBOSILANE AND CURABLE COMPOSITIONS FOR LED ENCAPSULANTS COMPRISING SAME - The present invention provides a polycarbosilane represented by the following formula (1): | 2015-05-21 |
20150137173 | NITRIDE SEMICONDUCTOR LIGHT-EMITTING ELEMENT - A nitride semiconductor light-emitting element including a high concentration silicon-doped layer doped with silicon at a high concentration of 2×10 | 2015-05-21 |
20150137174 | Methods and Apparatus for Increased Holding Voltage in Silicon Controlled Rectifiers for ESD Protection - Methods and apparatus for increased holding voltage SCRs. A semiconductor device includes a semiconductor substrate of a first conductivity type; a first well of the first conductivity type; a second well of a second conductivity type adjacent to the first well, an intersection of the first well and the second well forming a p-n junction; a first diffused region of the first conductivity type formed at the first well and coupled to a ground terminal; a first diffused region of the second conductivity type formed at the first well; a second diffused region of the first conductivity type formed at the second well and coupled to a pad terminal; a second diffused region of the second conductivity type formed in the second well; and a Schottky junction formed adjacent to the first diffused region of the second conductivity type coupled to a ground terminal. Methods for forming devices are disclosed. | 2015-05-21 |
20150137175 | CHARGE RESERVOIR IGBT TOP STRUCTURE - An IGBT device includes one or more trench gates disposed over a semiconductor substrate and a floating body region of the first conductivity type disposed between two neighboring trench gates and between a semiconductor substrate and a heavily doped top region of the second conductivity type. A body region of the first conductivity type disposed over the top region has a doping concentration higher than that of the floating body region of the first conductivity type. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. | 2015-05-21 |
20150137176 | SEMICONDUCTOR POWER DEVICE - A semiconductor power device is provided, comprising a substrate of a first conductive type, a buffering layer of a second conductive type formed on the substrate, a voltage supporting layer formed on the buffering layer, and alternating sections of different conductive types formed at the substrate. The voltage supporting layer comprises first semiconductor regions of the first conductive type and second semiconductor regions of the second conductive type, wherein the first semiconductor regions and the second semiconductor regions are alternately arranged. The alternating section and the buffering layer form a segmented structure of alternated conductive types, which is used as an anode of the semiconductor device. | 2015-05-21 |
20150137177 | SEMICONDUCTOR DEVICE HAVING POLYSILICON PLUGS WITH SILICIDE CRYSTALLITES - A semiconductor device includes a field effect transistor structure having source zones of a first conductivity type and body zones of a second conductivity type which is the opposite of the first conductivity type, the source zones adjoining a first surface of a semiconductor die comprising the source and the body zones. The semiconductor device further includes a dielectric layer adjoining the first surface and polysilicon plugs extending through openings in the dielectric layer and electrically connected to the source and the body zones. The polysilicon plugs have silicide crystallites in portions distant to the semiconductor die. | 2015-05-21 |
20150137178 | METAL-SEMICONDUCTOR-METAL (MSM) HETEROJUNCTION DIODE - In one aspect, a diode comprises: a semiconductor layer having a first side and a second side opposite the first side, the semiconductor layer having a thickness between the first side and the second side, the thickness of the semiconductor layer being based on a mean free path of a charge carrier emitted into the semiconductor layer; a first metal layer deposited on the first side of the semiconductor layer; and a second metal layer deposited on the second side of the semiconductor layer. | 2015-05-21 |
20150137179 | POWER DEVICE - A power device disclosed herein comprises a substrate, a first semiconductor layer formed on the substrate, a second semiconductor layer formed on the first semiconductor layer and comprising a first element of group III, a third semiconductor layer formed on the second semiconductor layer and a plurality of first interlayers formed in the third semiconductor layer and comprising a second element of III group. The first element of III group and the second element of III group are the same. The second semiconductor layer and the plurality of first interlayers are doped with carbon. | 2015-05-21 |
20150137180 | FinFET with Bottom SiGe Layer in Source/Drain - A FinFET includes a substrate, a fin structure on the substrate, a source in the fin structure, a drain in the fin structure, a channel in the fin structure between the source and the drain, a gate dielectric layer over the channel, and a gate over the gate dielectric layer. At least one of the source and the drain includes a bottom SiGe layer. | 2015-05-21 |
20150137181 | STRESS INDUCING CONTACT METAL IN FINFET CMOS - A method of forming a semiconductor structure includes forming a first plurality of fins in a first region of a semiconductor substrate and a second plurality of fins in a second region of a semiconductor substrate. A gate structure is formed covering a first portion of the first and second plurality of fins. The gate structure does not cover a second portion of the first and second plurality of fins. A first epitaxial layer is grown surrounding the second portion of the first plurality of fins and a second epitaxial layer is grown surrounding the second portion of the second plurality of fins. An ILD layer is deposited and partially etched to expose the first epitaxial layer and a top portion of the second epitaxial layer. A metal layer is deposited around the first epitaxial layer and above the top portion of the second epitaxial layer. | 2015-05-21 |
20150137182 | SEMICONDUCTOR DEVICE HAVING V-SHAPED REGION - Among other things, a semiconductor device or transistor and a method for forming the semiconductor device are provided for herein. The semiconductor device comprises one or more v-shaped recesses in which stressed monocrystalline semiconductor material, such as silicon germanium, is grown, to form at least one of a source or a drain of the semiconductor device. The one or more v-shaped recesses are etched into a substrate in-situ. The semiconductor device comprises at least one of a source or a drain having a height-to-length ratio exceeding at least 1.6 when poly spacing between a first part of the semiconductor device (e.g., first transistor) and a second part of the semiconductor device (e.g., second transistor) is less than about 60 nm. | 2015-05-21 |
20150137183 | Controlling the Shape of Source/Drain Regions in FinFETs - An integrated circuit structure includes a fin field-effect transistor (FinFET) including a semiconductor fin over and adjacent to insulation regions; and a source/drain region over the insulation regions. The source/drain region includes a first and a second semiconductor region. The first semiconductor region includes silicon and an element selected from the group consisting of germanium and carbon, wherein the element has a first atomic percentage in the first semiconductor region. The first semiconductor region has an up-slant facet and a down-slant facet. The second semiconductor region includes silicon and the element. The element has a second atomic percentage lower than the first atomic percentage. The second semiconductor region has a first portion on the up-slant facet and has a first thickness. A second portion of the second semiconductor region, if any, on the down-slant facet has a second thickness smaller than the first thickness. | 2015-05-21 |
20150137184 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes laminating and forming an electron transit layer, an electron supplying layer, an etching stop layer, and a p-type film on a substrate sequentially, the p-type film being formed of a nitride semiconductor material that includes Al doped with an impurity element that attains p-type, the etching stop layer being formed of a material that includes GaN, removing the p-type film in an area except an area where a gate electrode is to be formed, by dry etching to form a p-type layer in the area where the gate electrode is to be formed, the dry etching being conducted while plasma emission in the dry etching is observed, the dry etching being stopped after the dry etching is started and plasma emission originating from Al is not observed, and forming the gate electrode on the p-type layer. | 2015-05-21 |
20150137185 | HETEROJUNCTION BIPOLAR TRANSISTORS WITH AN AIRGAP BETWEEN THE EXTRINSIC BASE AND COLLECTOR - Fabrication methods, device structures, and design structures for a heterojunction bipolar transistor. A collector is formed in a semiconductor substrate, an intrinsic base is formed on the semiconductor substrate, and an extrinsic base is formed on the intrinsic base. An airgap is located vertically between the extrinsic base and the collector. A contact surface is located adjacent to the airgap. The contact surface is coupled with the collector. A spacer is located laterally between the airgap and the subcollector contact surface. | 2015-05-21 |
20150137186 | FORMATION OF AN ASYMMETRIC TRENCH IN A SEMICONDUCTOR SUBSTRATE AND A BIPOLAR SEMICONDUCTOR DEVICE HAVING AN ASYMMETRIC TRENCH ISOLATION REGION - Disclosed is a trench formation technique wherein an opening having a first sidewall with planar contour and a second sidewall with a saw-tooth contour is etched through a semiconductor layer and into a semiconductor substrate. Then, a crystallographic wet etch process expands the portion of the opening within the semiconductor substrate to form a trench. Due to the different contours of the sidewalls and, thereby the different crystal orientations, one sidewall etches faster than the other, resulting in an asymmetric trench. Also disclosed is a bipolar semiconductor device formation method that incorporates the above-mentioned trench formation technique when forming a trench isolation region that undercuts an extrinsic base region and surrounds a collector pedestal. The asymmetry of the trench ensures that the trench isolation region has a relatively narrow width and, thereby ensures that both collector-to-base capacitance C | 2015-05-21 |
20150137187 | SEMICONDUCTOR WAFER, MANUFACTURING METHOD OF SEMICONDUCTOR WAFER AND METHOD FOR MAUNFACTURING COMPOSITE WAFER - A semiconductor wafer comprises, on a semiconductor crystal layer forming wafer, a first semiconductor crystal layer, a second semiconductor crystal layer, and a third semiconductor crystal layer in this order, wherein both the etching rates of the first semiconductor crystal layer and the third semiconductor crystal layer by a first etching agent are higher than the etching rate of the second semiconductor crystal layer by the first etching agent, and both the etching rates of the first semiconductor crystal layer and the third semiconductor crystal layer by a second etching agent are lower than the etching rate of the second semiconductor crystal layer by the second etching agent. | 2015-05-21 |
20150137188 | SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS - A solid-state imaging device including a photoelectric conversion element operable to generate electric charge according to the amount of incident light and to accumulate the electric charge in the inside thereof, an electric-charge holding region in which the electric charge generated through photoelectric conversion by the photoelectric conversion element is held until read out, and a transfer gate having a complete transfer path through which the electric charge accumulated in the photoelectric conversion element is completely transferred into the electric-charge holding region, and an intermediate transfer path through which the electric charge generated by the photoelectric conversion element during an exposure period and being in excess of a predetermined charge amount is transferred into the electric-charge holding region. The complete transfer path and the intermediate transfer path are formed in different regions. | 2015-05-21 |