| 20th week of 2010 patent applcation highlights part 8 |
| Patent application number | Title | Published |
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| 20100123091 | Quantum Sensor Miniaturization Utilizing Entangled Photon Signals - The resolution obtained by an imaging system utilizing separable photons can be achieved by an imaging system making use of entangled photons. Since resolution is not being increased from the separable-photon system, the imaging system utilizing entangled photons can take advantage of a smaller aperture. This results in a smaller and lighter system, which can be especially valuable in satellite imaging where weight and size play a vital role. | 2010-05-20 |
| 20100123092 | FLUID CONTROL VALVE - A fluid control valve comprises a ferromagnetic material portion that is formed on the spool so as to extend in the axial direction of the spool, permanent magnets that are arranged opposite each other having the middle portion therebetween in a direction orthogonal to the axial direction of the spool, form between themselves oppositely oriented magnetic fields aligned in the axial direction, and which are formed to be longer than the middle portion in the axial direction of the spool, and a coil that is arranged in a direction orthogonal to the axial direction of the spool with respect to the permanent magnets and generates a magnetic field that penetrates the opposing permanent magnets due to the conduction of electricity. | 2010-05-20 |
| 20100123093 | ELECTROMAGNETIC DRIVE WITH A LIFTING ARMATURE - An electromagnetic drive with a lifting armature is disclosed, in particular for a valve, which, while having small dimensions, is suitable to achieve high magnetic forces and the components of which can be freely combined with one another in a large variety of ways. This allows an adaptation to a specified structural space without specific components having to be fabricated. The same standardized components are just combined with each other differently. The drive includes a magnetic yoke with two parallel spaced yoke legs, a yoke rod extending perpendicular to and connecting the yoke legs, a yoke stud extending parallel to the yoke rod and spaced from the yoke rod, and a core plug extending coaxially with the yoke stud. The core plug is axially movable and passes through one of the yoke legs. The core plug further defines an air gap with the yoke stud. | 2010-05-20 |
| 20100123094 | FLUID TRANSFER DEVICE - A fluid transfer device for transferring fluid into or out of a fluid vessel, such as a tank, and is particularly useful in transferring fluids with particulates or high viscosity in a substantially aseptic, hygienic, or sterile manner. The device has a body with an elongate passage extending through the body. The body has a proximal end and a distal end. A longitudinally displaceable shaft is disposed in and extends along the passage in the body. A plug sealing the passage is at a first location. A diaphragm sealing the passage is at a second location intermediate the plug and the distal end of the passage. The shaft extends through and is secured to the diaphragm. A fluid transfer opening is located in the passage between the diaphragm and the plug. Longitudinal displacement of the shaft causes the fluid transfer opening to be in fluid communication with a fluid vessel, the diaphragm stretching to accommodate the displacement of the shaft while maintaining an aseptic seal of the passage. | 2010-05-20 |
| 20100123095 | COMPOSITIONS COMPRISING 2,3,3,3-TETRAFLUOROPROPENE AND HYDROCARBONS AND USES THEREOF - The present invention relates to compositions for use in refrigeration, air-conditioning, and heat pump systems wherein the composition comprises 2,3,3,3-tetrafluoropropene (HFC-1234yf) and at least one hydrocarbon. The compositions of the present invention are useful in processes for producing cooling or heat, as heat transfer fluids, foam blowing agents, and aerosol propellants. | 2010-05-20 |
| 20100123096 | METHOD OF MAKING ACTIVE MATERIAL AND ELECTRODE - There is provided a method of making an active material with satisfactory cycle characteristics. The method of making an active material according to the invention comprises contacting an aqueous solution containing a metal-fluoro complex and lithium salt with lithium-containing metal oxide particles. | 2010-05-20 |
| 20100123097 | Method for Making Carbonates and Esters - A method for forming a monomeric carbonate includes the step of combining a monofunctional alcohol or a difunctional diol with an ester-substituted diaryl carbonate to form a reaction mixture. Similarly, a method for forming a monomeric ester includes the step of combining a monofunctional carboxylic acid or ester with an ester-substituted diaryl carbonate to form a reaction mixture. These methods further include the step of allowing the reaction mixtures to react to form a monomeric carbonate or a monomeric ester, respectively. | 2010-05-20 |
| 20100123098 | ULTRATOUGH SINGLE CRYSTAL BORON-DOPED DIAMOND - The invention relates to a single crystal boron doped CVD diamond that has a toughness of at least about 22 MPa m | 2010-05-20 |
| 20100123099 | Method for producing hydrogen - A method for producing hydrogen from a light hydrocarbon gas with the hydrocarbon gas being converted to particulate carbon and hydrogen and thereafter quenched with liquid sulfur with the purified hydrogen being recovered as a product. | 2010-05-20 |
| 20100123100 | COMPOSITION AND METHOD FOR CONTROLLING COPPER DISCHARGE AND EROSION OF COPPER ALLOYS IN INDUSTRIAL SYSTEMS - Compositions and methods of using such compositions for reducing copper ion discharge from aqueous systems is disclosed and claimed. The composition includes a synergistic combination of at least two different benzotriazoles or salts thereof that effectively provides an erosion-resistant barrier on copper-containing surfaces of industrial systems. | 2010-05-20 |
| 20100123101 | HYDROTALCITE COMPOUND, PROCESS FOR PRODUCING SAME, INORGANIC ION SCAVENGER, COMPOSITION, AND ELECTRONIC COMPONENT-SEALING RESIN COMPOSITION - The present invention is a novel hydrotalcite compound that is environmentally friendly and exhibits an excellent metal corrosion inhibiting effect by the addition of a small amount thereof, and an inorganic ion scavenger employing same; the hydrotalcite compound is represented by Formula (1), has a hydrotalcite compound peak in the powder X-ray diffraction pattern, the peak intensity at 2θ=11.4° to 11.7° being at least 3,500 cps, and has a BET specific surface area of greater than 30 m | 2010-05-20 |
| 20100123102 | Metal Paste for a Forming Conductive Layer - The present invention provides a metal paste for forming an electrically conductive layer comprising a metal solution in a reactive organic solvent having a heteroatom P, S, O, or N; metal powder; a binder; and a residual amount of a polar or non-polar viscosity modulating solvent. The metal paste composition according to the present invention has advantages in that it produces structures of layers denser than those conventional metal pastes do; shows characteristics of a much lower electric resistance even with a relatively small thickness or a small line width, as compared with the conductive pattern formed from a conventional paste; and allows heat treatment at a very low temperature even without the use of expensive nano-sized metal particles. The metal paste also provides a silver paste, which can be economically prepared and has high adaptability to various surfaces. | 2010-05-20 |
| 20100123103 | ZINC OXIDE BASED SPUTTERING TARGET, METHOD FOR MANUFACTURING ZINC OXIDE BASED SPUTTERING TARGET, ZINC OXIDE BASED TRANSPARENT ELECTRICALLY CONDUCTIVE FILM, METHOD FOR MANUFACTURING ZINC OXIDE BASED TRANSPARENT ELECTRICALLY CONDUCTIVE FILM, AND ELECTRONIC APPARATUS - A method for manufacturing a zinc oxide based sputtering target includes the step of producing a zinc oxide based sputtering target by using γ-Al | 2010-05-20 |
| 20100123104 | PHOSPHOR COMPOSITION - A method is disclosed for forming a blended phosphor composition. The method includes the steps of firing precursor compositions that include europium and nitrides of at least calcium, strontium and aluminum, in a refractory metal crucible and in the presence of a gas that precludes the formation of nitride compositions between the nitride starting materials and the refractory metal that forms the crucible. The resulting compositions can include phosphors that convert frequencies in the blue portion of the visible spectrum into frequencies in the red portion of the visible spectrum. | 2010-05-20 |
| 20100123105 | Light filters using yellow melanin and melanin-like oligomers and photochromic dyes - Selective fractionation and separation of melanin and use of fractionated or separated melanin in connection with light filters is disclosed. Further, light filters that use yellow melanin or melanin like materials prepared to have a yellow color and a melanin transmission spectrum in combination with a photochromic dye are disclosed. The yellow form of melanin has minimal impact on the perception of light intensity with transmission values greater than 80%. The combination allows for a single light filter suitable for both night driving and sunglass applications and which also preserve color perception. | 2010-05-20 |
| 20100123106 | TITANIUM OXIDE POWDER, DISPERSION THEREOF, AND METHOD OF PREPARING THE SAME - A titanium oxide powder containing 0.2 to 25% by weight of niobium or tantalum is provided. The titanium oxide powder has a diffuse reflectance spectrum such that the reflectance at the wavelength at which the reflectance is maximum in the visible range is at least 50%, and the reflectance in infrared range of 1000 to 2500 nm is equal to or less than half of the maximum reflectance of the visible range. The present invention is capable of producing a titanium oxide fine particle powder as well as its dispersion having infrared cutoff property which can be used in producing an infrared cutoff film, transparent heat blocking film, and the like. The powder contains inexpensive harmless titanium oxide as its main component. | 2010-05-20 |
| 20100123107 | METHOD AND COMPOSITION FOR MODERATED NUCLEAR FUEL - A nuclear fuel composition includes a transuranic fuel and a neutron moderator mixed with transuranic fuel. The neutron moderator includes at least one of hafnium or zirconium. | 2010-05-20 |
| 20100123108 | DEVICE FOR TRANSFERRING A LOAD FROM AN OBJECT TO A LOAD-BEARING ELEMENT - A device for transmitting a load from an object to a load-bearing element is provided. The device includes an attachment mechanism for attaching to a load-bearing element, such as a vertical stanchion. A loading mechanism includes a pressure block and a mechanism interconnecting the pressure block and the attachment mechanism. The loading mechanism can apply a preload to an object and transmit a force from the object to the load-bearing element. | 2010-05-20 |
| 20100123109 | Extension rod unit - An extension rod unit includes an outer tube with an inner tube retractably inserted thereto and a ratchet unit is connected to the open top of the outer tube. The ratchet unit includes a connection member and a lever. The connection member includes two side panels and each have a first lug extending therefrom. The lever has two second lugs and the shaft extends through the first and second lugs so as to pivotably connect the lever to the connection member. Two ratchet gears are located between two sets of first and second lugs. A slot is defined axially through the shaft. A driving member has a first end fixed to the fixing part and a second of the driving member extends through the slot of the shaft and is located beyond the outer tube. By pivoting the lever, the inner tube can be moved relative to the outer tube. | 2010-05-20 |
| 20100123110 | Land clearing device - A land clearing device that is sized and configured to be attached to a small earth moving machine, such as a skid loader. The land clearing device has a pusher assembly with telescopically extendable actuator arms that are operated by a control unit accessible from the interior of the earthmoving machine. When the actuator arms are extended, the forward end of the pusher assembly applies lateral force on a trunk of a tree, pushing the tree until uprooted. The pusher assembly is supported by a pair of upright legs that rest on the ground and provide stability to the pusher assembly, which cantilevered from the upright legs. A Y-shaped grabber assembly has a front hook that partially encircles and holds the tree below the location of contact with the pusher assembly. A mounting assembly is secured to the pusher assembly and the grabber assembly by a common securing rod about which the pusher assembly and the grabber assembly can pivot. The mounting assembly is configured for detachable mounting on a front of an earthmoving machine. | 2010-05-20 |
| 20100123111 | FLAT RAILCAR WORK PLATFORM AND WHEEL ASSEMBLY WITH LOCKING MECHANISM - An extendable railcar work platform includes one or more work platform sections each including a set of wheels, a locking mechanism associated with each wheel and a guide system. The system enables workers to safely work above an electrified third rail such as in a subway or railway tunnel. The platform may be in a first retracted position for transit or in a laterally extended or vertically extended position to enable a worker to access and work on a tunnel wall. The platform may be extended to both sides of the railcar and, if the platform includes more than one section, the individual sections may be simultaneously extended to opposite sides of the railcar. Each work platform section includes a floor or base and safety rails around all four sides of the section. | 2010-05-20 |
| 20100123112 | GEOGRID SAND FENCE - An apparatus comprising a geogrid sand fence for depositing matter moved by wind currents including a stand fence and related methods are provided. A geogrid sand fence for the control of sand or other particulate matter movement can include support members carrying a fencing material. The fencing material can include a High Density Polyethylene geogrid mesh material having apertures distributed to provide a 50% porosity to maximize sand deposit volume. The geogrid mesh material has sufficient structural weight to be employed with a height of approximately 2 meters, which can be adjusted to maintain maximum effectiveness. | 2010-05-20 |
| 20100123113 | SECURITY PARTITION SYSTEM AND UNIVERSAL CLIP FOR SUCH SYSTEM - A security partition system comprises an assembly of components, including:
| 2010-05-20 |
| 20100123114 | NONVOLATILE MEMORY DEVICE - A nonvolatile memory device ( | 2010-05-20 |
| 20100123115 | Interconnect And Method For Mounting An Electronic Device To A Substrate - An interconnect for mounting an electronic device to a substrate includes a base layer between the electronic device and the substrate in electrical communication with integrated circuits on the electronic device, a phase change layer on the base layer made of a material which is liquid at normal operating temperatures of the electronic device. and a retaining layer surrounding the phase change layer, and configured to retain the phase change layer in liquid form on the base layer. | 2010-05-20 |
| 20100123116 | SWITCHING MATERIALS COMPRISING MIXED NANOSCOPIC PARTICLES AND CARBON NANOTUBES AND METHOD OF MAKING AND USING THE SAME - An improved switching material for forming a composite article over a substrate is disclosed. A first volume of nanotubes is combined with a second volume of nanoscopic particles in a predefined ration relative to the first volume of nanotubes to form a mixture. This mixture can then be deposited over a substrate as a relatively thick composite article via a spin coating process. The composite article may possess improved switching properties over that of a nanotube-only switching article. A method for forming substantially uniform nanoscopic particles of carbon, which contains one or more allotropes of carbon, is also disclosed. | 2010-05-20 |
| 20100123117 | NON VOLATILE MEMORY CELLS INCLUDING A FILAMENT GROWTH LAYER AND METHODS OF FORMING THE SAME - A non volatile memory cell that includes a first electrode; a variable resistive layer disposed on the first electrode; a filament growth layer disposed on the variable resistive layer, the filament growth layer including dielectric material and metal atoms; and a second electrode. In other embodiments, a memory array is disclosed that includes a plurality of non volatile memory cells, each non volatile memory cell including a first electrode; a variable resistive layer disposed on the first electrode; a filament growth layer disposed on the variable resistive layer, the filament growth layer including clusters of a first electrically conductive atomic component interspersed in an oxidized second atomic component; and a second electrode; at least one word line; and at least one bit line, wherein the word line is orthogonal to the bit line and each of the plurality of non volatile memory cells are operatively coupled to a word line and a bit line. In still other embodiments, methods are disclosed that include forming a non volatile memory cell include forming a first electrode; forming a variable resistive layer on the first electrode; depositing a two phase alloy layer on the variable resistive layer; converting the two phase alloy layer to a filament growth layer; and depositing a second electrode on the filament growth layer, thereby forming a non volatile memory cell. | 2010-05-20 |
| 20100123118 | LED Epitaxial Wafer with Patterned GaN based Substrate and Manufacturing Method For the Same - A LED epitaxial-Chip with patterned GaN based substrate is provided. The LED epitaxial-Chip includes a substrate, a butter layer formed on the substrate, unintentional doped intrinsic GaN layer formed on the substrate, n-GaN layer formed on the substrate, InGaN active layer formed on the substrate, multiple quantum well formed on the substrate; and p-GaN layer formed on the sapphire substrate. The substrate has DBR reflection layer formed thereon. The DBR reflection layer is layered structure grown by two materials having different refractive index periodically alternate. The reflection layer forms at least two spaced patterned structures on the substrate. A manufacturing method of LED epitaxial-Chip with patterned GaN based substrate is also provided. | 2010-05-20 |
| 20100123119 | LIGHT EMITTING DIODE HAVING INDIUM NITRIDE - The present invention relates to a light emitting diode (LED) including an n-type nitride semiconductor layer, a p-type nitride semiconductor layer, and an active region interposed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer. The active region may include an InGaN quantum well layer. The LED may further include a super lattice layer interposed between the n-type nitride semiconductor layer and the active region. The super lattice layer may be a structure wherein InN layers and In | 2010-05-20 |
| 20100123120 | A SINGLE-PHOTON DETECTOR WITH A QUANTUM DOT AND A NANO-INJECTOR - A semiconductor photodetector for photon detection without the use of avalanche multiplication, and capable of operating at low bias voltage and without excess noise. In one embodiment, the photodetector comprises a plurality of InP/AlInGaAs/AlGaAsSb layers, capable of spatially separating the electron and the hole of an photo-generated electron-hole pair in one layer, transporting one of the electron and the hole of the photo-generated electron-hole pair into another layer, focalizing it into a desired volume and trapping it therein, the desired volume having a dimension in a scale of nanometers to reduce its capacitance and increase the change of potential for a trapped carrier, and a nano-injector, capable of injecting carriers into the plurality of InP/AlInGaAs/AlGaAsSb layers, where the carrier transit time in the nano-injector is much shorter than the carrier recombination time therein, thereby causing a very large carrier recycling effect. | 2010-05-20 |
| 20100123121 | Thyristor Radiation Detector Array and Applications Thereof - An array of thyristor detector devices is provided having an epitaxial growth structure with complementary types of modulation doped quantum well interfaces located between a P+ layer and an N+ layer. The thyristor detector devices operate over successive cycles that each include a sequence of two distinct modes: a setup mode and a signal acquisition mode. During the setup mode, the n-type quantum well interface and/or the p-type quantum well interface is(are) substantially emptied of charge. During the signal acquisition mode, photocurrent is generated by the thyristor detector device in response to the absorption of incident electromagnetic radiation therein, which can induce the thyristor detector device to switch from an OFF state to an ON state. The OFF/ON state of the thyristor detector device produces an output digital electrical data that corresponds to the amount of incident radiation absorbed by the thyristor detector device during the signal acquisition mode of the current cycle. In the preferred embodiment, the array of thyristor detector devices is part of a monolithic integrated circuit that includes additional electronic circuitry and/or optical components. Moreover, the array of thyristor detector devices is preferably part of a monolithic integrated circuit for high angular resolution laser irradiation detection. | 2010-05-20 |
| 20100123122 | SELECT DEVICES INCLUDING AN OPEN VOLUME, MEMORY DEVICES AND SYSTEMS INCLUDING SAME, AND METHODS FOR FORMING SAME - Select devices including an open volume that functions as a high bandgap material having a low dielectric constant are disclosed. The open volume may provide a more nonlinear, asymmetric I-V curve and enhanced rectifying behavior in the select devices. The select device may comprise, for example, a metal-insulator-insulator-metal (MIIM) device. Various methods may be used to form select devices and memory systems including such select devices. Memory devices and electronic systems include such select devices. | 2010-05-20 |
| 20100123123 | ORGANIC THIN-FILM TRANSISTORS - A thin-film transistor comprises a semiconducting layer comprising a semiconducting material selected from Formula (I) or (II): | 2010-05-20 |
| 20100123124 | ORGANIC THIN-FILM TRANSISTORS - A thin-film transistor uses a semiconducting layer comprising a semiconducting material of (A): | 2010-05-20 |
| 20100123125 | ORGANIC THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME AND DISPLAY DEVICE USING THE SAME - An organic thin film transistor, a method of manufacturing the same, and a display device using the same are provided. The organic thin film transistor includes a source and a drain on a substrate, reverse taper-shaped banks that are positioned on the source and the drain to expose a portion of each of the source and the drain, and an organic semiconductor layer between the reverse taper-shaped banks. | 2010-05-20 |
| 20100123126 | ORGANIC ELECTROLUMINESCENT ELEMENT - An organic electroluminescent element | 2010-05-20 |
| 20100123127 | Light-Emitting Element and Light-Emitting Device - To provide a light-emitting element, a light-emitting device, and an electronic device each formed using the organometallic complex represented by General Formula (G1) as a guest material and a low molecule compound as a host material. | 2010-05-20 |
| 20100123128 | Semiconductor Devices Having Channel Layer Patterns on a Gate Insulation Layer - Semiconductor devices include a gate electrode, a gate insulation layer, a first channel layer pattern, a second channel layer pattern and first and second metallic patterns. The gate electrode is on a substrate. The gate insulation layer is on the gate electrode. The first channel layer pattern is on the gate insulation layer, and has a first conductivity level. The second channel layer pattern is on the first channel layer pattern, and has a second conductivity level that is lower than the first conductivity level. The first and second metallic patterns are on the gate insulation layer and contact respective sidewalls of the first and second channel layer patterns. | 2010-05-20 |
| 20100123129 | ZnO-CONTAINING SEMICONDUCTOR LAYER AND DEVICE USING THE SAME - Mg is doped in a ZnO-containing semiconductor layer in a concentration range from 1×10 | 2010-05-20 |
| 20100123130 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - It is an object to provide an oxide semiconductor which is suitable for use in a semiconductor device. Alternatively, it is another object to provide a semiconductor device using the oxide semiconductor. Provided is a semiconductor device including an In—Ga—Zn—O based oxide semiconductor layer in a channel formation region of a transistor. In the semiconductor device, the In—Ga—Zn—O based oxide semiconductor layer has a structure in which crystal grains represented by InGaO | 2010-05-20 |
| 20100123131 | THIN FILM TRANSISTOR AND DISPLAY DEVICE - The present invention provides a thin film transistor realizing improved reliability by suppressing deterioration in electric characteristics. The thin film transistor includes an oxide semiconductor film forming a channel; a gate electrode disposed on one side of the oxide semiconductor film via a gate insulating film; and a pair of electrodes formed as a source electrode and a drain electrode in contact with the oxide semiconductor film and obtained by stacking at least first and second metal layers in order from the side of the oxide semiconductor film The first metal layer is made of a metal having ionization energy equal to or higher than molybdenum (Mo), a metal having oxygen barrier property, or a nitride or a silicon nitride of the metal having oxygen barrier property. | 2010-05-20 |
| 20100123132 | THIN FILM DEVICE AND MANUFACTURING METHOD OF THE SAME - To form an oxide semiconductor TFT having a fine property, which can be utilized for driving elements of a display, on a cheap glass substrate or a resin substrate such as PET that is light and flexible with fine regenerability and yield. Through radiating pulse light to an oxide semiconductor, a fine-quality oxide semiconductor film can be formed on a glass substrate or a resin substrate such as PET. This makes it possible to manufacture thin film devices having a fine property with fine regenerability and yield. | 2010-05-20 |
| 20100123133 | SPIN-POLARISED CHARGE-CARRIER DEVICE - A device comprising a channel for charge carriers comprising non-ferromagnetic semiconducting in which charge carriers exhibit spin-orbit coupling, a region of semiconducting material of opposite conductivity type to the channel and configured so as to form a junction with the channel for injecting spin-polarised charge carriers into an end of the channel and at least one lead connected to the channel for measuring a transverse voltage across the channel. | 2010-05-20 |
| 20100123134 | METHOD OF PRODUCING SEMICONDUCTOR DEVICE AND SOQ (SILICON ON QUARTZ) SUBSTRATE USED IN THE METHOD - A method of producing a semiconductor device includes the steps of preparing an SOQ (Silicon On Quartz) substrate in which a semiconductor layer is formed on a quartz substrate; forming a plurality of semiconductor device forming regions in the SOQ substrate; forming a crack inspection pattern in the SOQ substrate; inspecting the crack inspection pattern to detect a crack in the crack inspection pattern in a first inspection step; and inspecting the semiconductor device forming regions to detect a crack in the semiconductor device forming regions in a second inspection step when the crack is detected in the crack inspection pattern in the first inspection step. | 2010-05-20 |
| 20100123135 | PAD STRUCTURE AND METHOD OF TESTING - An interconnect structure includes: a plurality of dielectric layers having aligned process control monitor (PCM) pads, and a conductive structure above a topmost one of the PCM pads. The conductive structure electrically connects the topmost PCM pad to a device under test above a level of the topmost PCM pad. The conductive structure is sized and shaped so as to leave a majority portion of the topmost PCM pad exposed for access by a test probe. | 2010-05-20 |
| 20100123136 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - An oxide or nitride semiconductor layer is formed over a substrate. A first conductive layer including a first element and a second element, and a second conductive layer including the second element are formed over the semiconductor layer. The first element is oxidized or nitrogenized near an interface region between the first conductive layer and the oxide or nitride semiconductor layer by heat treatment or laser irradiation. The Gibbs free energy of oxide formation of the first element is lower than those of the second element or any element in the oxide or nitride semiconductor layer. | 2010-05-20 |
| 20100123137 | ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - An array substrate includes; a substrate, a gate line and a data line disposed on the substrate, a thin film transistor (“TFT”) electrically connected to the gate line and the data line, a light blocking member disposed on the substrate and a first color filter and a second color filter disposed on the substrate. The light blocking member covers a portion of the first color filter and the second color filter covers a portion of the light blocking member. | 2010-05-20 |
| 20100123138 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a display device includes forming a gate electrode on a substrate, a gate insulating layer on the gate electrode, and an active layer on the gate insulating layer, the gate electrode made of extrinsic polycrystalline silicon, the active layer made of intrinsic polycrystalline silicon; forming an etch stopper on the active layer; forming source and drain electrodes spaced apart from each other on the etch stopper; forming an ohmic contact layer each between a side of the active layer and the source electrode and between an opposing side of the active layer and the drain electrode; forming a gate line connected to the gate electrode; and forming a data line crossing the gate line. | 2010-05-20 |
| 20100123139 | SEMICONDUCTOR WAFER, SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD - An aspect of the present invention inheres in a semiconductor wafer includes a support substrate, a first nitride semiconductor layer, at least an upper surface of which has become monocrystalline, the first semiconductor layer being provided on the support substrate, and a second nitride semiconductor layer containing nitrogen and gallium, the second nitride semiconductor layer being provided on the upper surface of the first nitride semiconductor layer. | 2010-05-20 |
| 20100123140 | SiC SUBSTRATES, SEMICONDUCTOR DEVICES BASED UPON THE SAME AND METHODS FOR THEIR MANUFACTURE - The present invention generally relates to a method for improving inversion layer mobility and providing low defect density in a semiconductor device based upon a silicon carbide (SiC) substrate. More specifically, the present invention provides a method for the manufacture of a semiconductor device based upon a silicon carbide substrate and comprising an oxide layer comprising incorporating at least one additive into the atomic structure of the oxide layer. Semiconductor devices, such as MOSFETS, based upon a substrate treated according to the present method are expected to have inversion layer mobilities of at least about 60 cm | 2010-05-20 |
| 20100123141 | EMISSIVE DEVICE WITH CHIPLETS - An emissive device includes a substrate having a substrate surface; a chiplet adhered to the substrate surface, the chiplet having one or more connection pads; a bottom electrode formed on the substrate surface, one or more organic or inorganic light-emitting layers formed over the bottom electrode, and a top electrode formed over the one or more organic or inorganic light-emitting layers; an electrical conductor including a transition layer formed over only a portion of the chiplet and only a portion of the substrate surface, the transition layer exposing at least one connection pad, the electrical conductor formed in electrical contact with the exposed connection pad and the bottom electrode; and an LED spaced from the chiplet and including a layer of light-emissive material formed over the bottom electrode and a top electrode formed over the light-emissive layer. | 2010-05-20 |
| 20100123142 | FLAT PANEL DISPLAY APPARATUS - Provided is a flat panel display apparatus including a sealant which has a small effective width and is able to effectively attach a substrate and an encapsulation substrate. The flat panel display apparatus includes the substrate, a display unit disposed on the substrate, the encapsulation substrate disposed facing the substrate so that the display unit is disposed on inner side of the encapsulation substrate, and the sealant attaching the substrate and the encapsulation substrate, wherein an end surface of the sealant facing the substrate contacts a silicon oxide layer disposed on the substrate. | 2010-05-20 |
| 20100123143 | THREE-DIMENSIONAL LED LIGHT-EMITTING PLATE - In the field of opto-electronic technology, a three-dimensional (3D) light-emitting diode (LED) light-emitting plate is described. The 3D LED light-emitting plate includes an aluminum substrate. The aluminum substrate is vertically disposed. Notches are formed on an upper side of the aluminum substrate in a thickness direction. LED chips are mounted in the notches. A flexible circuit layer is disposed on a surface of the aluminum substrate. Each LED chip is connected to a circuit of the flexible circuit layer by a gold wire. A fluorescent colloid light-emitting shell is disposed outside each LED chip correspondingly. A cavity is formed between the LED chip and the fluorescent colloid light-emitting shell. A lower portion of the fluorescent colloid light-emitting shell is fixed on the aluminum substrate. The 3D LED light-emitting plate effectively improves the luminous brightness and efficiency of an LED and enlarges an effective light-emitting angle, and alleviates the problem of non-uniform light pattern and light color, such that an LED white light lamp can achieve the luminous effect of a tungsten lamp. The fluorescent colloid light-emitting shell wraps the LED chip, which not only protects the LED chip from dust and produces white light, but is also suitable for use in a severe environment. Moreover, the production cost is reduced due to the simple structure. | 2010-05-20 |
| 20100123144 | CIRCUIT STRUCTURE OF PACKAGE CARRIER AND MULTI-CHIP PACKAGE - A circuit structure of a package carrier including a plurality of chip pads, a first electrode, a second electrode, a third electrode and a fourth electrode is provided. These chip pads are arranged in an M×N array. A first bonding pad, a second bonding pad, a third bonding pad and a fourth bonding pad are disposed clockwise in the peripheral area of each chip pad in sequence. The orientations of each of the first, second, third, and fourth bonding pads of the (S−1) | 2010-05-20 |
| 20100123145 | LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE PACKAGE HAVING THE SAME - A light emitting device comprises a first conductive semiconductor layer, a plurality of light emitting cells separated on the first conductive semiconductor layer, a phosphor layer on at least one of the light emitting cells, and a plurality of second electrodes electrically connected to the light emitting cells. | 2010-05-20 |
| 20100123146 | LIGHT-EMITTING DEVICE STRUCTURE AND SEMICONDUCTOR WAFER STRUCTURE WITH THE SAME - A light-emitting device structure comprises a substrate having a first region and a second region outside the first region, a first conductive type semiconductor layer positioned on the first region, a light-emitting structure positioned on the first conductive type semiconductor layer, a second conductive type semiconductor layer positioned on the light-emitting structure, and a wall structure positioned on the second region. | 2010-05-20 |
| 20100123147 | SEMICONDUCTOR LIGHT EMITTING DEVICE - Disclosed is a semiconductor light emitting device. The semiconductor light emitting device includes a light emitting structure including a plurality of compound semiconductor layers including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; an electrode layer on the plurality of compound semiconductor layers; and a channel layer including protrusion and formed along a peripheral portion of an upper surface of the plurality of compound semiconductor layers. | 2010-05-20 |
| 20100123148 | SEMICONDUCTOR LIGHT EMITTING DEVICE - Provided are a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises a plurality of compound semiconductor layers, a first electrode, a second electrode layer, and a conductive support member. The plurality of compound semiconductor layers comprises a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer. The first electrode is formed under the compound semiconductor layer. The second electrode layer is formed on the compound semiconductor layer. The second electrode layer has an unevenness. The conductive support member is formed on the second electrode layer. | 2010-05-20 |
| 20100123149 | SEMICONDUCTOR LIGHT EMITTING DEVICE - Disclosed is a semiconductor light emitting device. The semiconductor light emitting device includes a plurality of compound semiconductor layers including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; a dot type conductive layer on the compound semiconductor layers; and an electrode layer on the dot type conductive layer. | 2010-05-20 |
| 20100123150 | Hybrid organic light emitting diode - A hybrid organic light emitting diode employing fluorescent family of blue light-emitting OLED and phosphorescent family of red and green light emitting OLED, each family being electrically isolated for driving current in to them independent of each other and thus prevent overloading the phosphorescent family when fluorescent family of OLED is driven at high current density. The electrical isolation built in to the device gives long life for the hybrid OLED and yields high brightness. The independent driving also yields additional advantage of varying the color temperature of white light from the device and thus enables the device to function as a variable color OLED lamp. | 2010-05-20 |
| 20100123151 | LIGHT-EMITTING DEVICE - A light-emitting device in accordance with an embodiment of the present invention includes a semiconductor light-emitting element, and a member in the periphery of the semiconductor light-emitting element is made of a material whose color, transparency or adhesiveness changes over time as it is subjected to light or heat emitted by the semiconductor light-emitting element. | 2010-05-20 |
| 20100123152 | Light-Emitting Element, Light-Emitting Device, Electronic Device, and Lighting Device - Provided is a light-emitting element including an anode over a substrate, a layer containing a composite material in which a metal oxide is added to an organic compound, a light-emitting layer, and a cathode having a light-transmitting property. The anode is a stack of a film of an aluminum alloy and a film containing titanium or titanium oxide. The film containing titanium or titanium oxide is in contact with the layer containing a composite material. | 2010-05-20 |
| 20100123153 | LIGHT-EMITTING DEVICE - This application discloses a light-emitting device comprising a light-emitting stack layer, a first transparent conductive layer disposed below the light-emitting stack layer, a transparent dielectric barrier layer disposed below the first transparent conductive layer, a second transparent conductive layer disposed below the transparent dielectric barrier layer and a metal reflective layer disposed below the second transparent conductive layer wherein an omni-directional reflector (ODR) comprises the metal reflective layer and the second transparent conductive layer. Besides, the first transparent conductive layer is ohmically connected with the light-emitting stack layer. | 2010-05-20 |
| 20100123154 | LIGHT EMITTING DEVICE PACKAGE - A light emitting device package is provided. The light emitting device package comprises a package body, a light emitting device on the package body, and a light-transmitting light guide member under the light emitting device. | 2010-05-20 |
| 20100123155 | SEMICONDUCTOR NANOPARTICLE-BASED LIGHT-EMITTING DEVICES AND ASSOCIATED MATERIALS AND METHODS - Embodiments of the present invention relate to a formulation for use in the fabrication of a light-emitting device, the formulation including a population of semiconductor nanoparticles incorporated into a plurality of discrete microbeads comprising an optically transparent medium, the nanoparticle-containing medium being embedded in a host light-emitting diode encapsulation medium. A method of preparing such a formulation is described. There is further provided a light-emitting device including a primary light source in optical communication with such a formulation and a method of fabricating the same. | 2010-05-20 |
| 20100123156 | LIGHT EMITTING DEVICE - Provided is a light emitting device. The light emitting device includes: a plurality of lead frame units spaced apart from each other, each of the lead frame units being provided with at least one fixing space perforating a body thereof in a vertical direction; a light emitting diode chip mounted on one of the lead frame units; and a molding unit that is integrally formed on top surfaces of the lead frame units and in the fixing spaces to protect the light emitting diode chip. | 2010-05-20 |
| 20100123157 | CIRCUIT BOARD FOR LED - An LED is bonded to a circuit board. The circuit board comprises a chip mounting area, a bonding pad, and a connecting portion. The LED is mounted on the chip mounting area with an adhesive, and the bonding pad is connected with an electrode of the LED. Moreover, the connecting portion is positioned between the chip mounting area and the bonding pad. One side of the connecting portion is connected with the chip mounting area and another side is connected with the bonding pad. With a hollow portion of the connecting portion, the adhesive will be prevented from flowing to the bonding pad. | 2010-05-20 |
| 20100123158 | Light emitting device and method of manufacturing the same - Provided is a light emitting diode (LED) manufactured by using a wafer bonding method and a method of manufacturing a LED by using a wafer bonding method. The wafer bonding method may include interposing a stress relaxation layer formed of a metal between a semiconductor layer and a bonding substrate. When the stress relaxation layer is used, stress between the bonding substrate and a growth substrate may be offset due to the flexibility of metal, and accordingly, bending or warpage of the bonding substrate may be reduced or prevented. | 2010-05-20 |
| 20100123159 | SIDE-VIEW TYPE LIGHT EMITTING DEVICE AND LINE LIGHT SOURCE TYPE LIGHT EMITTING DEVICE - A side-view type light emitting device includes a package body, a lead frame, and a light emitting diode (LED). The package body has a first surface provided as a mount surface, a second surface disposed on a side opposite to the first surface, and lateral surfaces disposed between the first surface and the second surface. The package body includes a recessed portion disposed on a lateral surface corresponding to a light emitting surface of the lateral surfaces. The lead frame is disposed in the package body. The LED chip is mounted on a bottom surface of the recessed portion. Protrusion parts protruding toward the LED chip are disposed in regions adjacent to the LED chip of facing inner sidewalls of the recessed portion, respectively. | 2010-05-20 |
| 20100123160 | Light-Emitting Device, Method for Manufacturing the Same, and Cellular Phone - The invention relates to: a light-emitting device which includes a first flexible substrate having a first electrode, a light-emitting layer over the first electrode, and a second electrode with a projecting portion over the light-emitting layer and a second flexible substrate having a semiconductor circuit and a third electrode electrically connected to the semiconductor circuit, in which the projecting portion of the second electrode and the third electrode are electrically connected to each other; a method for manufacturing the light-emitting device; and a cellular phone which includes a housing incorporating the light-emitting device and having a longitudinal direction and a lateral direction, in which the light-emitting device is disposed on a front side and in an upper portion in the longitudinal direction of the housing. | 2010-05-20 |
| 20100123161 | LIGHT EMITTING DIODE, PRODUCTION METHOD THEREOF AND LAMP - A light emitting diode includes a substrate, a compound semiconductor layer including a light emitting layer formed on the substrate, a first electrode formed on an upper surface of the compound semiconductor layer, and a second electrode formed on the substrate or a semiconductor layer which is exposed by removing at least a portion of the compound semiconductor layer. The first electrode includes a wiring electrode provided on the compound semiconductor layer in contact therewith, an ohmic electrode provided on the compound semiconductor layer in contact therewith, a translucent electrode formed over the compound semiconductor layer to cover the wiring electrode and the ohmic electrode, and a bonding pad electrode connected to the wiring electrode, at least a portion of the bonding pad electrode being exposed from an opening of the translucent electrode to the exterior. | 2010-05-20 |
| 20100123162 | OPTICAL SEMICONDUCTOR APPARATUS AND METHOD FOR PRODUCING THE SAME - An optical semiconductor apparatus can be configured by mounting an optical semiconductor element on a package substrate using a solder paste. The optical semiconductor apparatus can include a package substrate and a metal die pad formed on the substrate, and an optical semiconductor element bonded to the die pad with a solder material. The substrate can be made of a ceramic base material. A plurality of through holes can be formed in the substrate so that the through holes penetrate both the substrate base material and the die pad. Each of the through holes can have an inner surface where the ceramic base material is exposed. Each through hole can have an opening diameter greater than or equal to 40 μm and less than or equal to 100 μm. The plurality of through holes can be formed such that the total area of the openings of the through holes is 50% or less of the bonded area between the optical semiconductor element and the die pad including the through holes covered with the solder material. The through holes can be covered with the solder material at the upper end thereof where the optical semiconductor element and the die pad are bonded to each other. | 2010-05-20 |
| 20100123163 | SUBSTRATE WITH CHIPS MOUNTED THEREON, METHOD OF MANUFACTURING SUBSTRATE WITH CHIPS MOUNTED THEREON, DISPLAY, AND METHOD OF MANUFACTURING DISPLAY - Disclosed herein is a substrate with chip mounted thereon, including: a solder pattern having a plan-view shape in which projected parts are projected radially from a central part; and a chip fixed in the state of being aligned to the central part of the solder pattern. | 2010-05-20 |
| 20100123164 | LIGHT EMITING DEVICE AND METHOD OF MAKING SAME - A light emitting device includes a light-emitting portion including a metal part including a metal able to be bonded to a solder material, and a heat dissipation member that includes aluminum, aluminum alloy, magnesium or magnesium alloy and a bonding portion processed to be bonded to the solder material. The metal part of the light-emitting portion is bonded via the solder material to the bonding portion of the heat dissipation member. The solder material includes a material unable to be directly bonded to the heat dissipation member, the metal part of the light-emitting portion is formed by metalizing an insulation of ceramic or semiconductor, and the bonding portion includes a thermal expansion coefficient between that of the heat dissipation member and that of the insulation. | 2010-05-20 |
| 20100123165 | SEMICONDUCTOR MATERIAL, METHOD OF PRODUCING SEMICONDUCTOR MATERIAL, LIGHT EMITTING DEVICE AND LIGHT RECEIVING DEVICE - A semiconductor material includes a matrix semiconductor includes constituent atoms bonded to each other into a tetrahedral bond structure, and a heteroatom Z doped to the matrix semiconductor, in which the heteroatom Z is inserted in a bond so as to form a bond-center structure with an stretched bond length, and the bond-center structure is contained in a proportion of 1% or more based on the heteroatom Z. | 2010-05-20 |
| 20100123166 | SEMICONDUCTOR LIGHT-EMITTING DEVICE - Embodiments relate to a semiconductor light-emitting structure. | 2010-05-20 |
| 20100123167 | METHOD FOR MANUFACTURING GALLIUM OXIDE BASED SUBSTRATE, LIGHT EMITTING DEVICE, AND METHOD FOR MANUFACTURING THE LIGHT EMITTING DEVICE - A light emitting device includes a gallium oxide based substrate, a gallium oxynitride based layer on the gallium oxide based substrate, a first conductivity-type semiconductor layer on the gallium oxynitride based layer, an active layer on the first conductivity-type semiconductor layer, and a second conductivity-type semiconductor layer on the active layer. | 2010-05-20 |
| 20100123168 | NITRIDE CRYSTAL, NITRIDE CRYSTAL SUBSTRATE, EPILAYER-CONTAINING NITRIDE CRYSTAL SUBSTRATE, SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A nitride crystal is characterized in that, in connection with plane spacing of arbitrary specific parallel crystal lattice planes of the nitride crystal obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a surface of the crystal while X-ray diffraction conditions of the specific parallel crystal lattice planes are satisfied, a uniform distortion at a surface layer of the crystal represented by a value of |d | 2010-05-20 |
| 20100123169 | COMPOUND SEMICONDUCTOR SUBSTRATE AND DEVICE THEREWITH - A semiconductor device is formed on a semiconductor substrate, which is comprised of: a base substrate; and a multilayer being formed on the base substrate and having a surface serving for an interface with the semiconductor device, the multilayer including alternating layers of a first compound semiconductor and a second compound semiconductor materially distinguishable from the first compound semiconductor, one selected from the group consisting of the first compound semiconductor and the second compound semiconductor being doped with one selected from the group consisting of carbon and transition elements. | 2010-05-20 |
| 20100123170 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - A semiconductor device includes a transistor, a conductive pad, and a contact. The conductive pad is electrically connected to the transistor. The conductive pad may include, but is not limited to, a first region and a second region. The contact is electrically connected to the conductive pad. At least a main part of the first region overlaps the transistor in plan view. At least a main part of the second region does not overlap the transistor in plan view. At least a main part of the contact overlaps the second region in plan view. The at least main part of the contact does not overlap the first region in plan view. The at least main part of the contact does not overlap the transistor in plan view. | 2010-05-20 |
| 20100123171 | Multi-level Lateral Floating Coupled Capacitor Transistor Structures - A semiconductor device includes a source region, a drain region, a gate region, and a drift region. The drift region further includes an active drift region and inactive floating charge control (FCC) regions. The active drift region conducts current between the source region and the drain region when voltage is applied to the gate region. The inactive FCC regions, which field-shape the active drift region to improve breakdown voltage, are vertically stacked in the drift region and are separated by the active drift region. Vertically stacking the inactive FCC regions reduce on-resistance while maintaining higher breakdown voltages. | 2010-05-20 |
| 20100123172 | SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING SEMICONDUCTOR DEVICE - A substrate composed of hexagonally crystalline SiC is prepared such that its main surface is in the direction at which the minimum angle between the main surface and a plane perpendicular to the (0001) plane is one degree or less, for example, in the direction at which the minimum angle between the main surface and the [0001] direction, which is perpendicular to the (0001) plane, is one degree or less. A horizontal semiconductor device is formed on one main surface of the substrate prepared by the foregoing method. Thus, it was possible to improve the value of breakdown voltage significantly over the horizontal semiconductor device in which the main surface of the substrate composed of hexagonally crystalline SiC is in the direction along the (0001) direction. | 2010-05-20 |
| 20100123173 | Semiconductor device and method of manufacturing the same - A semiconductor device includes a three-dimensional structure that extends in a channel direction, a stress film having residual stress acting on a first side surface of the three-dimensional structure, a gate insulating film that is formed over a second side surface of the three-dimensional structure, and a gate electrode that covers the three-dimensional structure with the gate insulating film interposed therebetween and extends in a direction in which the first and second side surfaces are opposite to each other. The three-dimensional structure has a channel region between a source electrode and a drain electrode. | 2010-05-20 |
| 20100123174 | LIGHTLY-DOPED DRAINS (LDD) OF IMAGE SENSOR TRANSISTORS USING SELECTIVE EPITAXY - Embodiments of the present invention are directed to an image sensor having pixel transistors and peripheral transistors disposed in a silicon substrate. For some embodiments, a protective coating is disposed on the peripheral transistors and doped silicon is epitaxially grown on the substrate to form lightly-doped drain (LDD) areas for the pixel transistors. The protective oxide may be used to prevent epitaxial growth of silicon on the peripheral transistors during formation of the LDD areas of the pixel transistors. | 2010-05-20 |
| 20100123175 | SEMICONDUCTOR DEVICE - According to an aspect of the present invention, there is provided a semiconductor device, including: a semiconductor substrate; a transistor that is formed on the semiconductor substrate; an interlayer insulating film that is formed on the semiconductor substrate so as to cover the transistor and that has a through hole formed thereinside so as to reach the transistor; a plug lower-electrode that is formed in the through hole and that is connected to the transistor; a ferroelectric film that is formed on the plug lower-electrode; and an upper-electrode that is formed on the ferroelectric film. | 2010-05-20 |
| 20100123176 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device has a plurality of first cell selection MOS transistors of a first conductivity type formed on a first element region and connected in series between a bit line and a plate line; a plurality of first ferroelectric capacitors connected to the first cell selection MOS transistors in parallel in one-to-one correspondence; a plurality of second cell selection MOS transistors of the first conductivity type formed on a second element region and connected in series between a bit line and a plate line; and a plurality of second ferroelectric capacitors connected to the second cell selection MOS transistors in parallel in one-to-one correspondence, wherein the first ferroelectric capacitors and the second ferroelectric capacitors are disposed alternately on the first element region and the second element region in the first direction. | 2010-05-20 |
| 20100123177 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR MEMORY DEVICE - According to an aspect of the present invention, there is provided a semiconductor memory device, including a TC unit series-type FeRAM in which a plurality of memory cells, each of the memory cells comprising a memory transistor and a ferroelectric capacitor connected each other in parallel, are serially connected, including, a first electrode over and electrically connected to one of a source and a drain in the memory transistor, a second electrode opposed to the first electrode over and electrically connected to the other of the source and the drain in the memory transistor, a third electrode on both sidewalls of the second electrode other than an under portion of the second electrode, and a ferroelectric film between the first electrode and the two electrodes, the second electrode and the third electrode, wherein the ferroelectric capacitor comprises the first and the third electrode, and the ferroelectric film. | 2010-05-20 |
| 20100123178 | High ultraviolet light absorbance silicon oxynitride film for improved flash memory device performance - An ultraviolet light absorbent silicon oxynitride layer overlies a memory cell including a pair of source/drains, a gate insulator, a floating gate, a dielectric layer, and a control gate. A conductor is disposed through the silicon oxynitride layer for electrical connection to the control gate, and another conductor is disposed through the silicon oxynitride layer for electrical connection to a source/drain. | 2010-05-20 |
| 20100123179 | Two-Step Self-Aligned Source Etch With Large Process Window - System and method for self-aligned etching. According to an embodiment, the present invention provides a method for performing self-aligned source etching process. The method includes a step for providing a substrate material. The method also includes a step for forming a layer of etchable oxide material overlying at least a portion of the substrate material. The layer of etchable oxide material can characterized by a first thickness. The layer of etchable oxide material includes a first portion, a second portion, and a third portion. The second portion is positioned between the first portion and the third portion. The method additionally includes a step for forming a plurality of structures overlying the layer of etchable oxide material. The plurality of structures includes a first structure and a second structure. | 2010-05-20 |
| 20100123180 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A nonvolatile semiconductor memory device includes a semiconductor layer as a channel, a conductive layer which is formed on a surface of the semiconductor layer with a first insulating layer and a second insulating layer interposed therebetween and functions as a control gate electrode; and a plurality of first charge storage layers formed between the first insulating layer and the second insulating layer. The plurality of first charge storage layers are formed in isolation from one another along a surface of the first insulating layer. The first insulating layer is formed so as to protrude towards the semiconductor layer at a position where each of the first charge storage layers is formed. | 2010-05-20 |
| 20100123181 | NONVOLATILE MEMORY DEVICES INCLUDING MULTIPLE CHARGE TRAPPING LAYERS - A charge trap nonvolatile memory device includes a gate electrode on a substrate; a charge trapping layer between the substrate and the gate electrode; a charge tunneling layer between the charge trapping layer and the substrate; and a charge blocking layer between the gate electrode and the charge trapping layer. The charge trapping layer includes a first charge trapping layer having a first energy band gap and a second charge trapping layer having a second energy band gap that is different than the first energy band gap. The first and second charge trapping layers are repeatedly stacked and the first and second energy band gaps are smaller than energy band gaps of the charge tunneling layer and the charge blocking layer. | 2010-05-20 |
| 20100123182 | VERTICAL TYPE SEMICONDUCTOR DEVICE - A vertical pillar semiconductor device includes a substrate, a single crystalline semiconductor pattern, a gate insulation layer structure and a gate electrode. The substrate may include a first impurity region. The single crystalline semiconductor pattern may be on the first impurity region. The single crystalline semiconductor pattern has a pillar shape substantially perpendicular to the substrate. A second impurity region may be formed in an upper portion of the single crystalline semiconductor pattern. The gate insulation layer structure may include a charge storage pattern, the gate insulation layer structure on a sidewall of the single crystalline semiconductor pattern. The gate electrode may be formed on the gate insulation layer structure and opposite the sidewall of the single crystalline semiconductor pattern. The gate electrode has an upper face substantially lower than that of the single crystalline semiconductor pattern. | 2010-05-20 |
| 20100123183 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - A technique capable of improving the memory retention characteristics of a non-volatile memory is provided. In particular, a technique of fabricating a non-volatile semiconductor memory device is provided capable of enhancing the film quality of a silicon oxide film even when a silicon oxide film as a first potential barrier film is formed with a plasma oxidation method to improve the memory retention characteristics of the non-volatile memory. After a silicon oxide film, which is a main component of a first potential barrier film, is formed with a plasma oxidation method, plasma nitridation at a high temperature and a heat treatment in an atmosphere containing nitric oxide are performed in combination, thereby forming a silicon oxynitride film on the surface of the silicon oxide film, and segregating nitrogen to an interface between the silicon oxide film and a semiconductor substrate. | 2010-05-20 |
| 20100123184 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - In a nonvolatile semiconductor memory device provided with memory cell transistors arranged in a direction and a select transistor to select the memory cell transistors, each of the memory cell transistors of a charge trap type are at least composed of a first insulating layer and a first gate electrode respectively, and the select transistor is at least composed of a second insulating layer and a second gate electrode. The first gate electrode is provided with a first silicide layer of a first width formed on the first insulating layer. The second gate electrode is provided with an impurity-doped silicon layer formed on the second insulating layer and with a second silicide layer of a second width formed on the impurity-doped silicon layer. The second silicide has the same composition as the first silicide. The second width is larger than the first width. | 2010-05-20 |
| 20100123185 | MSD integrated circuits with trench contact structures for device shrinkage and performance improvement - A trench MOSFET device with embedded Schottky rectifier, Gate-Drain and Gate-Source diodes on single chip is formed to achieve device shrinkage and performance improvement. The present semiconductor devices achieve low Vf and reverse leakage current for embedded Schottky rectifier, have overvoltage protection for GS clamp diodes and avalanche protection for GD clamp diodes. | 2010-05-20 |
| 20100123186 | POWER SEMICONDUCTOR DEVICE - In a vertical power semiconductor device having the super junction structure both in a device section and a terminal section, an n-type impurity layer is formed on the outer peripheral surface in the super junction structure. This allows an electric field on the outer peripheral surface of the super junction structure region to be reduced. Accordingly, a reliable vertical power semiconductor device of a high withstand voltage can be provided. | 2010-05-20 |
| 20100123187 | CONTACT STRUCTURE FOR SEMICONDUCTOR DEVICE HAVING TRENCH SHIELD ELECTRODE AND METHOD - In one embodiment, a contact structure for a semiconductor device having a trench shield electrode includes a gate electrode contact portion and a shield electrode contact portion within a trench structure. Contact is made to the gate electrode and the shield electrode within or inside of the trench structure. A thick passivating layer surrounds the shield electrode in the contact portion. | 2010-05-20 |
| 20100123188 | SEMICONDUCTOR DEVICE HAVING TRENCH SHIELD ELECTRODE STRUCTURE - In one embodiment, a structure for a semiconductor device having a trench shield electrode includes a control pad, control runners, shield runners, and a control/shield electrode contact structure. The structure is configured to use a single level of metal to connect the various components. In another embodiment, a shield runner is placed in an offset from center configuration. | 2010-05-20 |
| 20100123189 | SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE - A semiconductor component that includes an edge termination structure and a method of manufacturing the semiconductor component. A semiconductor material has a semiconductor device region and an edge termination region. One or more device trenches may be formed in the semiconductor device region and one or more termination trenches is formed in the edge termination region. A source electrode is formed in a portion of a termination trench adjacent its floor and a floating electrode termination structure is formed in the portion of the termination trench adjacent its mouth. A second termination trench may be formed in the edge termination region and a non-floating electrode may be formed in the second termination trench. Alternatively, the second termination trench may be omitted and a trench-less non-floating electrode may be formed in the edge termination region. | 2010-05-20 |
| 20100123190 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - Provided are a semiconductor device and a method for manufacturing the same. In the method, a first conductive type buried layer and a first conductive type drift region are formed on a semiconductor substrate. A gate dielectric and gate electrode are formed in a first trench that extends into the first conductive type drift region. An oxide layer is formed on the semiconductor substrate, and first conductive type source regions are formed at sides of the gate electrode in a second conductive type well on the first conductive type drift region. An interlayer dielectric, the oxide layer, and the second conductive type well are selectively etched, forming a second trench. A tungsten plug is formed on a barrier layer in the second trench. Aluminum is buried on the tungsten plug to form a source contact. A drain electrode layer is formed connected to the first conductive type buried layer. | 2010-05-20 |
