20th week of 2022 patent applcation highlights part 63 |
Patent application number | Title | Published |
20220157341 | GENERATING AND ORCHESTRATING MOTION OF VISUAL CONTENTS IN AN INTERACTIVE INTERFACE TO GUIDE USER ATTENTION - Systems, methods and non-transitory computer readable media for generating and orchestrating motion of visual contents are provided. A plurality of visual contents may be accessed. Data indicative of a layout of the plurality of visual contents in a user interface may be accessed. A sequence for the plurality of visual contents may be determined based on the layout. For each visual content of the plurality of visual contents, the visual content may be analyzed to generate a video clip including a motion of at least one object depicted in the visual content. A presentation of the plurality of visual contents in the user interface may be caused. The determined sequence for the plurality of visual contents may be used to orchestrate a series of playbacks of the generated video clips. | 2022-05-19 |
20220157342 | Video Enhancements - Aspects of the present disclosure are directed to three-dimensional (3D) video calls where at least some participants are assigned a position in a virtual 3D space. Additional aspects of the present disclosure are directed to an automated effects engine that can A) convert a source still image into a flythrough video; B) produce a transform video that replaces portions of a source video with an alternate visual effect; and/or C) produce a switch video that automatically matches frames between multiple source videos and stiches together the videos at the match points. Further aspects of the present disclosure are directed to a platform for the creation and deployment of automatic video effects that respond to lyric content and lyric timing values for audio associated with a video and/or that respond to beat types and beat timing values for audio associated with a video. | 2022-05-19 |
20220157343 | SYSTEMS AND METHODS FOR DETERMINING PLAYBACK POINTS IN MEDIA ASSETS - Systems and methods are described for determining playback points in media assets based on both a keyword and a context of a current playback point in a media asset. For example, in response to user input of a keyword (e.g., “Matt Damon”) while the user is consuming a media asset, a current playback point in the media asset is determined. Context of the media asset at the current playback point is then determined (e.g., the current playback point involves a car chase). Playback points in the media asset are determined that match both the context and the keyword and are presented to the user (e.g., playback points with Matt Damon in a car chase). | 2022-05-19 |
20220157344 | Repetitive-Motion Activity Enhancement Based Upon Media Content Selection - Systems, devices, apparatuses, components, methods, and techniques for repetitive-motion activity enhancement based upon media content selection are provided. An example media-playback device for enhancement of a repetitive-motion activity includes a media-output device that plays media content items, a plurality of media content selection engines, and a repetitive-activity enhancement mode selection engine. The plurality of media content selection engines includes a cadence-based media content selection engine and an enhancement program engine. The cadence-based media content selection engine is configured to select media content items based on a cadence associated with the repetitive-motion activity. The enhancement program engine is configured to select a media content items according to an enhancement program for the repetitive-motion activity. The repetitive-activity enhancement mode selection engine is configured to select a media content selection engine from the plurality of engines and to cause the media-output device to playback media content items selected by the selected engine. | 2022-05-19 |
20220157345 | DISPLAY DEVICE - A display device including a display; and a controller configured to receive a request to display a video list including at least one video item corresponding to a video, determine an existence of last playback information indicating a last playback time of the video, and in response to the existence of the last playback information, control the display to display the at least one video item with a first thumbnail representing a first preview video based on the last playback time of the video. | 2022-05-19 |
20220157346 | CALIBRATION OF A CAMERA PROVIDED FOR MONITORING AN ADDITIVE MANUFACTURING PROCESS - A method for the calibration of a camera for monitoring additive manufacturing of an object in which material is applied in a plurality of layers is provided. The method includes: a) providing the camera and providing means for additive manufacturing of the object, b) capturing an image of the object being manufactured or already manufactured by the camera, c) comparing the image captured with a model of the object, d) determining a calibration function on the basis of the comparison from step c), which is intended to transform the image captured into a corrected image, wherein the corrected image of the object substantially corresponds to the model of the object, and e) calibrating the camera by the calibration function. Also provided is a computer program comprising commands which, when executed by a computer, cause the computer to execute the steps of the method as well as a related apparatus. | 2022-05-19 |
20220157347 | GENERATION OF AUDIO-SYNCHRONIZED VISUAL CONTENT - An image capture device may provide playback of audio content during capture of visual content. Moments within the audio content may be associated with cue markers. The visual content may be synchronized with the audio content provided during capture, and a video edit may be automatically generated based on the moments associated with the cue markers. | 2022-05-19 |
20220157348 | SYSTEM AND METHOD FOR GENERATING PERSONALIZED VIDEO TRAILERS - Systems and methods for generating individualized content trailers. Content such as a video is divided into segments each representing a set of common features. With reference to a set of stored user preferences, certain segments are selected as aligning with the user's interests. Each selected segment may then be assigned a label corresponding to the plot portion or element to which it belongs. A coherent trailer may then be assembled from the selected segments, ordered according to their plot elements. This allows a user to see not only segments containing subject matter that aligns with their interests, but also a set of such segments arranged to give the user an idea of the plot, and a sense of drama, increasing the likelihood of engagement with the content. | 2022-05-19 |
20220157349 | DISK DRIVE AND CARRIER ASSEMBLY - An approach for assembling a hard drive to a hard drive carrier is provided. The approach includes an ergonomic tool to aid with assembly. The ergonomic tool allows for a reduction in assembly time and prevents damage to the components. The ergonomic tool comprising of a base having a first surface and a first end open for receiving the components. The tool has a set of walls rising from the base, a first wall rising from the base proximate a second end opposite the first end and a pair of opposing side walls including voids rising from the first surface between the first end and the second end, to form a slot there between to receive the components within and adjacent the first surface. The tool has a releasable hold mechanism that aligns the components during assembly. | 2022-05-19 |
20220157350 | THERMOMETER SAMPLE AND HOLD DESIGN FOR NON-VOLATILE MEMORY - A sample and hold scheme for temperature measurements for non-volatile memory can enable significant reduction in temperature readout latency. In one example thermometer circuits are enabled at a refresh rate to cause the temperature to be sensed and latched at regular intervals. By performing the temperature readings in the background at a refresh rate instead of on-demand, the temperature is available to service commands with almost no latency. | 2022-05-19 |
20220157351 | SENSE AMPLIFIER AND OPERATING METHOD FOR NON-VOLATILE MEMORY WITH REDUCED NEED ON ADJUSTING OFFSET TO COMPENSATE THE MISMATCH - A sense amplifier includes a voltage comparator with offset compensation, a first clamping device and a second clamping device. The voltage comparator is coupled to a bit line and a reference bit line respectively, and configured to compare a first input voltage and a second input voltage to output a sensing signal. The first clamping circuit and the second clamping circuit trim a voltage corresponding to the bit line and a voltage corresponding to the reference bit line respectively to match the voltage corresponding to the reference bit line with the voltage corresponding to the bit line. | 2022-05-19 |
20220157352 | TEST METHOD AND TEST SYSTEM - A test method includes: providing an initialization command to a ZQ calibration module such that the resistance value of a termination resistor is a first extreme value; providing a ZQ calibration command to the ZQ calibration module such that the resistance value of the termination resistor increases or decreases to a second extreme value from the first extreme value, one of the first extreme value and the second extreme value being a maximum value while the other one being a minimum value; acquiring a first time node, the first time node being a transmitting time for the ZQ calibration command; acquiring a second time node; and acquiring the ZQ calibration time based on the second time node and the first time node. | 2022-05-19 |
20220157353 | MEMORY PACKAGE AND STORAGE DEVICE INCLUDING THE SAME - A memory package includes a package substrate including a redistribution layer and bonding pads connected to the redistribution layer, the redistribution layer including a plurality of signal paths; a buffer chip mounted on the package substrate and including a plurality of chip pads corresponding to a plurality of memory channels; and a plurality of memory chips stacked on the package substrate and divided into a plurality of groups corresponding to the plurality of memory channels, wherein memory chips of a first group, among the plurality of memory chips, are connected to first chip pads of the plurality of chip pads through first wires, and wherein memory chips of a second group, among the plurality of memory chips, are connected to second chip pads of the plurality of chip pads through second wires and at least a portion of the plurality of signal paths. | 2022-05-19 |
20220157354 | ELECTRONIC DEVICES COMPRISING AIR GAPS ADJACENT TO BITLINES AND RELATED METHODS AND SYSTEMS - An electronic device that comprises bitlines and air gaps adjacent to an array region of an electronic device is disclosed. The bitlines comprise sloped sidewalls and a height of the air gaps is greater than a height of the bitlines. Additional electronic devices are disclosed, as are methods of forming an electronic device and related systems. | 2022-05-19 |
20220157355 | BACK-UP AND RESTORATION OF REGISTER DATA - A system includes: a processor; a register configured to store a plurality of words, non-volatile memory having a plurality of cells, each cell corresponding to one of the words of the register, and wherein the each cell of the plurality of cells are set to an initial reset value; a first controller that in response to a loss in power: determines the word stored by the register; and changes the initial reset value of the cell of the non-volatile memory corresponding to the determined word stored by the register to a set value; a second controller that in response to detecting a restoration in power: identifies the cell having the set value; writes the word corresponding to the identified cell to the register; and resets the cells of the non-volatile memory to the initial reset value. | 2022-05-19 |
20220157356 | INPUT/OUTPUT CIRCUIT, OPERATION METHOD OF THE INPUT/OUTPUT CIRCUIT AND DATA PROCESSING SYSTEM INCLUDING THE INPUT/OUTPUT CIRCUIT - An input/output circuit including: an input circuit configured to load differential input data to setup nodes based on a data strobe clock; an output circuit configured to compare and amplify the data loaded to the setup nodes, and output differential output data; and a voltage retention circuit configured to retain the setup nodes at voltage levels corresponding to the differential output data, based on the data strobe clock and the differential output data. | 2022-05-19 |
20220157357 | CLOCK SYNCHRONIZING METHOD OF A MULTIPLE CLOCK DOMAIN MEMORY DEVICE - A memory device includes: a first clock receiver configured to receive a first clock signal; a second clock receiver configured to receive a second clock signal when data is input or output, wherein the second clock signal has a first clock frequency in a preamble period, and has a second clock frequency different from the first clock frequency after the preamble period; a command decoder configured to receive a clock synchronization command synchronized with the first clock signal and generate a clock synchronization signal, wherein the clock synchronization signal is generated during the preamble period; and a clock synchronizing circuit configured to generate a plurality of division clock signals in response to the second clock signal, latch the clock synchronization signal during the preamble period, and selectively provide the plurality of division clock signals as internal data clock signals according to a result of the latching. | 2022-05-19 |
20220157358 | RESONANT SYNTHETIC ANTIFERROMAGNET REFERENCE LAYERED STRUCTURE - A magnetic memory device including a magnetic tunnel junction (MTJ) pillar containing a stable resonant synthetic antiferromagnet (SAF) reference layered structure in which the ferromagnetic resonance characteristics of a polarizing magnetic layer of the SAF reference layered structure are substantially matched to at least a first magnetic reference layer within the SAF reference layered structure. By substantially matching the ferromagnetic resonance characteristics of the polarizing magnetic layer to at least the first magnetic reference layer, a MTJ pillar is provided in which the dynamic stability of the polarizing magnetic layer can be improved, and undesirable magnetic reference layer instability related write-errors can be mitigated. | 2022-05-19 |
20220157359 | VALLEY SPIN HALL EFFECT BASED NON-VOLATILE MEMORY - A memory cell is disclosed which includes a semiconductor layer, a first electrode coupled to the semiconductor layer, a second electrode coupled to the semiconductor layer, wherein the first and second electrodes are separated from one another along a first axis and wherein the semiconductor layer extends beyond the first axis along a second axis substantially perpendicular to the first axis, thereby forming a first wing, a third electrode separated from the semiconductor layer by an insulating layer, a first magnetic tunnel junction (MTJ) disposed on the first wing, and a first read electrode coupled to the first MTJ. | 2022-05-19 |
20220157360 | METHOD FOR WRITING TO MAGNETIC RANDOM ACCESS MEMORY - A method of manufacturing an array of magnetic random access memory cells includes writing to a magnetic random access memory cell. The writing to a memory cell includes determining an optimum write current for the array of memory cells, and applying the optimum write current to a first memory cell in the array. A first read current is applied to the first memory cell to determine whether a magnetic orientation of the first memory cell has changed in response to applying the optimum write current. A second write current is applied to the first memory cell when the magnetic orientation of the first memory cell has not changed. The second write current is different from the optimum write current. A second read current is applied to the first memory cell to determine whether the magnetic orientation of the first memory cell changed in response to applying the second write current. | 2022-05-19 |
20220157361 | DEVICE, SENSOR NODE, ACCESS CONTROLLER, DATA TRANSFER METHOD, AND PROCESSING METHOD IN MICROCONTROLLER - The present invention provides a device with low power and high performance, which can be applied to sensor nodes, a sensor node using the same, an access controller, a data transfer method, and execute a processing method in a microcontroller. The device has: an MRAM; a non-volatile CPU configured to include a nonvolatile memory; a non-volatile FPGA-ACC configured to include a nonvolatile memory and execute a part of operations on the nonvolatile CPU; and a power-gating control unit that controls power supply to each memory cell in the MRAM, the non-volatile CPU, and the non-volatile FPGA-ACC. The device is further provided with an access controller that controls accesses to the MRAM by reading data in advance and backing up the data when data is to be read from the MRAM. | 2022-05-19 |
20220157362 | SEMICONDUCTOR STORAGE DEVICE - A semiconductor storage device including a first magnetoresistive memory and a second magnetoresistive memory that are two types of magnetoresistive memories accessed by a target logic unit that is one logic unit. The target logic unit Ω the first magnetoresistive memory, and the second magnetoresistive memory are formed on one semiconductor chip, and the first magnetoresistive memory has a larger coercive force than the second magnetoresistive memory. | 2022-05-19 |
20220157363 | RESISTIVE MEMORY DEVICE - A resistive memory device is provided. The resistive memory device includes a bitline, a source line, a memory cell electrically connected to the bitline and the source line by a first switch, a first transistor electrically connected to the bitline, a second transistor electrically connected to the source line, a gate voltage generator configured to generate a first gate voltage that is provided to a gate electrode of the first transistor, and configured to generate a second gate voltage that is provided to a gate electrode of the second transistor and a second switch that provides the first and second gate voltages to the gate electrodes of the first and second transistors. | 2022-05-19 |
20220157364 | Memory Arrays, Ferroelectric Transistors, and Methods of Reading and Writing Relative to Memory Cells of Memory Arrays - Some embodiments include a ferroelectric transistor. The transistor has gate dielectric material configured as a first container, with the first container having a first inner surface. Metal-containing material is configured as a second container nested within said first container. The second container has a second inner surface with an area less than the first inner surface. Ferroelectric material is configured as a third container nested within the second container. The third container has a third inner surface with an area less than the second inner surface. Gate material is within the third container. Some embodiments include memory arrays having ferroelectric transistors as memory cells. Some embodiments include methods of writing/reading relative to memory cells of memory arrays when the memory cells are metal-ferroelectric-metal-insulator-semiconductor (MFMIS) transistors. | 2022-05-19 |
20220157365 | TIMING SIGNAL DELAY FOR A MEMORY DEVICE - Methods, systems, and devices for timing signal delay for a memory device are described. In some memory devices, operations for accessing memory cells may be performed with timing that is asynchronous relative to an input signal. To support asynchronous timing, a memory device may include delay components that support generating a timing signal having aspects that are delayed relative to an input signal. A memory device may include delay components having a configurable impedance based at least in part on one or more fabrication characteristics of the memory device, one or more operating conditions of the memory device, one or more bias voltages, or a combination thereof. | 2022-05-19 |
20220157366 | SYSTEMS AND METHODS FOR CAPTURE AND REPLACEMENT OF HAMMERED WORD LINE ADDRESS - A memory device includes at least one memory bank comprising a set of redundant word lines, a set of normal word lines, and row hammer refresh logic. The RHR logic comprises a first input to receive a first signal indicative of whether a match was generated at a fuse of the memory device, a second input to receive a redundant row address corresponding to a first location of a memory array of the memory device, a third input to receive a word line address corresponding to a second location of the memory array of the memory device. The RHR logic also comprises an output to transmit at least one first memory address adjacent to the first location or at least one second memory address adjacent to the second location based on a value of the first signal. | 2022-05-19 |
20220157367 | APPARATUSES, SYSTEMS, AND METHODS FOR SYSTEM ON CHIP REPLACEMENT MODE - Apparatuses, systems, and methods for a system on chip (SoC) replacement mode. A memory device may be coupled to a SoC which may act as a controller of the memory. Commands and addresses may be sent along a command/address (CA) bus to a first decoder of the memory. The first decoder may use a first reference voltage to determine a value of signals along the CA bus. One of the pins of the CA bus may be coupled to a second decoder which may use a different second reference voltage. When the voltage on the pin exceeds the second reference voltage, the memory device may enter a SoC replacement mode, in which the memory may take various actions to preserve data integrity, while a new SoC comes online. | 2022-05-19 |
20220157368 | VOLTAGE DROP MITIGATION TECHNIQUES FOR MEMORY DEVICES - Methods, systems, and devices for voltage drop mitigation techniques for memory devices are described. A memory device may include an array of memory cells, a conductive line, a pull-up circuit, and an output circuit. The conductive line may be configured to convey a first voltage for performing an operation with the array of memory cells. The pull-up circuit may be configured to couple the conductive line with a voltage source during at least a portion of a duration in which the operation is performed based on a first signal that enables applying a current to the array of memory cells as part of the operation. The output circuit may be configured to output a second signal to deactivate the pull-up circuit before the operation is complete. Outputting the second signal may be based on the first signal and a difference between the first voltage and a reference voltage. | 2022-05-19 |
20220157369 | SENSE AMPLIFYING CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE - According to an embodiment of the present disclosure, a semiconductor memory device includes a bit line sense amplifier coupled between a pull-up voltage line and a pull-down voltage line, and suitable for sensing a voltage difference between first and second bit lines by sequentially performing a precharge operation, an offset cancellation operation, a charge sharing operation, and an amplification operation, wherein the bit line sense amplifier pre-biases a voltage level of the second bit line depending on a voltage level of the first bit line during the charge sharing operation; and a driving circuit suitable for supplying operating voltages to the pull-up voltage line and the pull-down voltage line during the offset cancellation operation, the charge sharing operation, and the amplification operation. | 2022-05-19 |
20220157370 | COMPARISON OPERATIONS IN MEMORY - One example of the present disclosure includes performing a comparison operation in memory using a logical representation of a first value stored in a first portion of a number of memory cells coupled to a sense line of a memory array and a logical representation of a second value stored in a second portion of the number of memory cells coupled to the sense line of the memory array. The comparison operation compares the first value to the second value, and the method can include storing a logical representation of a result of the comparison operation in a third portion of the number of memory cells coupled to the sense line of the memory array. | 2022-05-19 |
20220157371 | SEMICONDUCTOR DEVICE CAPABLE OF PERFORMING IN-MEMORY PROCESSING - A semiconductor device includes a memory cell array, an address input circuit, a command input circuit, a data Input/Output (JO) circuit, a processing control circuit, a processing circuit, and a switch circuit. The processing control circuit includes a register array storing an address of an operand and determines whether an address provided from the address input circuit corresponds to the address stored in the register array. The processing circuit is configured to provide a processing result by performing an operation on data provided from the memory cell array. The switch circuit is configured to control a data path among the processing circuit, the data JO circuit, and the memory cell array and controls the data path to connect the memory cell array to the processing circuit when the address provided from the address input circuit corresponds to the address stored in the register array. | 2022-05-19 |
20220157372 | APPARATUSES INCLUDING MEMORY REGIONS HAVING DIFFERENT ACCESS SPEEDS AND METHODS FOR USING THE SAME - Apparatuses, systems, and methods for faster memory access regions. A memory array may have a fiat bank which has a greater access speed than a second bank. For example the first bank may have a reduced read latency compared to the second bank. The first bank may have structural differences, such as reduced word line and/or reduced global input output (GIO) line length. In some embodiments, the first and second bank may have separate bank pad data buses, and data terminals. In some embodiments, they may share the bank pads data bus, and data terminals. In some embodiments, when an access command is received for the first (faster) bank while an access command to the second (slower) bank is still processing, the access to the faster bank may interrupt the access to the slower bank. | 2022-05-19 |
20220157373 | MEMORY SYSTEM PERFORMING HAMMER REFRESH OPERATION AND METHOD OF CONTROLLING REFRESH OF MEMORY DEVICE - A memory system includes a memory controller and a memory device. The memory controller generates refresh commands periodically by an average refresh interval. The memory device performs a normal refresh operation and a hammer refresh operation during a refresh cycle time. The memory device includes a memory cell array including memory cells connected to a plurality of wordlines, a temperature sensor configured to provide temperature information by measuring an operation temperature of the memory cell array and a refresh controller configured to control the normal refresh operation and the hammer refresh operation. The refresh controller varies a hammer ratio of a unit hammer execution number of the hammer refresh operation executed during the refresh cycle time with respect to a unit normal execution number of the normal refresh operation executed during the refresh cycle time. | 2022-05-19 |
20220157374 | PERIODIC CALIBRATIONS DURING MEMORY DEVICE SELF REFRESH - A memory device is described. The memory device includes logic circuitry to perform calibrations of resistive network terminations and data drivers of the memory device while the memory device is within a self refresh mode. | 2022-05-19 |
20220157375 | MEMORY DEVICE - A memory device is provided. The memory device includes a cell array having a plurality of cells, each of the plurality of cells operative to store a bit value. The memory device further includes a reset circuit connected to the cell array. The reset circuit is operative to reset, in parallel, the bit value stored in each of the plurality of cells to a predetermined bit value. | 2022-05-19 |
20220157376 | CONCURRENT MULTI-BIT ACCESS IN CROSS-POINT ARRAY - Concurrent access of multiple memory cells in a cross-point memory array is disclosed. In one aspect, a forced current approach is used in which, while a select voltage is applied to a selected bit line, an access current is driven separately through each selected word line to concurrently drive the access current separately through each selected memory cell. Hence, multiple memory cells are concurrently accessed. In some aspects, the memory cells are accessed using a self-referenced read (SRR), which improves read margin. Concurrently accessing more than one memory cell in a cross-point memory array improves bandwidth. Moreover, such concurrent accessing allows the memory system to be constructed with fewer, but larger cross-point arrays, which increases array efficiency. Moreover, concurrent access as disclosed herein is compatible with memory cells such as MRAM which require bipolar operation. | 2022-05-19 |
20220157377 | DUO-LEVEL WORD LINE DRIVER - A circuit includes a first transistor and a second transistor cross-coupled with each other such that a source of the first transistor and a source of the second transistor are connected to a power supply, a gate of the first transistor is connected to a drain of the second transistor at a first node, a gate of the second transistor is connected to a drain of the first transistor at a second node. The circuit can provide a first level of a word line voltage to the memory cell by directly coupling the power supply configured at a first level to the memory cell through the second transistor and a third transistor, and provide a second level of the word line voltage by directly coupling the power supply configured at a second level to the memory cell through the second transistor and the third transistor. | 2022-05-19 |
20220157378 | FAST READ SPEED MEMORY DEVICE - A memory cell includes a first resistive memory element, a second resistive memory element electrically coupled with the first resistive memory element at a common node, and a switching element comprising an input terminal electrically coupled with the common node, the switching element comprising a driver configured to float during one or more operations. | 2022-05-19 |
20220157379 | FAST INTERVAL READ SETUP FOR 3D NAND FLASH - A memory having a plurality of blocks is coupled with control circuits having logic to execute a read setup operation, the read setup operation comprising simultaneously applying a read setup bias to a plurality of memory cells of a selected block of the plurality of blocks. Logic to traverse the blocks in the plurality of blocks can apply the read setup operation to the plurality of blocks. The blocks in the plurality of blocks can include respectively a plurality of sub-blocks, The read setup operation can traverse sub-blocks in a block to simultaneously apply the read setup bias to more than one individual sub-block of the selected block. A block status table can be used to identify stale blocks for the read setup operation. Also, the blocks can be traversed as a background operation independent of read commands addressing the blocks. | 2022-05-19 |
20220157380 | SEMICONDUCTOR STORAGE DEVICE - A semiconductor storage device includes a first memory cell electrically connected to a first bit line and a first word line, a second memory cell electrically connected to a second bit line and the first word line, and a first circuit configured to supply voltages to the first word line. During a reading operation to read a page of memory cells including the first memory cell and the second memory cell, the first circuit supplies a first voltage to the first word line while the first memory cell is selected as a read target during a first time period, and supplies a second voltage greater than the first voltage to the first word line while the second memory cell is selected as a read target during a second time period that is different from the first time period, and directly thereafter, supplies the first voltage to the first word line. | 2022-05-19 |
20220157381 | MEMORY DEVICE, A MEMORY SYSTEM, AND A METHOD OF OPERATING THE SAME - A method of operating a memory device, the method including: performing a first program operation to form a plurality of first threshold voltage distributions; and performing a second program operation by using a coarse verification voltage and a fine verification voltage based on offset information to form a plurality of second threshold voltage distributions respectively corresponding to a plurality of program states from the plurality of first threshold voltage distributions, wherein the offset information includes a plurality of offsets that vary according to characteristics of the second threshold voltage distributions. | 2022-05-19 |
20220157382 | SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME - A semiconductor memory device includes: a semiconductor substrate having a first surface and a second surface opposing each other; a back-side insulating layer below the second surface of the semiconductor substrate; an external input/output conductive pattern below the back-side insulating layer; a circuit device including a gate electrode and a source/drain region, on the first surface of the semiconductor substrate; an internal input/output conductive pattern on the first surface of the semiconductor substrate, the internal input/output conductive pattern having at least a portion disposed on the same level as at least a portion of the gate electrode; a through-electrode structure penetrating through the semiconductor substrate and the back-side insulating layer and electrically connected to the internal input/output conductive pattern and the external input/output conductive pattern; and a memory cell array region disposed on a level higher than the circuit device, on the first surface of the semiconductor substrate. | 2022-05-19 |
20220157383 | METHOD FOR PROGRAMMING B4 FLASH MEMORY - A method for programming a B4 flash memory includes: floating a source of a P-channel flash memory device; separately applying voltages to a gate, a drain, and a bulk of the P-channel flash memory device, and injecting holes into the bulk, so that electrons are gathered in the drain to form primary electrons; separately applying voltages to the drain and the bulk, so that an electric field is formed between the drain and the bulk, where the holes accelerate downward under the action of the electric field and impact the bulk in the P-channel flash memory device to generate secondary electrons; and separately applying voltages to the gate and the bulk of the P-channel flash memory device, so that the secondary electrons form tertiary electrons under the action of the electric field in a vertical direction, where the tertiary electrons are superposed with the primary electrons to be injected into a floating gate. | 2022-05-19 |
20220157384 | Pulse-Width Modulated Multiplier - Disclosed herein is a neuromorphic integrated circuit, including in many embodiments, a neural network disposed in a multiplier array in a memory sector of the integrated circuit, and a plurality of multipliers of the multiplier array, a multiplier thereof including at least one transistor-based cell configured to store a synaptic weight of the neural network, an input configured to accept digital input pulses for the multiplier, an output configured to provide digital output pulses of the multiplier, and a charge integrator, where the charge integrator is configured to integrate a current associated with an input pulse of the input pulses over an input pulse width thereof, and where the multiplier is configured to provide an output pulse of the output pulses with an output pulse width proportional to the input pulse width. | 2022-05-19 |
20220157385 | VOLTAGE OFFSET BIN SELECTION BY DIE GROUP FOR MEMORY DEVICES - One or more data units at a memory device and that are associated with one or more dice of a die group comprising a plurality of dice are programmed. A voltage offset bin associated with the plurality of dice in the die group is determined based on a subset of dice of the die group. | 2022-05-19 |
20220157386 | SECURE ERASE FOR DATA CORRUPTION - Disclosed in some examples are systems, methods, memory devices, and machine readable mediums for a fast secure data destruction for NAND memory devices that renders data in a memory cell unreadable. Instead of going through all the erase phases, the memory device may remove sensitive data by performing only the pre-programming phase of the erase process. Thus, the NAND doesn't perform the second and third phases of the erase process. This is much faster and results in data that cannot be reconstructed. In some examples, because the erase pulse is not actually applied and because this is simply a programming operation, data may be rendered unreadable at a per-page level rather than a per-block level as in traditional erases. | 2022-05-19 |
20220157387 | SEMICONDUCTOR MEMORY AND NONVOLATILE MEMORY - According to one embodiment, a semiconductor memory includes: a memory group including a plurality of memory cells configured to store a plurality of bits of data in three or more plurality of states; a word line coupled to the plurality of memory cells; and a first circuit configured to convert one external address received from an external controller into a plurality of internal addresses, wherein a first page size of page data of the memory group is smaller than a second page | 2022-05-19 |
20220157388 | NON-VOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A method of operating a non-volatile memory device includes performing a first sensing operation on the non-volatile memory device during a first sensing time including a first section, a second section, and a third section. The performing of the first sensing operation includes applying a first voltage level, which is variable according to a first target voltage level, to a selected word line in the first section, applying a second voltage level, which is different from the first voltage level, to the selected word line in the second section, and applying the first target voltage level, which is different from the second voltage level, to the selected word line in the third section. The first voltage level becomes greater as the first target voltage level becomes greater. | 2022-05-19 |
20220157389 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes word lines, first and second select gate lines, first and second semiconductor columns, first and second bit lines, and first and second transistors. The word lines are arranged in a first direction. The first and second select gate lines extend in a second direction and overlap with the word lines viewed from the first direction. The first and second select gate lines are arranged in the second direction. The first semiconductor column is opposed to the word lines and the first select gate line. The second semiconductor column is opposed to the word lines and the second select gate line. The first and second bit lines extend in a third direction and overlap with the first and second semiconductor columns viewed from the first direction. The first and second transistors are electrically connected to the first and second select gate lines. | 2022-05-19 |
20220157390 | MEMORY SYSTEM CAPABLE OF REDUCING THE READING TIME - A bias circuit, a memory system, and a method of boosting a voltage level of a first bit line are provided. The bias circuit includes a first current generator, a second current generator, and a bit line bias generator. The first current generator is configured to generate a first replica charging current according to a charging current flowing through a voltage bias transistor. The second current generator is configured to generate a first replica cell current according to a cell current flowing through a common source transistor. The bit line bias generator is coupled to a first page buffer, the first current generator, and the second current generator, and configured to generate a bit line bias voltage, supplied to the first page buffer, according to a comparison of the first replica charging current and the first replica cell current. | 2022-05-19 |
20220157391 | METHODS FOR REDUCING DISTURB ERRORS BY REFRESHING DATA ALONGSIDE PROGRAMMING OR ERASE OPERATIONS - A method is for ensuring data integrity in memory pages includes: dividing the memory pages into a predetermined number of refresh groups; and for each write operation to be performed on a selected memory page: (a) selecting one of the refresh groups; (b) reading data from the memory pages of the selected refresh group; and (d) concurrently (i) performing the write operation on the selected memory page, and (ii) writing back the data read into the memory pages of the selected refresh group. | 2022-05-19 |
20220157392 | MEMORY CIRCUIT AND MEMORY PROGRAMMING METHOD - A memory circuit and a memory programming method adapted to program flash memory are provided. The memory circuit includes a charge pumping circuit, a voltage regulator, a voltage sensor, and a plurality of switch circuits. The charge pumping circuit generates a pumping voltage and a pumping current. The voltage regulator is coupled to the charge pumping circuit and generates a programming voltage and a programming current to program the flash memory according to the pumping voltage and the pumping current. The voltage sensor is coupled to the voltage regulator to monitor a voltage value of the programming voltage. Each of the plurality of switch circuits includes a first terminal coupled to the voltage sensor and a second terminal coupled to the flash memory. A quantity of the plurality of switch circuits that are turned on is determined by the voltage value of the programming voltage. | 2022-05-19 |
20220157393 | NON-VOLATILE MEMORY DEVICE AND METHOD FOR PROGRAMMING A NON-VOLATILE MEMORY DEVICE - A method for programming at least one memory cell of a plurality of memory cells included in a non-volatile memory device, the at least one memory cell including a word line and a bit line, the method including: performing a first and second program and verify operation based on a first and second condition, respectively, wherein each program and verify operation includes generating a program voltage and a bit line voltage by a voltage generator included in the non-volatile memory device and providing the program voltage and the bit line voltage to the word line and the bit line, respectively, wherein voltage levels and voltage application times of each program voltage and bit line voltage correspond to the first condition or the second condition, respectively, wherein the first condition is different from the second condition. | 2022-05-19 |
20220157394 | MEMORY DEVICE - Provided is a memory device including a memory structure including a substrate, a channel region, first and second doped regions, a floating gate and a dielectric layer. The channel region is disposed on the substrate. The first and the second doped regions are disposed on the substrate and respectively located at two sides of the channel region. The floating gate is disposed on the channel region. The dielectric layer is disposed between the floating gate and the channel region, the first doped region and the second doped region. The floating gate and the first doped region are partially overlapped, and/or the floating gate and the second doped region are not overlapped and a sidewall of the floating gate adjacent to the second doped region and a boundary between the second doped region and the channel region are separated by a distance. | 2022-05-19 |
20220157395 | SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME - A semiconductor device capable of efficiently increasing a capacity of a mounted storage element while achieving space saving, and an electronic apparatus including this semiconductor device are provided. The semiconductor device includes a storage element including a filament that has a first conductive layer, a second conductive layer, and an insulation layer. The first conductive layer and the second conductive layer are stacked with at least the insulation layer interposed between the first conductive layer and the second conductive layer. The filament obtains at least three identifiable resistance states by changing a combination of a state of the first conductive layer, a state of the second conductive layer, and a state of the insulation layer. The semiconductor device further includes a writing unit that produces the at least three identifiable resistance states by applying a blow current to the storage element. | 2022-05-19 |
20220157396 | APPARATUSES FOR CHARACTERIZING SYSTEM CHANNELS AND ASSOCIATED METHODS AND SYSTEMS - Apparatuses for characterizing system channels and associated methods and systems are disclosed. In one embodiment, a tester is coupled to an adaptor configured to plug into a CPU socket of a system platform (e.g., a motherboard). The motherboard includes a memory socket that is connected to the CPU socket through system channels. The adaptor may include a connector configured to physically and electrically engage with the CPU socket, an interface configured to receive test signals from the tester, and circuitry configured to internally route the test signals to the connector. The adaptor, if plugged into the CPU socket, can facilitate the tester to directly assess signal transfer characteristics of the system channels. Accordingly, the tester can determine optimum operating parameters for the memory device in view of the system channel characteristics. | 2022-05-19 |
20220157397 | SEMICONDUCTOR CHIP BURN-IN TEST WITH MUTLI-CHANNEL - The disclosure performs a pre-test that checks electrical connections between each electrical contact of the socket and the corresponding pin of the semiconductor chip during a pre-test stage before a burn-in test. The electrical connection between each of the electrical contacts and each of the pins may be checked through multiple signal channels. Even when one of the signal channels failed, the pre-test and the burn-in test may still be performed as long as another one of the signal channels passes the pre-test. In addition, the pre-test stage through multiple signal channels also provides information for determining whether the failure of semiconductor chip is caused by the electrical connection between the socket of the burn-in board or the semiconductor chip itself. | 2022-05-19 |
20220157398 | System and Method for Error Correction - A memory controller is provided for reading and writing to and from a memory module. The memory controller implements an error correction algorithm, which calculates error correction code for message data to be written to the memory module and checks the error correction code against the message data when the data is read out of the memory module. The memory controller spreads each codeword over at least four different beats sent over the interface with the memory module, with each beat comprising a symbol of error correction code. Bits of a particular symbol of message data occupy the same positions in different beats. Since the bits of the symbols occupy the same positions in different beat, the number of bits affected by a hardware error is minimised. With four symbols of error correction code available for use in the codeword. | 2022-05-19 |
20220157399 | AUTOMATED TEST EQUIPMENT COMPRISING A PLUARLITY OF COMMUNICATION INTERFACES TO A DEVICE UNDER TEST - The automated test equipment is configured to establish communication, e.g. by uploading a program to the DUT using a first interface, such as a debug interface or a generic interface having access to the processing unit for external control. A typical use case of the first interface is debug access to the DUT, which typically requires limited data rates. In the case of the invention the first interface is an ATE access for test execution. The first interface configures the DUT to open a second interface running at much higher data rate, which is higher than the first interface, for additional communication. Additionally, the second interface may have extended capabilities compared to the first interface, such as presenting its own memory to the processing unit of the DUT as a normal system memory. | 2022-05-19 |
20220157401 | METHOD AND SYSTEM FOR MAPPING READ SEQUENCES USING A PANGENOME REFERENCE - There is a demand for low-cost efficient robust method for mapping read sequences with genome variation graph in genomic study. This disclosure herein relates to a method and system for mapping read sequences with genome variation graph by constructing a subgraph using a novel combination of graph embedding and graph winnowing techniques. The system processes the obtained plurality of read sequences and a genome variation graph for constructing the subgraph by computing an embedding for the genome variation graph utilizing a graph embedding technique. Further, graph index is generated for the genome variation graph based on the embedding and the genome variation graph utilizing the graph winnowing technique. Then computes gapped alignment score for read sequence (r) with its corresponding subgraph. Thus, enables a reliable method for read sequence with accurate, memory efficient and scalable system for mapping read sequences with genome variation graph. | 2022-05-19 |
20220157402 | Prediction of oscillation patterns of charges in a DNA sequence - Some aspects of the present invention include a system for computationally prediction of oscillation patterns of charges in a DNA sequence. Such a system includes one or more means for computationally predicting proton wires with longitudinal (coaxial) hydrogen bonds in the DNA sequence; and at least one means for predicting electron wires in the DNA sequence. These wires connect the aromatic rings of DNA basepairs. The above system includes at least one means for predicting tautomeric oscillations in said DNA. | 2022-05-19 |
20220157403 | SYSTEMS AND METHODS TO CLASSIFY ANTIBODIES - The present disclosure describes systems and methods to make predictions classifying one or more properties of a binding protein such as an antibody, for example, antibody affinity or specificity for an antigen. The system can include one or more machine learning models that can extrapolate complex relationships between amino acid sequence and function. The system can be trained on high-quality training data generated through a two-step single-site and combinatorial deep mutational scanning approach. The trained models can then make predictions on novel variant sequences generated in silico. The present disclosure describes amino acid sequences generated by the systems and methods provided, and uses of the generated sequences to produce proteins for therapeutic and diagnostic use. | 2022-05-19 |
20220157404 | USING RELATIVES' INFORMATION TO DETERMINE GENETIC RISK FOR NON-MENDELIAN PHENOTYPES - Provided are methods for outputting a non-Mendelian risk score, comprising: receiving from a first dataset (i) genotype data for a subject and (ii) genotype data and phenotype data for one or more blood relatives of a subject having a gene of interest; receiving from a second dataset genotype population data and phenotype population data, wherein the population comprises two or more blood relatives; training a model on the first and second datasets to determine a genetic risk in the subject associated with one or more non-Mendelian gene of interest; and outputting a phenotypic risk score for the subject. Also provided are systems and non-transitory machine-readable media for outputting a polygenic risk score for a subject. | 2022-05-19 |
20220157405 | GENETIC COMPARISONS BETWEEN GRANDPARENTS AND GRANDCHILDREN - Displaying a comparison of genotypic information between relatives is disclosed, including receiving an indication that a first individual is a grandparent, receiving an indication that a second individual is a grandchild of the first individual, comparing the genotypic information of the first individual and the second individual and calculating a similarity score, and displaying an indication of the similarity score graphically using colors. | 2022-05-19 |
20220157406 | METHODS AND APPARATUS FOR ENHANCED OIL RECOVERY - Embodiments of the present disclosure generally relate to methods and apparatus for enhanced oil recovery. In an embodiment, a method of enhanced oil recovery from a reservoir is provided. The method includes determining a three-dimensional molecular association between simulated oil and a simulated surface using molecular dynamics, and selecting a reservoir additive from a plurality of additives. The method further includes introducing the reservoir additive to the reservoir, and recovering oil from the reservoir using the reservoir additive. Methods of testing a candidate chemical or candidate formulation for use in enhanced oil recovery, and methods of determining an effect of a candidate chemical or formulation of candidate chemicals for use in enhanced oil recovery are also described. Oil extraction apparatus are also provided. | 2022-05-19 |
20220157407 | INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, RECORDING MEDIUM RECORDING INFORMATION PROCESSING PROGRAM, AND INFORMATION PROCESSING SYSTEM - In response to request signals transmitted from a terminal, a server generates prediction information relating to pharmacokinetics of a peptide. The server then transmits the prediction information to the terminal. | 2022-05-19 |
20220157408 | POLLUTION TYPE SENSING - Systems and methods classify pollutants based on multifactor analysis of data from sensors in a monitored area and contextual data from remote or local sources. Classifying a pollutant in air at a monitored area may include operating a particulate matter sensor to produce raw data representing measurements of particulate matter in the air, evaluating pulses in the raw data to determine a pulse width and a maximum for each pulse, and identifying a type for the pollutant in the air using a classification model and data including the pulse widths and the maxima of the pulses. The data use in classification may further include non-particulate measurements from local chemical or environmental sensors and contextual data from the cloud or from local user devices. | 2022-05-19 |
20220157409 | MACHINE-LEARNED PHARMACOLOGY OPTIMIZATION - Aspects of the present disclosure include methods for optimizing pharmacological compound development and methods for optimizing one or more modifications of a compound. Aspects of the present disclosure further include methods for designing treatments for a disease, and methods for designing optimized candidate compounds to treat a disease that causes one or more disease effects. Aspects of the present disclosure further include computer-implemented methods for training a model for pharmacological compound design, and computer-implemented methods for optimizing chemical modification of pharmacological compounds. | 2022-05-19 |
20220157410 | MEDICAL INFORMATION PROCESSING METHOD AND MEDICAL INFORMATION ACQUISITION METHOD - A medical information processing method includes: displaying at least one navigation tab; and in response to a first operation of a user, determining a target navigation tab, and displaying management information of a disease of a patient matched with the target navigation tab, the target navigation tab being one of the at least one navigation tab. | 2022-05-19 |
20220157411 | INTOXICATION DEGREE DETERMINATION SYSTEM, INTOXICATION DEGREE DETERMINATION METHOD, AND INTOXICATION DEGREE DETERMINATION PROGRAM - The present disclosure includes a question creating section | 2022-05-19 |
20220157412 | CLINICAL TRIAL MATCHING APPARATUS - A clinical trial matching apparatus according to an embodiment includes processing circuitry. The processing circuitry receives patient information. The processing circuitry retrieves a clinical trial matching the patient from clinical trials based on the patient information, by referring to storage circuitry that stores data for associating a clinical trial in which medication conditions are set with the results of the clinical trial, for the clinical trials. The processing circuitry presents the retrieved clinical trial. The processing circuitry collects, and stores in the storage circuitry, the results obtained by conducting the retrieved clinical trial on the patient and patient's clinical information. The processing circuitry updates the conditions of the retrieved clinical trial based on the clinical information, when there is clinical information that can identify a significant difference in drug efficacy in the collected clinical information. | 2022-05-19 |
20220157413 | Systems and Methods for Designing Augmented Randomized Trials - Systems and methods for designing random control trials in accordance with embodiments of the invention are illustrated. One embodiment includes a method for designing a target random control trial. The method includes steps for generating a set of prognostic scores for a set of samples, computing a first correlation between the set of prognostic scores and a set of outcomes for the set of samples, computing a first variance for the set of outcomes for the set of samples, estimating a second correlation and a second variance for a target random control trial, and determining a set of target trial parameters based on the first and second correlations and the first and second variances. | 2022-05-19 |
20220157414 | METHOD AND SYSTEM FOR FACILITATING OPTIMIZATION OF A CLUSTER COMPUTING NETWORK FOR SEQUENCING DATA ANALYSIS USING ADAPTIVE DATA PARALLELIZATION, AND NON-TRANSITORY STORAGE MEDIUM - A method for facilitating optimization of a cluster computing network for sequencing data analysis using adaptive data parallelization is provided. The method comprises the following steps. (a) A data parallelization configuration is determined, based on sequencing data and a pipeline selection, wherein the data parallelization configuration includes partition indication data indicating at least one biological information unit based on which of the sequencing data is to be partitioned. (b) At least one recommendation list is determined, based on the data parallelization configuration and a computing resource list for the cluster computing network, wherein the at least one recommendation list is for a computing device to produce at least one resource allocation selection from the at least one recommendation list so that the cluster computing network can perform the sequencing data analysis on the sequencing data, according to the at least one resource allocation selection and the data parallelization configuration. | 2022-05-19 |
20220157415 | SYSTEM AND METHOD FOR EXAMINING TEST SAMPLES ON A VIRTUAL PLATFORM - Disclosed is a system for authentication and examination of test samples ( | 2022-05-19 |
20220157416 | DISEASE PROGRESSION HAZARD RATIO BASED ON EHR DATABASE - In an approach for identifying disease progression hazard ratios for given disease against diseases from an EHR database to determine top comorbidities to the given disease, a processor receives raw EHR data. A processor identifies, from the raw EHR data, a set of diseases and associated diagnosis information for each disease of the set of diseases. A processor calculates a hazard ratio for each disease pair of a set of disease pairs producing a set of hazard ratios, wherein the set of disease pairs comprises a given disease paired with each disease of the set of diseases. A processor ranks the set of hazard ratios for the given disease. A processor selects a pre-defined number of top comorbidities of the set of hazard ratios for the given disease based on the ranking. A processor outputs the pre-defined number of top comorbidities for the given disease. | 2022-05-19 |
20220157417 | SYSTEM, METHOD AND USER INTERFACE FOR RECORDED INFORMATION - Disclosed herein are computer-implemented graphical user interfaces, systems, apparatuses and methods for accessing entity encounter information, such as electronic health record (EHR) information for a patient. Disclosed methods include displaying on a screen Patient Encounter Cards (PEC's) for a patient, where each PEC is card included useful at-a-glance information corresponding to the full entries in the EHR system related to a Patient Encounter (PE). Each PEC includes content extracted from its corresponding full entry. The novel GUI displays the PEC's on a vertical scrollable timeline in either forward or reverse-chronological order, thereby providing authorized viewers with easy and rapid access to relevant encounter information. | 2022-05-19 |
20220157418 | SYSTEMS AND METHODS FOR DOCUMENTING EMERGENCY CARE - A system for documenting emergency medical events related to treatment of a patient is provided. The system includes a medical device configured to obtain physiological information from the patient and generate a first plurality of log entries that mark events that occur during treatment of the patient. The system also includes a mobile device configured to receive input for generating a second plurality of log entries that mark events that occur during treatment, establish a communicative connection with the medical device to access the first plurality of time-stamped log entries, and present, during the treatment of the patient, a single consolidated event log that includes the first plurality of log entries and the second plurality of log entries. | 2022-05-19 |
20220157419 | LIQUID MEASUREMENT SYSTEMS, APPARATUS, AND METHODS OPTIMIZED WITH TEMPERATURE SENSING - An apparatus for measuring liquid volume in a container includes a plurality of light sources for emitting electromagnetic radiation (EMR) toward the container, a plurality of sensors optically coupleable to the plurality of light sources, each sensor of the plurality of sensors for detecting the EMR emitted by at least a portion of the plurality of light sources, a temperature sensor for measuring at least one temperature associated with a liquid in the container, and at least one processor for receiving data representative of the portion of the detected EMR from each of the plurality of sensors, comparing the at least one measured temperature to a temperature guideline to identify any temperature events associated with the received data; normalizing the received data based on any temperature events associated with the received data; and converting the normalized data into a signature representative of the EMR detected by the plurality of sensors. | 2022-05-19 |
20220157420 | Integrated Report - Systems, methods, and storage media useful in a healthcare computing platform to build and publish an integrated medical consultation report to a patient's primary electronic medical record are provided. The integrated medical consultation report presents up-to-date objective medical factors from the patient's medical record concurrently with a subjective medical summary from an authoring clinician. The integrated medical consultation report is stored as a unique medical document in the patient's primary electronic record. | 2022-05-19 |
20220157421 | SYSTEM AND METHOD FOR FORMING AUDITABLE ELECTRONIC HEALTH RECORD - A method for populating an electronic health record, and a system configured to perform this method, comprises a step of analyzing captured raw data to classify the same according to type of health information to which it pertains; and a step of converting the raw data to a format based on input type of a data field which is associated with the classified type of health information. The method features steps of determining and displaying confidence values representative of predicted accuracies of the converted data relative to the raw data and of selection of the data field receiving the converted data; and requesting user-verification that the converted data is representative of the raw data. | 2022-05-19 |
20220157422 | PATIENT SAMPLE TRACKING SYSTEMS AND METHODS - A system for collection and tracking of a sample for testing is provided, which includes a kit having a housing configured for storing a sample therein and a label for adhering to the housing upon contact. The label further includes images orientated both horizontally and vertically, each displaying the same readable context able to be scanned. The images are positioned such that the position of the label on the housing and the orientation of the reader scanning the images minimally affects the ability to read the images. | 2022-05-19 |
20220157423 | INTRAOPERATIVE CLINICAL DECISION SUPPORT SYSTEM - Systems and methods are provided for intraoperative real-time clinical decision support. A system includes a processor, a non-transitory computer readable medium, storing executable instructions, and an output device. An interface is configured to receive a first set of patient data in real-time from at least one sensor monitoring vital signals of a patient during a surgical procedure and a second set of patient data in real-time from an anesthesia machine during the surgical procedure. An input interface receives an indicator representing at least an identity of a therapeutic to be administered to the patient. A machine learning model determines from the indicator, the first set of patient data, and the second set of patient data if an alert should be provided to a user. The output device provides the alert to the user if the machine learning model determines that the alert should be provided. | 2022-05-19 |
20220157424 | SYSTEM AND METHOD FOR EXAMINING TEST SAMPLES ON A VIRTUAL PLATFORM - Disclosed is a system for authentication of medical certificates using a distributed ledger ( | 2022-05-19 |
20220157425 | FEEDBACK SYSTEM AND METHOD - A computer-implemented method, computer program product and computing system for receiving a result set for content processed by an automated analysis process; receiving human feedback concerning the result set; and providing feedback information to the developer of the automated analysis process based, at least in part, upon the result set and the human feedback. | 2022-05-19 |
20220157426 | MEDICATION SUPPORT APPARATUS - A medication support apparatus includes a storage unit, an extracting unit, a transfer unit, and a medicine distributing unit. The storage unit is configured to store, in a stacked manner, one-dose packages in each of which medicines are packed. The extracting unit is configured to extract a specific one-dose package from the storage unit. The transfer unit is configured to transfer the one-dose package extracted by the extracting unit. One-dose package transferred by the transfer unit is configured to be arranged on the medicine distributing unit. The extracting unit is configured to be located under the storage unit when the one-dose package is extracted from the storage unit. | 2022-05-19 |
20220157427 | REMOTE PHYSICAL THERAPY AND ASSESSMENT OF PATIENTS - Systems and methods for physical therapy and training delivery are presented herein. These technologies may comprise notifying a patient of a scheduled prescribed activity via an on-location at least one client device or console; identifying the patient with one or more sensors connected to or part of the at least one client device or console; confirming, via the at least one client device or console, the patient's acknowledgment of the notification; demonstrating, via a graphical interactive avatar displayed on the at least one client device or console, the prescribed activity to be carried out by the patient; confirming, via the at least one client device or console, that the patient is undertaking or will be undertaking the prescribed activity; capturing, via the one or more sensors, frames of the patient undertaking the prescribed activity; and processing frames of the patient undertaking the prescribed activity. | 2022-05-19 |
20220157428 | FITNESS ACTIVITY RELATED MESSAGING - In one embodiment, a method for generating a message to a friend of a user is provided, comprising: processing activity data of a first user measured by an activity monitoring device to update a value of an activity metric for the first user; identifying a change in an inequality relationship between the value of the activity metric for the first user and a value of the activity metric for a second user; in response to identifying the change in the inequality relationship, prompting the first user to generate a message to the second user. | 2022-05-19 |
20220157429 | DEVICE FOR STIMULATING TRACHEOBRONCHIAL AIR - Disclosed is a device for stimulating the tracheobronchial air of a patient suffering from an obstructive ventilatory disorder and able to modify the rheology of his tracheobronchial mucus, which includes a negative pressure generator, a physiological interface able to interface the device with the patient's respiratory apparatus, a connection pipe connecting the physiological interface to the negative pressure generator, and a control circuit capable of controlling the negative pressure generator, during the passive expiration phase, for the application of a succession of alternation of negative pressure and venting impulses with a determined frequency and a duty cycle determined during a first part of an expiration cycle and then a second frequency and a second duty cycle during a second part of the expiration cycle and to reiterate a defined number of expiration cycles. | 2022-05-19 |
20220157430 | Nutrition Intake Calculator - The Nutrition Intake Calculator App., is invented to scan, calculate and document the information in Food, the Nutrition and Supplement Facts Panel, into a readable format; and then show the daily intake of Nutrients, Vitamins and Minerals, and then compare and contrast them against those needed for recommended daily nutritional needs; and report on whether they are gained, or not. | 2022-05-19 |
20220157431 | MIRROR-NEURONS STIMULATION - An innovative multi-dimensional, non-invasive, integrative digital habilitation and rehabilitation treatment programs in identifying and treating cognitive, memory, speech, language, and communication disorders associated with various neurological etiologies. The programs focus and utilize systematic and progressive activation of the Mirror Neurons System in coordination with the level of complexity. The structure of exercises consists of coordinating the production of observed activities delivered by synchronous, audio/visual interactive digital exercises conveyed by special computerized systems. The delivery of program is provided both in clinical setting and by telemedicine module. Upon completion of the treatment phase, the person with the neurological condition is placed on self-supervised exercises critical in the maintenance and retention of clinical gains. | 2022-05-19 |
20220157432 | LACTATION-PERIOD RECIPE RECOMMENDATION METHOD, DEVICE, SYSTEM, APPARATUS AND MEDIUM - The present application discloses a lactation-period recipe recommendation method, device, system, apparatus and medium. The method includes: receiving a breast milk test result of a breast milk provider; obtaining a daily required energy index of the breast milk provider based on physiological characteristic parameters of the breast milk provider; and then, obtaining a recommended recipe for the breast milk provider based on the breast milk test result and the daily required energy index. | 2022-05-19 |
20220157433 | PREDICTIVE MODELING FOR MENTAL HEALTH MANAGEMENT - Systems and methods in this document describe a mental health management system. The mental health management system accesses patient data associated with a patient from a database, determines that the patient is associated with a trigger event, generates a prediction, using a predictive modeling system trained to analyze the patient data, the prediction corresponding to a probability that the patient's current medication data will be modified, stores the prediction in association with the patient data, and transmits the prediction to a computing device. | 2022-05-19 |
20220157434 | EAR-WEARABLE DEVICE SYSTEMS AND METHODS FOR MONITORING EMOTIONAL STATE - Embodiments herein relate to ear-wearable device systems and methods for monitoring a device wearer's emotional state and status. In an embodiment, an ear-wearable device is included having a control circuit, a microphone, and a power supply circuit. The ear-wearable device is configured to monitor signals from the microphone, identify signs of anxiety in the microphone signals, and provide a wearer of the ear-wearable device with feedback related to identified anxiety. In another embodiment, a method of monitoring anxiety with an ear-wearable device is included, the method including monitoring signals from a microphone, identifying signs of anxiety in the microphone signals, and providing a wearer of the ear-wearable device with feedback related to the identified anxiety. Other embodiments are also included herein. | 2022-05-19 |
20220157435 | MENTAL HEALTH PREDICTIVE MODEL MANAGEMENT SYSTEM - Systems and methods herein describe a mental health management system. The mental health management system accesses patient data associated with a patient from a database, determines that the patient is associated with a trigger event, identifies a category associated with the trigger event, generates a notification based on the trigger event and the identified category, validates the notification based on a notification history and transmits the notification to a computing device. | 2022-05-19 |
20220157436 | METHOD AND SYSTEM FOR DISTRIBUTED MANAGEMENT OF TRANSDIAGNOSTIC BEHAVIOR THERAPY - A multimodal data acquisition and communication system and method for distributed management of transdiagnostic behavioral therapy (TBT). An exemplary system, method, and apparatus according to certain aspects of the present disclosure may include a patient interface comprising (a) one or more sensors configured to collect quantitative (e.g., physiological data) and qualitative data (e.g., video/audio data) from a patient user during a TBT session, and (b) a mobile computing device, such as a smartphone, comprising a mobile software application configured to establish a data transfer interface with the one or more sensors and provide a graphical user interface to the patient user. The mobile computing device may be communicatively engaged with a cloud-based server over a wireless communications network to enable real-time collection, communication, storage and analysis of TBT data and bi-directional audio/video communication with at least one clinician client device. | 2022-05-19 |
20220157437 | ENHANCED LIQUID CONTAINER FOR LIQUID AUTHENTICATION - An approach for providing a cap with an embedded high-resolution lens and a sampling insert that is used during an authentication of a composition of a liquid in a container sealed by the cap. The cap has a top portion of a cap with an opening, a sampling insert inside the opening in the top portion of the cap, and a high-resolution lens inside an opening in the sampling insert. | 2022-05-19 |
20220157438 | UNDERPAYMENT IDENTIFICATION TOOL AND REVENUE RECOVERY PROCESS - A computer-implemented underpayment assessment tool, and accompanying process, for comprehensive, full-spectrum examination and analysis of healthcare provider revenue cycle billing data to identify claim payment variances, identify variances as recoverable or non-recoverable, and capture recoverable underpayments. | 2022-05-19 |
20220157439 | Interaction Method, Electronic Device, and Storage Medium - The embodiments of the present disclosure disclose an interaction method, an electronic device and a storage medium. In one implementation, the method is applied to an electronic device with an interaction device and comprises: receiving a shift-handover record, and displaying a first interface, wherein the first interface displays shift-handover information corresponding to the shift-handover record, and a shift-takeover confirm control, and the shift-handover record is a shift-handover record by medical staff; receiving shift-takeover permission application information and verifying a shift-takeover permission; and confirming that a shift exchange is completed in response to an operation on the shift-takeover confirm control. | 2022-05-19 |
20220157440 | System and Method for Credentialing and Scheduling On-Call Provider Services for Hazard Events - The invention provides a system and method of organizing medical personnel and other providers during a hazard event. A system links information about medical personnel and providers with national, state, and local medical facilities and entities. A method provides medical personnel and providers a means of enlisting in various hazard response efforts and affords administrators of medical facilities the ability to authorize and schedule the medical personnel and providers in an efficient manner. | 2022-05-19 |
20220157441 | REWARD HYGIENE SYSTEM - A monitoring system for hygiene equipment, the system comprising an interface configured to receive information indicating an instance of using a piece of hygiene equipment; a determination section configured to determine whether the instance is a compliant instance to use the piece of hygiene equipment; a storage section configured to store information on past compliance; a selector configured to select whether the compliant instance is to result in a reward action; and an adjusting section configured to adjust the selector based on the stored information on the past compliance. | 2022-05-19 |