20th week of 2014 patent applcation highlights part 31 |
Patent application number | Title | Published |
20140133227 | NON-VOLATILE MEMORY DEVICE AND METHOD OF OPERATING - A method of operating a non-volatile memory includes; during power-on, reading control information from an information block and lock information from an additional information block, then upon determining that a secure block should be locked, generating a lock enable signal that inhibits access to data stored in the secure block, and a read-only enable signal that prevents change in the data stored in the additional information block. | 2014-05-15 |
20140133228 | Key-Value Addressed Storage Drive Using NAND Flash Based Content Addressable Memory - A NAND Flash based content addressable memory (CAM) is used for a key-value addressed storage drive. The device can use a standard transport protocol such as PCI-E, SAS, SATA, eMMC, SCSI, and so on. A host writes a key-value pair to the drive, where the drive writes the keys along bit lines of a CAM NAND portion of the drive and stores the value in the drive. The drive then maintains a table linking the keys to location of the value. In a read process, the host provides a key to drive, which then broadcasts down the word lines of blocks storing the keys. Based on any matching bit lines, the tables can then be used to retrieve and supply the corresponding data to the host. | 2014-05-15 |
20140133229 | BIT LINE RESISTANCE COMPENSATION - Methods for compensating for variations in bit line resistance during sensing of memory cells are described. The variations in bit line resistance may occur die-to-die or plane-to-plane on the same die. In some embodiments, for each die or memory plane on a die, a plurality of bit line read voltages associated with a plurality of zones may be determined based on sensing criteria. The sensing criteria may comprise a number of fail bits. Each zone of the plurality of zones may be associated with a memory array region within a die or memory plane. Prior to performing a read or verify operation on a group of memory cells, a bit line read voltage used during sensing of the group of memory cells may be determined based on the plurality of bit line read voltages and a zone associated with the group of memory cells. | 2014-05-15 |
20140133230 | BIT LINE RESISTANCE COMPENSATION - Methods for compensating for variations in bit line resistance during sensing of memory cells are described. The variations in bit line resistance may occur die-to-die or plane-to-plane on the same die. In some embodiments, for each die or memory plane on a die, a plurality of bit line read voltages associated with a plurality of zones may be determined based on sensing criteria such as a number of fail bits. Each zone of the plurality of zones may be associated with a memory array region within a memory plane. Within each zone, different bit line read voltages may be applied to different bit line groupings in order to compensate for systematic variations in bit line resistance between neighboring bit lines due to the use of multiple patterning lithography techniques such as spacer-based double patterning. | 2014-05-15 |
20140133231 | BIT LINE RESISTANCE COMPENSATION - Methods for compensating for variations in bit line resistance in non-volatile memories are described. In some embodiments, use of multiple patterning lithography for forming bit lines may lead to systematic variations in bit line resistance between groups of bit lines within a memory array. For example, in some cases, every fourth bit line of four neighboring (or adjacent) bit lines may be formed differently than the other three bit lines within a group of four neighboring bit lines. In one embodiment, bit line segment swapping may be used between blocks within a memory array in order to mitigate variations in bit line resistance. In another embodiment, each group of adjacent bit line segments may be offset (or staggered) per block such that the local routing necessary to connect bit line segments into bit lines may be simplified. | 2014-05-15 |
20140133232 | Compensation for Sub-Block Erase - A non-volatile memory system that has two or more sub-blocks in a block performs a check before accessing memory cells to see if the condition of a sub-block that is not being accessed could affect the memory cells being accessed. If such a sub-block is found then parameters used to access the cells may be modified according to a predetermined scheme. | 2014-05-15 |
20140133233 | CAM NAND with OR Function and Full Chip Search Capability - Various techniques for extending the capabilities of CAM NAND type memories are discussed. Multi-block or even full chip search operations can be performed. In addition to the inherent AND property of NAND strings, the memory array has an inherent OR property between NAND string from different blocks along the same bit line that can be exploited through multi-block CAM-type operations. To reduce data-dependent word line to word line effects, in multiple data dependent sensing operations, the sensing can be broken up into sub-operations that avoid data dependent values on adjacent word lines. To improve data protection, subsequent to writing a memory block with indices, the word lines are read back and compared bit-by-bit with their intended values and the results are accumulated to determine whether any of indices include error. A bloom filter can also be used as an initial check during data search operations in order to provide increased data protection. | 2014-05-15 |
20140133234 | FLASH EEPROM SYSTEM WITH SIMULTANEOUS MULTIPLE DATA SECTOR PROGRAMMING AND STORAGE OF PHYSICAL BLOCK CHARACTERISTICS IN OTHER DESIGNATED BLOCKS - A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. A typical form of the memory system is as a card that is removably connectable with a host system but may alternatively be implemented in a memory embedded in a host system. The memory cells may be operated with multiple states in order to store more than one bit of data per cell. | 2014-05-15 |
20140133235 | NON-VOLATILE MEMORY DEVICE HAVING CONFIGURABLE PAGE SIZE - A flash memory device having at least one bank, where the each bank has an independently configurable page size. Each bank includes at least two memory planes having corresponding page buffers, where any number and combination of the memory planes are selectively accessed at the same time in response to configuration data and address data. The configuration data can be loaded into the memory device upon power up for a static page configuration of the bank, or the configuration data can be received with each command to allow for dynamic page configuration of the bank. By selectively adjusting a page size the memory bank, the block size is correspondingly adjusted. | 2014-05-15 |
20140133236 | HIERARCHICAL COMMON SOURCE LINE STRUCTURE IN NAND FLASH MEMORY - Each memory cell string in a generic NAND flash cell block connects to a Common Source Line (CLS). A value for applying to the CSL is centrally generated and distributed to a local switch logic unit corresponding to each NAND flash cell block. For source-line page programming, the distribution line may be called a Global Common Source Line (GCSL). In an array of NAND flash cell blocks, only one NAND flash cell block is selected at a time for programming. To reduce power consumption, only the selected NAND flash cell block receives a value on the CSL that is indicative of the value on the GCSL. Additionally, the CSLs of non-selected NAND flash cell blocks may be disabled through an active connection to ground. | 2014-05-15 |
20140133237 | On-Device Data Analytics Using NAND Flash Based Intelligent Memory - A NAND Flash based content addressable memory (CAM) is used for a key-value addressed storage drive. The device can use a standard transport protocol such as PCI-E, SAS, SATA, eMMC, SCSI, and so on. A host writes a key-value pair to the drive, where the drive writes the keys along bit lines of a CAM NAND portion of the drive and stores the value in the drive. The drive then maintains a table linking the keys to location of the value. In a read process, the host provides a key to drive, which then broadcasts down the word lines of blocks storing the keys. Based on any matching bit lines, the tables can then be used to retrieve and supply the corresponding data to the host. The system can be applied to perform a wide range of analytics on data sets loaded into the NAND array. | 2014-05-15 |
20140133238 | METHOD AND SYSTEM FOR PROGRAMMING NON-VOLATILE MEMORY WITH JUNCTIONLESS CELLS - A non-volatile memory system that has junctionless transistors is provided that uses suppression of the formation of an inversion-layer source and drain in the junctionless transistors to cause a discontinuous channel in at least one string. The system may include NAND flash memory cells composed of junctionless transistors, and has a set of wordlines. During program operation, a selected wordline of the set of wordlines is biased at a program voltage, and wordline voltage low enough to suppress the formation of source/drains is applied on at least one word line on a source side of the selected wordline such that a channel isolation occurs thereby causing the discontinuous channel in the at least string. | 2014-05-15 |
20140133239 | MEMORY DEVICES HAVING SELECT GATES WITH P TYPE BODIES, MEMORY STRINGS HAVING SEPARATE SOURCE LINES AND METHODS - Memory devices and methods of operating memory devices are shown. Configurations described include a memory cell string having an elongated n type body region and having select gates with p type bodies. Configurations and methods shown can provide a reliable bias to a body region for memory operations such as erasing. | 2014-05-15 |
20140133240 | SOLID STATE STORAGE DEVICE WITH SLEEP CONTROL CIRCUIT - A solid state storage device receives a device sleep signal and a power signal from a host. The solid state storage device includes a control chip, a sleep control circuit, and a regulator. If the device sleep signal is activated, the control chip temporarily stores a system parameter into a flash memory module and then generates an acknowledge signal. The sleep control circuit receives the power signal, the device sleep signal and the acknowledge signal. If both of the device sleep signal and the acknowledge signal are activated, the sleep control circuit generates a disable state and a wake-up state. Moreover, if the power signal is received by the regulator and the sleep control circuit generates the disable state, the regulator stops providing a supply voltage to the control chip, so that the solid state storage device enters a sleep mode. | 2014-05-15 |
20140133241 | Memory Controllers and User Systems Including the Same - A user system is provided including a plurality of flash memory devices and a memory controller connected to the flash memory devices through a plurality of channels. The memory controller includes a voltage regulator configured to supply a power of the flash memory devices and a compensation unit configured to supply an additional power to the flash memory devices when a power required by the flash memory devices exceeds a predetermined level. The compensation unit includes a resistor unit connected to an output terminal of the voltage regulator and input terminals of the flash memory devices and a charging unit connected to input terminals of the flash memory devices. The charging unit is configured to supply an additional power to the flash memory devices according to voltages of input terminals of the flash memory devices. | 2014-05-15 |
20140133242 | MEMORY WITH OUTPUT CONTROL - An apparatus, system, and method for controlling data transfer to an output port of a serial data link interface in a semiconductor memory is disclosed. In one example, a flash memory device may have multiple serial data links, multiple memory banks and control input ports that enable the memory device to transfer the serial data to a serial data output port of the memory device. In another example, a flash memory device may have a single serial data link, a single memory bank, a serial data input port, a control input port for receiving output enable signals. The flash memory devices may be cascaded in a daisy-chain configuration using echo signal lines to serially communicate between memory devices. | 2014-05-15 |
20140133243 | CLOCK MODE DETERMINATION IN A MEMORY SYSTEM - A clock mode configuration circuit for a memory device is described. A memory system includes any number of memory devices serially connected to each other, where each memory device receives a clock signal. The clock signal can be provided either in parallel to all the memory devices or serially from memory device to memory device through a common clock input. The clock mode configuration circuit in each memory device is set to a parallel mode for receiving the parallel clock signal, and to a serial mode for receiving a source synchronous clock signal from a prior memory device. Depending on the set operating mode, the data input circuits will be configured for the corresponding data signal format, and the corresponding clock input circuits will be either enabled or disabled. The parallel mode and the serial mode is set by sensing a voltage level of a reference voltage provided to each memory device. | 2014-05-15 |
20140133244 | Twin MONOS Array for High Speed Application - A stitch area configuration for word gates and control gates of a twin MONOS metal bit array comprises control gates on sidewalls of the word gates wherein the word gates and control gates run in parallel. Control gate poly contacts contact each of the control gates aligned in a row at the stitch area perpendicular to the control gates. Two word gate poly contacts at the stitch area contact alternating word gates. Also provided are bit lines, word line and control gate decoders and drivers, a bit line decoder, a bit line control circuit, and a chip controller to control the memory array. The invention also provides twin MONOS metal bit array operations comprising several control gates driven by one control gate driver circuit and one word gate driven by one word gate driver circuit, as well as erase inhibit and block erase. | 2014-05-15 |
20140133245 | Twin MONOS Array for High Speed Application - A stitch area configuration for word gates and control gates of a twin MONOS metal bit array comprises control gates on sidewalls of the word gates wherein the word gates and control gates run in parallel. Control gate poly contacts contact each of the control gates aligned in a row at the stitch area perpendicular to the control gates. Two word gate poly contacts at the stitch area contact alternating word gates. Also provided are bit lines, word line and control gate decoders and drivers, a bit line decoder, a bit line control circuit, and a chip controller to control the memory array. The invention also provides twin MONOS metal bit array operations comprising several control gates driven by one control gate driver circuit and one word gate driven by one word gate driver circuit, as well as erase inhibit and block erase. | 2014-05-15 |
20140133246 | CONFIGURABLE EMBEDDED MEMORY SYSTEM - An embodiment of a memory module is disclosed. This memory module is a configurable hard macro. A portion of this memory module includes a data input multiplexer coupled to select between cascaded data and direct/bused data. Such portion further includes, a memory coupled to receive output from the data input multiplexer for storage therein, and a register input multiplexer coupled to select between read data from the memory and the cascaded data. This memory module further includes: a register coupled to receive output from the register input multiplexer, a latch/register mode multiplexer coupled to select between the read data from the memory and registered data from the register, and a data output multiplexer coupled to select between the cascaded data and output from the latch/register mode multiplexer to provide output data. | 2014-05-15 |
20140133247 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR TESTING THE SAME - A semiconductor memory device includes a compression unit configured to compress a plurality of data, which are read from a memory cell region based on successive read commands and addresses, and to successively output the compressed data during a first test mode, a latching unit configured to latch the compressed data in response to a read strobe signal and to fix the latched value when a fail is detected from the compressed data during the first test mode, and an output unit configured to output the latched value to the outside during a second test mode. | 2014-05-15 |
20140133248 | APPARATUS AND METHOD TO ADJUST CLOCK DUTY CYCLE OF MEMORY - An embodiment of the invention provides a memory controller for controlling a memory. The memory controller comprises a pulse width modulation module, a voltage comparator and a duty cycle calibration device. The pulse width modulation module is suitable for receiving a clock signal to generate a first voltage. The voltage comparator is suitable for receiving and comparing a reference voltage with the first voltage to output a comparison signal. The duty cycle calibration device is suitable for adjusting a duty cycle of the clock signal according to the comparison signal. | 2014-05-15 |
20140133249 | APPARATUSES, INTEGRATED CIRCUITS, AND METHODS FOR MEASURING LEAKAGE CURRENT - Methods, apparatuses, and integrated circuits for measuring leakage current are disclosed. In one such example method, a word line is charged to a first voltage, and a measurement node is charged to a second voltage, the second voltage being less than the first voltage. The measurement node is proportionally coupled to the word line. A voltage on the measurement node is compared with a reference voltage. A signal is generated, the signal being indicative of the comparison. Whether a leakage current of the word line is acceptable or not can be determined based on the signal. | 2014-05-15 |
20140133250 | CURRENT SENSE AMPLIFIER WITH REPLICA BIAS SCHEME - Some embodiments of the present disclosure relate to a sense amplifier architecture that facilitates fast and accurate read operations. The sense amplifier architecture includes a folded cascode amplifier for its first sense amplifier stage, and a pre-charge circuit to establish a pre-charge condition for a senseline and a reference senseline of the sense amplifier. The pre-charge circuit and the folded cascode amplifier each include one or more cascode transistors of the same size and which receive the same bias voltage on a gate thereof. This architecture provides fast and accurate read operations in a relatively small footprint, thereby providing a good blend of cost and performance. | 2014-05-15 |
20140133251 | SEMICONDUCTOR STORAGE APPARATUS - A semiconductor storage apparatus according to the present invention includes a plurality of memory cells, a plurality of word lines, a plurality of pairs of bit lines, a plurality of sense amplifiers, a pair of common data lines, a data-to-be-written output circuit configured to, in writing data, set voltages of the common data lines forming the pair, a column selection signal output unit configured to output a plurality of column selection signals, and a plurality of column selection gates, in which in writing the data, the column selection signal output unit selectively turns on one of the column selection gates by setting each of voltages of the column selection signals to one of a level of a higher-potential power supply voltage and a level of a lower-potential power supply voltage, before activating the sense amplifiers. | 2014-05-15 |
20140133252 | PARALLEL-SERIAL CONVERSION CIRCUIT, INTERFACE CIRCUIT, AND CONTROL DEVICE - A parallel-serial conversion circuit includes an adjustment circuit that receives a parallel input signal having a plurality of bits and generates and outputs a parallel output signal having a plurality of bits. A conversion circuit coupled to the adjustment circuit generates a plurality of clock signals having mutually different phases with respect to a reference clock signal on the basis of the reference clock signal and serially selects the plurality of bits of the parallel output signal in accordance with the generated plurality of clock signals to convert the parallel output signal to serial 1-bit output signals. The adjustment circuit adjusts output timing of each of the plurality of bits of the parallel output signal in time unit of half of one cycle of the reference clock signal. | 2014-05-15 |
20140133253 | System and Method for Memory Testing - An embodiment method of testing a memory includes writing a first logic state to a first cell in a first clock cycle and reading the first logic state in the first cell in a second clock cycle in a first phase, and reading the first logic state in the first cell and writing a second logic state to the first cell in the first clock cycle and reading the second logic state in the first cell in the second clock cycle in a second phase. As such, a concurrent read/write operation is performed at the same time and for the same memory bit (i.e., the first cell). | 2014-05-15 |
20140133254 | TEST METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR TEST APPARATUS - A test method of a semiconductor device and a semiconductor test apparatus. The test method includes providing a semiconductor device including a substrate having an active region and an isolation region, a volatile device cell including a gate insulation layer and a gate on the active region, a junction region in the active region, a capacitor connected to the junction region, and a passing gate on the isolation region, providing a first test voltage to the gate and a second test voltage greater than the first test voltage to the passing gate to deteriorate interfacial defects of the gate insulation layer, and measuring retention characteristics of the volatile device cell. | 2014-05-15 |
20140133255 | SEMICONDUCTOR DEVICE, REFRESH CONTROL METHOD THEREOF AND COMPUTER SYSTEM - A semiconductor device comprises a first memory cell array, a register storing information of whether or not one of the word lines in an active state exists in a unit area and storing address information, and a control circuit controlling a refresh operation for a refresh word line based on the information in the register when receiving a refresh request. When the one of the word lines in an active state does not exist, memory cells connected to the refresh word line are refreshed. When the one of the word lines in an active state exists, the one of the word lines in an active state is set into an inactive state temporarily and the memory cells connected to the refresh word line are refreshed after precharging bit lines of the memory cells. | 2014-05-15 |
20140133256 | VOLTAGE GENERATION CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS - A voltage generation circuit of a semiconductor memory apparatus includes a plurality of pumping units configured to provide voltages to an output node; a sensing unit configured to sense a voltage level of the output node and generate a pumping enable signal; an oscillator configured to generate an oscillator signal in response to the pumping enable signal; and a control unit configured to selectively output the oscillator signal to the plurality of pumping units in response to an active signal, a power-up signal and a mode register set signal. | 2014-05-15 |
20140133257 | BACK-UP POWER MANAGEMENT FOR EFFICIENT BATTERY USAGE - Battery backup devices and methods of performing a backup operation using the same are provided. A battery backup device can include a partial battery power controller configured to shut off power to components to be backed up one by one as data backup is completed on each device. The battery backup devices and methods provided can efficiently utilize battery power such that power consumption and charging time can be reduced. | 2014-05-15 |
20140133258 | SECONDARY MEMORY DEVICE AND ELECTRONIC SYSTEM EMPLOYING THE SAME - A secondary memory device includes a substrate configured to receive power from an external power source, at least one of non-volatile memory devices mounted on the substrate, a control device mounted on the substrate to control the non-volatile memory devices, and a secondary battery electrically connected to the substrate and configured to supply second power to the substrate when a power supply from the external power source is abnormally stopped. | 2014-05-15 |
20140133259 | MEMORY SYSTEM COMPONENTS THAT SUPPORT ERROR DETECTION AND CORRECTION - The disclosed embodiments relate to components of a memory system that support error detection and correction by means of storage and retrieval of error correcting codes. In specific embodiments, this memory system includes a memory device, which further contains a memory bank. During operation, the memory device receives a request to concurrently access a data word at a first row in a first storage region of the memory bank and error information associated with the data at a second row in a second storage region of the memory bank. Moreover, the memory request includes a first row address identifying the first row and a second row address identifying the second row. Next, the memory device routes the first row address and the second row address to a first row decoder and a second row decoder in the memory bank, respectively. Finally, the memory device uses the first row decoder to decode the first row address to access the first row and concurrently uses the second row decoder to decode the second row address to access the second row. | 2014-05-15 |
20140133260 | Reducing Signal Skew in Memory and Other Devices - Interconnections between signal lines help to reduce signal skew between signals carried on the signal lines. The interconnections may be resistive interconnections, and the signal lines may be clock lines. In a memory controller, for example, resistive traces may connect adjacent clock lines. The resistive traces reduce the clock signal skew between the adjacent clock lines, and throughout the memory controller as a whole. | 2014-05-15 |
20140133261 | MANUAL CEMENT MIXER WITH MULTIPLE MIXING TROUGHS - A manual cement mixer having a mixing box with an open top, generally planar front side and rear side panels, and arcuate, parabolically curved, right and left sides forming left and right arcuate troughs, and a medial trough disposed therebetween, the troughs defining a mixing volume; a base frame for supporting said mixing box; and pivoting means for mounting said mixing box on said base frame and for manually inducing oscillations in said mixing box. | 2014-05-15 |
20140133262 | LIQUID MIXING METHOD AND DEVICE - Provided is a method of mixing first and second liquids having mutual solubility inside a mixing flow channel formed by a micro flow channel. This method includes: causing the first and second liquids to be joined to each other inside the mixing flow channel; and forming a slug flow, in which mixing subject cells ( | 2014-05-15 |
20140133263 | BLENDER TOOL SYSTEMS - A blender tool for manipulating material in a blender container is disclosed. The blender tool has a substantially flat end for tamping down blended material in a blender container. The blender tool further includes a collar for limiting the insertion depth of the tool. Additionally, the blender tool may include a cavity for collecting and/or measuring material | 2014-05-15 |
20140133264 | LAB RACK ROTATOR AND METHODS THEREOF - A lab rack rotator includes a motor coupled to a shaft arranged to rotate in at least one direction in response to the motor. One or more mounts are located along the surface of the shaft and are configured to receive a lab sample rack which holds a plurality of lab samples contained in lab sample containers such as test tubes. Rotation of the shaft permits inversion of the plurality of lab samples, for instance whole blood samples. The lab rack rotator increases the number of lab samples that may be agitated in an automated process while decreasing the amount of time required for necessary pre-testing agitation of samples. | 2014-05-15 |
20140133265 | Contactless Magnetically Driven Agitation Systems - Provided are liquid agitating systems having magnetically actuated agitating members that do not come in contact with internal surfaces of liquid holding vessels. As such, some mechanically weak materials, such as polytetrafluoroethylene and perfluoroalkoxy polymer, may be used for internal surfaces of these vessels. An agitating member may be held by a supporting member that allows the agitating member to move within a vessel without touching its bottom. The supporting member effectively controls the distance between the agitating member and some supporting point. An external magnet provided under the vessel may be used for magnetic actuation. The agitating member includes an internal magnet that is magnetically coupled to the external magnet and that follows the path of the external magnet thereby moving the agitating member and agitating the liquid. In some embodiments, multiple external magnets may be used to position one or more agitating member. | 2014-05-15 |
20140133266 | TANK AGITATION SYSTEM WITH MOVEABLE SHAFT SUPPORT - An apparatus for containing and mixing a load of liquids and solids is disclosed. The apparatus includes an elongated tank, which includes a lower portion and an upper portion. The apparatus further includes an elongated rotatable shaft within the tank. At least one blade is connected to the shaft and is configured to mix the liquids and solids when the shaft is rotated. The apparatus also includes a shaft support configured for maintaining the shaft in a rotatable manner within the tank. The shaft support is selectively moveable in a manner permitting the shaft to move in an upward direction from the lower portion toward the upper portion, and in a downward direction from the upper portion toward the lower portion. An is contained with the tank for moving the shaft support in the upward direction and in the downward direction. | 2014-05-15 |
20140133267 | APPARATUS, SYSTEM AND METHOD FOR MIXING FLUIDS - A portable, self-retaining apparatus, system and method for mixing fluids in a container is disclosed. The self-retaining, portable fluid mixing apparatus is capable of being connected to a container and retained thereon without the aid of a user during use. The self-retaining fluid mixing device, system and method of the disclosure may be used in various capacities to mix a wide variety of fluids having a wide variety of viscosities. Thus, the disclosure is not limited to any particular type of fluid or viscosity, but an example of the fluids that may be mixed include flavoring syrups and thickeners used for shaved ice confectioneries. The mixer or apparatus can be quickly attached to and detached from a container without the use of extraneous, cumbersome fasteners. The torque caused by operation of the motor causes the apparatus and system to lock in place during use, such that when the torque is released, the apparatus may be quickly and easily removed from the container. | 2014-05-15 |
20140133268 | STATIC MIXER FOR THE TREATMENT OF EXHAUST GASES AND MANUFACTURING METHOD THEREOF - Static mixer for the treatment of exhaust gases, including an annular support portion and a plurality of substantially coplanar radial vanes that are arranged radially with their rear portions or bases associated with the support portion and the front portions or radial tips converging towards the centre of the mixer, wherein the body of the vanes includes at least three lines of bending, which define respective portions arranged on non parallel planes and defining corresponding impact surfaces for the exhaust gases. | 2014-05-15 |
20140133269 | Ultrasound Imaging Probe - An elongate probe ( | 2014-05-15 |
20140133270 | Ultrasound Transmission Circuit and Time Delay Calibration Method Thereof - An ultrasound transmission circuit comprises a pulse generating circuit, a feedback circuit and a processing circuit. The feedback circuit outputs a trigger signal according to a first pulse signal arriving at an ultrasound transducer. The processing circuit records a first time point at which the first pulse signal is generated, and records a second time point at which the first pulse signal arrives the ultrasound transducer according to the trigger signal. The processing circuit adjusts a first delay value according to a variance between the first time point and the second time point to generate a second delay value, and drives the pulse generating circuit according to the second delay value to generate a second pulse signal. | 2014-05-15 |
20140133271 | PROCESS FOR SEPARATING DATA RECORDED DURING A CONTINUOUS DATA ACQUISITION SEISMIC SURVEY - Method for separating signals recorded by a seismic receiver and generated with at least two vibratory seismic sources driven with no listening time. The method includes receiving seismic data that includes data d recorded by the seismic receiver and data related to the first and second vibratory seismic sources; computing a source separation matrix based on the data related to the first and second vibratory seismic sources; calculating first and second earth impulse responses HA and HB corresponding to the two vibratory seismic sources, respectively, based on the data d recorded by the seismic receiver, the data related to the two vibratory seismic sources and the source separation matrix; and separating the signals recorded by the seismic receiver based on the first and second earth impulse responses HA and HB such that signals the two vibratory seismic sources are disentangled. | 2014-05-15 |
20140133272 | DEVICE AND METHOD FOR CONTINUOUS DATA ACQUISITION - Method for generating an excitation signal for a first vibratory seismic source so that the first vibratory seismic source is driven with no listening time. The method includes a step of determining a first target spectrum for the first vibratory seismic source; a step of setting a first group of constraints for the first vibratory seismic source; and a step of generating a first excitation signal for the first vibratory seismic source based on the first group of constraints and the first target spectrum. The first seismic traces recorded with plural receivers can be identified when the first vibratory seismic source is driven with no listening time, based on the first excitation signal. | 2014-05-15 |
20140133273 | FRACTURE CHARACTERIZATION FROM REFRACTION TRAVEL TIME DATA - Refracted energy travel time can help to derive anisotropic parameters in a target layer. These anisotropic parameters allow us to both explore for new reservoirs and to understand stress and fracturing in existing reservoirs. This information can be used to i) detect oil reservoirs, ii) spot naturally fractured, hence high production zones, iii) detect dominant natural stress directions, iv) better place horizontal wells to optimize production, v) monitoring man made fractures or induced directional stress changes. The method is demonstrated using synthetic and real data. | 2014-05-15 |
20140133274 | SEISMIC SENSOR DEVICES - A sensor device is adapted to be installed at a land-air interface. The sensor device comprises a fluid-filled housing and a sensor arrangement supported within the housing and coupled directly to the fluid so as to detect movement thereof. A seismic sensor installation comprises a sensor device installed at a land-air boundary, wherein the sensor device comprises a fluid-filled housing and a sensor arrangement supported within the housing and coupled directly to the fluid as to detect movement thereof. | 2014-05-15 |
20140133275 | Process for Creating Image Gathers - The process of obtaining seismic data includes deploying a seismic energy source and seismic receivers, actuating the source, and detecting seismic energy resulting therefrom at the receivers. The process further includes digitally sampling seismic energy detected at the receivers indexed with respect to time to form a plurality of traces and sorting the traces to form a plurality of shot gathers. In addition, the process includes applying a depth migration technique to the shot gathers to generate two images according to the cross-correlation imaging condition (I | 2014-05-15 |
20140133276 | Telemetry System, a Pipe and a Method of Transmitting Information - The invention relates to a telemetry system for use in a pipe having a wall, comprising a transmitter adapted to generate at least one acoustic wave in a frequency range of about 50-300 kHz and to inject the acoustic wave in the wall of the pipe, wherein the transmitter is further arranged to binary code information conceived to be transmitted with the acoustic wave. The invention further related to a pipe comprising the telemetry system and to a method of transmitting information via a pipe. | 2014-05-15 |
20140133277 | COMPOSITE ASSEMBLY FOR A MOTOR VEHICLE - A composite assembly for a motor vehicle having at least one electroacoustic transducer for outputting sound waves and at least one wall element of the motor vehicle, behind which the transducer is mounted in a concealed manner, wherein an intermediate element for influencing the sound emission behavior is arranged between the transducer and the wall element, the intermediate element having a contact surface facing the wall element for passing on the sound waves. At least one recess is formed within the contact surface, in which recess no contact is made between the intermediate element and the wall element. In this way, it is possible to influence the emission characteristics of the electroacoustic transducer in a very flexible and need-oriented manner. | 2014-05-15 |
20140133278 | Mounting System for a Fish Finding Device - There is provided a mounting system for a fish finding device to a watercraft which has a support for supporting a fish finding device on a watercraft. The support has a top, a bottom and a peripheral side wall which form a receptacle housing for a battery. Mounting means are positioned at the top of the support to receive a fish finder. Securing means are provided on the bottom of the support for mounting the support to a surface on a watercraft. Mounting means are provided for detachably securing a transducer to a watercraft. | 2014-05-15 |
20140133279 | Energy Harvesting - As may be implemented in accordance with one or more embodiments, an apparatus and/or method involves a plurality of transducer elements that convert energy waves conveyed via a multi-directional radiation pattern into electrical charge. A power-accumulation circuit accumulates electrical charges from each of the plurality of transducer elements, with each of the transducer elements being arranged at different respective off-axis angles relative to an axis at which the energy is being conveyed. The power-accumulation circuit accumulates energy from each of the individual energy-transduction areas, such that energy received at different respective off-axis angles contributes to the accumulation of electrical charge. | 2014-05-15 |
20140133280 | Fiber Optic Hydrophone Sensors And Uses Thereof - Disclosed is detecting changes in pressure in a medium, with an optical fiber having a core diameter at an immersion surface contact of the fiber of less than 10 μm; a layer of material deposited on said end of the fiber, the material being of a thickness of from about 2 nm to about 10 nm. Also disclosed is detecting pressure waves in a medium comprising: contacting the medium with a fiber optic, the fiber integrated with a light source and a detector, the fiber optic having a diameter of less than 10 μm at an immersion surface contact of the fiber; providing a thin layer of material on the immersion surface contact, wherein said thin layer of material is of a thickness in a range of from about 2 nm to about 10 nm; and detecting Fresnel back reflections from the immersion end of the fiber. | 2014-05-15 |
20140133281 | TIMEPIECE ANTI-TRIP MECHANISM - Anti-trip mechanism for limiting the travel of a timepiece balance including a pin projecting from a staff, including a flexible multistable or bistable element carrying an anti-trip stop member and which is fixed, via flexible and elastic connecting members, to a rigid structural element of a timepiece movement. One end of said anti-trip stop member is arranged, according to the angular position of the balance, to interfere with the trajectory of the pin, and to perform the function of a stop if the balance exceeds its normal angular travel. | 2014-05-15 |
20140133282 | METHOD OF MANUFACTURING AN OLED DISPLAY DEVICE, THE RESULTING OLED DISPLAY DEVICE AND A TIMEPIECE COMPRISING THE SAME - Organic light emitting diode display device including a substrate covered by a cover which has a plane surface delimited along the external perimeter thereof. The plane surface of the cover is provided with a protuberance. The substrate is provided with a stack of layers, the stack of layers including at least the following layers in succession in the following order starting from the substrate: at least one anode; an insulating layer; a spacer layer which has a first exclusion area in a first area; an active hole injection layer, an active hole transport layer and an active electron transport layer; a cathode layer which has a second exclusion area. The protuberance of the cover is joined to the layer with which the protuberance is in contact, a hole, whose diameter is smaller than the geometrical dimensions of the protuberance, being made in the protuberance and through the substrate. | 2014-05-15 |
20140133283 | Plasmon Resonator with Dual Waveguide Excitation for TAMR - A TAMR (Thermal Assisted Magnetic Recording) write head uses the near field energy of optical-laser excited plasmon eigenmodes in a plasmon resonator to locally heat a magnetic recording medium and reduce its coercivity and magnetic anisotropy. The plasmon resonator is formed as a conducting disk-shaped structure with an extending peg that serves to further confine the near fields within a small region of the recording medium. The resonator eigenmodes are excited, through direct or evanescent coupling, by an interference pattern formed by the overlap of optical waves within a dual-channel waveguide, the interference pattern being the result of the waves in one branch being phase-shifted relative to the waves in the other branch. | 2014-05-15 |
20140133284 | MAGNETO-OPTICAL DETECTION OF A FIELD PRODUCED BY A SUB-RESOLUTION MAGNETIC STRUCTURE - A polarization microscope optically detects the effect of the magnetic field from a sub-optical resolution magnetic structure on a magneto-optical transducer. The magneto-optical transducer includes a magnetic layer with a magnetization that is changed by the magnetic field produced by the magnetic structure. The saturation field of the magnetic layer is sufficiently lower than the magnetic field produced by the magnetic structure that the area of magnetization change in the magnetic layer is optically resolvable by the polarization microscope. A probe may be used to provide a current to the sample to produce the magnetic field. By analyzing the optically detected magnetization, one or more characteristics of the sample may be determined. A magnetic recording storage layer may be deposited over the magnetic layer, where a magnetic field produced by the sample is written to the magnetic recording storage layer to effect the magnetization of the magnetic layer. | 2014-05-15 |
20140133285 | RECORDING MEDIUM, OPTICAL INFORMATION DEVICE AND METHOD FOR PRODUCING RECORDING MEDIUM - A recording medium ( | 2014-05-15 |
20140133286 | DISK CARTRIDGE - There is provided a disk cartridge including a case body in which a plurality of disk-shaped recording media are configured to be able to be received in an axial direction of a central shaft in parallel, and a first shell having a base surface section parallel to a recording surface of the disk-shaped recording medium and a second shell having a basal surface section parallel to the recording surface of the disk-shaped recording medium are coupled and separated through separation and connection in the axial direction, and a presser spring having a section to be attached, which is attached to the case body, and a pressing section configured to come in contact with an outer circumferential surface of the disk-shaped recording medium and to press the disk-shaped recording medium. The presser spring is formed of a resin material. | 2014-05-15 |
20140133287 | DISK CARTRIDGE - Provided is a disk cartridge including a case body in which a plurality of disk-shaped recording media are configured to be receivable in an axial direction of a central shaft in parallel, and a first shell having a base surface section parallel to a recording surface of the disk-shaped recording media and a second shell having a basal surface section parallel to the recording surface of the disk-shaped recording media are coupled and separated through separation and connection in the axial direction. | 2014-05-15 |
20140133288 | APPARATUS AND METHOD FOR PROVIDING LONGITUDINAL POSITION MARKS ON AN OPTICAL TAPE - In at least one embodiment, an apparatus for writing data and location marks on an optical tape is provided. The apparatus comprises an optical system that includes at least one laser source for transmitting a laser beam therefrom. The optical system further includes a plurality of lenses for receiving the laser beam and for directing the laser beam onto at least one guard band on the optical tape to write the location marks thereon. The location marks being indicative of a longitudinal position of the data that is capable of being stored on a writeable section of the optical tape. | 2014-05-15 |
20140133289 | ETHERNET FAULT MANAGEMENT SYSTEMS AND METHODS - Ethernet fault management systems and methods using programmable Type-Length-Value (TLV) offsets combine software-based Operations, Administration, and Maintenance (OAM) protocol support with hardware-based fault management support to delegate generation and processing of OAM protocol messages to hardware devices with the software-based protocol support used to program hardware based on fixed offsets in the OAM protocol messages. The hardware can be designed to be flexible since the hardware can be agnostic to the logic within the OAM protocol which would reside in the software. The Ethernet fault management systems and methods combine the flexibility of software-based approaches with the speed and efficiency of hardware-based approaches. | 2014-05-15 |
20140133290 | WIRELESS COMMUNICATION SYSTEM AND WIRELESS COMMUNICATION APPARATUS - A wireless communication system includes first and second wireless communication apparatuses. The first wireless communication apparatus includes a plurality of communication units that perform communication in different frequency bands. The plurality of communication units transmits the same control signal and data in the different frequency bands to keep allocation of communication slots for the second wireless communication apparatus on a plurality of paths. When detecting a communication failure while connecting to and communicating with one communication unit through one path, the second wireless communication apparatus switches to another communication unit and continues the communication through another path. | 2014-05-15 |
20140133291 | CLOSED LOOP COMMUNICATION SYSTEM, APPARATUS AND METHOD - A system, apparatus and method for a closed loop system, which can be operated over a plurality of hardware platforms. Optionally, according to at least some embodiments of the present invention, the system, method and apparatus may be used for control of an energy system. | 2014-05-15 |
20140133292 | COMMUNICATION METHOD AND A NODE DEVICE - A first node device transmits a first path information frame including first path information that associates a destination node device with a first forwarding destination to which the first node device forwards a data frame destined for the destination node device. A second node device other than the first node device receives the first path information frame. The second node device determines whether a forwarding path includes a loop. The forwarding path is a path from the second node device to the destination node device via the first node device and the first forwarding destination. The second node device stores the first path information upon determining that the forwarding path does not include a loop. The second node device forwards a data frame destined for the destination node device to the first node device on the basis of the first path information. | 2014-05-15 |
20140133293 | TRIGGERING CONGESTION CONTROL IN A MANNER SUCH THAT THE MOBILE DEVICE RADIO IS APPLICATION AWARE - Currently, the radio on the device is the only one aware of network congestion while applications are not. At the same time, only the application is aware of the criticality of information it needs to send across the network. In order to address mobile network congestion more effectively, device radio needs to become application aware or application becomes radio aware. This way, the device radio knows the priority of the application traffic and does not blindly block critical information while allowing non critical information to be transferred or the application knows that the network is congested and uses it efficiently. The current congestion management mechanisms have their triggers and corrective actions limited to the device radio level without any regard to application. To address this problem, the disclosed technology includes a solution for congestion management where the trigger is on radio level while corrective measures are at IP/application layer. | 2014-05-15 |
20140133294 | Methods and Systems for Broadcasting Load Information to Enable a User Equipment (UE) to Select Different Network Access - Methods and apparatus for offloading traffic from a first RAT network (e.g., WWAN) to a second RAT network (e.g., WLAN) are described. In some cases, the first RAT network may broadcast an indication of a level of preference for offloading traffic for one or more application types to the first or second RAT network. A UE may determine which RAT network to use for transmitting data based on this indication and current system conditions (e.g., relative loading of the first and second RAT networks). | 2014-05-15 |
20140133295 | Method for transmitting data packets between two communication modules and communication module for transmitting data packets, as well as communication module for receiving data packets - A method for transmitting data packets between two communication modules via a transmission medium interconnecting the two modules. To transmit a high-priority data packet in real time via the transmission medium, without causing erroneous transmissions of other packets, it is provided that, for an ongoing transmission of a first data packet, a transmitting communication module embeds a second data packet, which is to be sent urgently, directly into the ongoing first packet, buffers a remainder (not transmitted yet) of the first packet and transmits the remainder of the first packet after transmitting the second packet, and a receiving communication module buffers a beginning of a received first packet, receives the second packet and forwards it for further processing, and receives the remainder of the first packet after receiving the second packet, connects it with the buffered beginning of the first packet, and forwards the complete first packet for further processing. | 2014-05-15 |
20140133296 | MANAGING COMMUNICATIONS WITHIN A WIRELESS COMMUNICATIONS NETWORK - A wireless communications network for communicating with wireless communications devices, the wireless communications network comprising a processor arranged to: measure congestion for each wireless communication link between a plurality of the wireless communications devices and the wireless communications network; and prioritize scheduling of communications with the plurality of wireless communications devices dependent upon the measured congestion. | 2014-05-15 |
20140133297 | SYSTEM AND METHOD FOR WIRELESS NETWORK OFFLOADING - A method comprising obtaining, by a server, wireless-network performance data from a plurality of end user devices; generating, by the server, a prioritized network list from the wireless-network performance data; and provisioning, by the server, the prioritized network list to an end user device comprising a radio interface for receiving the prioritized network list from the server, the radio interface being identified to receive the prioritized network list based on a characteristic associated with the end user device; a radio configured to identify available wireless networks, the available wireless networks being different than a current wireless network to which the end user device is currently connected; a prioritized network selection engine for using the prioritized network list to select one of the available wireless networks; and a network connection engine configured to initiate disconnection from the current wireless network and connection to the selected wireless network. | 2014-05-15 |
20140133298 | Data Offload Method and User Equipment - Embodiments of the present invention provide a data offload method and a user equipment. The data offload method includes receiving offload configuration signaling sent by a base station. The offload configuration signaling indicates to perform wireless network offload configuration. Offload configuration is performed according to the offload configuration signaling and data is offloaded according to the offload configuration. | 2014-05-15 |
20140133299 | METHOD, AND ASSOCIATED APPARATUS, FOR COMMUNICATING DATA AT REDUCED TRANSMISSION LATENCY IN RADIO COMMUNICATION SYSTEM HAVING SLOTTED INTERFACE - Method and associated apparatus for communicating data at reduced transmission latency in a radio communication system having a slotted interface are described. An example network device includes an assignor to receive an indication of an amount of data to be communicated by a first communication station, and assign communication resources to convey all of the indicated data amount, the assigned communication resources comprising a plurality of time slots within one time frame and one radio carrier and a data scheduler to receive an indication of assigned communication resources, and to schedule communication of the data block in conformity with the assigned communication resources and in response to a communication station minimum tuning latency period, wherein the schedule of the communication of the data block provides for completion of the communication of the data block and acknowledgement of successful delivery of the data block within the one time frame. | 2014-05-15 |
20140133300 | SYSTEM AND METHOD FOR MANAGING CONGESTION IN A NETWORK ENVIRONMENT - A method is provided in one example embodiment and includes identifying an Internet protocol (IP) address for a serving gateway; establishing a link between the serving gateway and a congestion notification element; monitoring packets in order to identify whether a differentiated services code point (DSCP) bit has been set in the packets; determining that a threshold associated with congestion in a network has been exceeded; and communicating a signal to the serving gateway associated with the congestion. The serving gateway can be configured to correlate the congestion with identifiers associated with end users operating in the network, where the serving gateway communicates a signal to a network element to reduce the congestion. | 2014-05-15 |
20140133301 | SYSTEM, METHOD AND COMPUTER READABLE MEDIUM FOR COMMUNICATING WITH A ZIGBEE DEVICE FROM A PERIPHERAL NETWORK - In order to minimize traffic on a Zigbee network, a gateway of the Zigbee network represents end devices in communications with peripheral networks. The gateway receives messages, such as status request messages, from the peripheral network intended for an end device on the Zigbee network. The Zigbee network generates a response message by retrieving stored data for the end device instead of communicating the received message to the end device. | 2014-05-15 |
20140133302 | TUNING ROUTING METRICS TO REDUCE MAXIMUM LINK UTILIZATION AND END-TO-END DELAY VIOLATIONS - A metric tuning technique optimizes the link utilization of a set of links in a network and end-to-end delay or latency constraints. In the embodiments, a delay constraint between node pairs in the network is determined and used in addition to the link utilization to optimize the network. An interactive user interface is provided to allow a user to specify limits and the delay constraints, and to select the sets of links to be addressed. The delay constraints may be specified on an end-to-end or per-link basis. In addition, the latency requirements may be specified for various types of traffic, such as voice, streaming, etc. In one embodiment, the link utilization is minimized within a node pair latency constraint. Link utilization constraints may be preferred before satisfying delay or latency constraints. | 2014-05-15 |
20140133303 | Multicast Rate Control - A method of providing multicast rate control in a wireless communication device can include transmitting data frames to a plurality of stations in a multicast group with a first data rate. Acknowledgements (ACKs) can then be requested from a first subset of the plurality of stations. Frame losses can be determined using the ACKs from the first subset. A second data rate can be determined based on the frame losses with the first subset. A second subset of the plurality of stations can be selected based on the frame losses with the first subset. Data frames can be transmitted to the plurality of stations with the second data rate. Notably, ACKs only from the second subset of the plurality of stations are requested. Frame losses for the second subset can be determined using those ACKs. A current data rate can be adjusted based on the frame losses for the subset and at least one predetermined threshold. Data frames can be transmitted to the plurality of stations using the adjusted data rate. | 2014-05-15 |
20140133304 | APPARATUS AND METHODS OF CONTROLLING CALL ESTABLISHMENT - Apparatus and methods of controlling call establishment are described. A user equipment (UE) may determine to establish a call. In an aspect, the UE may detect a Wireless Local Area Network (WLAN) access node and receive, from a Wireless Wide Area Network (WWAN) access node, WWAN load-related information. Based on UE call establishment rules and the WWAN load-related information, the UE may determine whether to establish the call on the WWAN access node or the WLAN access node. In another aspect, the UE may determine WLAN access node characteristics associated with a received signal from a WLAN access node. The UE may forward a call establishment request, including the WLAN access node characteristics to a WWAN access node. The UE may receive a redirection command to redirect the call establishment request to the WLAN access node. | 2014-05-15 |
20140133305 | Test Packet Injection System - A networking device of one embodiment includes a processor, a memory, a networking module, and a traffic manager module. The networking module is configured to receive a packet comprising a first header (the first header comprising information identifying a flow), add a second header to the packet (the second header identifying the packet as a test packet), and assign processing rules to the packet based at least on the information identifying the flow. The traffic manager module is configured to remove one of the first header and the second header from the packet and process the packet in accordance with the processing rules. | 2014-05-15 |
20140133306 | SYSTEM AND METHOD FOR SATELLITE COMMUNICATION - A system and method for satellite communication that receives channel status information (CSI) of a forward link connected to a subscriber terminal station, resets a modulation and coding (MODCOD) of a physical layer based on the received CSI, and changes a congestion window value of a transmission layer based on the reset value of the reset MODCOD of the physical layer is provided. | 2014-05-15 |
20140133307 | ROUTER, METHOD FOR CONTROLLING ROUTER, AND COMPUTER PROGRAM - In a bus system including a bus master, a first bus, and a second bus to connect them together, this router is arranged on the second bus to relay packets. The bus master outputs packets including information about at least one of (N+1) predetermined types of quality requirements. The second bus transmits packets designating at most N types of quality requirements. An exemplary router controls sending of the packets, with respect to at most N types of buffers that classify and store the packets by reference to the quality requirement type information and the packets stored in the buffers, so that the packets are sent in the descending order of their level of the quality requirement. The router controls sending schedule of the traffic flows by sensing a difference between the (N+1) different types of quality requirements. | 2014-05-15 |
20140133308 | SYSTEM AND METHOD FOR A TCP MAPPER - A system for congestion control of traffic in a network that uses Transmission Control Protocol (TCP) includes a plurality of TCP congestion control programs having one or more parameters, a plurality of TCP congestion control units running the TCP congestion control programs, and a TCP mapper adapted to map incoming TCP traffic flow from a plurality of incoming TCP traffic flows to the TCP congestion control units based on at least one of (a) the type of application program from which the incoming TCP traffic flow originated (b) the type of network for which the incoming TCP traffic flow is destined, (c) parameters related to network performance (d) network constraints (e) source of the incoming TCP traffic flow, and (f) destination of the incoming TCP traffic flow. | 2014-05-15 |
20140133309 | Method and Apparatus for Sending Packet - A method for sending a packet includes determining whether a packet is a fragmented packet, if the packet is a fragmented packet, determining whether the number of tokens in a token bucket is sufficient, when the number of tokens in the token bucket is sufficient, sending the fragmented packet, and deducting the number of tokens in the token bucket, where the deducted number of tokens corresponds to the number of bytes of the sent fragmented packet, when the number of tokens in the token bucket is insufficient, sending the fragmented packet, and deducting the number of tokens in the token bucket, where the deducted number of tokens corresponds to the number of bytes of the sent fragmented packet, and the number of tokens in the token bucket is a negative number after the number of tokens corresponding to the number of bytes of the sent fragmented packet is deducted. | 2014-05-15 |
20140133310 | METHOD FOR EXTRACTING FEATURES FROM A FLOW OF DIGITAL VIDEO FRAMES, AND CORRESPONDING SYSTEM AND COMPUTER PROGRAM PRODUCT - In an embodiment, digital video frames in a flow are subjected to a method of extraction of features including the operations of: extracting from the video frames respective sequences of pairs of keypoints/descriptors limiting to a threshold value the number of pairs extracted for each frame; sending the sequences extracted from an extractor module to a server for processing with a bitrate value variable in time; receiving the aforesaid bitrate value variable in time at the extractor as target bitrate for extraction; and limiting the number of pairs extracted by the extractor to a threshold value variable in time as a function of the target bitrate. | 2014-05-15 |
20140133311 | METHOD AND APPARATUS FOR CONFIGURING ROUTING PATH IN WIRELESS COMMUNICATION SYSTEM - A method and apparatus for configuring a routing path in a wireless communication system are provided. The method includes measuring a first distance between the terminal and a target terminal, transmitting information of the measured first distance to at least one neighboring terminal, receiving a second distance measured for the target terminal with respect to the terminal from the at least one neighboring terminal, and determining a neighboring terminal of which the second distance is the longest as a next terminal of the routing path. | 2014-05-15 |
20140133312 | COMMUNICATION CONTROL DEVICE COMMUNICATION CONTROL SYSTEM, COMMUNICATION CONTROL METHOD AND PROGRAM - To reduce a communication load among data storage devices and data processing devices, a communication device comprises node information storage means for storing identifiers of data devices and processing devices and communication costs, and search processing means for receiving a message, which includes a transfer route of message and a total cost, which is a communication cost of transfer route, and detecting and outputting a closed path, from transfer route, having a negative total cost, or transmitting to the registered data device a message including a new total cost calculated by subtracting a communication cost corresponding to data device concerned from total cost and a new transfer route made by adding communication device to transfer route, and transmitting to the registered processing device a message including a new total cost calculated by adding a communication cost corresponding to processing device concerned to total cost, and new transfer route. | 2014-05-15 |
20140133313 | TERMINAL SELECTION METHOD, NETWORK DEVICE, AND RADIO TERMINAL - In one embodiment, a mobility management device MME selects a Logged MDT implementation terminal that should implement a measurement process by Logged MDT, from among a plurality of radio terminals UE in a mobile communication system | 2014-05-15 |
20140133314 | FORENSICS FOR NETWORK SWITCHING DIAGNOSIS - A method for diagnosing performance of a network switch device includes a processor monitoring data generated by a sensor associated with a network switch device, the data related to states or attributes of the network switch device. The processor detects a determined condition in the operation of the network switch device related to the state or attribute. The processor generates an event trigger in response to detecting the determined condition and executes a forensic command in response to the event trigger. Executing the command includes sending information relevant to the determined condition for aggregation in computer storage and for analysis. | 2014-05-15 |
20140133315 | SYSTEMS AND METHODS FOR LISTENING POLICIES FOR VIRTUAL SERVERS OF APPLIANCE - The present invention is directed towards a method for using a listening policy for a virtual server on an intermediary device. An intermediary device establishes for a first virtual server a first listening policy with an expression for evaluating packets received by the intermediary device to determine whether the packet may access the first virtual server. The intermediary device listens for packets at a first internet protocol (IP) address and a first port specified for the first virtual server. Then, the intermediary device evaluates the expression of the first listening policy to a first packet received at the first IP address and first port and determines whether to provide the first packet to the first virtual server based on a result of the evaluation. | 2014-05-15 |
20140133316 | Parameter Estimation Device, Parameter Estimation Method, and Parameter Estimation Program - A parameter estimation device | 2014-05-15 |
20140133317 | ADAPTIVE TRANSMISSION MODE SWITCHING | 2014-05-15 |
20140133318 | SCALABLE BROADBAND GROUP CALL VIA UNICAST DOWNLINK TRAFFIC CONSOLIDATION AND LOCAL RE-BROADCAST - A method, system, and device consolidate unicast downlinks in a broadband radio access network (RAN) for a requested group call. A subset of subscriber devices of the group in sufficiently close proximity is detected, one subscriber device in the subset is selected to act as a subscriber device to subscriber device broadcast downlink repeater (SD-BDR), and group call data is transmitted to each subscriber not in a subset via a separate unicast downlink, and to each subset via a single outbound unicast link to the selected subscriber device. The selected SD-BDR in each subset then re-broadcasts the group call data to the other members of the subset, thereby reducing outbound broadband resource usage in the broadband RAN. | 2014-05-15 |
20140133319 | RECEIVE DIVERSITY CONTROL IN TD-SCDMA - In a TD-SCDMA user equipment (UE) with multiple receive chains, receive diversity may be implemented where multiple receive chains may simultaneously activate to perform reception on downlink signals. Receive diversity may be enabled when single chain reception provides undesired results and when receive diversity will not impact power consumption too much. A state machine may be implemented to control receive diversity operation based on operating conditions such as an error rate, signal-to-interference ratio, and other factors. | 2014-05-15 |
20140133320 | INTER-PACKET INTERVAL PREDICTION LEARNING ALGORITHM - An appliance receives packets that are part of a flow pair, each packet sharing an application protocol. The appliance determines the application protocol of the packets by performing deep packet inspection (DPI) on the packets. Packet sizes are measured and converted into packet size states. Packet size states, packet sequence numbers, and packet flow directions are used to create an application protocol estimation table (APET). The APET is used during normal operation to estimate the application protocol of a flow pair without performing time consuming DPI. The appliance then determines inter-packet intervals between received packets. The inter-packet intervals are converted into inter-packet interval states. The inter-packet interval states and packet sequence numbers are used to create an inter-packet interval prediction table. The appliance then stores an inter-packet interval prediction table for each application protocol. The inter-packet interval prediction table is used during operation to predict the inter-packet interval between packets. | 2014-05-15 |
20140133321 | Method for Validating Radio-Frequency Performance of Wireless Electronic Devices - A test system for testing a wireless electronic device is provided. The test system may include a test host and a tester. The test host may instruct the electronic device under test (DUT) to transmit radio-frequency test signals in a selected resource block of a desired channel identified by a channel number in the Long Term Evolution frequency band. The tester may measure harmonic output power levels of the radio-frequency test signals transmitted by the DUT at harmonic frequencies of the selected resource block. The test host may compare the measured harmonic output power levels to threshold power levels to characterize the radio-frequency performance of wireless circuitry in the DUT. The test system may test the radio-frequency performance of the DUT for radio-frequency test signals transmitted by the DUT in some or all resource blocks in the desired Long Term Evolution band. | 2014-05-15 |
20140133322 | APERTURE SYNTHESIS COMMUNICATIONS SYSTEM - A method and apparatus are provided for improving capacity in wireless communications systems for use in areas having a high user traffic density. For reception, signals received from an antenna array are processed by performing a transformation comprising aperture synthesis to map signal content received from the antenna array to at least one element of a plurality of elements in an image plane storage to produce a time series of values for the at least one element, and then by assigning the at least one element to at least one radio access transceiver of a plurality of radio access transceivers for receiving the time series of values from the at least one element. For transmission, at least one radio access transceiver of a plurality of radio access transceivers is assigned to at least one element of a plurality of elements in an image plane storage, the assignment providing for the at least one element to receive a time series of values from the at least one radio access transceiver, and then a transformation is performed comprising antenna synthesis to map the time series of values from the at least one element to the signals for transmission by the antenna array. | 2014-05-15 |
20140133323 | Adjusting Link Layer Control Frame to Facilitate Data Thoughput - A base station subsystem includes logic to change the modulation and coding scheme for radio communications, and logic to communicate with a switching GSM to cause a change in link layer control frame size to reflect the change in modulation and coding scheme. | 2014-05-15 |
20140133324 | ANT SYNCWORD SPECIFIC ACQUISITION THRESHOLDING - Systems, methods, and devices for determining an acquisition threshold boundary value and applying that boundary value to identify which incoming signals are directed to a device, based on matching the device syncword with the syncword for the incoming signal. For some implementations using ANT protocol, syncwords composed of the last four bits of the preamble and first 14 bits of the network address identify each device. Incoming syncwords are correlated with the device's syncword, and the correlation compared to threshold boundary value which is based on the characteristics of the individual syncword, including syncword bit stream inter-symbol interference. | 2014-05-15 |
20140133325 | Feedback and Scheduling for Coordinated Multi-Point (CoMP) Joint Transmission (JT) in Orthogonal Frequency Division Multiple Access (OFDMA) - A method implemented in a user equipment (UE) used in an orthogonal frequency division multiple access (OFDMA) wireless communications system supporting coordinated multi-point (CoMP) joint transmission (JT) is disclosed. The method includes measuring reference signal received power (RSRP), transmitting, to a network, first feedback on the RSRP, receiving, from the network, a CoMP measurement set, conducting pre-scheduling CoMP UE fallback according to the CoMP measurement set, computing channel quality and direction information according to a UE category, and transmitting, to the network, second feedback on the channel quality and direction information. Other methods, apparatuses, and systems also are disclosed. | 2014-05-15 |
20140133326 | VOIP BANDWIDTH MANAGEMENT SYSTEM AND METHOD THEREOF - A bandwidth management system and a method adapted for the system. The system determines when the sum of the required bandwidth of a new VOIP call and previous VOIP calls from a client device is greater than the maximum sustained rate, transmits a SIP invite to a called party of the new VOIP call to execute a SIP negotiation via a base station and monitors the new VOIP call and the VOIP calls whose SIP negotiations are not successful. When one of the VOIP calls of awaiting SIP negotiations is successful, the system calculates an actual used bandwidth of the client device, and when the actual used bandwidth is equal to or less than the maximum sustained rate, the system establishes a call link for the one VOIP call and monitoring the other VOIP calls of awaiting SIP negotiations. | 2014-05-15 |