19th week of 2017 patent applcation highlights part 58 |
Patent application number | Title | Published |
20170133320 | INTERCONNECT STRUCTURE WITH MISALIGNED METAL LINES COUPLED USING DIFFERENT INTERCONNECT LAYER | 2017-05-11 |
20170133321 | APPARATUS AND METHOD FOR MITIGATING DYNAMIC IR VOLTAGE DROP AND ELECTROMIGRATION AFFECTS | 2017-05-11 |
20170133322 | Pad Structure Design in Fan-Out Package | 2017-05-11 |
20170133323 | Semiconductor Device and Method of Forming Inverted Pyramid Cavity Semiconductor Package | 2017-05-11 |
20170133324 | CHEMICAL DIRECT PATTERN PLATING METHOD | 2017-05-11 |
20170133325 | METHODS OF SELF-FORMING BARRIER FORMATION IN METAL INTERCONNECTION APPLICATIONS | 2017-05-11 |
20170133326 | WAFER LEVEL FAN-OUT WITH ELECTROMAGNETIC SHIELDING | 2017-05-11 |
20170133327 | ELECTRIC MODULE COMPRISING A TENSIONING DEVICE | 2017-05-11 |
20170133328 | BOTTOM PROCESSING | 2017-05-11 |
20170133329 | 2.5D ELECTRONIC PACKAGE | 2017-05-11 |
20170133330 | Semiconductor Device and Method of Controlling Warpage in Reconstituted Wafer | 2017-05-11 |
20170133331 | SEMICONDUCTOR DEVICE | 2017-05-11 |
20170133332 | POWER INTEGRATED MODULE | 2017-05-11 |
20170133333 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME | 2017-05-11 |
20170133334 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-05-11 |
20170133335 | SEMICONDUCTOR DEVICE AND METHOD OF MAKING A SEMICONDUCTOR DEVICE | 2017-05-11 |
20170133336 | INTERCONNECT STRUCTURES AND METHODS FOR FABRICATING INTERCONNECT STRUCTURES | 2017-05-11 |
20170133337 | FABRICATION METHOD OF PACKAGING SUBSTRATE | 2017-05-11 |
20170133338 | MULTILAYER PILLAR FOR REDUCED STRESS INTERCONNECT AND METHOD OF MAKING SAME | 2017-05-11 |
20170133339 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME | 2017-05-11 |
20170133340 | METHOD FOR PRODUCING A CHIP MODULE | 2017-05-11 |
20170133341 | SEMICONDUCTOR PACKAGES WITH AN INTERMETALLIC LAYER | 2017-05-11 |
20170133342 | Bond Wire Connection | 2017-05-11 |
20170133343 | INTEGRATED CIRCUIT DEVICE | 2017-05-11 |
20170133344 | SEMICONDUCTOR DEVICE WITH A RESIN LAYER AND METHOD OF MANUFACTURING THE SAME | 2017-05-11 |
20170133345 | BONDING SUBSTRATES USING SOLDER SURFACE TENSION DURING SOLDER REFLOW FOR THREE DIMENSIONAL SELF-ALIGNMENT OF SUBSTRATES | 2017-05-11 |
20170133346 | Bump Structure for Yield Improvement | 2017-05-11 |
20170133347 | METHOD FOR MANUFACTURING SUBSTRATES | 2017-05-11 |
20170133348 | LIGHT EMITTING DEVICE | 2017-05-11 |
20170133349 | METHOD OF PACKAGING INTEGRATED CIRCUIT DIE AND DEVICE | 2017-05-11 |
20170133350 | SYSTEMS AND METHODS FOR PACKAGE ON PACKAGE THROUGH MOLD INTERCONNECTS | 2017-05-11 |
20170133351 | Multi-Stack Package-on-Package Structures | 2017-05-11 |
20170133352 | THERMALLY ENHANCED SEMICONDUCTOR ASSEMBLY WITH THREE DIMENSIONAL INTEGRATION AND METHOD OF MAKING THE SAME | 2017-05-11 |
20170133353 | SEMICONDUCTOR ASSEMBLY WITH THREE DIMENSIONAL INTEGRATION AND METHOD OF MAKING THE SAME | 2017-05-11 |
20170133354 | INTEGRATED CIRCUIT PROCESS HAVING ALIGNMENT MARKS FOR UNDERFILL | 2017-05-11 |
20170133355 | THREE-DIMENSIONAL PACKAGE STRUCTURE | 2017-05-11 |
20170133356 | OPTOELECTRONIC DEVICE INCLUDING LIGHT-EMITTING DIODES AND A CONTROL CIRCUIT | 2017-05-11 |
20170133357 | DISPLAY DEVICE | 2017-05-11 |
20170133358 | Methods and systems to improve yield in multiple chips integration processes | 2017-05-11 |
20170133359 | SEMICONDUCTOR DEVICE WITH MODIFIED CURRENT DISTRIBUTION | 2017-05-11 |
20170133360 | SEMICONDUCTOR DEVICE AND PROCESS OF MAKING THE SAME | 2017-05-11 |
20170133361 | COMPENSATED WELL ESD DIODES WITH REDUCED CAPACITANCE | 2017-05-11 |
20170133362 | METHOD FOR PRODUCING TRENCH HIGH ELECTRON MOBILITY DEVICES | 2017-05-11 |
20170133363 | FET - BIPOLAR TRANSISTOR COMBINATION | 2017-05-11 |
20170133364 | HIGH BREAKDOWN VOLTAGE III-N DEPLETION MODE MOS CAPACITORS | 2017-05-11 |
20170133365 | POWER RAIL INBOUND MIDDLE OF LINE (MOL) ROUTING | 2017-05-11 |
20170133366 | MOS TRANSISTOR STRUCTURE AND METHOD OF FORMING THE STRUCTURE WITH VERTICALLY AND HORIZONTALLY-ELONGATED METAL CONTACTS | 2017-05-11 |
20170133367 | SYSTEM ON CHIP | 2017-05-11 |
20170133368 | HIGH BANDGAP SCHOTTKY CONTACT LAYER DEVICE | 2017-05-11 |
20170133370 | SEMICONDUCTOR DEVICE | 2017-05-11 |
20170133371 | Method and Structure for FinFET Devices | 2017-05-11 |
20170133372 | FORMING MOSFET STRUCTURES WITH WORK FUNCTION MODIFICATION | 2017-05-11 |
20170133373 | INTEGRATED CIRCUITS HAVING MULTIPLE GATE DEVICES WITH DUAL THRESHOLD VOLTAGES AND METHODS FOR FABRICATING SUCH INTEGRATED CIRCUITS | 2017-05-11 |
20170133374 | Integrated Circuit Having a Vertical Power MOS Transistor | 2017-05-11 |
20170133375 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-05-11 |
20170133376 | FIN SCULPTING AND CLADDING DURING REPLACEMENT GATE PROCESS FOR TRANSISTOR CHANNEL APPLICATIONS | 2017-05-11 |
20170133377 | TECHNIQUES FOR ACHIEVING MULTIPLE TRANSISTOR FIN DIMENSIONS ON A SINGLE DIE | 2017-05-11 |
20170133378 | CMOS DEVICES HAVING CHARGED PUNCH-THROUGH STOPPER LAYER TO REDUCE PUNCH-THROUGH AND METHODS OF MANUFACTURING THE SAME | 2017-05-11 |
20170133379 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME | 2017-05-11 |
20170133380 | INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE | 2017-05-11 |
20170133381 | LOOKUP TABLE AND PROGRAMMABLE LOGIC DEVICE INCLUDING LOOKUP TABLE | 2017-05-11 |
20170133382 | Dual-Port Semiconductor Memory and First In First Out (FIFO) Memory Having Electrically Floating Body Transistor | 2017-05-11 |
20170133383 | ENHANCED CHARGE STORAGE MATERIALS, RELATED SEMICONDUCTOR MEMORY CELLS AND SEMICONDUCTOR DEVICES, AND RELATED SYSTEMS AND METHODS | 2017-05-11 |
20170133384 | SEMICONDUCTOR ARRANGEMENT WITH CAPACITOR | 2017-05-11 |
20170133385 | WIRING WITH EXTERNAL TERMINAL | 2017-05-11 |
20170133386 | SEMICONDUCTOR DEVICE, STATIC RANDOM ACCESS MEMORY CELL AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | 2017-05-11 |
20170133387 | Three-Dimensional Static Random Access Memory Device Structures | 2017-05-11 |
20170133388 | NITRIDE-FREE SPACER OR OXIDE SPACER FOR EMBEDDED FLASH MEMORY | 2017-05-11 |
20170133389 | VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME | 2017-05-11 |
20170133390 | METHOD FOR PRODUCING ONE-TIME-PROGRAMMABLE MEMORY CELLS AND CORRESPONDING INTEGRATED CIRCUIT | 2017-05-11 |
20170133391 | Non-Volatile Semiconductor Memory Device | 2017-05-11 |
20170133392 | MEMORY INCLUDING BLOCKING DIELECTRIC IN ETCH STOP TIER | 2017-05-11 |
20170133393 | NON-VOLATILE MEMORY DEVICE | 2017-05-11 |
20170133394 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-05-11 |
20170133395 | NOVEL SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE | 2017-05-11 |
20170133396 | Memory Devices and Method of Fabricating Same | 2017-05-11 |
20170133397 | THREE-DIMENSIONAL SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-05-11 |
20170133398 | VERTICAL MEMORY DEVICE | 2017-05-11 |
20170133399 | MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-05-11 |
20170133400 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME | 2017-05-11 |
20170133401 | SEMICONDUCTOR INTEGRATED CIRCUIT | 2017-05-11 |
20170133402 | AN ARRAY SUBSTRATE AND A DISPLAY DEVICE | 2017-05-11 |
20170133403 | ARRAY SUBSTRATE AND METHOD FOR FABRICATING THE SAME, AND DISPLAY DEVICE | 2017-05-11 |
20170133404 | DISPLAY DEVICE | 2017-05-11 |
20170133405 | Z-Inversion Type Display Device and Method of Manufacturing the Same | 2017-05-11 |
20170133406 | METHOD, APPARATUS, AND SYSTEM FOR STACKED CMOS LOGIC CIRCUITS ON FINS | 2017-05-11 |
20170133407 | Flexible Substrate And Manufacturing Method Thereof, Flexible Display Panel And Flexible Display Device | 2017-05-11 |
20170133408 | ARRAY SUBSTRATE AND DISPLAY PANEL | 2017-05-11 |
20170133409 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-05-11 |
20170133410 | ARRAY SUBSTRATE AND DISPLAY DEVICE | 2017-05-11 |
20170133411 | FLEXIBLE DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2017-05-11 |
20170133412 | METHODS OF FORMING PRINTABLE INTEGRATED CIRCUIT DEVICES AND DEVICES FORMED THEREBY | 2017-05-11 |
20170133413 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-05-11 |
20170133414 | DTI FOR BSI IMAGE SENSOR | 2017-05-11 |
20170133415 | PROTECTION RING FOR IMAGE SENSORS | 2017-05-11 |
20170133416 | Monolithic Visible-Infrared Focal Plane Array On Silicon | 2017-05-11 |
20170133417 | IMAGING DEVICE AND IMAGING SYSTEM | 2017-05-11 |
20170133418 | LATCH CIRCUIT, DOUBLE DATA RATE RING COUNTER BASED ON THE LATCH CIRCUIT, HYBRID COUNTING DEVICE, ANALOG-DIGITAL CONVERTING DEVICE, AND CMOS IMAGE SENSOR | 2017-05-11 |
20170133419 | OPTICAL DETECTION ELEMENT AND SOLID-STATE IMAGE PICKUP DEVICE | 2017-05-11 |
20170133420 | IMAGE SENSORS WITH COLOR FILTER WINDOWS | 2017-05-11 |