| 18th week of 2014 patent applcation highlights part 23 |
| Patent application number | Title | Published |
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| 20140117949 | METHOD AND APPARATUS FOR SUPPLYING AND SWITCHING POWER - A dimming power supply includes a power source, a transformer, a full bridge rectifier and a control switch. | 2014-05-01 |
| 20140117950 | VOLTAGE REGULATOR CIRCUIT - A voltage regulator circuit includes a differential amplifier stage. The gate terminal of a first n-channel MOSFET is coupled to an output of the differential amplifier stage. A resistor is coupled between the drain terminal and gate terminal of the first n-channel MOSFET. The drain terminal of the first n-channel MOSFET drives the gate of a second n-channel MOSFET whose drain terminal is at the input of a current mirror circuit. An output of the current mirror circuit forms the regulated voltage output. A feedback circuit is coupled between the regulated voltage output and one input of the voltage regulator circuit. Another input of the voltage regulator circuit is configured to receive a reference voltage. | 2014-05-01 |
| 20140117951 | MULTI-STAGE POWER SUPPLY WITH FAST TRANSIENT RESPONSE - Embodiments are disclosed relating to an electric power conversion device and methods for controlling the operation thereof. One disclosed embodiment provides a multi-stage electric power conversion device including a first regulator stage including a first stage energy storage device and a second regulator stage including a second stage energy storage device, the second stage energy storage device being operatively coupled between the first stage energy storage device and the load. The device further includes a control mechanism operative to control (i) a first stage output voltage on a node between the first stage energy storage device and the second stage energy storage device and (ii) a second stage output voltage on a node between the second stage energy storage device and the load. | 2014-05-01 |
| 20140117952 | REGULATOR WITH IMPROVED WAKE-UP TIME - A regulating circuit includes a first comparator configured to control a turning on and a turning off of a first transistor based on a first comparison a reference voltage to a feedback voltage. The first transistor is coupled between an output node and a first voltage supply. A second comparator is configured to control a turning on and a turning off of a second transistor based on a second comparison of the reference voltage to the feedback voltage. The second transistor is coupled to the output node. A high-impedance circuit is coupled in series with the second transistor such that the high-impedance block is disposed between the second transistor and a second power supply. The high-impedance circuit is configured to generate a constant current between the output node and the second voltage supply when the second transistor is turned on. | 2014-05-01 |
| 20140117953 | METHOD AND APPARATUS FOR A TUNABLE DRIVER CIRCUIT - A driver circuit having an adjustable output signal includes a logic circuit configured to receive an input signal into a first input terminal and an output circuit coupled to the logic circuit, wherein the output circuit is configured to generate, at an output terminal of the output circuit, an output signal having a signal level that changes in response to a signal level of the input signal. The driver circuit further includes a feedback circuit coupled to a second input terminal of the logic circuit. The feedback circuit includes first and second gate terminals coupled to the output terminal and a third gate terminal coupled to a control signal supply, wherein the feedback circuit is configured to control a maximum level of the output signal from the driver circuit based on an operating threshold of the feedback circuit as set by a control signal generated by the control signal supply. | 2014-05-01 |
| 20140117954 | POWER SUPPLY CIRCUIT - A power supply circuit is configured to supply a working voltage for an electric load. The power supply circuit includes a controller and a power supply module connected to the controller. The power supply module includes a first output channel and a second output channel both of which are connected to the electric load. A current sensor is connected to the controller and configured to sense a current output from the first output channel. Either the first output channel or the second output channel is deactivated by the controller when the current sensed by the current sensor is less than a predetermined current value. Both of the first output channel and the second output channel are activated when the current sensed by the current sensor is greater than the predetermined current value. | 2014-05-01 |
| 20140117955 | DIGITAL CONTROLLER FOR SWITCH-MODE DC-DC CONVERTERS AND METHOD - A fully digital synthesizable digital controller ( | 2014-05-01 |
| 20140117956 | METHOD AND APPARATUS FOR LDO AND DISTRIBUTED LDO TRANSIENT RESPONSE ACCELERATOR - A transient response accelerated (TRA) low dropout (LDO) regulator has an error amplifier having a feedback input, and a reference input configured to receive a reference voltage, and an output that controls a pass gate. The pass gate output voltage is applied to the feedback input. A transient response accelerator (TRA) circuit detects a rapid voltage drop on the pass gate output and, in response, applies a pulse control that rapidly lowers the resistance of the pass gate. | 2014-05-01 |
| 20140117957 | VOLTAGE REGULATOR - A voltage regulator includes an operational amplifier that compares a feedback voltage that is proportional to an output voltage and a predetermined reference voltage that corresponds to a desired output voltage. The operational amplifier controls the conduction state of an output transistor according to the comparison. A detecting circuit monitors the operating state of the operational amplifier, and in the case that the operational amplifier is not operating, outputs a signal which causes the output transistor to be placed in a non-conductive state. | 2014-05-01 |
| 20140117958 | METHOD AND APPARATUS FOR LOAD ADAPTIVE LDO BIAS AND COMPENSATION - An adaptive low dropout (LDO) regulator includes a load-based bias controller that generates a bias control signal based on the output load current, and has a differential amplifier with a bias adjustment that receives the bias control signal and responds by adjusting a bias of a transistor within the adaptive LOD regulator. Optionally, the bias control signal is generated according to a hysteresis rule. Optionally, the adaptive LOD regulator includes an adaptive load-based compensation network having a zero, the zero having a location based, at least in part, one more of an adjustable resistance or capacitance value controlled by the load-based bias controller. | 2014-05-01 |
| 20140117959 | HIGH RESOLUTION CONTROL FOR A MULTIMODE SMPS CONVERTER AND HIGH RESOLUTION SLOPE GENERATOR - In various embodiments a controller for controlling the operation of a switched mode power supply is provided, the controller comprising: a first signal source configured to provide a first set of signals including a set signal and a clear signal, wherein the first set of signals may correspond to a first mode of operation of the switched mode power supply; a second signal source configured to provide a second set of signals including a set signal and a clear signal, wherein the second set of signals may correspond to a second mode of operation of the switched mode power supply; a selecting circuit coupled to the first signal source and to the second signal source, the selecting circuit being configured to select either the first set of signals or the second set of signals; a switching signal generating circuit coupled to the selecting circuit and configured to provide a switching signal to the switched mode power supply based on the set of signals received from the selecting circuit. | 2014-05-01 |
| 20140117960 | ENHANCED SWITCHING REGULATOR CONTROLLER - In accordance with one embodiment, a system is provided that can include a voltage regulator controller configured to switch a power circuit based on a trigger. A linear scaler can generate an adjustment value based on a reference voltage and a regulated output voltage. This adjustment value can be used to generate the trigger to switch the power circuit based on the adjustment value. | 2014-05-01 |
| 20140117961 | Hysteretic Power Converter with Switch Gate Current Sense - A driver circuit for a switched-mode power converter is configured to perform hysteretic control of a switched-mode power converter. The switched-mode power converter comprises an inductor configured to store energy during a first state of the switch and to release energy towards a load of the switched-mode power converter during a second state of the switch. The driver circuit comprises a filter unit which is configured to determine a command signal based on a gate control signal applied to a gate of the switch. The command signal is indicative of a current through the inductor. The driver circuit comprises hysteretic control circuitry configured to generate the gate control signal based on the command signal; wherein the switch alternates between the first and second state when being subjected to the gate control signal. | 2014-05-01 |
| 20140117962 | High Efficiency High Power Density Power Architecture Based on Buck-Boost Regulators with a Pass-Through Band - A power system comprising a non-isolated voltage regulator configured to couple to an input voltage and produce an output voltage, wherein the non-isolated voltage regulator is in a power distribution system and configured to boost the input voltage when the input voltage is less than a minimum output voltage, to reduce the input voltage when the input voltage is greater than a maximum output voltage, and to pass-through the input voltage when the input voltage is greater than or equal to the minimum output voltage and less than or equal to the maximum output voltage. | 2014-05-01 |
| 20140117963 | APPARATUS AND METHOD FOR CONTROLLING BIDIRECTIONAL DC-DC CONVERTER - An apparatus and a method for controlling a direct-current (DC)-DC converter used in a vehicle are provided. The apparatus includes a switching control unit checking a difference between voltages of an input unit and an output unit and controlling an operation of at least one switch formed in a converter according to an operation mode of the converter according to the difference of voltages; and the converter controlling the operation of the at least one switch based on a control signal applied from the switching control unit to allow a current to flow from the input unit to the output unit. | 2014-05-01 |
| 20140117964 | Dual Mode Power Supply Controller with Charge Balance Multipliers and Charge Balance Multiplier Circuits - A circuit for generating an output current includes a control signal generating circuit that is configured to generate a control signal. The control signal is a function of a level of an analog input voltage signal, and a level of the output current is a function of a level of an analog input current signal and the level of the analog input voltage signal. | 2014-05-01 |
| 20140117965 | ENERGY EFFICIENT SOLAR POWERED HIGH VOLTAGE DIRECT CURRENT BASED DATA CENTER - A system and method for providing power is disclosed. A variable direct current (DC) power source provides a variable DC voltage. A configurator dynamically converts the variable DC voltage to a selected DC voltage to provide the power. A set of switches combines the solar voltage with a substantially constant DC voltage. A control unit controls the set of switches and the configurator to provide the combined voltages at a selected voltage level. | 2014-05-01 |
| 20140117966 | CURVATURE-CORRECTED BANDGAP REFERENCE - A curvature-corrected bandgap reference is disclosed. The curvature-corrected bandgap reference comprises a Brokaw bandgap circuit. The Brokaw bandgap circuit includes an output node providing a reference voltage. The Brokaw bandgap circuit further comprising a first BJT device including a first base terminal coupled to the output node and a first emitter terminal. The first BJT device operates at a first current density that is substantially proportional to absolute temperature. The curvature-corrected bandgap reference also includes a second BJT device including a second base terminal coupled to the output node and a second emitter terminal. The second BJT device operates at a second current density that is substantially independent of temperature. Finally the curvature-corrected bandgap reference includes a correction voltage proportional to a voltage difference of the first and second emitter terminals, wherein the correction voltage substantially cancels a curvature of the reference voltage. | 2014-05-01 |
| 20140117967 | REFERENCE VOLTAGE GENERATION CIRCUIT - Provided is a reference voltage generation circuit including a first circuit including a variable resistor and a PN junction device connected in series. The variable resistor and the PN junction device connected in series have a first current, that has temperature characteristics corresponding to a nonlinear component of temperature characteristics of an inter-terminal voltage of the PN junction device, caused to flow therethrough. | 2014-05-01 |
| 20140117968 | SUPPLY VOLTAGE INDEPENDENT BANDGAP CIRCUIT - This application discusses apparatus and methods for reducing supply voltage induced band gap voltage variation. In an example, a method of compensating a reference voltage current source for supply voltage variation can include providing at least a portion if a reference current for establishing the reference voltage using a first output transistor coupled to the supply voltage, maintaining a constant voltage across the first output transistor using a second output transistor coupled between the first output transistor and an output node, modulating a compensation impedance between a first node and ground as the supply voltage varies, the first node located where the first output transistor is coupled to the second output transistor, and wherein the modulating includes modulating the compensation impedance to substantially equal an output impedance, the output impedance measured between an output node and an input for the supply voltage. | 2014-05-01 |
| 20140117969 | CONSTANT CURRENT SOURCE CIRCUIT - A current source includes a first MOS transistor of a first channel type including a drain connected to an output terminal, and a source directly connected to a first power supply, a second MOS transistor of the first channel type including a drain connected to a gate, the gate of the second MOS transistor being connected to the gate of the first transistor, and a source directly connected to the first power supply, a third MOS transistor of a second channel type opposite the first channel type including a drain connected to the drain of the second MOS transistor, a fourth MOS transistor of the second channel type including a drain connected to the source of the third MOS transistor, a gate connected to a first bias voltage, and a source directly connected to second power supply voltage, and a control voltage generator that detects an output voltage on the output terminal and provides a shifted version of the output voltage to the gate of the third MOS transistor. | 2014-05-01 |
| 20140117970 | Voltage-Current Characteristic Generator - Disclosed is a voltage-current characteristic generator that includes: a voltage source; a current source; a selector for selecting and outputting the output of either the voltage source or the current source; a sensing portion, connected to an output of the selector, for outputting the output of the selector and for sensing, and feeding back, the voltage and current of the output; and a controller for receiving the voltage and current detected by the sensing portion and for setting the subsequent outputs in the voltage source and the current source, wherein, in addition to setting the subsequent outputs, the controller evaluates an operating mode wherein the subsequent output from the selector is to be from either the voltage source or the current source. | 2014-05-01 |
| 20140117971 | SHIFT SENSOR AND VEHICLE INCLUDING THE SAME - A shift sensor includes a movable member, four movable contacts, seven fixed contacts, and two power supply terminals. Each of the movable contacts is fixed to the movable member and pivoted to a position corresponding to a shift position. Each of the fixed contacts outputs a shift signal when it is brought into conduction with a power supply terminal by coming into contact with any of the movable contacts. The fixed contacts are arranged such that the number of shift signals that differ between shift positions is three or more, between the shift positions of P, R, N, D, and B, except for between the D and B positions. | 2014-05-01 |
| 20140117972 | CURRENT DETECTION CIRCUIT - Provided is a current detection circuit which can reduce the resistance loss for a current transformer, meeting the requirements for size and cost thereof. The current detection circuit includes a current transformer and a capacitor connected across a secondary winding of the current transformer, the capacitor making a phase adjustment such that the primary side current flowing through the primary winding of the current transformer and the voltage across the capacitor are in phase with each other. With this configuration, the primary side current can be detected as the voltage across the capacitor with no need for using a matching resistor, with which, if the winding ratio of the current transformer is small, the resistance loss will be large, whereby a current detection circuit of low loss using a current transformer which is small in size and low in cost can be configured. | 2014-05-01 |
| 20140117973 | ANALYSIS METHOD FOR SIGNAL TIME MARGIN - An analysis method for a signal time margin is provided. An input signal is received. The input signal is extracted to obtain a primary waveform, at least one first secondary waveform and at least one second secondary waveform of the input signal. The first secondary waveform and the second secondary waveform are respectively located before and after the primary waveform. Quantities of the first secondary waveform and the second secondary waveform are counted to respectively generate a first quantity and a second quantity. According to the first quantity, the primary waveform and the first secondary waveform, first bit combinations are generated, and according to the second quantity, the primary waveform and the second secondary waveform, second bit combinations are generated. The first and second bit combinations are integrated to generate third bit combinations. Signal analysis is performed on the third bit combinations to obtain a signal time margin. | 2014-05-01 |
| 20140117974 | RSSI CIRCUIT WITH LOW VOLTAGE AND WIDE DETECTABLE POWER RANGE - An RSSI circuit with low voltage and wide detectable power range is provided, including a plurality of amplifiers connected in a cascade manner; a plurality of rectifiers, each of the plurality of rectifier having an input connected to an output of each of the plurality of amplifiers in turn; and a selector, connected to an output of each of the plurality of rectifiers for selecting an output among the outputs from the plurality of rectifiers. By using selector to select an output among outputs of the rectifiers, the RSSI circuit of the present invention can detect a wider power range with same voltage range because each stage can utilize the full voltage range. | 2014-05-01 |
| 20140117975 | MULTIPLEXER FOR VOLTAGE MEASUREMENT AND VOLTAGE MEASURING UNIT INCLUDING THE SAME - A multiplexer for voltage measurement includes: a first switch disposed on a first channel extending between at least one high-voltage input terminal and an output terminal; a plurality of second switches respectively disposed on second channels each extending between each of input terminals other than the high-voltage input terminal and the output terminal; and a third switch disposed between a group of the plurality of second switches and an output terminal side end of the first switch. Each of the first switch and the third switch is configured to operate even by a voltage higher than a power supply voltage. | 2014-05-01 |
| 20140117976 | INSULATED TEST CLIP COVER ASSEMBLY - An insulator for a test clip is described. The insulator includes a first clip cover configured to removably attach to a top portion of a test clip. The test clip comprises a top portion and a bottom portion pivotally attached to the top portion along a pivot axis. The insulator also comprises a second clip cover configured to removably attach to the bottom portion of the test clip. Each of the first and the second clip cover comprises one or more retaining elements configured to secure the clip cover to its respective portion of the test clip. In some implementations, each of the first and the second clip cover comprises one or more cantilevered retaining segments configured to extend over a portion of the test clip in order to secure the first and the second clip covers to the test clip. | 2014-05-01 |
| 20140117977 | SYSTEM AND METHOD FOR MONITORING AIRFLOW - A monitoring system for a powered system includes an electric energy sensor, a rotation sensor, and a monitoring device. The electric energy sensor is coupled with a blower to measure an amount of electric energy that powers the blower to draw air through an inlet duct and over one or more bodies to cool the bodies. The rotation sensor is coupled with the blower to measure a rotation speed at which the blower operates to draw the air through the inlet duct when the blower is powered with the amount of electric energy. The monitoring device compares the rotation speed of the blower with a designated speed limit that is associated with the amount of electric energy to determine if the inlet duct is at least partially blocked. The monitoring device identifies the inlet duct as being at least partially blocked when the rotation speed exceeds the designated speed limit. | 2014-05-01 |
| 20140117978 | ENCODER ELEMENT AND METHOD FOR THE MANUFACTURE THEREOF - A method is described for manufacturing an encoder element having a base body and a magnetic layer situated on the outer circumference of the base body, including the following steps: providing the base body; providing a magnetic or magnetizable powdery material; directly applying the powdery material to the outer circumference or to an end face of the base body to generate the magnetic layer in such a way that an integral, direct joint is created between the base body and the magnetic layer; and magnetizing the applied magnetic layer. | 2014-05-01 |
| 20140117979 | PROXIMITY SENSOR - The present disclosure relates to a proximity sensor having a coil ( | 2014-05-01 |
| 20140117980 | POSITION SENSING TRANSDUCER - A number of position sensors are disclosed. The position sensors are arranged to inductively sense the position of a target relative to a number of sensor coils. The target is arranged to magnetically couple with first and second coils so that signals are generated that depend on the relative position of the target and the first and second coils. The target extends along the measurement path and is inclined relative to the measurement path so that substantially all of the target overlaps with loops of the first coil and so that when a first end of the target is adjacent a first loop of the first coil, a second end of the target is adjacent a second loop of the first coil that has an opposite winding direction to that of the first loop. The second coil is arranged relative to the target such that the magnetic coupling between the second coil and the first end of the target is opposite to the magnetic coupling between the second coil and the second end of the target. | 2014-05-01 |
| 20140117981 | MOVING OBJECT DETECTION APPARATUS - A moving object detection apparatus includes a current mirror circuit including first and second transistors connected in parallel between a power source and ground and having gates connected to a ground-side terminal of the first transistor, first and second magnetoresistive elements having pin layers and respectively arranged between the first and second transistors and the ground, a constant voltage circuit, a voltage output circuit having third and fourth transistors respectively arranged between the first and second transistors and the first and second magnetoresistive elements and respectively applying constant voltages to the first and second magnetoresistive elements based on output of the constant voltage circuit when the output of the constant voltage circuit is applied to gates of the third and fourth transistors, and a fifth transistor arranged between the second and fourth transistors to operate according to a potential of a power-source-side terminal of the fourth transistor. | 2014-05-01 |
| 20140117982 | FILM MEASUREMENT - In one embodiment, a sample is tested by an eddy current sensor at two distances separated by a known incremental distance. In one aspect, at least one of an unknown distance of the sensor from the test sample and the film thickness of the test sample may be determined as a function of a comparison of sensor output levels of a single parameter and the known incremental distance to calibration data. In yet another aspect, the distance between the sensor and the test sample may oscillated to produce an oscillating sensor output signal having an amplitude and mean which may be measured and compared to calibration data to identify at least one of the unknown film thickness of a conductive film on a test sample, and the unknown distance of the test sample from the sensor. Other aspects and features are also described. | 2014-05-01 |
| 20140117983 | HALL SENSOR SEMICONDUCTOR COMPONENT AND METHOD FOR OPERATING THE HALL SENSOR SEMICONDUCTOR COMPONENT - The Hall sensor semiconductor component comprises an arrangement of at least two Hall sensors ( | 2014-05-01 |
| 20140117984 | ROTATIONAL INDEXING TO OPTIMIZE SENSING VOLUME OF A NUCLEAR MAGNETIC RESONANCE LOGGING TOOL - A nuclear magnetic resonance (NMR) logging tool assembly method that employs rotational indexing to optimize the sensing volume. At least some embodiments include establishing an initial arrangement of the permanent magnets and marking each magnet to indicate their relative rotational orientations in the initial arrangement. Thereafter a series of magnetic field measurements and individual magnet rotations are performed to improve uniformity of the magnetic field in the sensing volume. Once a satisfactory arrangement has been found, the magnets may be secured together and an antenna array installed along with the electronics for performing relaxation time measurements and providing logs of formation properties that can be derived therefrom, such as porosity, permeability, density, rock type, fluid type, etc. The tool may be packaged as a wireline sonde, a tubing-conveyed logging tool, or a logging while drilling (LWD) tool. | 2014-05-01 |
| 20140117985 | METHOD AND MAGNETIC RESONANCE APPARATUS TO GENERATE RAW DATA SETS FROM DOUBLE ECHO DATA ACQUISITIONS - In a method and magnetic resonance apparatus to create two raw data sets from double echo exposures of an imaging area located in a measurement volume of the magnetic resonance system, two echo signals are acquired in the form of raw data sets at different times, and k-space corresponding to the imaging area is either scanned completely only for the first raw data set and incompletely for the second raw data set, or is scanned completely only for the second raw data set and incompletely for the first raw data set. The completion of the incomplete raw data set takes place using a model that is based on the completely scanned raw data set. | 2014-05-01 |
| 20140117986 | METHOD AND MAGNETIC RESONANCE SYSTEM TO GENERATE RAW DATA SETS IN A DOUBLE ECHO ACQUISITION SEQUENCE - In a method, a magnetic resonance apparatus and non-transitory, a computer-readable storage medium, two raw data sets are created using at least one double-echo acquisition of an imaging area located in a measurement volume of the magnetic resonance apparatus. In the acquisition and storage of two echo signals in the form of raw data sets at different times, a second echo signal is not acquired after each and every radiated RF excitation pulses. | 2014-05-01 |
| 20140117987 | MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD - According to one embodiment, a magnetic resonance imaging apparatus includes a data acquiring unit and a data processing unit. The data acquiring unit is configured to acquire magnetic resonance signals according to an imaging condition for applying a first off-resonance radio frequency pulse after an application of an excitation pulse and before a readout of the magnetic resonance signals, and applying a second off-resonance radio frequency pulse after the readout of the magnetic resonance signals and before an application of a following excitation pulse. The first off-resonance radio frequency pulse generates a phase shift in the magnetic resonance signals. The second off-resonance radio frequency pulse compensates the phase shift. The data processing unit is configured to obtain information to be obtained by data processing of the magnetic resonance signals. | 2014-05-01 |
| 20140117988 | MAGNETIC RESONANCE HYPERPOLARIZATION AND MULTIPLE IRRADIATION PROBE PROBE HEAD - A hyperpolarization and multiple irradiation probe head, suitable for use in connection with magnetic resonance techniques (DNP-NMR, photo-DNP-NMR, ENDOR-EPR, MRI, DNP-MRI), comprising a RF transducer for generating and detecting a RF signal, wherein said RF transducer has a conducting element ( | 2014-05-01 |
| 20140117989 | PROTECTIVE COVER FOR MRI - A protective cover for an open bore MRI is disclosed. The cover comprises a semi-permeable barrier, MRI shielding, and physical shielding; is at least partially transparent; and it comprises fluid connection means for providing a fluid connection between an inner open bore of said open bore MRI and an environment external to said open bore MRI. | 2014-05-01 |
| 20140117990 | Body Coil for Magnetic Resonance Imaging - A body coil includes a first end ring and a second end ring provided at two ends thereof. The first end ring and the second end ring are connected to each other with a plurality of legs. The first end ring or the second end ring has a structure with the current flow width in a direction parallel to the axis thereof being greater than that in a direction perpendicular to the axis thereof. Since the effective action width of the current is increased in the axial direction and the centralized flow of the current in the end ring is reduced, the local specific absorption rate of radio frequency induced by the magnetic field is therefore reduced. | 2014-05-01 |
| 20140117991 | GLOW PLUG INSPECTING METHOD, GLOW PLUG MANUFACTURING METHOD, SHEATHED HEATER INSPECTING METHOD, AND SHEATHED HEATER MANUFACTURING METHOD - A method of inspecting a glow plug including an inner conductor and an outer disposed member, where the inner conductor includes an electrically conductive heating unit and an energization member to provide an energization path to the heating unit, and the outer disposed member includes a housing for the heating unit and a metal tubular member disposed on an outer periphery of the energization member. The method includes inspecting for the presence of short circuit abnormality based on a value that varies in response to a current that flows through the inner conductor upon application of a high voltage higher than a voltage applied during normal use of the glow plug to the inner conductor for a time short enough to suppress a temperature rise of the inner conductor due to application of the high voltage. | 2014-05-01 |
| 20140117992 | Starter Motor Testing Device - A control test device for testing a dual starter system has a first and a second starter. Each starter has a starter electrical interface including a starter start signal interface and a starter status signal interface. The control test device includes a first and a second communication interface for communicating a test signal to the first and second starter respectively. Each communication interface includes an electrical interface for interfacing with the first and second starter electrical interface. The test signal includes a start signal and a status signal. The start signal interfaces with one of the first and second starters start signal interface. The status signal sends a simulated status of the other one of the first and second starters to the one of the first and second starters start interface. A switch mechanism commands the start signal to one of the first and second starters. | 2014-05-01 |
| 20140117993 | TEST METHOD AND TEST APPARATUS FOR TRANSPARENT DISPLAY DEVICE - Embodiments of the invention provide a test method and a test apparatus for a transparent display device. The test apparatus for the transparent display device comprises: an optical measuring device disposed on one side of the transparent display device to be tested, and a reference object disposed on the other side of the transparent display device to be tested. A brightness of the transparent display device to be tested is adjustable, and the optical measuring device measures a display effect of the reference object through the transparent display device to be tested which is set to different brightness. | 2014-05-01 |
| 20140117994 | CALIBRATING A LIGHTING DEVICE COMPRISING A SEMICONDUCTOR LIGHT SOURCE - In various embodiments, a method for calibrating a lighting device is provided. The lighting device may include at least one semiconductor light source. The method may include: determining a thermal power loss of the at least one semiconductor light source; determining an electrical power of the at least one semiconductor light source; and determining a light power of the at least one semiconductor light source from the electrical power and the thermal power loss. | 2014-05-01 |
| 20140117995 | METHODS AND APPARATUS FOR TESTING AN ELECTRONIC TRIP DEVICE - An electronic trip device is described that includes a test current generator and a leakage current detection circuit. The test current generator is coupled to a conductor and configured to provide a test current having a magnitude to the conductor in response to a selection to test the electronic trip device. The conductor is a line conductor or a neutral conductor. The leakage current detection circuit is configured to detect a current difference between the neutral conductor and the line conductor. The leakage current detection circuit is configured to provide, in response to the selection to test the electronic trip device, a tripless error indication if the detected current difference is less than a first threshold value. | 2014-05-01 |
| 20140117996 | TEST SYSTEM FOR A BATTERY PACK AND A METHOD FOR TESTING THE BATTERY PACK - A test system for a battery pack having at least first and second battery modules is provided. The system includes a high voltage service disconnect assembly having a housing and an electrically-actuated switch. The system further includes a microprocessor that generates a first signal to induce the switch to have a closed operational position to electrically couple the first battery module to the second battery module. The sensor generates a second signal associated with the battery pack. The microprocessor stops generating the first signal to induce the switch to have an open operational position to electrically decouple the first battery module from the second battery module when the first signal is greater than a threshold level. | 2014-05-01 |
| 20140117997 | Battery Pack Maintenance for Electric Vehicle - A method and apparatus for repairing or testing a used battery pack from an electric vehicle include removing the battery pack from the vehicle. Battery tests are performed on at least some of the plurality of batteries and battery test results for each of the batteries tested are obtained. A cradle is configured to receive at least two different types of batteries. The cradle includes connectors to electrically couple circuitry of a battery tester to the battery. | 2014-05-01 |
| 20140117998 | DISPLAY DEVICE AND BONDING TEST SYSTEM - A display device includes a display panel having a glass substrate, a first input pad formed on the glass substrate and a second input pad formed on the glass substrate, and a driver integrated circuit mounted on the glass substrate of the display panel using a chip-on-glass (COG) method. The driver integrated circuit includes first and second input bumps respectively coupled to the first and second input pads, and an internal ground line coupled to the first and second input bumps. The first input bump of the driver IC receives a test signal through the first input pad when a COG bonding test is performed, and receives a ground voltage when the display device operates. | 2014-05-01 |
| 20140117999 | FAULT DIAGNOSIS SYSTEM, FAULT DIAGNOSIS DEVICE, FAULT DIAGNOSIS METHOD, PROGRAM, COMPUTER-READABLE MEDIUM, AND DEVICE UNDER TEST - A fault diagnosis method utilizing a fault diagnosis system for diagnosing a photovoltaic module by estimating a fault location, the fault diagnosis system including a signal generator for generating and inputting an input signal into a positive terminal or a negative terminal of the photovoltaic module, a waveform observer for observing a reflected output signal from an open end or the fault location, a diagnosis unit for estimating the fault location based on the output signal, a conductive body, and an alignment unit for controlling the positions of the conductive body and/or the photovoltaic module. The diagnosis method includes controlling the positions of the conductive body and/or the photovoltaic module, observing the output signal of the input signal, and estimating the fault location based on two reflected output signals of input signals inputted into the positive terminal and the negative terminal of the photovoltaic module. | 2014-05-01 |
| 20140118000 | CURRENT DIFFERENTIAL PROTECTION - A current differential protection system for a multi-terminal power line includes a current sensor for sensing a current at a local terminal, a controller for time synchronizing the local terminal and remote terminals, and a fault detection module to detect a fault in the multi-terminal power line if a differential current exceeds a threshold value. The controller includes a time measurement exchange module for exchanging time stamp data with remote terminals, an upper range clock for exchanging time stamp data with remote terminals and a lower range clock for indexing the current at the local terminal. A first time period of the upper range clock is N times a second time period of the lower range clock where N is a number of multi-terminals. The controller includes a clock offset calculation module for determining an average time offset based on time stamp data from remote terminals and the local terminal. | 2014-05-01 |
| 20140118001 | FAULT CURRENT DETECTING CIRCUIT - The fault current detecting circuit includes: a current detection unit that outputs a current detection signal; a first comparing circuit unit that compares the current detection signal with a predetermined reference current value and outputs a first output signal; a differentiator that differentiates the current detection signal to output a change slope of the current detection signal; a second comparing circuit unit that compares the change slope with a predetermined reference change slope value and outputs a second output signal; a third comparing circuit unit that compares the current detection signal with a predetermined current detection limit reference value and output a third output signal; and a trip determining unit that outputs a trip control signal only when the first output signal and the second output signal are maintained to be received and the third output signal is not received. | 2014-05-01 |
| 20140118002 | DISCONNECTION DETECTING APPARATUS AND METHOD - Provided is a disconnection detecting apparatus for detecting whether there is a disconnection between a current signal output device and an external device receives the current signal of a PLC analog current output module. The disconnection detecting apparatus according to an embodiment includes a monitoring unit generating different voltages according to whether a current signal input from the current signal output device is applied to the external device, a reference voltage generating unit generating a reference voltage, a comparing unit outputting a voltage according to a result obtained by comparing the voltage generated from the monitoring unit with the reference voltage, and a switching unit outputting a disconnection detecting signal on the basis of the voltage output from the comparing unit. | 2014-05-01 |
| 20140118003 | Fault diagnosis and preliminary location system and method for transformer core looseness - This invention publishes a fault diagnosis and location system for transformer core looseness, consists of vibration sensors, data collection and computer. It is of power transformer fault intelligent diagnosis technology technical field. Fault diagnosis and location method uses three vibration sensors positioned on the top of transformer tank, to obtain vibration signal, uses signal processing to analyze the signal, and obtains fault characteristics of the transformer core looseness. The characteristics respectively are 50 Hz, 150 Hz and 300 Hz frequency components, in which 300 Hz is main feature. When they reach a certain value at one position, it suggests that transformer core looseness near this position. By the comparison of differences among signals of three positions, fault location can be done. This invention manifests fault characteristics accurately and detects core looseness efficiently. | 2014-05-01 |
| 20140118004 | Measurement Structure for Radio Frequency Scattering Parameter Measurement Applying Two Calibrators and Calibration Method Thereof - The present invention provides a measurement structure for radio frequency (RF) scattering parameter measurement applying two calibrators and a calibration method thereof, comprising an offset series device calibrator, an offset shunt device calibrator and a tested object measuring instrument. Herein the lengths of the transmission lines for the offset series device calibrator and the offset shunt device calibrator and the one of the transmission line for the tested object measuring instrument are equivalent such that the offset series device calibrator, the offset shunt device calibrator and the tested object measuring instrument have the identical error box. After having acquired the scattering parameter matrix for the error box through the calibration method, it is possible to connect a tested electronic device onto the tested object measuring instrument and perform operations on the uncorrected measurement data thereby obtaining the RF scattering parameters of the tested object. | 2014-05-01 |
| 20140118005 | MECHANICAL COMPONENT AND MANUFACTURING METHOD FOR A MECHANICAL COMPONENT - A mechanical component has: a mounting; a movable part which, with the aid of at least one first spring and one second spring, is connected to the mounting in such a way that the movable part is movable about a rotational axis extending through a first anchoring area of the first spring on the mounting and a second anchoring area of the second spring on the mounting; a first sensor device with at least one first resistor which is situated on and/or in the first spring; and a second sensor device with at least one second resistor situated on and/or in the second spring. The first sensor device includes a first Wheatstone half bridge and the second sensor device includes a second Wheatstone half bridge. The first and second Wheatstone half bridges are connected to form a Wheatstone full bridge. | 2014-05-01 |
| 20140118006 | COMMUNICATION APPARATUS AND ASSOCIATED ESTIMATION METHOD - A communication apparatus and an associated estimation method are provided. The communication apparatus is electrically connected to a loading terminal and operates at a common bias voltage. The communication apparatus includes a transmitter, a connector, and a receiver. The connector includes a bridging circuit and a measurement circuit. The bridging circuit has a positive measurement end and a negative measurement end. The transmitter transmits an analog output signal. The receiver receives a common bias voltage during an estimation process. During the estimation process, the measurement circuit estimates a positive loading resistance and a negative loading resistance corresponding to the loading terminal according to a voltage difference between the common bias voltage and voltage at one of the positive measurement end and the negative measurement end. | 2014-05-01 |
| 20140118007 | CONTROLLER AND METHOD FOR COLLISION DETECTION - A method for detecting a signal activity on a bus comprises measuring a current on the bus, and determining a signal activity based on the measured current. | 2014-05-01 |
| 20140118008 | SYSTEMS AND METHODS FOR USE IN DETERMINING HAZARDOUS CHARGING CONDITIONS - A charge detection device includes a dielectric member, a base plate coupled to the dielectric member, and a processing unit coupled to the plate. The dielectric member is representative of at least one material on a location of a vessel and the dielectric member induces an electrostatic potential energy when charged. The plate channels the induced energy through at least a portion of the device. The plate further receives at least one signal that is representative of an electrostatic discharge from a different location of the vessel. The processing unit generates at least one first output of a measurement for the induced energy. The processing unit further generates at least one second output of the presence of the electrostatic discharge to facilitate a correlation between the first and second outputs such that a user is enabled to determine the presence of at least one hazardous charging condition on the vessel. | 2014-05-01 |
| 20140118009 | CAPACITIVE SENSING COMPONENT, PREPARATION METHOD THEREOF AND TOUCH SCREEN HAVING THE SAME - A capacitive sensing component includes a substrate and a patterned sensing layer formed on the substrate; the patterned sensing layer includes a plurality of sensing electrodes, the plurality of sensing electrodes are formed of a metal mesh laying on the substrate. The cost of the capacitive sensing component is low. A preparation method of a capacitive sensing component and a touch screen are also provided. | 2014-05-01 |
| 20140118010 | MULTIPLE-EXCITATION MULTIPLE-RECEIVING (MEMR) CAPACITANCE TOMOGRAPHY - A method for operating a sensor, including simultaneously exciting a first set of electrodes and sensing an output of each electrode of a second set of electrodes, storing output data corresponding to the output of each electrode of the second set of electrodes in a memory storage device, shifting at least one electrode from the first set of electrodes to the second set of electrodes and at least one electrode from the second set of electrodes to the first set of electrodes, and repeating the simultaneously exciting and sensing, the storing, and the shifting until an output data has been stored for each possible pair of electrodes in the first and second set of electrodes. | 2014-05-01 |
| 20140118011 | Method and Sensor Device for the Detection of a Gripping of a Hand-Held Device - A method for the detection of a gripping of a hand-held device with one hand, using a capacitive sensor device, uses at least one transmitting electrode, at least one compensating electrode and at least one receiving electrode. An electrical signal is tapped at the receiving electrode and the sensor device can be operated in a first operating mode and in a second operating mode. In the first operating mode, a first alternating electrical signal is applied to the transmitting electrode and a second alternating electrical signal is applied to the compensating electrode. In the second operating mode, the second alternating signal is only applied to the compensating electrode. Furthermore, a sensor device can be provided which is configured to perform the method as described above. | 2014-05-01 |
| 20140118012 | Sensor Device as Well as Method for Proximity and Touch Detection - A sensor device has a first electrode structure and a second electrode structure, the first electrode structure has a transmitting electrode, a compensation electrode and a reception electrode and the second electrode structure has a field transmission electrode and at least one field sensing electrode. The first electrode structure is adapted to detect a gripping of an electric hand-held device, whereas the second electrode structure is adapted to detect an approach of a finger to the second electrode structure, for example of the hand gripping the hand-held device. | 2014-05-01 |
| 20140118013 | METHOD AND DEIVCE FOR MEASURING CURRENT - A method and an electronic device are disclosed for measuring a current. The device measures a temperature between a first sampling point and a second sampling point on a metal structure carrying a current to be measured. The device outputs a first signal according to the measured temperature and a second signal after sampling and filtering the first signal. The device detects the first voltage signal at the first sampling point and the second voltage signal at the second sampling point. The device samples and filters a difference between the first voltage signal and the second voltage signal and outputs a third voltage signal. The device restores the second signal to a temperature value representing a temperature between the first sampling point and the second sampling point and calculates a resistance value between the first sampling point and the second sampling point according to the temperature value. | 2014-05-01 |
| 20140118014 | POWER GENERATING COMPONENT CONNECTIVITY RESISTANCE - Power generating component connectivity resistance monitoring techniques are disclosed. In an array of power generating components that are connected in parallel to a power bus, a power generating component measures an output current that it supplies to the power bus. Respective first and second power generating components measure a first voltage at an output of the first power generating component and a second voltage at an output of the second power generating component. A resistance in the array between first and second connection points in the array through which the output current flows is determined based on the measurements of the output current, the first voltage, and the second voltage. | 2014-05-01 |
| 20140118015 | Concurrent Transformer Test System and Method - A tester for testing a transformer is provided. The tester comprises a primary voltmeter and a plurality of secondary voltmeters. The tester may also comprise an ammeter in series with a voltage source configured to apply voltage to the transformer. The primary voltmeter is configured to measure voltage induced across a primary winding of the transformer, while the secondary voltmeters may simultaneously measure voltage outputs at secondary windings of the transformer. The tester is configured to calculate ratios, saturation curves, and knee points for multiple winding combinations based on the measurements simultaneously obtained by the ammeter and the primary and secondary voltmeters. | 2014-05-01 |
| 20140118016 | Probes With Spring Mechanisms For Impeding Unwanted Movement In Guide Holes - Elongated flexible probes can be disposed in holes of upper and lower guide plates of a probe card assembly. Each probe can include one or more spring mechanisms that exert normal forces against sidewalls of holes in one of the guide plates. The normal forces can result in frictional forces against the sidewalls that are substantially parallel to the sidewalls. The frictional forces can reduce or impede movement parallel to the sidewalls of the probes in the holes. | 2014-05-01 |
| 20140118017 | MULTILAYER WIRING BASE PLATE AND PROBE CARD USING THE SAME - A multilayer wiring base plate includes an insulating plate including a plurality of synthetic resin layers made of an insulating material, a wiring circuit provided in the insulating plate, a thin-film resistor formed along at least one of the synthetic resin layers to be buried in the synthetic resin layer and inserted in the wiring circuit, and a heat expansion and contraction restricting layer formed to be buried in the synthetic resin layer adjacent to the synthetic resin layer in which the thin-film resistor is formed to be buried, arranged along the thin-film resistor, and having a smaller linear expansion coefficient than a linear expansion coefficient of the adjacent synthetic resin layers. | 2014-05-01 |
| 20140118018 | INSPECTION UNIT, PROBE CARD, INSPECTION DEVICE, AND CONTROL SYSTEM FOR INSPECTION DEVICE - An inspection unit in which a probe card is united with a connection body via a vacuum chamber. It prevents flatness of tips of probes provided on the probe card from worsening when the probe card is united with a connection body by suction force (negative pressure) of the vacuum chamber. The inspection unit includes a probe card with probes on a first surface and a connection body united with a second surface of the probe card via a first vacuum chamber. The first chamber is formed with a plurality of chambers. | 2014-05-01 |
| 20140118019 | METHOD OF TESTING A SEMICONDUCTOR STRUCTURE - A method of testing a semiconductor structure is provided, including providing at least a semiconductor structure having an interposer and a semiconductor element disposed on the interposer; disposing the semiconductor structure on a carrier having a supporting portion, with the interposer being supported by the supporting portion; and performing a test process. The semiconductor structure has been tested for its electrical performance prior to packaging, thereby eliminating the necessity for a conductive pathway to pass through an inner circuit of an package substrate. Therefore, the testing process is accelerated and the time is save. | 2014-05-01 |
| 20140118020 | STRUCTURES AND METHODS FOR DETERMINING TDDB RELIABILITY AT REDUCED SPACINGS USING THE STRUCTURES - A structure for TDDB measurement, a method determining TDDB at reduced spacings. The structure includes an upper dielectric layer on a top surface of a lower dielectric layer, a bottom surface of the upper dielectric layer and the top surface of the lower dielectric layer defining an interface; a first wire formed in the lower dielectric layer; a second wire formed in the upper dielectric layer; and wherein a distance between the first wire and the second wire measured in a direction parallel to the interface is below the lithographic resolution limit of the fabrication technology. | 2014-05-01 |
| 20140118021 | SYSTEM AND METHOD FOR SELECTING A DERATING FACTOR TO BALANCE USE OF COMPONENTS HAVING DISPARATE ELECTRICAL CHARACTERISTICS - A test system and method for selecting a derating factor to be applied to a ratio of transistors having disparate electrical characteristics in a wafer fabrication process. In one embodiment, the test system includes: (1) structural at-speed automated test equipment (ATE) operable to iterate structural at-speed tests at multiple clock frequencies over integrated circuit (IC) samples fabricated under different process conditions and (2) derating factor selection circuitry coupled to the structural at-speed ATE and configured to employ results of the structural at-speed tests to identify performance deterioration in the samples, the performance deterioration indicating the derating factor to be employed in a subsequent wafer fabrication process. | 2014-05-01 |
| 20140118022 | MODULAR TESTING OF A POWER SUPPLY - A system and method for testing a power supply. A power-end of the power supply is received in a power port of a power supply tester. Information about the power supply is received. A load is dynamically configured for the power supply in response to the information. The power supply tester is automatically activated to power the power supply in response to the power supply being received by the power supply tester and the load being configured. Performance characteristic of the power supply are measured. The performance characteristics of the power supply are displayed to the user indicating functionality of the power supply. | 2014-05-01 |
| 20140118023 | EFFICIENT RESOURCE STATE DISTILLATION - Systems and methods are provided for generating at least one high fidelity resource state. A classical code and punctured to provide a first set of generators and a second set of generators. The first set of generators is mapped to a set of stabilizer generators, and the second set of generators is mapped to a set of logical operators. A set of resource states are prepared in physical qubits. A decoding process is performed on the resource states according to a quantum code represented by the set of stabilizer generators and the set of logical operators, and qubits corresponding to the stabilizers are measured. | 2014-05-01 |
| 20140118024 | EFFICIENT TOFFOLI STATE GENERATION FROM LOW-FIDELITY SINGLE QUBIT MAGIC STATES - Systems and methods are provided for generating a high-fidelity Toffoli state from a plurality of low-fidelity single qubit magic states. First and second qubits are prepared in a high-fidelity initial state. N target qubits are prepared in the single qubit magic state. A series of gates are performed on the qubits, such that the system is in a state ½|000 | 2014-05-01 |
| 20140118025 | INPUT BUFFER CIRCUIT - There is provided an input buffer circuit having hysteresis characteristics. The input buffer circuit includes: a first operating unit performing a NOR operation on an input signal and a first signal; a second operating unit performing a NAND operation on the input signal and a second signal; and an inverting unit inverting outputs of the first and second operating units to generate a second signal and a first signal, respectively, wherein reference levels of the first and second operating units determining a high or low level of the input signal are set to be different. | 2014-05-01 |
| 20140118026 | TECHNIQUES AND CIRCUITRY FOR CONFIGURING AND CALIBRATING AN INTEGRATED CIRCUIT - A technique for configuring an integrated circuit includes receiving configuration data from an external element with an interface circuit. The configuration data may include an identification field and an instruction for configuring a logic block. Configuration circuitry may be used to identify the logic block to be configured based on the identification field. A storage element in the identified logic block is configured by the configuration circuitry based on the instruction. | 2014-05-01 |
| 20140118027 | Mixed-Mode Circuits - An apparatus for processing signals, arranged on an integrated circuit, comprises at least one analog input port that receives an input signal from outside of the integrated circuit, and a detector that detects an operation state of the apparatus based on the input signal. The detector provides at least one digital control/enable signal, which is dependent on the operation state of the apparatus, to another apparatus arranged on the integrated circuit. | 2014-05-01 |
| 20140118028 | HIGH-PERFORMANCE ZERO-CROSSING DETECTOR - A zero-crossing detection circuit includes a comparator and circuitry. The comparator produces an output signal that is indicative of zero-crossing events in an input Alternating Current (AC) waveform. The circuitry may be configured to feed the comparator with first and second rails voltages, and to progressively increase the rails voltages during time intervals derived from the input AC waveform, so as to feed the comparator with target values of the rails voltages in time-proximity to the zero-crossing events. The circuitry may be configured to compensate for an error in detecting the zero crossing events caused by differences in amplitude of the input AC waveform, by correcting the input AC waveform provided to the comparator. The circuitry may be configured to activate the comparator during time intervals preceding respective anticipated times of the zero-crossing events, and to deactivate the comparator at least once during time periods other than the time intervals. | 2014-05-01 |
| 20140118029 | HIGH VOLTAGE OFFSET DETECTION CIRCUIT - A high voltage half-bridge driver circuit has a high voltage terminal and a floating node to be connected with a high side switch therebetween. When turning on the high side switch, a high voltage offset detection circuit detects a voltage related to the voltage at the floating node for triggering a zero voltage switching signal. | 2014-05-01 |
| 20140118030 | SAMPLING CIRCUIT AND SAMPLING METHOD - A sampling circuit and a sampling method are provided, where the sampling circuit includes a first delay chain, a second delay chain, and a half-speed binary-phase detector. The first delay chain is used to delay an input signal according to an up signal and a down signal, so as to generate a first delay signal; and the second delay chain is used to delay the first delay signal according to a preset delay value, so as to generate a second delay signal. The half-speed binary-phase detector is used to sample a data signal according to edge trigger of the first delay signal and that of the second delay signal, and generate an output signal, an up signal, and a down signal according to a sampling result of the data signal. | 2014-05-01 |
| 20140118031 | RF Pulse Edge Shaping - A radio frequency (RF) generation module includes a power control module that receives first and second desired amplitudes of an output of the RF generation module in first and second respective states, and that outputs, based on the first and second desired amplitudes, input power setpoints corresponding to a transition from the first state to the second state. A frequency control module receives the input power setpoints and outputs frequency setpoints corresponding to the input power setpoints. A pulse shaping module receives the input power setpoints, the frequency setpoints, and an indication of when to transition from the first state to the second state, and transitions the output of the RF generation module from the first state to the second state based on the input power setpoints, the frequency setpoints, and the indication. | 2014-05-01 |
| 20140118032 | Buck Converter Power Package - One exemplary disclosed embodiment comprises a semiconductor package including a vertical conduction control transistor and a vertical conduction sync transistor. The vertical conduction control transistor may include a control source, a control gate, and a control drain that are all accessible from a bottom surface, thereby enabling electrical and direct surface mounting to a support surface. The vertical conduction sync transistor may include a sync drain on a top surface, which may be connected to a conductive clip that is coupled to the support surface. The conductive clip may also be thermally coupled to the control transistor. Accordingly, all terminals of the transistors are readily accessible through the support surface, and a power circuit, such as a buck converter power phase, may be implemented through traces of the support surface. Optionally, a driver IC may be integrated into the package, and a heatsink may be attached to the conductive clip. | 2014-05-01 |
| 20140118033 | GLITCHLESS CLOCK SWITCHING THAT HANDLES STOPPED CLOCKS - An integrated circuit receives a first and second clock signal and a select signal that selects one of the clock signals. A glitchless switching circuit supplies an output clock signal according to which of the first and second clocks is selected by the select signal. A reset circuit coupled to the glitchless switching circuit responds to a direction of a transition of the select signal and generates a first reset signal in response to a first direction of the transition and generates a second reset signal in response to a second direction of the transition. The reset pulses are supplied respectively to first and second paths in the glitchless switching circuit to reset the state machine formed by the first and second paths in the event one of the input clocks is absent. | 2014-05-01 |
| 20140118034 | METHODS AND CIRCUITS FOR PROVIDING STABLE CURRENT AND VOLTAGE REFERENCES BASED ON CURRENTS FLOWING THROUGH ULTRA-THIN DIELECTRIC LAYER COMPONENTS - Low-power circuits for providing stable voltage and current references rely on currents flowing through ultra-thin dielectric layer components for operation. A current reference circuit includes driving circuitry operative to apply a voltage to the first terminal of the component with respect to the second terminal of the component in order to cause a current to flow through the dielectric layer, and sources a reference output current that is based on the current flow through the dielectric layer in response to the applied voltage. A voltage reference circuit includes a current source which applies a current to the ultra-thin dielectric layer component, and maintains an output node at a stable reference output voltage level based on the voltage across the ultra-thin dielectric layer component in response to the current flow through the dielectric layer. | 2014-05-01 |
| 20140118035 | CLOCK SIGNAL INITIALIZATION CIRCUIT AND ITS METHOD - A clock signal initialization circuit capable of preventing the operating frequency of a semiconductor integrated circuit from exceeding the maximum permissible frequency determined based on the power consumption of that semiconductor integrated circuit even when the PLL circuit is in a transient state at the start-up is provided. A clock signal initialization circuit for a semiconductor integrated circuit that operates in synchronization with a clock signal generated by a PLL circuit, includes a controller that derives a clock signal having a frequency no greater than a maximum permissible frequency determined based on a power consumption of the semiconductor integrated circuit as a supply clock signal to the semiconductor integrated circuit at least until the PLL circuit becomes a locked state after power-on. | 2014-05-01 |
| 20140118036 | STSTEM AND METHOD FOR CONTROLLING BYPASS OF A VOLTAGE REGULATOR - A voltage regulator bypass circuit to control bypass of a voltage regulator of an integrated circuit device, the voltage regulator bypass circuit including a first voltage detector, a second voltage detector, and circuit. The first voltage detector to detect that a core circuitry voltage level is above a first threshold and to assert a first detect signal at an output in response to the detection. The second voltage detector to detect that an unregulated supply voltage is above a second threshold and to assert a second detect signal at an output in response to the detection. The circuit having a first input coupled to the output of the first voltage detector and a second input coupled to the output of the second voltage detector, the circuit to bypass the voltage regulator in response the output of the latch being cleared. | 2014-05-01 |
| 20140118037 | PHASE-LOCKED LOOP - The PLL includes a voltage-controlled oscillator (VCO), a frequency down conversion circuit, a phase-frequency detector (PFD), and an adjusting circuit. The VCO is configured to generate an output dock signal. The frequency down conversion circuit is configured to receive the output dock signal and an auxiliary clock signal, and to mix the output clock signal and the auxiliary clock signal to generate a feedback clock signal. By detecting the strength of the feedback clock signal, it provides an auxiliary signal to adjust the frequency of the output clock signal. The PFD is configured to compare the frequencies and the phases of the feedback clock signal and a reference clock signal to generate an adjusting signal. The adjusting circuit is configured to receive the adjusting signal, and to adjust the frequency of the output clock signal generated by the VCO according to the adjusting signal. | 2014-05-01 |
| 20140118038 | PHASE CALIBRATION DEVICE AND PHASE CALIBRATION METHOD - A phase calibration device comprises: an oscillator for generating a reference clock; a phase-lock-loop for generating an input clock by the reference clock; a multiphase clock generator for generating a plurality of output clocks by the input clock; a selector for selecting one of the output clocks as an operation clock; an analog-to-digital convertor for performing analog-to-digital conversion to input data by the operation clock to generate a conversion result; a control circuit for generating parameters according to the conversion result and controlling the selector to do selection; and a phase calibration circuit for outputting a calibration signal and the input clock of the phase-lock-loop to the multiphase clock generator after restarting the phase-lock-loop, so that the multiphase clock generator can correctly regenerate the output clocks by the calibration signal and the input clock, and then the control circuit controls the selector to do selection by the parameters. | 2014-05-01 |
| 20140118039 | CHARGE PUMP CIRCUITS HAVING FREQUENCY SYNCHRONIZATION WITH SWITCHING FREQUENCY OF POWER CONVERTERS - A control circuit of a power converter is provided. The control circuit includes a switching circuit and a charge pump circuit. The switching circuit generates a switching signal for controlling the power converter. The charge pump circuit includes an oscillator for generating an oscillation signal synchronized with the switching signal. The oscillation signal is coupled to control a switch of the charge pump circuit for generating a voltage source. | 2014-05-01 |
| 20140118040 | SYNCHRONIZING CIRCUIT AND CLOCK DATA RECOVERY CIRCUIT INCLUDING THE SAME - A synchronizing circuit that is capable of generating a reproduced clock signal synchronized with a reference clock signal without causing a false lock and a clock data recovery circuit including the same are provided. To generate a clock signal synchronized with a reference clock signal associated with a data transition point that appears every predetermined period in an input data signal, the following false-lock avoidance processing is performed. That is, precharging of a first line is started when a phase control voltage applied to the first line by a charge pump falls below a lower-limit reference voltage, and the precharging of the first line is continued until the phase control voltage exceeds an upper-limit reference voltage. | 2014-05-01 |
| 20140118041 | MULTI PHASE CLOCK SIGNAL GENERATOR, SIGNAL PHASE ADJUSTING LOOP UTILIZING THE MULTI PHASE CLOCK SIGNAL GENERATOR, AND MULTI PHASE CLOCK SIGNAL GENERATING METHOD - A signal phase adjusting loop comprising a multiphase generator and a phase adjusting circuit. The multiphase generator comprises a ring phase shifting loop having a plurality of output terminals and phase shifting units. The ring phase shifting loop phase-shifts the delayed input clock signal to generate output clock signals with different phases, wherein the output clock signals are respectively output at different output terminals. The phase adjusting circuit receives one of the output clock signals and an input signal to adjust a phase of the input signal according to a phase of the one of the output clock signals. | 2014-05-01 |
| 20140118042 | METHOD FOR LOCKING A DELAY LOCKED LOOP - A method and apparatus for synchronizing a delay line to a reference clock. A delay line receives a clock input signal based on a reference clock and outputs a delay edge signal according to a control signal. An injector receives a first edge of the reference clock and in response to a first trigger, sends the clock input signal to the delay line. A synchronizer determines that the first edge has passed through the delay line, and in response, sends the injector a second trigger to send a second edge of the clock input signal to the delay line. An edge detector compares the timing of the first edge of the delay edge signal to a timing of the first edge of the reference edge signal. A control signal is sent to the delay line to decrease or increase the delay setting of the delay line based on the comparison. | 2014-05-01 |
| 20140118043 | PROGRAMMABLE DUTY CYCLE SETTER EMPLOYING TIME TO VOLTAGE DOMAIN REFERENCED PULSE CREATION - An improved programmable duty cycle generator and method of operation. In one aspect, the generated output signal duty cycle is not measured, but rather is generated based on a predetermined value. Saw tooth generator/Integrator schemes are used to create the saw type waveforms of the incoming frequency which in conjunction with DAC is used to create the desired duty cycle. The improved programmable duty cycle signal generator for placement in key pinch points of a critical path where precise duty cycle definition is needed. | 2014-05-01 |
| 20140118044 | DUTY CYCLE TUNING CIRCUIT AND METHOD THEREOF - A duty cycle tuning circuit and a method thereof are provided, in which the duty cycle tuning circuit includes multiple interpolation circuits, an edge detection circuit, and a delay chain. Each interpolation circuit receives multiple phase clocks, and interpolates an interpolation clock from two of the phase clocks. The phase clocks have the same frequency but different phases. The edge detection circuit is connected electrically to the delay chain, and generates an output clock according to an edge of the interpolation clock. | 2014-05-01 |
| 20140118045 | APPARATUS FOR CONTROLLING DUTY RATIO OF SIGNAL - Disclosed is an apparatus for controlling a duty ratio of a signal that includes a clock control unit configured to generate a plurality of control signals based on an input signal, a half-cycle generation unit configured to generate a multiplied signal by use of the input signal and a delay signal that is obtained by delaying the input signal based on a delay control voltage, and divide the multiplied signal to generate a first division signal and a second division signal that are in inverse relation to each other, a comparator unit configured to compare a pulse width of the first division signal with a pulse width of the second division signal based on the control signal provided by the clock control unit, and output a delay control signal corresponding to a result of the comparison, and a control voltage generation unit configured to output a delay control voltage. | 2014-05-01 |
| 20140118046 | STATE RETENTION POWER GATED CELL - A state retention power gated (SRPG) cell includes an input control circuit having an input coupled to an input signal and an output. The input control circuit includes has transistors configured as a first inverter transmission gate. The transistors also connect in series at least one transistor controlled by a power gating signal. A first latch has an input coupled to the output of the input control circuit and an output. A transmission gate has an input coupled to the output of the first latch and an output that is an output of the SRPG cell. A second latch has an input coupled to the output of the transmission gate and an output that also is an output of the SRPG cell. A second inverter transmission gate has an input coupled to the output of the second latch. | 2014-05-01 |
| 20140118047 | Method and Apparatus for Clock Transmission - Apparatus and methods are provided for an extraction circuit. In one configuration, an apparatus includes: an edge extraction circuit for receiving a first clock signal and outputting a second clock signal, wherein a duty cycle of the second clock is substantially smaller than a duty cycle of the first clock; a transistor for receiving the second clock signal and outputting a current signal; a transmission line for receiving the current signal on a first end and transmitting the current signal to a second end; a termination circuit for receiving the current signal at the second end and converting the current signal into a voltage signal; and an edge detection circuit for outputting a third clock by detecting an edge of the voltage signal. In one embodiment, the edge detection circuit comprises an inverter. In another embodiment, the edge detection circuit comprises a comparator. | 2014-05-01 |
| 20140118048 | Offset Cancel Circuit - An offset cancel circuit includes a first amplifying section, a second amplifying section, a third resistor connected between a non-inverting input terminal of the first amplifying section and a non-inverting input terminal of the second amplifying section, and a current source. In the offset cancel circuit, the current source causes a constant current to flow through the third resistor to cancel an offset voltage from output signals of first and second amplifying sections, the constant current corresponding to the offset voltage contained in first and second output signals output from a bridge resistance type sensor. | 2014-05-01 |
