18th week of 2020 patent applcation highlights part 73 |
Patent application number | Title | Published |
20200135940 | LIGHT SENSOR - A light sensor includes first and second neighboring photodiodes that are separated from each other by a space. A light-absorbing material is positioned at a location which is vertically above the space between the neighboring photodiodes. A first multilayer interference filter includes a central portion located vertically above the first photodiode and a peripheral portion that at least partly extends to rest on top of and in contact with the light-absorbing material. | 2020-04-30 |
20200135941 | Particulate Adherence and Temperature Reducing Coating for Photovoltaic Solar Panels - An inorganic coating mixture for a solar panel which cures to a protective layer upon the exposed surface of the transparent sheet of material covering a photovoltaic cell of a solar panel and a method therefor. The protective layer, so formed, reduces the operating temperature of the solar panel and deters the adherence of dust and other particulate matter to the exposed surface of the transparent sheet. | 2020-04-30 |
20200135942 | METHODS OF FORMING A COLORED CONDUCTIVE RIBBON FOR INTEGRATION IN A SOLAR MODULE - The present disclosure describes methods of forming a colored conductive ribbon for a solar module which includes combining a conductive ribbon with a channeled ribbon holder, applying a color coating to at least the conductive ribbon within the channel, curing the color coating on the conductive ribbon, and separating the conductive ribbon from the channeled holder. | 2020-04-30 |
20200135943 | SOLAR CELL, METHOD FOR MANUFACTURING SAME AND SOLAR CELL MODULE - The solar cell includes a plurality of light-receiving-side finger electrodes on a light-receiving surface of a photoelectric conversion section having a semiconductor junction. The light-receiving surface of the photoelectric conversion section is covered with a first insulating layer. Each light-receiving-side finger electrodes include: a first metal seed layer provided between the photoelectric conversion section and the first insulating layer; and a first plating metal layer being conduction with the first metal seed layer through openings formed in the first insulating layer. The solar cell includes an isolated plating metal layer pieces contacting neither the light-receiving-side finger electrodes nor the back-side finger electrodes. On the surface of the first insulating layer, an isolated plating metal crowded region is present in a form of a band-shape extending parallel to an extending direction of the light-receiving-side finger electrodes. | 2020-04-30 |
20200135944 | METHOD FOR MANUFACTURING SELECTIVE EMITTER USING SURFACE STRUCTURE AND SOLAR CELL INCLUDING SELECTIVE EMITTER USING SURFACE STRUCTURE - Proposed is a method for manufacturing a selective emitter using a surface structure, the method includes: preparing a wafer; forming fine first surface unevenness in each of front and rear faces of the wafer; forming a texturing-inhibiting film on each of the front and rear faces of the wafer; partially patterning the front texturing-inhibiting film to expose a portion of the front face of the wafer; forming second surface unevenness in the exposed portion of the wafer, wherein the second surface unevenness has a roughness greater and deeper than a roughness of the first surface unevenness; removing the texturing-inhibiting films; and forming a selective emitter on a surface of the wafer having the first surface unevenness and the second surface unevenness defined therein using a doping process. | 2020-04-30 |
20200135945 | SENSORS AND ELECTRONIC DEVICES - A photoelectric conversion device may include one or more pixel electrodes and an opposed electrode and a photoelectric conversion layer between the one or more pixel electrodes and the opposed electrode. The photoelectric conversion layer may be configured to absorb light of at least one part in a wavelength spectrum and to convert the absorbed light into an electrical signal. Each pixel electrode has an upper surface facing the photoelectric conversion layer, a side surface, and a non-angulated edge where the upper surface and the side surface meet. | 2020-04-30 |
20200135946 | METHOD FOR MANUFACTURING ORGANIC SOLAR CELL AND ORGANIC SOLAR CELL MANUFACTURED USING SAME - Provided is a disclosure relating to a method for manufacturing an organic solar cell comprising providing a substrate; forming a first electrode on the substrate; forming a photoactive layer by coating a solution comprising a photoactive material and a solvent on the first electrode; drying the photoactive layer in a closed drying system having a constant volume; and forming a second electrode on the photoactive layer, and an organic solar cell manufactured using the same. | 2020-04-30 |
20200135947 | SOLAR CELL - A solar cell includes an N-type silicon substrate, a P-type doped region, an anti-reflective layer, an n+ back surface field (BSF), aluminum electrodes, aluminum doped regions, and a backside electrode. The N-type silicon substrate has a first surface and a second surface opposite to the first surface. The P-type doped region is formed in the first surface of the N-type silicon substrate. The anti-reflective layer is formed on the P-type doped region. The aluminum electrodes are formed on the P-type doped region, and the aluminum doped regions are formed in the P-type doped region under the aluminum electrodes, wherein the aluminum doped regions are in direct contact with the aluminum electrodes. The n+ BSF is formed in the second surface of the N-type silicon substrate, and the backside electrode is formed on the second surface of the N-type silicon substrate. | 2020-04-30 |
20200135948 | SOLAR CELL AND SOLAR CELL MODULE - A back contact solar cell is suppressed in decrease of yield due to warp of a semiconductor substrate or short circuit of electrodes, and includes a semiconductor substrate; a semiconductor layer of a first conductivity type and a first electrode layer, sequentially laminated on a part of the back surface of the semiconductor substrate; and a semiconductor layer of a second conductivity type and a second electrode layer, sequentially laminated on another part of the back surface. Each of the first and second electrode layers comprises a base conductive layer and a plating layer covering the base conductive layer. The base conductive layer comprises a base bus bar part and a plurality of base finger parts. With respect to each one of the plurality of base finger parts, one end part and the other end part in the longitudinal direction are narrower than a middle part. | 2020-04-30 |
20200135949 | SENSING DEVICE AND SENSING METHOD - A device for sensing suspension operations or biometrics includes a light emitting module and a sensing layer. The light emitting module and the sensing layer are sequentially stacked. The light emitting module includes a plurality of light emitting elements emitting light near the infrared and the sensing layer includes a plurality of quantum dot thin film transistors. The quantum dot thin film transistor includes an active layer and quantum dots covering the active layer. The near-infrared light emitted by the plurality of light emitting elements is reflected by an animate object and received by the quantum dot thin film transistors. The sensing device can better sense suspension operations or biometrics. A method for the procedure is also disclosed. | 2020-04-30 |
20200135950 | Photovoltaic Devices and Methods - Photovoltaic devices, and methods of fabricating photovoltaic devices. The photovoltaic devices may include a first electrode, at least one quantum dot layer, at least one semiconductor layer, and a second electrode. The first electrode may include a layer including Cr and one or more silver contacts. | 2020-04-30 |
20200135951 | PHOTOELECTRIC CONVERSION ELEMENT, OPTICAL SENSOR, IMAGING ELEMENT, AND COMPOUND - The invention provides a photoelectric conversion element including a photoelectric conversion film excellent in vapor deposition suitability and exhibiting excellent photoelectric conversion efficiency in a case where the photoelectric conversion film is a thin film, an optical sensor, an imaging element, and a compound. The photoelectric conversion element of the embodiment of the invention includes a conductive film, a photoelectric conversion film, and a transparent conductive film, in this order, in which the photoelectric conversion film contains a compound represented by Formula (1). | 2020-04-30 |
20200135952 | PORTABLE SHINGLED SOLAR MODULES - The present disclosure describes a portable solar module including a plurality of strips, each strip including at least one bus bar formed on a top surface thereof. The solar module further includes electrically conductive adhesive electrically connecting each strip when applied to the strip where the strips are arranged to overlap one another to connect the strips in series, and at least one string of overlapped strips, wherein the portable solar module has an output of less than about 130 W and less than about 30V. | 2020-04-30 |
20200135953 | SOLAR CELL MODULE AND METHODS FOR FABRICATING THE SAME - Discussed is a solar cell module including a plurality of solar cells including a first electrode and a second electrode, the plurality of solar cells being disposed along a first direction and a plurality of wiring members connected to the first electrode of a first solar cell and the second electrode of a second solar cell, wherein each of the plurality of solar cells includes a first side surface of one side in the first direction, a second side surface having a larger surface roughness than the first side surface on another side, and a protrusion formed adjacent to the second side surface, and wherein the first and second solar cells are disposed with a gap of approximately 0.5 mm to 1.5 mm, and the first side surface of the second solar cell and the second side surface of the first solar cell are disposed to face each other. | 2020-04-30 |
20200135954 | SOLAR CELL WITH THREE LAYERS AND FORWARD BIASING VOLTAGE - Solar cells efficiency is improved, in a first approach, wherein the anode's “top contact” is relocated to the middle of a three-layer solar cell wafer, permitting maximum sunlight photons to excite free electrons in the anode and p-n junction, without causing obstruction or reflection of sunlight therein. In another embodiment, a rechargeable battery of at least 0.1v is used, to create forward biasing of electrons in a solar cell, having an impurity level that is less than 99.999999%. The anode and cathode of a silicon base solar cell is doped with more than one element, other than phosphorous and boron, to increase its performance and decrease its manufacturing cost. | 2020-04-30 |
20200135955 | Tunnel Heterojunctions in Group IV/ Group II-VI Multijunction Solar Cells - A photovoltaic cell comprises a first subcell formed of a Group IV semiconductor material, a second subcell formed of a Group II-VI semiconductor material, and a tunnel heterojunction interposed between the first and second subcells. A first side of the tunnel heterojunction is formed by a first layer that is adjacent to a top surface of the first subcell. The first layer is of a first conductivity type, is comprised of a highly doped Group IV semiconductor material. The other side of the tunnel heterojunction is formed by a second layer that adjoins the lower surface of the second subcell. The second layer is of a second conductivity type opposite the first conductivity type, and is comprised of a highly doped Group II-VI semiconductor material. The tunnel heterojunction permits photoelectric series current to flow through the subcells. | 2020-04-30 |
20200135956 | IMPLEMENTATION OF AN OPTIMIZED AVALANCHE PHOTODIODE (APD)/SINGLE PHOTON AVALANCHE DIODE (SPAD) STRUCTURE - A semiconductor device, sensor, and array of SPAD cubes are described. One example of the disclosed semiconductor device includes an array of single-photon avalanche diodes, each single-photon avalanche diode including an undepleted anode region, an undepleted cathode region, an active depleted region positioned between the anode region and cathode region, and at least one conductive trench extending between the anode region and cathode region. In some examples, the at least one conductive trench surrounds the active depleted region and reflects light back into the active depleted region such that one or more photons can be absorbed within the active depleted region even though an absorption coefficient of the light is greater than a thickness of the active depleted region. | 2020-04-30 |
20200135957 | DETECTION PANEL AND MANUFACTURING METHOD THEREOF - A detection panel and a manufacturing method of the same are provided. The detection panel includes: a photosensitive element configured to sense a first light beam incident to the photosensitive element to generate a photosensitive signal; a drive circuit configured to be coupled to the photosensitive element to acquire the photosensitive signal from the photosensitive element, the drive circuit including a switch element; and a reflective grating which is on a side of the drive circuit where the first light beam is incident, and is configured to reflect at least a portion of the first light beam incident toward the switch element. | 2020-04-30 |
20200135958 | SOLID-STATE NEUTRON DETECTOR - A method for fabricating a neutron detector includes providing an epilayer wafer of Boron-10 enriched hexagonal boron nitride (h- | 2020-04-30 |
20200135959 | ELECTRONIC DEVICE - An electronic device includes a plurality of double gate thin film transistors (DGTFT). The plurality of DGTFTs includes a first DGTFT, the first DGTFT includes a substrate, a first transparent conductive layer disposed above the substrate, and a first metal layer. The first metal layer is disposed corresponding to the first transparent conductive layer. The first metal layer is electrically connected to the first transparent conductive layer. | 2020-04-30 |
20200135960 | Method and Apparatus For Control and Suppression of Stray Light in a Photonic Integrated Circuit - In a photonic integrate circuit (PIC) architecture, non-guided stray light that is radiated from components, junctions, discontinuous and scattering points in an integrated optic device, may be received by an integrated waveguide structure in the path of the stray radiation. The integrated waveguide structure may comprise a plurality of collectors that are configured to collect the non-guided stray light from the radiating source. Each of the collectors may comprise an integrated waveguide with a front end that is tapered to increase the mode-field size and pointed toward the stray light source, and with a back end that is connected to a secondary waveguide. The collectors are placed in the path of the stray light and aligned in the propagation direction of the stray light. The collected stray light is guided to a light energy damper through the second waveguide for converting light energy into heat. | 2020-04-30 |
20200135961 | WINDOW COVER FOR SENSOR PACKAGE AND SENSOR PACKAGE INCLUDING SAME - An embodiment of the present invention provides a window cover for a sensor package and a sensor package including the same, the window cover comprising: a body; an element receiving unit disposed in the body so as to receive a light emitting element and a light receiving element of the sensor package; and a radiating unit disposed at a position corresponding to the light emitting element in the element receiving unit so as to change light generated from the light emitting element to a predetermined beam range and radiate the same. | 2020-04-30 |
20200135962 | SYSTEMS AND METHODS FOR FABRICATING PHOTOVOLTAIC DEVICES VIA REMOTE EPITAXY - A method of fabricating a photovoltaic (PV) device includes forming a release layer comprising a two-dimensional (2D) material on a first substrate having a first lattice constant and epitaxially growing a first PV layer on the release layer using the first substrate as a seed. The first PV layer has a second lattice constant substantially equal to the first lattice constant of the first substrate. The method also includes removing the first PV layer from the release layer and epitaxially growing a second PV layer on the release layer. | 2020-04-30 |
20200135963 | METHOD OF PREVENTING CONTAMINATION OF LED DIE - A method for allowing a reflective layer to abut against an edge of a metal contact while preventing contamination of a metal contact for an LED die is provided. The method includes encapsulating an electrical contact (i.e. metal contact) via with a barrier layer prior to deposition of a reflective film layer. The barrier layer encapsulates the metal contact by defining a mask pattern with a larger size than the metal contact via, which prevents the metal contact from becoming contaminated by the reflective film. This encapsulation reduces contamination of the metal contact and also reduces the voltage drop during operation of the LED die. | 2020-04-30 |
20200135964 | Optoelectronic Component Having a Layer with Lateral Offset Inclined Side Surfaces - An optoelectronic component and a method for producing an optoelectronic component are disclosed. In an embodiment the optoelectronic component includes a layer structure having an active zone for producing electromagnetic radiation, wherein the active zone is arranged in a first plane, wherein a recess is introduced into the surface of the layer structure, wherein the recess adjoins an end surface of the component, wherein the end surface is arranged in a second plane, wherein the second plane is arranged substantially perpendicularly to the first plane, wherein the recess has a bottom surface and a lateral surface wherein the lateral surface is arranged substantially perpendicularly to the end surface, wherein the lateral surface is arranged tilted at an angle not equal to 90° to the first plane of the active zone, and wherein the bottom surface is arranged in the region of the first plane of the active zone. | 2020-04-30 |
20200135965 | METHOD AND MANUFACTURING SYSTEM FOR PRODUCING MICROELECTRONIC COMPONENTS WITH A LAYER STRUCTURE - A method of producing microelectronic components includes forming a functional layer system; applying a laminar carrier to the functional layer system; attaching a workpiece to a workpiece carrier; utilizing incident radiation of a laser beam is focused in a boundary region between a growth substrate and the functional layer system, and a bond between the growth substrate and the functional layer system in the boundary region is weakened or destroyed; separating a functional layer stack from the growth substrate, wherein a vacuum gripper having a sealing zone that circumferentially encloses an inner region is applied to the reverse side of the growth substrate, a negative pressure is generated in the inner region such that separation of the functional layer stack from the growth substrate is initiated in the inner region; and the growth substrate held on the vacuum gripper is removed from the functional layer stack. | 2020-04-30 |
20200135966 | METHOD OF MANUFACTURING A LIGHT-EMITTING DEVICE - A method of manufacturing a light-emitting device includes providing a package having an upper surface and defining a recess, the recess having an opening at the upper surface. A light-emitting element is placed on a bottom surface of the recess of the package, and the recess of the package is filled with an uncured sealing member containing a silicone resin. The package is held in a liquid in a state in which the uncured sealing member is filled in the recess of the package, and the uncured sealing member is cured by heating the package in which the uncured sealing member is filled in the recess. | 2020-04-30 |
20200135967 | QUANTUM DOT DISPLAY DEVICE - A quantum dot display device includes a substrate, a quantum dot diode disposed on the substrate and including a first electrode, a second electrode, and a quantum dot layer between the first electrode and the second electrode, and an encapsulation film disposed on a surface of the quantum dot diode, wherein a water vapor transmission rate of the encapsulation film is about 0.001 to about 1 gram per square meter per day at 1 atmosphere of pressure. | 2020-04-30 |
20200135968 | LIGHT EMITTING BIPOLAR TRANSISTOR - A light emitting bipolar transistor, comprising at least:
| 2020-04-30 |
20200135969 | Semiconductor Component and Illumination Device - A semiconductor component and an illumination device is disclosed. In an embodiment the semiconductor component includes a semiconductor chip configured to generate a primary radiation having a first peak wavelength and a radiation conversion element arranged on the semiconductor chip. The radiation conversion element includes a quantum structure that converts the primary radiation at least partly into secondary radiation having a second peak wavelength and a substrate that is transmissive to the primary radiation. | 2020-04-30 |
20200135970 | MICRO-LED STRUCTURES FOR FULL COLOR DISPLAYS AND METHODS OF MANUFACTURING THE SAME - Micro-LED structures for full color displays and methods of manufacturing the same are disclosed. An apparatus for a micro-LED display includes a first portion of a nanorod and a second portion of the nanorod. The first and second portions including gallium and nitrogen. The apparatus includes a polarization inversion layer between the first portion and the second portion. The apparatus includes a cap at an end of the nanorod. The cap including a core and an active layer. The core including gallium and nitrogen. The active layer including indium. | 2020-04-30 |
20200135971 | DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME - There is provided a display device. The display device includes an optical structure disposed to increase the amount of light emitted from a light-emitting diode; and a bank coupled with the optical structure. | 2020-04-30 |
20200135972 | DISPLAY PANEL AND DISPLAY DEVICE - A display panel and a display device. The display panel includes a display area. The display area includes pixels in an array, pixels include at least three sub-pixels of different colors; display area includes a general display area, a transition display area, a photosensitive device setting area, general display area surrounds at least a part of transition display area, transition display area surrounds photosensitive device setting area; in transition display area, sub-pixels include display sub-pixels and virtual sub-pixels, sub-pixels include pixel circuits and light-emitting units, light-emitting units are electrically connected to pixel circuits in display sub-pixels, light-emitting units are insulated from pixel circuits in virtual sub-pixels; in photosensitive device setting area, sub-pixels include display sub-pixels; a setting density of display sub-pixels in transition display area is higher than that of the display sub-pixels in photosensitive device setting area, and lower than that of the display sub-pixels in general display area. | 2020-04-30 |
20200135973 | ELECTROLUMINESCENT DISPLAY PANEL AND DISPLAY DEVICE - An electroluminescent display panel and a display device are provided. In the embodiments of the disclosure, a photosensitive device is arranged in the photosensitive device arranging region. The extending line of at least one line is arranged in the photosensitive device arranging region so that the orthographic projection of the extending line on the light-emitting surface of the electroluminescent display panel overlaps with the first pixels in the first and second specific pixel groups in the photosensitive device arranging area; the first and second specific pixel groups include respective first pixels located in first straight lines of the second pixels correspondingly connected to two adjacent signal lines, the first and second specific pixel groups are adjacent in the second direction, and the first straight lines extend in the first direction. | 2020-04-30 |
20200135974 | III-NITRIDE DOWN-CONVERSION NANOMATERIAL FOR WHITE LEDS - A phosphor component that includes a plurality of nanowires absorbing light at one wavelength and emitting light at a longer wavelength, the longer wavelength being from about 495 nm to about 780 nm, each one of the plurality of nanowires being one of a nanowire described by a composition formula of InxGa1- | 2020-04-30 |
20200135975 | LIGHT EMITTING ELEMENT - A light emitting element includes: an n-side semiconductor layer made of a nitride semiconductor; a p-side semiconductor layer made of a nitride semiconductor; and an active layer disposed between the n-side semiconductor and the p-side semiconductor layer and having a multi-quantum well structure in which a plurality of nitride semiconductor well layers and a plurality of nitride semiconductor barrier layers are alternately stacked, wherein the light emitting element includes, between at least one of the plurality of well layers and the barrier layer disposed adjacent thereto on the p-side semiconductor side: a first layer and a second layer disposed successively from the well layer side. | 2020-04-30 |
20200135976 | MULTI-COLOR LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING SUCH A DEVICE - A light-emitting device including first, second, and third pixels, wherein: the first pixel includes a two-dimensional light-emitting cell including a vertical stack of a first semiconductor layer of a first conductivity type, of an active layer, and of a second semiconductor layer of the second conductivity type; each of the second and third pixels includes a three-dimensional light-emitting cell including a plurality of nanostructures of same dimensions regularly distributed across the surface of the pixel, each nanostructure including a doped pyramidal semiconductor core of the first conductivity type, an active layer coating the lateral walls of the core, and a doped semiconductor layer of the second conductivity type coating the active layer; and the nanostructures of the second and third pixels have different dimensions and/or a different spacing. | 2020-04-30 |
20200135977 | LIGHT-EMITTING DIODES WITH INTEGRATED OPTICAL ELEMENTS - The disclosure describes various aspects of using optical elements monolithically integrated with light-emitting diode (LED) structures. In an aspect, a light emitting device includes a single LED structure having an active region and a single optical element disposed on the LED structure and configured to collimate and steer light emitted by the LED structure. One or more additional optical elements may also be disposed on the LED structure. In another aspect, a light emitting device may include multiple LED structures and a single optical element disposed on the multiple LED structures and configured to collimate and steer light emitted by the multiple LED structures. For each of these aspects, the LED structure(s) and the optical element(s) are made of a material that includes GaN, the LED structure(s) has a corresponding active region, and the LED structure(s) has a corresponding reflective contact disposed opposite to the optical element(s). | 2020-04-30 |
20200135978 | LIGHT-EMITTING DEVICE - A light-emitting device includes a first semiconductor layer; a plurality of semiconductor pillars separated from each other and formed on the first semiconductor layer, the plurality of semiconductor pillars respectively includes a second semiconductor layer and an active layer; a first electrode covering one portion of the plurality of semiconductor pillars; and a second electrode covering another portion of the plurality of semiconductor pillars, wherein the plurality of semiconductor pillars under a covering region of the first electrode are separated from each other by a first space, the plurality of semiconductor pillars outside the covering region of the first electrode are separated from each other by a second space, and the first space is larger than the second space. | 2020-04-30 |
20200135979 | LIGHT EMITTING DEVICE - A light emitting device includes a base including a support having a support surface. A light emitting element includes a semiconductor layer and a sapphire substrate provided on the semiconductor layer opposite to the support surface. A light-transmissive covering member is provided on the sapphire substrate to sandwich the sapphire substrate between the semiconductor layer and the reflecting film. A light emitted from the semiconductor layer is configured to be extracted from the sapphire substrate between the semiconductor layer and the reflecting film. A height of the light-transmissive covering member viewed in a direction in which a width of the light-transmissive covering member appears smallest is 0.5 times or less of the width of the light-transmissive covering member. | 2020-04-30 |
20200135980 | Method for Producing an Optoelectronic Component and Optoelectronic Component - An optoelectronic component and a method for producing an optoelectronic component are disclosed. In an embodiment a method includes attaching a plurality of optoelectronic semiconductor chips on predetermined locations of an intermediate film, providing a cavity film with a plurality of separated openings, attaching the cavity film to the intermediate film such that each optoelectronic semiconductor chip is associated with a respective opening, wherein the cavity film is thicker than the optoelectronic semiconductor chips such that the cavity film exceeds the optoelectronic semiconductor chips in a direction away from the intermediate film, filling a casting material in each of the openings such that the optoelectronic semiconductor chips are casted with the casting material and removing the intermediate film. | 2020-04-30 |
20200135981 | OPTICAL DEVICE - An example of an optical device of the present disclosure includes a substrate, an obverse-surface conductive layer, a reverse-surface conductive layer, a first conductive part, an optical element and a reflector. The first conductive part extends through the substrate and overlaps with a first obverse-surface conducting region of the overse-surface conductive layer and the reverse-surface conductive layer as viewed in a thickness direction of the substrate. The reflector has an inner surface that surrounds the optical element as viewed in the thickness direction. The optical element is located on first obverse-surface conducting region, and the second obverse-surface conducting region is located between the first obverse-surface conducting region and the inner surface of the reflector as viewed in the thickness direction. A second obverse-surface conducting region of the overse-surface conductive layer is spaced apart from the inner surface of the reflector as viewed in the thickness direction. | 2020-04-30 |
20200135982 | STRAIN-INDUCING NANOSTRUCTURES FOR SPECTRAL RED-SHIFTING OF LIGHT EMITTING DEVICES - A nanostructure fabricated on a semiconductor light-emitting device induces strain in the active region. The active device includes at least one quantum heterostructure, in which the strain changes the extent of Quantum Confined Stark Effect, and thus modifies the wavelength of light emission. By mixing strain relaxation and strain induction effects there is a spectral broadening of the light emission, providing polychromatic light emission. | 2020-04-30 |
20200135983 | FLUORIDE PHOSPHOR AND LIGHT-EMITTING DEVICE USING SAME - Provided is a fluoride phosphor that has a good external quantum efficiency and is suitable for stably producing white LEDs. The fluoride phosphor has a composition represented by a general formula (1) and a repose angle of 30° or more and 60° or less. general formula: A | 2020-04-30 |
20200135984 | QUANTUM-DOT FILM, LED PACKAGE, QUANTUM-DOT LIGHT EMITTING DIODE AND DISPLAY DEVICE - A quantum-dot (QD) film, which includes a first QD layer including a first QD; and a first protection layer on the first QD layer and including a first organic compound, wherein the first organic compound includes at least two thiol groups, and a first one of the at least two thiol groups is anchored to the first QD, and an LED package, a QD light emitting diode and a display device including the QD film are provided. | 2020-04-30 |
20200135985 | LIGHT-EMITTING DEVICES AND METHOD FOR FABRICATING THE SAME - A light-emitting device is provided. The light-emitting device includes a substrate including a plurality of pixels, each pixel including a plurality of subpixels designed to emit light with different colors. The plurality of subpixels includes a first subpixel designed to emit red light, a second subpixel designed to emit green light, and a third subpixel designed to emit blue light. The first subpixel includes a first light source formed on the substrate, a red light-emitting layer covering the first light source, and a first yellow color filter covering the red light-emitting layer. The second subpixel includes a second light source formed on the substrate, a green light-emitting layer covering the second light source, and a second yellow color filter covering the green light-emitting layer. The third subpixel includes a third light source formed on the substrate. A method for fabricating the light-emitting device is also provided. | 2020-04-30 |
20200135986 | LIGHT-EMITTING DEVICE AND ILLUMINATION APPARATUS - A light-emitting device includes a wavelength conversion member including, in a dispersed manner, a first phosphor, a second phosphor, a third phosphor, a fourth phosphor, and a fifth phosphor, and a light emitter. The first phosphor has a peak in a wavelength region of 400 to 500 nm, the second phosphor in 450 to 550 nm, the third phosphor in 500 to 600 nm, the fourth phosphor in 600 to 700 nm, and a fifth phosphor in 680 to 800 nm. The light emitter emits light in an ultraviolet region of 380 to 430 nm. The light-emitting device has an emission spectrum in a region of 380 to 950 nm including peaks in regions of 380 to 430 nm, 430 to 480 nm, 480 to 550 nm, 550 to 650 nm, and 650 to 750 nm, and differences between relative light intensities at the peaks are less than 20%. | 2020-04-30 |
20200135987 | LIGHT EMITTING DEVICE - A light emitting device includes a light emitting element having a peak emission wavelength of 410 nm to 440 nm and a phosphor member. The phosphor member includes a first phosphor having a peak emission wavelength of 430 nm to 500 nm and containing an alkaline-earth phosphate, a second phosphor having a peak emission wavelength of 440 nm to 550 nm and containing at least one of an alkaline-earth aluminate and a silicate containing Ca, Mg, and Cl, a third phosphor having a peak emission wavelength of 500 nm to 600 nm and containing a rare-earth aluminate, a fourth phosphor having a peak emission wavelength of 610 nm to 650 nm and containing a silicon nitride containing Al and at least one of Sr and Ca, and a fifth phosphor having a peak emission wavelength of 650 nm to 670 nm and containing a fluorogermanate. | 2020-04-30 |
20200135988 | METHODS OF MODIFYING THE COMPOSITION OF MATERIAL LAYERS - Methods of modifying the composition of layers using selectively absorbing films are described. The composition of a layer can be modified by applying a selectively absorbing film in proximity to the applied coating and components of the layer can be selectively removed to provide a modified layers. The methods can be used to increase the concentration of particles in the layer. | 2020-04-30 |
20200135989 | LED CHIP MOUNTING METHOD AND DEVICE - An LED mounted method includes: providing a circuit substrate having a plurality of conductive pads; through a pick and place module, disposing a plurality of conductors on the conductive pads; disposing a plurality of LED chips on the circuit substrate, with each LED chip being disposed on at least two conductors; projecting a laser source generated by a laser generation module to each LED chip so that the laser source passes through the LED chip and is projected onto at least two conductors; and curing the conductor disposed between the LED chip and the circuit substrate by irradiation of the laser source so that the LED chip is mounted on the circuit substrate. | 2020-04-30 |
20200135990 | METHOD OF MANUFACTURING PACKAGE AND METHOD OF MANUFACTURING LIGHT-EMITTING DEVICE - A method of manufacturing a package includes providing a lead frame including a lead and a molded resin having an upper surface on which a depressed portion is formed to house a light-emitting element, the molded resin being formed integrally with the lead. The method further includes disposing the molded resin in a cavity of a mold in a state where the depressed portion of the molded resin is closed, and applying an ink to the upper surface of the molded resin and at least a portion of lateral surfaces of the molded resin by supplying the ink into the cavity, the ink having a darker color than an inner surface of the depressed portion. The method also includes removing the molded resin from the mold, the molded resin being applied with the ink. | 2020-04-30 |
20200135991 | LIGHTING DEVICE AND LIGHTING MODULE - A lighting device is disclosed, including an LED die, a light-transmissive encapsulant and a light-transmissive wall. The light-transmissive encapsulant covers the light-emitting side surfaces and the top surface, and the light-transmissive wall surrounds the light-transmissive encapsulant and covers the side surfaces of the light-transmissive encapsulant. Furthermore, the refractive index of the light-transmissive encapsulant is not greater than the refractive index of the light-transmissive wall. A lighting module is further disclosed, including a circuit substrate and the lighting devices, as described above, which are disposed on the circuit substrate. Therefore, when lights generated from the LED die are transmitted into the light-transmissive wall from the light-transmissive encapsulant, the lights will be deflected towards the lateral direction, thereby increasing the viewing angle of the lighting device. | 2020-04-30 |
20200135992 | TRANSPARENT SEALING MEMBER AND METHOD FOR MANUFACTURING SAME - A first transparent sealing member is used in a package accommodating at least one optical element, and is attached to a mounting substrate having a mounting surface for the optical element. In the first transparent sealing member, at least one corner part among a plurality of corner parts configured by a surface facing the mounting substrate and a surface along the mounting surface of the mounting substrate has a curved shape, and punctiform minute recessed parts are formed on the surface of the curved shape. The average presence frequency of the minute recessed parts is 100,000 to 3,000,000 inclusive per 1 mm | 2020-04-30 |
20200135993 | LIGHT EMITTING DEVICE - A light emitting device includes a mounting board, light sources, a light diffuser, a wavelength conversion layer, and scatter reflection portions. Each of the light sources has an upper face on which a light reflecting layer is disposed. The light diffuser is arranged above the plurality of light sources. The wavelength conversion layer is located at least between the light sources and the light diffuser. The wavelength conversion layer is configured to absorb at least a portion of light from the light sources and to emit light having a wavelength which is different from a wavelength of the light from the light sources. The scatter reflection portions are arranged on a surface of the wavelength conversion layer that is closer to the light diffuser. Each of the scatter reflection portions is arranged above at least a portion of the upper face of a corresponding one of the light sources. | 2020-04-30 |
20200135994 | Optoelectronic Semiconductor Component and Production Method - An optoelectronic semiconductor component and a production method are disclosed. In an embodiment an optoelectronic semiconductor component includes a light-emitting diode chip including a semiconductor layer sequence configured to generate radiation, electrical contact points on a mounting side, a carrier body and an anti-wetting layer being exposed laterally at the light-emitting diode chip and being located between the semiconductor layer sequence and the carrier body and/or being located in a lateral direction next to the semiconductor layer sequence, a filling permeable to the radiation and a reflector for the radiation, wherein the anti-wetting layer has a repellent effect on at least one of a material of the reflector or of the filling, and wherein the filling and the reflector adjoin each other at the exposed anti-wetting layer. | 2020-04-30 |
20200135995 | LED PACKAGE - An LED package is disclosed. The LED package includes: a base including a chip mounting surface; an LED chip including a central axis line perpendicular to the chip mounting surface; a total internal reflection (TIR) lens having a refractive index higher than that of a medium covering the upper and side surfaces of the LED chip and including entrance planes bordering the medium and exit planes from which light entering through the entrance planes is emitted; and a reflector coupled to the TIR lens. The entrance planes include main entrance planes having one or more radii of curvature and protruding toward the LED chip and a pair of lateral entrance planes connected to the main entrance planes at the edges of the main entrance planes and extending downward from the main entrance planes. The exit planes include a main exit plane located above the main entrance planes and a pair of lateral exit planes connected to the main exit plane at the edges of the main exit plane, extending downward from the main exit plane, and connected to the pair of lateral entrance planes. Two points on the main entrance planes at the same height from the LED chip are not equidistant from the central axis line such that the amount of light passing through the main entrance planes is localized to one side of the central axis line. | 2020-04-30 |
20200135996 | LED MOUNTING METHOD AND DEVICE - A mounting method and a mounting device for an LED chip are provided. The mounting method includes: providing a circuit substrate; disposing a plurality of conductors on the conductive solder pads; disposing the plurality of LED chips on the circuit substrate; and directing a laser source generated by a laser source generation module to each LED chip, so that the laser source passes through the LED chip and is projected on at least two conductors. The conductor disposed between the LED chip and the circuit substrate is cured by irradiation of the laser source so that the LED chip is mounted on the circuit substrate. Thereby, the conductor can be cured by the irradiation of the laser source passing through the LED chip, so that the LED chip is mounted on the circuit substrate. | 2020-04-30 |
20200135997 | Semiconductor Device and Method - A method includes depositing a photonic structure over a substrate, the photonic structure including photonic semiconductor layer, forming conductive pads over the photonic structure, forming a hard mask over the conductive pads, wherein the hard mask is patterned to cover each conductive pad with a hard mask region, etching the photonic structure using the hard mask as an etching mask to form multiple mesa structures protruding from the substrate, each mesa structure including a portion of the photonic structure, a contact pad, and a hard mask region, depositing a first photoresist over the multiple mesa structures, depositing a second photoresist over the first photoresist, patterning the second photoresist to expose the hard mask regions of the multiple mesa structures, and etching the hard mask regions to expose portions of the contact pads of the multiple mesa structures. | 2020-04-30 |
20200135998 | LIGHT EMITTING DEVICE, LIGHT EMITTING MODULE, METHOD OF MANUFACTURING LIGHT EMITTING DEVICE, AND METHOD OF MANUFACTURING LIGHT EMITTING MODULE - The light emitting device includes: a light emitting element, a covering member, a pair of electrode layers, and a pair of electrode terminals. The light emitting element has an electrode-formed surface on which a pair of electrode posts are formed. The covering member covers an electrode-formed surface of the light emitting element while forming an exposed portion of each of the pair of electrode posts which is exposed from the covering member. The pair of electrode layers are provided on a surface of the covering member and electrically connected to the exposed portions of the pair of electrode posts. The pair of electrode terminals are electrically connected to the pair of electrode layers, and provided on the surface of the covering member. The pair of electrode terminals are thicker than the pair of electrode layers, and are disposed at an interval larger than an interval between the pair of electrode posts. | 2020-04-30 |
20200135999 | LIGHT EMITTING DEVICE, LIGHT EMITTING MODULE, METHOD OF MANUFACTURING LIGHT EMITTING DEVICE, AND METHOD OF MANUFACTURING LIGHT EMITTING MODULE - The light emitting device includes a light emitting element having an electrode-formed surface on which electrode posts are formed; a covering member covering the electrode-formed surface and lateral surfaces of the light emitting element while forming an exposure portion of each of the electrode posts which are exposed from the covering member; a pair of electrode layers provided on a surface of the covering member and electrically connected to the exposed portions of the electrode posts; and a pair of electrode terminals which are respectively electrically connected to the electrode layers, having a surface area larger than a surface area of the electrode posts, and having an outer edge positioned at an end portion of the covering member; and an insulating member provided between the pair of the electrode terminals while being in contact with lateral surfaces of the pair of electrode terminals. | 2020-04-30 |
20200136000 | LIGHT-EMITTING UNIT AND MANUFACTURING METHOD OF LIGHT-EMITTING UNIT - A light transmissive first insulating film having light transmissive property to visible light, a second insulating film arranged opposite to the first insulating film, a plurality of conductor patterns formed of, for example, mesh patterns having the light transmissive property to the visible light and formed on a surface of at least one of the first insulating film and the second insulating film, a plurality of first light-emitting devices connected to any two conductor patterns of the plurality of conductor patterns, and a resin layer arranged between the first insulating film and the second insulating film to hold the first light-emitting devices are included. | 2020-04-30 |
20200136001 | LED Light Source - An LED light source is described herein, which comprises: a hollow heat sink having a top wall, a bottom opening, and a sidewall, the top wall including an upper surface and a lower surface, the upper surface having a central area and a peripheral area, and the top wall having at least one first hole in the peripheral area; an interposer being overmolded on the peripheral area and the lower surface, and extending through the at least one first hole; an LED package comprising at least one LED chip and mounted in the central area; an LED driver located within the hollow heat sink and positioned on a side of the interposer facing the bottom opening. | 2020-04-30 |
20200136002 | LIGHT EMITTING DEVICE - A light emitting device includes a substrate, a light emitting element and a light transmissive member. The substrate includes an insulating base material having a first main surface, a second main surface that is opposite from the first main surface, and a mounting surface that is adjacent to at least the second main surface, a pair of connection terminals disposed on the first main surface, a heat dissipation terminal disposed on the second main surface, and having a narrow part and a wide part with a width of the wide part being wider than a width of the narrow part, and a pair of vias connecting the connection terminals and the heat dissipation terminal. The light emitting element has a pair of electrodes which connect to element connection sections of the pair of connection terminals. The light transmissive member is disposed on an upper surface of the light emitting element. | 2020-04-30 |
20200136003 | Thermoelectric Materials and Devices - 1-2-20 semiconductor compounds have advantageous thermoelectric properties. An exemplary apparatus includes a thermoelectric device including a first thermoelectric material having the formula R | 2020-04-30 |
20200136004 | THERMOELECTRIC CONVERSION MATERIAL, THERMOELECTRIC CONVERSION MODULE USING THE SAME, AND MANUFACTURING METHOD THEREOF - There is provided a thermoelectric conversion material formed of an Fe | 2020-04-30 |
20200136005 | FLEXIBLE THERMOELECTRIC GENERATOR AND METHOD FOR FABRICATING THE SAME - The present disclosure provides a thermoelectric generator and methods for fabricating the same. The semiconductor legs and electrodes of the thermoelectric generator are embedded in one or more flexible polymer matrices providing protection to the semiconductor legs and electrodes to maintain good electric contacts among them during bending. Thus, the output power of the thermoelectric generator can be substantially retained even after a large number of bending cycles. | 2020-04-30 |
20200136006 | THERMOELECTRIC ELEMENT BASED WATCH - A thermoelectric element based watch includes a first thermally conductive element configured to serve as a hot end, a thin-film thermoelectric layer of dimensional thickness less than or equal to 100 μm including a number of sets of thermoelectric legs formed on a substrate, and a second thermally conductive element attached to a body case thereof configured to serve as a cold end. The thermoelectric element based watch also includes a number of metallic pins directly contacting both the second thermally conductive element and one or more set(s) of the number of sets of the thermoelectric legs of the thin-film thermoelectric layer. Based on the contact of the number of metallic pins with both the second thermally conductive element and the one or more set(s), the thermoelectric element based watch is configured to be powered in accordance with a temperature difference between the hot end and the cold end thereof. | 2020-04-30 |
20200136007 | DIELECTRIC HOLDER FOR QUANTUM DEVICES - A device includes a first substrate formed of a first material that exhibits a threshold level of thermal conductivity. The threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum circuit operates. In an embodiment, the device also includes a second substrate disposed in a recess of the first substrate, the second substrate formed of a second material that exhibits a second threshold level of thermal conductivity. The second threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum circuit operates. In an embodiment, at least one qubit is disposed on the second substrate. In an embodiment, the device also includes a transmission line configured to carry a microwave signal between the first substrate and the second substrate. | 2020-04-30 |
20200136008 | MILLIOHM RESISTOR FOR RQL CIRCUITS - A milliohm resistor is fabricated as a Josephson junction device that contains ferromagnetic or antiferromagnetic material of sufficient thickness to render the device entirely resistive between terminals. The device can have a resistance on the order of milliohms and can be consume a much smaller chip footprint than resistors of the same resistance fabricated using conventional resistive materials. Because the device can be fabricated without modification to processes used to fabricate reciprocal quantum logic (RQL) circuitry, it can easily be incorporated in RQL circuits to mitigate flux trapping or to perform other functions where very small resistances are needed. In particular, the device can burn off circulating currents induced by trapped flux without affecting the transmission of SFQ pulses through RQL circuitry. | 2020-04-30 |
20200136009 | MONOFILAMENT FOR PRODUCING AN NB3SN-CONTAINING SUPERCONDUCTOR WIRE, ESPECIALLY FOR INTERNAL OXIDATION - A monofilament ( | 2020-04-30 |
20200136010 | FULLY-WET VIA PATTERNING METHOD IN PIEZOELECTRIC SENSOR - Various embodiments of the present disclosure are directed towards a method for forming a piezoelectric device including a piezoelectric membrane and a plurality of conductive layers. The method includes forming the plurality of conductive layers in the piezoelectric membrane, the plurality of conductive layers are vertically offset one another. A masking layer is formed over the piezoelectric membrane. An etch process is performed according to the masking layer to concurrently expose an upper surface of each conductive layer in the plurality of conductive layers. A plurality of conductive vias are formed over the upper surface of the plurality of conductive layers. | 2020-04-30 |
20200136011 | ELECTRONIC COMPONENT HOUSING PACKAGE, ELECTRONIC DEVICE, AND ELECTRONIC MODULE - An electronic component housing package includes: a base section having a mounting section for an electronic component; a projecting part that is positioned on the base section and projects from the base section; a frame part that is positioned on the base section and surrounds the mounting section; a frame-shaped metalized layer that is positioned on the frame part; a plurality of external connection conductors that is positioned opposite the mounting section in the thickness direction; a connection conductor which is positioned on the projecting part and for connecting to the electronic component; and a wiring conductor that is connected to the connection conductor and that is led out to the base section. The thickness of the connection conductor gradually increases toward the wiring conductor. | 2020-04-30 |
20200136012 | Add-on unit or cable connectable to the power supply or signal cord of an electric device - The present invention discloses a method for creating spin-affected electric currents passively and feeding them into electric devices. The invention can be realized as either a rectangular black box incorporating coatings on top of and on the bottom of a conducting volume of material, or by coating a round-shaped wire or thread(s) of a cable. This is obtained by using a specific coating material on the conducting piece of material. The material may be piezoelectric, such as silicon dioxide (i.e. quartz) but also silicon carbide (SiC) may be used. Also, mixtures and composite arrangements are possible in order to create a coating. The manufactured add-on unit, when supplied with the input power or input signal, will act as an electron spin feeding device to the electric device because the electrons will be moving strongly within the interface area of the coating and the conducting material with aligned spins. The resulting effect also lasts longer within the electric device than just the time when the add-on unit is connected to the electric device. | 2020-04-30 |
20200136013 | POWER GENERATION DEVICE - A power generation device includes a power generator that has a cantilever structure of which one end is a fixed end to be fixed and other end is a free end, and generates a power due to free vibration of the free end, a resin holder section on which the power generator is mounted, and a metallic rigid plate that is located such that the holder section is between the rigid plate and the power generator. The fixed end and the holder section are fixed to each other, and the holder section and the rigid plate are fixed to each other. | 2020-04-30 |
20200136014 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating semiconductor device includes the steps of: forming an inter-metal dielectric (IMD) layer on a substrate; forming a metal interconnection in the IMD layer; forming a bottom electrode layer on the IMD layer, wherein the bottom electrode layer comprises a gradient concentration; forming a free layer on the bottom electrode layer; forming a top electrode layer on the free layer; and patterning the t op electrode layer, the free layer, and the bottom electrode layer to form a magnetic tunneling junction (MTJ). | 2020-04-30 |
20200136015 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a metal interconnection in the first IMD layer; forming a bottom electrode layer and a pinned layer on the first IMD layer; forming a sacrificial layer on the pinned layer; patterning the sacrificial layer, the pinned layer, and the bottom electrode layer to form a first magnetic tunneling junction (MTJ); forming a second IMD layer around the first MTJ; and removing the sacrificial layer. | 2020-04-30 |
20200136016 | MAGNETIC TUNNEL JUNCTION STRUCTURES AND RELATED METHODS - The disclosure is directed to spin-orbit torque (“SOT”) magnetoresistive random-access memory (“MRAM”) (“SOT-MRAM”) structures and methods. A SOT channel of the SOT-MRAM includes multiple heavy metal layers and one or more dielectric dusting layers each sandwiched between two adjacent heavy metal layers. The dielectric dusting layers each include discrete molecules or discrete molecule clusters of a dielectric material scattered in or adjacent to an interface between two adjacent heavy metal layers. | 2020-04-30 |
20200136017 | SPIN-ORBIT-TORQUE TYPE MAGNETIZATION ROTATING ELEMENT, SPIN-ORBIT-TORQUE TYPE MAGNETORESISTANCE EFFECT ELEMENT, AND MAGNETIC MEMORY - A spin-orbit-torque type magnetization rotating element includes: a spin-orbit torque wiring extending in a first direction; and a first ferromagnetic layer laminated on the spin-orbit torque wiring, wherein the spin-orbit torque wiring includes a metal oxide whose electrical conductivity properties exhibit a metallic behavior with respect to temperature, and an oxygen concentration in a region on the first ferromagnetic layer side and an oxygen concentration in a region opposite to the first ferromagnetic layer are asymmetrical with respect to a center of the spin-orbit torque wiring in a thickness direction thereof. | 2020-04-30 |
20200136018 | MAGNETIC DEVICE AND MAGNETIC RANDOM ACCESS MEMORY - A magnetic memory including a first spin-orbital-transfer-spin-torque-transfer (SOT-STT) hybrid magnetic device disposed over a substrate, a second SOT-STT hybrid magnetic device disposed over the substrate, and a SOT conductive layer connected to the first and second SOT devices. Each of the first and second SOT-STT hybrid magnetic devices includes a first magnetic layer, as a magnetic free layer, a spacer layer disposed under the first magnetic layer, and a second magnetic layer, as a magnetic reference layer, disposed under the spacer layer. The SOT conductive layer is disposed over the first magnetic layer of each of the first and second SOT-STT hybrid magnetic devices. | 2020-04-30 |
20200136019 | BAR-TYPE MAGNETORESISTIVE RANDOM ACCESS MEMORY CELL - A magnetoresistive random access memory (MRAM) cell includes a bar-type magnetic tunneling junction (MTJ), where the antiferromagnetic layer, the free layer, the barrier layer, and the reference layer have substantially aligned sidewalls. A spacer is against the sidewall of each of the antiferromagnetic layer, the free layer, the barrier layer, and the reference layer. A bar-type MTJ is manufactured from a single element of a pattern for isolated MTJs for MRAM cells. A barrier layer of a bar-type MTJ has a larger area than column-type MTJs, leading to extended MRAM cell lifetime because the barrier layer has a lower tunneling current density across the barrier layer. | 2020-04-30 |
20200136020 | MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate. | 2020-04-30 |
20200136021 | Under-Cut Via Electrode for Sub 60nm Etchless MRAM Devices by Decoupling the Via Etch Process - A method for fabricating a magnetic tunneling junction (MTJ) structure is described. A first dielectric layer is deposited on a bottom electrode and partially etched through to form a first via opening having straight sidewalls, then etched all the way through to the bottom electrode to form a second via opening having tapered sidewalls. A metal layer is deposited in the second via opening and planarized to the level of the first dielectric layer. The remaining first dielectric layer is removed leaving an electrode plug on the bottom electrode. MTJ stacks are deposited on the electrode plug and on the bottom electrode wherein the MTJ stacks are discontinuous. A second dielectric layer is deposited over the MTJ stacks and polished to expose a top surface of the MTJ stack on the electrode plug. A top electrode layer is deposited to complete the MTJ structure. | 2020-04-30 |
20200136022 | MAGNETIC DEVICE AND MAGNETIC RANDOM ACCESS MEMORY - A spin-orbit-torque (SOT) magnetic device includes a bottom metal layer, a first magnetic layer, as a magnetic free layer, disposed over the bottom metal layer, a spacer layer disposed over the first magnetic layer, and a second magnetic layer disposed over the spacer layer. The first magnetic layer includes a lower magnetic layer, a middle layer made of non-magnetic layer and an upper magnetic layer. | 2020-04-30 |
20200136023 | SPIN-ORBIT-TORQUE MAGNETIZATION ROTATIONAL ELEMENT, SPIN-ORBIT-TORQUE MAGNETORESISTANCE EFFECT ELEMENT, AND MAGNETIC MEMORY - A spin-orbit-torque magnetization rotational element includes: a first ferromagnetic layer; and a spin-orbit torque wiring in which a first surface faces the first ferromagnetic layer and a long axis extends in a first direction when viewed in plan view from a lamination direction of the first ferromagnetic layer, wherein the first surface spreads along a reference plane orthogonal to the lamination direction of the first ferromagnetic layer, the spin-orbit torque wiring contains a first virtual cross-section which passes through a first end of the first ferromagnetic layer in the first direction and is orthogonal to the first direction and a second virtual cross-section which passes through a second end of the first ferromagnetic layer in the first direction and is orthogonal to the first direction, and an area of the first virtual cross-section is different from an area of the second virtual cross-section. | 2020-04-30 |
20200136024 | APPARATUS FOR SPIN INJECTION ENHANCEMENT AND METHOD OF MAKING THE SAME - A switching device is disclosed. The switching device includes a spin-orbit coupling (SOC) layer, a pure spin conductor (PSC) layer disposed atop the SOC layer, a ferromagnetic (FM) layer disposed atop the PSC layer, and a normal metal (NM) layer sandwiched between the PSC layer and the FM layer. The PSC layer is a ferromagnetic insulator (FMI) is configured to funnel spins from the SOC layer onto the NM layer and to further provide a charge insulation so as to substantially eliminate current shunting from the SOC layer while allowing spins to pass through. The NM layer is configured to funnel spins from the PSC layer into the FM layer. | 2020-04-30 |
20200136025 | Low Resistance MgO Capping Layer for Perpendicularly Magnetized Magnetic Tunnel Junctions - A magnetic tunnel junction (MTJ) is disclosed wherein a free layer (FL) interfaces with a first metal oxide (Mox) layer and second metal oxide (tunnel barrier) to produce perpendicular magnetic anisotropy (PMA) in the FL. In some embodiments, conductive metal channels made of a noble metal are formed in the Mox that is MgO to reduce parasitic resistance. In a second embodiment, a discontinuous MgO layer with a plurality of islands is formed as the Mox layer and a non-magnetic hard mask layer is deposited to fill spaces between adjacent islands and form shorting pathways through the Mox. In another embodiment, end portions between the sides of a center Mox portion and the MTJ sidewall are reduced to form shorting pathways by depositing a reducing metal layer on Mox sidewalls, or performing a reduction process with forming gas, H | 2020-04-30 |
20200136026 | Gradient Protection Layer in MTJ Manufacturing - A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof. | 2020-04-30 |
20200136027 | METHODS TO IMPROVE MAGNETIC TUNNEL JUNCTION MEMORY CELLS - Methods of forming magnetic tunnel junction (MTJ) memory cells used in a magneto-resistive random access memory (MRAM) array are provided. A pre-clean process is performed to remove a metal oxide layer that may form on the top surface of the bottom electrodes of MTJ memory cells during the time the bottom electrode can be exposed to air prior to depositing MTJ layers. The pre-clean processes may include a remote plasma process wherein the metal oxide reacts with hydrogen radicals generated in the remote plasma. | 2020-04-30 |
20200136028 | FULLY ALIGNED SEMICONDUCTOR DEVICE WITH A SKIP-LEVEL VIA - A semiconductor structure includes a memory element disposed on a first metal layer. A first cap layer is disposed on the first metal layer and sidewalls of the memory element. A first dielectric layer is disposed on a top surface of the first cap layer on the first metal layer and a portion of the first cap layer on the sidewalls of the memory element. A second metal layer is disposed on the first dielectric layer and sidewalls of the first cap layer. A second cap layer is disposed on a top surface of the second metal layer. A second dielectric layer is disposed on the second cap layer. A via is in the second dielectric layer and exposes a top surface of the memory element. A third metal layer is disposed on the second dielectric layer and in the via. | 2020-04-30 |
20200136029 | Magnetoresistance element and non-volatile semiconductor storage device using same magnetoresistance element - The invention provides a magnetoresistance element with a configuration such that a stable switching action is possible with a current flowing in response to the application of a unipolar electrical pulse, and a non-volatile semiconductor storage device using the magnetoresistance element. | 2020-04-30 |
20200136030 | Multiply Spin-Coated Ultra-Thick Hybrid Hard Mask for Sub 60nm MRAM Devices - A metal hard mask layer is deposited on a MTJ stack on a substrate. A hybrid hard mask is formed on the metal hard mask layer, comprising a plurality of spin-on carbon layers alternating with a plurality of spin-on silicon layers wherein a topmost layer of the hybrid hard mask is a silicon layer. A photo resist pattern is formed on the hybrid hard mask. First, the topmost silicon layer of the hybrid hard mask is etched where is it not covered by the photo resist pattern using a first etching chemistry. Second, the hybrid hard mask is etched where it is not covered by the photo resist pattern wherein the photoresist pattern is etched away using a second etch chemistry. Thereafter, the metal hard mask and MTJ stack are etched where they are not covered by the hybrid hard mask to form a MTJ device and overlying top electrode. | 2020-04-30 |
20200136031 | Highly Selective Ion Beam Etch Hard Mask for Sub 60nm MRAM Devices - A via connection is provided through a dielectric layer to a bottom electrode. A MTJ stack is deposited on the dielectric layer and via connection. A top electrode is deposited on the MTJ stack. A selective hard mask and then a dielectric hard mask are deposited on the top electrode. The dielectric and selective hard masks are patterned and etched. The dielectric and selective hard masks and the top electrode are etched wherein the dielectric hard mask is removed. The top electrode is trimmed using IBE at an angle of 70 to 90 degrees. The selective hard mask, top electrode, and MTJ stack are etched to form a MTJ device wherein over etching into the dielectric layer surrounding the via connection is performed and re-deposition material is formed on sidewalls of the dielectric layer underlying the MTJ device and not on sidewalls of a barrier layer of the MTJ device. | 2020-04-30 |
20200136032 | MAGNETORESISTANCE STRUCTURE INCLUDING TWO HARD MASKS - A magnetoresistance structure includes a base that includes a conductive layer and a first active element on and in direct contact with the conductive layer. The magnetoresistance structure also includes a pillar structure connected to the base. The pillar structure includes a first hard mask, a capping material, a second active element and a tunnel layer. The magnetoresistance structure also further includes an etching barrier deposited on the pillar and the base; a second hard mask deposited on the etching barrier; and a capping barrier deposited on the second hard mask and covering side walls of the base. | 2020-04-30 |
20200136033 | LOW TEMPERATURE FILM FOR PCRAM SIDEWALL PROTECTION - Various embodiments of the present disclosure are directed towards a memory cell including a data storage layer. A top electrode overlies a bottom electrode. The data storage layer is disposed between the top and bottom electrodes. The data storage layer has a first region and a second region. The first region comprises a first material and the second region comprises a compound of the first material and a reactive species. | 2020-04-30 |
20200136034 | SCALED NANOTUBE ELECTRODE FOR LOW POWER MULTISTAGE ATOMIC SWITCH - A method of forming a memory device that includes depositing a first dielectric material within a trench of composed of a second dielectric material; positioning a nanotube within the trench using chemical recognition to the first dielectric material; depositing a dielectric for cation transportation within the trench on the nanotube; and forming a second electrode on the dielectric for cation transportation, wherein the second electrode is composed of a metal. | 2020-04-30 |
20200136035 | RESISTIVE RANDOM-ACCESS MEMORY - Techniques for fabricating a volatile memory structure having a transistor and a memory component is described. The volatile memory structure comprises the memory component formed on a substrate, wherein a first shape comprising one or more pointed edges is formed on a first surface of the memory component. The volatile memory structure further comprises transistor formed on the substrate and electrically coupled to the memory component to share operating voltage, wherein operating voltage applied to the transistor flows to the memory component. | 2020-04-30 |
20200136036 | PHASE CHANGE RANDOM ACCESS MEMORY AND METHOD OF MANUFACTURING - A method includes forming a dielectric layer over a conductive layer, and forming a sidewall spacer in an opening in the dielectric layer. The opening exposes a portion of the conductive layer. A bottom electrode layer is formed over the conductive layer and the sidewall spacer. A phase change material layer is formed over the bottom electrode layer, and a top electrode layer is formed over the phase change material layer. In an embodiment, the method includes recess etching the bottom electrode layer before forming the phase change material layer. | 2020-04-30 |
20200136037 | VARIABLE RESISTANCE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed are a variable resistance memory device and a method of manufacturing the same. The device comprises a first conductive line extending in a first direction, a second conductive line extending in a second direction intersecting the first direction, a memory cell at an intersection between the first conductive line and the second conductive line, a first electrode between the first conductive line and the memory cell, and a second electrode between the second conductive line and the memory cell. The memory cell comprises a switching pattern, an intermediate electrode, a first resistivity control pattern, and a variable resistance pattern that are connected in series between the first conductive line and the second conductive line. Resistivity of the first resistivity control pattern is less than resistivity of the second electrode. | 2020-04-30 |
20200136038 | INTERCALATED METAL/DIELECTRIC STRUCTURE FOR NONVOLATILE MEMORY DEVICES - Some embodiments relate to an integrated chip including a memory device. The memory device includes a bottom electrode disposed over a semiconductor substrate. An upper electrode is disposed over the bottom electrode. An intercalated metal/dielectric structure is sandwiched between the bottom electrode and the upper electrode. The intercalated metal/dielectric structure comprises a lower dielectric layer over the bottom electrode, an upper dielectric layer over the lower dielectric lower, and a first metal layer separating the upper dielectric layer from the lower dielectric layer. | 2020-04-30 |
20200136039 | BARRIER LAYER FOR RESISTIVE RANDOM ACCESS MEMORY - The present disclosure is directed to resistive random access memory (RRAM) structures with a bottom electrode barrier stack. For example, the RRAM structure includes: (i) a bottom electrode having a conductive material and a layer stack, where the layer stack covers a bottom surface and a side surface of the conductive material and is interposed between the conductive material and an underlying conductive structure; (ii) a resistance-switching layer that is disposed on the bottom electrode and opposite to the conductive structure; and (iii) a top electrode that is disposed on the resistance-switching layer. | 2020-04-30 |