17th week of 2020 patent applcation highlights part 61 |
Patent application number | Title | Published |
20200126861 | STRUCTURES AND METHODS FOR RELIABLE PACKAGES | 2020-04-23 |
20200126862 | WIMPY DEVICE BY SELECTIVE LASER ANNEALING | 2020-04-23 |
20200126863 | TRANSISTOR WITH A GATE STRUCTURE COMPRISING A TAPERED UPPER SURFACE | 2020-04-23 |
20200126864 | Method for Forming Semiconductor Device Structure with Gate and Resulting Structures | 2020-04-23 |
20200126865 | Slot Contacts and Method Forming Same | 2020-04-23 |
20200126866 | Method and Structure for FinFET Device | 2020-04-23 |
20200126867 | STRESS MODULATION OF NFET AND PFET FIN STRUCTURES | 2020-04-23 |
20200126868 | Semiconductor Device and Method | 2020-04-23 |
20200126869 | Source/Drain Features with an Etch Stop Layer | 2020-04-23 |
20200126870 | FUSI GATED DEVICE FORMATION | 2020-04-23 |
20200126871 | FinFET Doping Methods and Structures Thereof | 2020-04-23 |
20200126872 | METHOD AND APPARATUS TO DETERMINE A PATTERNING PROCESS PARAMETER | 2020-04-23 |
20200126873 | MAGNETIC PROPERTY MEASURING SYSTEM, A METHOD FOR MEASURING MAGNETIC PROPERTIES, AND A METHOD FOR MANUFACTURING A MAGNETIC MEMORY DEVICE USING THE SAME | 2020-04-23 |
20200126874 | SYSTEM AND METHOD FOR SURGE-TESTING A GALLIUM NITRIDE TRANSISTOR DEVICE | 2020-04-23 |
20200126875 | METHODS FOR MANUFACTURING A DISPLAY DEVICE | 2020-04-23 |
20200126876 | METHOD, CONTROL SYSTEM AND PLANT FOR PROCESSING A SEMICONDUCTOR WAFER, AND SEMICONDUCTOR WAFER | 2020-04-23 |
20200126877 | SEMICONDUCTOR DEVICE | 2020-04-23 |
20200126878 | DISPLAY DEVICE | 2020-04-23 |
20200126879 | Surface Mounted Device in Cavity | 2020-04-23 |
20200126880 | MOLDED WAFER LEVEL PACKAGING | 2020-04-23 |
20200126881 | SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME | 2020-04-23 |
20200126882 | SEMICONDUCTOR PACKAGE | 2020-04-23 |
20200126883 | CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF | 2020-04-23 |
20200126884 | ELECTRONIC EQUIPMENT | 2020-04-23 |
20200126885 | HEAT SINK FORMED FROM A HIGH PIPE DENSITY SILICON CARBIDE SUBSTRATE | 2020-04-23 |
20200126886 | HEAT-DISSIPATION SUBSTRATE, PREPARATION METHOD AND APPLICATION THEREOF, AND ELECTRONIC COMPONENT | 2020-04-23 |
20200126887 | THIN LINE DAM ON UNDERFILL MATERIAL TO CONTAIN THERMAL INTERFACE MATERIALS | 2020-04-23 |
20200126888 | ANNULAR SILICON-EMBEDDED THERMOELECTRIC COOLING DEVICES FOR LOCALIZED ON-DIE THERMAL MANAGEMENT | 2020-04-23 |
20200126889 | Mechanical Part for Fastening Processor, Assembly, and Computer Device | 2020-04-23 |
20200126890 | PACKAGING OF A SEMICONDUCTOR DEVICE WITH PHASE-CHANGE MATERIAL FOR THERMAL PERFORMANCE | 2020-04-23 |
20200126891 | Combined Integration Of Phase Change Materials Into Conduction-Convection-Latent Heat Optimized Thermal Management Through Novel Geometries Enabled In Additive Manufactured Heat Sinks | 2020-04-23 |
20200126892 | High Efficiency Thermal Management Device for Use With Components Having High Heat Flux Values | 2020-04-23 |
20200126893 | Surface Treatment Method and Apparatus for Semiconductor Packaging | 2020-04-23 |
20200126894 | INTEGRATED PASSIVE DEVICE AND FABRICATION METHOD USING A LAST THROUGH-SUBSTRATE VIA | 2020-04-23 |
20200126895 | PRESS-FIT SEMICONDCUTOR DEVICE | 2020-04-23 |
20200126896 | SEMICONDUCTOR PACKAGE AND MODULE | 2020-04-23 |
20200126897 | WIRING SUBSTRATE | 2020-04-23 |
20200126898 | ELECTRONIC COMPONENT MODULE | 2020-04-23 |
20200126899 | PRINTED CIRCUIT BOARD AND A SEMICONDUCTOR PACKAGE INCLUDING THE SAME | 2020-04-23 |
20200126900 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2020-04-23 |
20200126901 | CELL HAVING STACKED PICK-UP REGION | 2020-04-23 |
20200126902 | LOW COST METALLIZATION DURING FABRICATION OF AN INTEGRATED CIRCUIT (IC) | 2020-04-23 |
20200126903 | SEMICONDUCTOR MEMORY DEVICE WITH 3D STRUCTURE | 2020-04-23 |
20200126904 | Semiconductor Device with Metallization Structure on Opposite Sides of a Semiconductor Portion | 2020-04-23 |
20200126905 | MEMORY ARRAY STRUCTURE AND METHOD OF FABRICATING THEREOF | 2020-04-23 |
20200126906 | INTERCONNECT STRUCTURES | 2020-04-23 |
20200126907 | SEMICONDUCTOR DEVICES HAVING ELECTRICALLY AND OPTICALLY CONDUCTIVE VIAS, AND ASSOCIATED SYSTEMS AND METHODS | 2020-04-23 |
20200126908 | INTEGRATED CIRCUIT DEVICE INCLUDING VERTICAL MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2020-04-23 |
20200126909 | SEMICONDUCTOR DEVICE WITH DAMASCENE STRUCTURE | 2020-04-23 |
20200126910 | ON-DIE TERMINATION (ODT) CIRCUIT CONFIGURABLE WITH VIA LAYER TO SUPPORT MULTIPLE STANDARDS | 2020-04-23 |
20200126911 | SUB-GROUND RULE E-FUSE STRUCTURE | 2020-04-23 |
20200126912 | INTERCONNECTS HAVING A PORTION WITHOUT A LINER MATERIAL AND RELATED STRUCTURES, DEVICES, AND METHODS | 2020-04-23 |
20200126913 | Method of Preventing Pattern Collapse | 2020-04-23 |
20200126914 | Interconnection Structure and Methods of Fabrication the Same | 2020-04-23 |
20200126915 | Interconnect Structure and Method | 2020-04-23 |
20200126916 | CONTROLLING WARP IN SEMICONDUCTOR LAMINATED SUBSTRATES WITH CONDUCTIVE MATERIAL LAYOUT AND ORIENTATION | 2020-04-23 |
20200126917 | SEMICONDUCTOR DEVICES HAVING INTEGRATED OPTICAL COMPONENTS | 2020-04-23 |
20200126918 | CONDUCTIVE PAD ON PROTRUDING THROUGH ELECTRODE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING | 2020-04-23 |
20200126919 | SEMICONDUCTOR PACKAGES INCLUDING A SUPPORTING BLOCK SUPPORTING AN UPPER CHIP STACK | 2020-04-23 |
20200126920 | PAD STRUCTURE FOR ENHANCED BONDABILITY | 2020-04-23 |
20200126921 | ARCHITECTURES AND METHODS OF FABRICATING 3D STACKED PACKAGES | 2020-04-23 |
20200126922 | VERTICAL AND LATERAL INTERCONNECTS BETWEEN DIES | 2020-04-23 |
20200126923 | CHIP PACKAGE AND METHOD OF FORMING THE SAME | 2020-04-23 |
20200126924 | FAN-OUT SEMICONDUCTOR PACKAGE | 2020-04-23 |
20200126925 | SEMICONDUCTOR SUB-ASSEMBLY AND SEMICONDUCTOR POWER MODULE | 2020-04-23 |
20200126926 | MIDDLE-OF-LINE INTERCONNECT HAVING LOW METAL-TO-METAL INTERFACE RESISTANCE | 2020-04-23 |
20200126927 | SEMICONDUCTOR CHIP INCLUDING ALIGNMENT PATTERN | 2020-04-23 |
20200126928 | DEVICES AND METHODS FOR SIGNAL INTEGRITY PROTECTION TECHNIQUE | 2020-04-23 |
20200126929 | SEMICONDUCTOR DEVICE WITH AN ELECTROMAGNETIC INTERFERENCE (EMI) SHIELD | 2020-04-23 |
20200126930 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | 2020-04-23 |
20200126931 | Packaging Devices and Methods of Manufacture Thereof | 2020-04-23 |
20200126932 | CHIP INCLUDING A SCRIBE LANE | 2020-04-23 |
20200126933 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | 2020-04-23 |
20200126934 | THIN-FILM CAPACITOR STRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE THIN-FILM CAPACITOR STRUCTURE | 2020-04-23 |
20200126935 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME | 2020-04-23 |
20200126936 | MANUFACTURING PROCESS FOR SEPARATING LOGIC AND MEMORY ARRAY | 2020-04-23 |
20200126937 | Semiconductor Device and Bump Formation Process | 2020-04-23 |
20200126938 | 3D Packages and Methods for Forming the Same | 2020-04-23 |
20200126939 | Bump-on-Trace Design for Enlarge Bump-to-Trace Distance | 2020-04-23 |
20200126940 | SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE | 2020-04-23 |
20200126941 | SEMICONDUCTOR DEVICE FOR BONDING CONDUCTIVE LAYERS EXPOSED FROM SURFACES OF RESPECTIVE INTERCONNECTION LAYERS | 2020-04-23 |
20200126942 | FAN-OUT SEMICONDUCTOR PACKAGE | 2020-04-23 |
20200126943 | ELECTRONIC ASSEMBLIES HAVING A MESH BOND MATERIAL AND METHODS OF FORMING THEREOF | 2020-04-23 |
20200126944 | POWER ELECTRONIC ASSEMBLIES WITH SOLDER LAYER AND EXTERIOR COATING, AND METHODS OF FORMING THE SAME | 2020-04-23 |
20200126945 | BONDED STRUCTURES | 2020-04-23 |
20200126946 | ENCAPSULATED STRESS MITIGATION LAYER AND POWER ELECTRONIC ASSEMBLIES INCORPORATING THE SAME | 2020-04-23 |
20200126947 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD | 2020-04-23 |
20200126948 | DIE BONDING APPARATUS AND MEHOD AND SUBSTRATE BONDING APPARATUS AND MEHOD | 2020-04-23 |
20200126949 | SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME | 2020-04-23 |
20200126950 | SEMICONDUCTOR DEVICE PACKAGES WITH ENHANCED HEAT MANAGEMENT AND RELATED SYSTEMS | 2020-04-23 |
20200126951 | WAFER LEVEL INTEGRATION INCLUDING DESIGN/CO-DESIGN, STRUCTURE PROCESS, EQUIPMENT STRESS MANAGEMENT AND THERMAL MANAGEMENT | 2020-04-23 |
20200126952 | INTEGRATED CIRCUIT, SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME | 2020-04-23 |
20200126953 | System, Structure, and Method of Manufacturing a Semiconductor Substrate Stack | 2020-04-23 |
20200126954 | SEMICONDUCTOR DEVICE ASSEMBLIES WITH LIDS INCLUDING CIRCUIT ELEMENTS | 2020-04-23 |
20200126955 | DISPLAY DEVICE | 2020-04-23 |
20200126956 | WHITE LIGHT EMITTING DEVICES HAVING HIGH LUMINOUS EFFICIENCY AND IMPROVED COLOR RENDERING THAT INCLUDE PASS-THROUGH VIOLET EMISSIONS | 2020-04-23 |
20200126957 | LED MODULE AND METHOD FOR FABRICATING THE SAME | 2020-04-23 |
20200126958 | LIGHT SOURCE WITH TUNABLE CRI | 2020-04-23 |
20200126959 | Semiconductor Device and Method of Manufacture | 2020-04-23 |
20200126960 | DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME | 2020-04-23 |