15th week of 2021 patent applcation highlights part 58 |
Patent application number | Title | Published |
20210111642 | POWER CONVERTER FOR ENERGY TRANSMISSION - The invention relates to a modular power converter which is configured from at least one main module to be actively supplied and an arbitrary number of N−1 further modules. All modules are connected to one another in series (for example by modular terminals, where the term modular terminals shall also comprise any other kind of electrical connection, and in particular plug connections). Each module comprises switching devices and at least one energy storage device, as a result of which the individual module is capable of being charged with an adjustable voltage. The switching devices, which are preferably realized by transistors, allow the module to be connected according to an active operation in terms of the series connection or according to a bypass operation in which case the respective module is quasi bridged and therefore cannot contribute to the voltage path of the series connection. The output voltage of the power converter is tapped at the end points of the series connection. | 2021-04-15 |
20210111643 | POWER SYSTEM - A power system includes a positive terminal, a negative terminal, a neutral point, and a conversion circuit including an AC terminal, two flying capacitors, and two switch modules. The two switch modules contain five switches respectively. The two second switches are connected in series and then connected in parallel with the first flying capacitor. The two first switches are connected in series at two ends of the two second switches respectively, and the third switch is connected between a first node between the two second switches and the AC terminal. The two fifth switches are connected in series and then connected in parallel with the second flying capacitor. The two fourth switches are connected in series at the two ends of the two fifth switches respectively, and the sixth switch is connected between a second node between the two fifth switches and the AC terminal. | 2021-04-15 |
20210111644 | ELEMENT AND METHOD FOR MANUFACTURING ELEMENT - An element includes a pair of electrodes, an intermediate layer between the pair of electrodes, and at least one insulator layer between the pair of electrodes. The intermediate layer contains a silicon compound including unpaired electrons as a material. The intermediate layer is deformable. | 2021-04-15 |
20210111645 | ENERGY HARVESTING ROLLER ASSEMBLY - An energy harvesting roller for a cargo handling system may comprise a shaft and a sleeve located on the shaft. A piezoelectric member may be coupled to the sleeve. A shell may be located radially outward of the piezoelectric member and configured to rotate relative to the sleeve. A radially inward surface of the shell may define at least one of a plurality of grooves or a plurality of protrusions. | 2021-04-15 |
20210111646 | MODULAR ELECTROMAGNETIC DRIVE FOR FITNESS APPLICATIONS - A modular motor drive for use in fitness equipment includes a switching circuit having switches and that is responsive to switching control signals by selectively reconfiguring the switches to control supply of electrical energy to a motor of an exercise device according to the switching control signals. The motor drive further includes an interface coupleable with an application control board of the exercise device. Responsive to a first switching control signal, the switching circuit configures the plurality of switches to drive the motor of the exercise device. Responsive to a second switching control signal corresponding to electric braking of the motor, the switching circuit configures the plurality of switches to stop driving the motor of the exercise device. | 2021-04-15 |
20210111647 | METHOD FOR STARTING A SYNCHRONOUS MOTOR - The invention relates to a method for starting a synchronous motor. The synchronous motor includes a rotor for creating a first magnetic field and a stator with stator windings connected to an electrical energy converter for converting a supply voltage into a stator voltage to be applied to the stator windings to create a rotating second magnetic field interacting with the first magnetic field. The method includes the following steps: applying reference stator voltages to the stator windings, wherein the reference stator voltages are determined from a reference current vector and a reference rotor speed; measuring stator currents in the stator windings; calculating an estimated rotor speed and an estimated rotor position of the rotor from the applied stator voltages and the measured stator currents; calculating a speed error by subtracting the estimated rotor speed from the reference rotor speed; determining a reference torque producing current component from the speed error and modifying the reference current vector with the reference torque producing current component; calculating a position error by subtracting the estimated rotor position from a reference rotor position, wherein the reference rotor position is determined from the reference rotor speed and a reference rotor speed correction, wherein the reference rotor speed correction increases and decreases with the position error; correcting the reference current vector by transforming the reference current vector into a corrected reference current vector by the position error, wherein a rotating coordinate system of the corrected reference current vector is aligned with the estimated rotor position; determining switching signals for the electrical energy converter from the reference stator voltages and applying the switching signals to the electrical energy converter. | 2021-04-15 |
20210111648 | Apparatus and Method for Position Sensing of Integrated Brushless Starter - A system includes a position sensor configured to detect positions of a rotor of a starter motor relative to the position sensor and to output signals indicating the detected positions and a controller configured to rotate the rotor to a plurality of predetermined positions relative to a stator of the starter motor, determine sensed positions of the rotor based on the signals output by the position sensor, and calculate an initial detected position of the rotor based on relationships between the determined sensed positions of the rotor and an expected angular distance between adjacent ones of the predetermined positions. | 2021-04-15 |
20210111649 | POWER TOOL RECEIVING DIFFERENT CAPACITY BATTERY PACKS - A system is provided with a set of removable battery packs and a set of power tools each including a motor, a controller, and a battery receiving portion. For each power tool, the controller is configured to identify a type of battery pack coupled to the battery receiving portion and limit a maximum amount of electric current drawn from the battery pack by the motor based on the identified type of the battery pack. The greater a ratio of an impedance of the motor to an impedance of the battery pack, the less the controller limits the maximum amount of electric current drawn from the battery pack such that for a given battery pack of the set of removable battery packs, the lower the impedance of the motor, the more current the motor draws from the given battery pack. | 2021-04-15 |
20210111650 | COMBINATION OF AN ELECTRIC ROTARY MACHINE WITH A CONVERTER UNIT AND WIND TURBINE - A rotary machine includes a rotor rotatable about a rotation axis and a stator mechanically divided into stator segments, each covering a respective section in relation to the rotation axis. Coils of one individual multi-phase rotary system are respectively arranged in the stator segments, each having terminals which connect phase lines of an individual multi-phase rotary system and are connected to the coils. A converter unit includes multiple subunits operated independently of one another, each forming an individual multi-phase rotary system. The number of phases of the subunits corresponds to the number of stator segments. The terminals of the stator segments are each connected to a subunit. The stator segments form groups of directly successive stator segments when viewed about the rotation axis. The terminals of the stator segments are connected to the same sub-unit within each group, but connected to different sub-units from group to group of stator segments. | 2021-04-15 |
20210111651 | GENSET ENGINE PARALLELING CONTROLS, DEVICES, SYSTEMS, AND METHODS - A device to control a genset engine may use multiple feedback loops to provide a fast stable response to load changes. An outer feedback loop may receive frequency measurements and power measurements of a genset engine and determine a dispatch adjustment comprising a frequency setpoint based on the frequency measurements and power measurements. A middle feedback loop may comprise a double deadband droop filter that periodically generates a pulse based on the frequency setpoint and the power measurements. The middle feedback loop may update an inner loop setpoint based on the pulse. An inner feedback loop may alter a target fuel valve reference of the genset engine based on the inner loop setpoint generated by the second controller and a fuel valve droop. | 2021-04-15 |
20210111652 | ENERGY PACKET CONTROL OF GENERATOR PRIME MOVER - A controller may use energy packets to control a prime mover of a machine. The controller may include an energy packet measurement control to calculate energy packets and convert the energy packets into a fuel valve reference. Further, a frequency control may receive system feedback associated with the monitored machine and generate a frequency correction based on the system feedback. The controller may add the energy packet value and the frequency correction to determine a prime mover power reference and provide the prime mover power reference to a fuel valve control of the machine. | 2021-04-15 |
20210111653 | INDUCTION MOTOR SLIP CALCULATION - An intelligent electronic device (IED) according to the present disclosure can estimate a full load rotor resistance value as a function of motor positive-sequence resistance. The IED may estimate the full load rotor resistance value by measuring zero-crossings of voltage after a motor disconnect. The IED may also acquire motor current and voltage measurements and calculate motor slip using the acquired motor current and voltage measurements and the estimated full load rotor resistance value. | 2021-04-15 |
20210111654 | CONTROL DEVICE - Provided is a control device for controlling an electromagnetic actuator that vibrates an operation device by driving the operation device supported by an elastic support part so as to be elastically vibrated in one direction in a vibrating direction thereof, the control device comprising: a current pulse supply unit configured to supply a driving current pulse to a coil of the electromagnetic actuator as a driving current for driving the operation device in accordance with a touch operation of the operation device, wherein the current pulse supply unit supplies the drive current pulse capable of starting the elastic vibration as a main driving current pulse, and then supplies the drive current pulse capable of adjusting attenuation period of the elastic vibration as a sub-driving current pulse. | 2021-04-15 |
20210111655 | MOTOR DRIVE DEVICE, ELECTRIC BLOWER, ELECTRIC VACUUM CLEANER, AND HAND DRYER - A motor drive device includes a single-phase inverter that converts a direct-current voltage output from a power supply which is a battery, into an alternating-current voltage. The inverter outputs the alternating-current voltage as an applied voltage to be applied to a motor. The applied voltage is lower when the direct-current voltage is a second voltage lower than a first voltage than when the direct-current voltage is the first voltage. Consequently, a discharge current of the battery is reduced, and the motor drive device capable of reducing an increase in battery temperature can be obtained. | 2021-04-15 |
20210111656 | MOTOR DRIVING APPARATUS AND MOTOR DRIVING METHOD - Provided is a motor driving apparatus including: an upper-arm gate driving circuit; a lower-arm gate driving circuit; a first rotation detection unit powered by a first power source; a second rotation detection unit powered by a second power source; a first fail safe circuit that performs, by use of a detection signal from the first rotation detection unit, a fail safe control on a gate driving circuit powered at least by the first power source, from among the upper-arm gate driving circuit and the lower-arm gate driving circuit; and a second fail safe circuit that performs, by use of a detection signal from the second rotation detection unit, a fail safe control on a gate driving circuit powered at least by the second power source, from among the upper-arm gate driving circuit and the lower-arm gate driving circuit. | 2021-04-15 |
20210111657 | LOAD CONTROL DEVICE HAVING AN ILLUMINATED ROTARY KNOB - A wall-mountable load control device may include an illuminated rotary knob for providing a nightlight feature. The load control device may be configured to control an intensity of a lighting load. The load control device may include a yoke adapted to be mounted to an electrical wall box, an enclosure attached to the yoke, a faceplate attached to the yoke and having an opening, a mounting member attached to the yoke, and/or a potentiometer located within the enclosure and having a shaft extending through an opening in the yoke and the opening of the faceplate. The load control device may include a collar attached to the boss of the mounting member and surrounding the shaft of the potentiometer. The mounting member may be configured to conduct light from at least one light source housed within the enclosure to illuminate the faceplate. | 2021-04-15 |
20210111658 | APPARATUS AND CONTROL METHOD OF THE SAME - An apparatus capable of efficiently reducing leakage current and noise in various environments by shifting a pulse signal of an inverter configured to control a three-phase drive motor, and a control method of the same are provided. In accordance with an aspect of the disclosure, an apparatus is provided. The apparatus includes at least one motor, an inverter configured to supply power to the at least one motor and a plurality of switching elements configured to convert input DC power into three-phase AC power and output the three-phase AC power, and at least one processor configured to control the plurality of switching elements. The at least one processor is configured to generate a carrier, configured to obtain a rising edge timing and a falling edge timing of a pulse width modulation (PWM) control signal of each phase based on superposition of a zero phase voltage having a predetermined magnitude and the carrier, and configured to drive a motor by shifting the PWM control signal of each phase to allow a rising edge timing and a falling edge timing of a PWM control signal of one phase among the PWM control signal of the each phase to be different from a rising edge timing and a falling edge timing of a PWM control signal of other phase among the PWM control signal of the each phase. | 2021-04-15 |
20210111659 | DRIVE DEVICE-INTEGRATED ROTARY ELECTRIC MACHINE AND ELECTRIC POWER STEERING DEVICE USING SAME - The invention includes a first power supply connector, which connects a first inverter unit that supplies a drive current to a first three-phase winding of a rotary electric machine to a first vehicle power supply, and a second power supply connector, which connects a first second inverter unit that supplies a drive current to a second three-phase winding of the rotary electric machine to a second vehicle power supply, wherein a voltage of the first vehicle power supply is higher than a voltage of the second vehicle power supply, and a current capacity of the first power supply connector is smaller than a current capacity of the second power supply connector. | 2021-04-15 |
20210111660 | MOTOR DRIVE APPARATUS INCLUDING SMOOTHING CAPACITOR UNIT AND SNUBBER CAPACITOR - A motor drive apparatus includes a smoothing capacitor unit including at least one smoothing capacitor provided between a converter circuit and an inverter circuit in a power conversion circuit that generates motor drive power, a snubber capacitor for suppressing a surge voltage of a power device forming a part of the power conversion circuit, and a support plate on which the smoothing capacitor unit is mounted, wherein an electrode terminal of the smoothing capacitor unit and an electrode terminal of the snubber capacitor are placed in proximity to each other with the support plate being sandwiched between them, and a positive electrode terminal of the smoothing capacitor unit and a positive electrode terminal of the snubber capacitor are electrically connected to each other, and a negative electrode terminal of the smoothing capacitor unit and a negative electrode terminal of the snubber capacitor are electrically connected to each other. | 2021-04-15 |
20210111661 | REGENERATIVE CURRENT LIMITING OF SYNCHRONOUS MOTOR DRIVES - Technical solutions are described for controlling operation of an inverter to manage voltage upon a direct current (DC) bus and regenerative power (current) provided to a battery. A control system and method are provided to control operation of an electric machine using a controller. More specifically, the controller is configured to calculate a current-based torque limit to satisfy a regenerative current limit, and a voltage-based torque limit to satisfy a voltage limit constraint of the DC bus. The controller is configured to calculate a torque limit to satisfy the regenerative current and voltage limits of the DC bus, and to command a plurality of switches within the inverter to generate a direct-axis current from the electric machine corresponding to a torque demand and according to the torque limit. The proposed system and method provide for motor current that exceed a demagnetizing current limit of the electric machine. | 2021-04-15 |
20210111662 | PHOTOPIEZOELECTRIC PANEL - This invention comprises a panel or system of panels. Each panel comprises a top layer, which is comprised of tempered glass that is highly transparent to allow for maximum light wave transmission. These solar light waves are captured by the photovoltaic cell which comprises the second layer of the panel where this solar energy is converted into usable electrical energy. Vibrations experienced by the photopiezoelectric panel due to foot and lightweight vehicle traffic are absorbed by the PZT sheet layer, which is the third layer of the panel where they are converted into usable electrical energy. The fourth and final layer of the panel consists of the connector plate which serves as the hub and interconnection for gathering the generated electrical energies and transmitting them into the modular grid network to be consumed by various load devices, such as streetlights and other power-dependent city infrastructure. | 2021-04-15 |
20210111663 | Magnetic-Floating Field-Assisted Thermionic Solar Cell With Semiconductor Nonvolatile Memories and Rechargeable Batteries - The present invention is about a magnetic solar cell with a semiconductor memory and battery, capable of achieving higher solar efficiency and energy storage capability. The semiconductor magnetic solar system features the following components: a section of very low work function metal, which is physically “floating” in vacuum, as sustained by magnetic fields, and a section of semiconductor to form an Avalanche Breakdown Schottky Diode, and a memory/battery storage unit with a high work function metal. | 2021-04-15 |
20210111664 | DUAL PILE CAP - A solar array support structure includes a first vertical pile extending from a ground to a first pile end, a second vertical pile extending from the ground to a second pile end, and a first pile cap attached to each of the first and second vertical piles, the first pile cap configured to account for a misalignment of at least one of the first vertical pile and the second vertical pile by providing for adjustable attachment locations for each of the first and second pile ends. | 2021-04-15 |
20210111665 | ASSEMBLY, MOUNTING SYSTEM AND METHOD FOR INSTALLING SOLAR PANELS ON A BASE - The invention relates to an assembly for installing solar panels on a base, and in particular a substantially flat base, comprising at least two solar panels and a mounting system for coupling the solar panels to one another, wherein the solar panels, in a position in which they are installed on the base, enclose an angle with respect to one another. The invention also relates to a mounting system comprising a connecting element which can be subjected to compressive loads, for connecting sides of two solar panels which face one another in the installed position and a connecting element which can be subjected to tensile loads, for limiting the angle enclosed by the solar panels with respect to one another. The invention additionally relates to a method for installing solar panels on a base, and in particular a substantially flat base, by means of an assembly according to the invention. | 2021-04-15 |
20210111666 | Method and Apparatus for Melting Snow - Systems, apparatuses, and methods are described for melting snow from a surface of a power source. The power source may be a photovoltaic (PV) module. | 2021-04-15 |
20210111667 | SWITCHABLE ABSORBER ELEMENT AND PHOTOVOLTAIC CELL - The invention relates to a switchable absorber element and a photovoltaic cell based thereon. A switchable absorber element according to the invention has an absorber layer. The absorber element furthermore has at least one front side reflection layer and at least one rear side reflection layer, wherein the absorber layer is arranged between front side reflection layer and rear side reflection layer, wherein the optical path length between front side reflection layer and rear side reflection layer is less than 400 nm at least for light impinging perpendicularly onto the cell. The absorber element according to the invention is characterized in that at least one of the reflection layers has a switchable reflectivity. | 2021-04-15 |
20210111668 | METHOD AND APPARATUS FOR INCREASED SOLAR ENERGY CONVERSION - There is provided an apparatus for solar energy power conversion comprising: a planar array of light concentrators distributed in a pattern; a planar array of PV cells distributed in alignment with the light concentrators; and a spectral converter that extends between the planar array of light concentrators and the planar array of PV cells, wherein the spectral converter is configured to convert incident light of a first spectral distribution from the array of light concentrators to outgoing light of a second spectral distribution for the array of PV cells. | 2021-04-15 |
20210111669 | Method and Apparatus for Switching Current - A device, system, and method is disclosed for improving safety of a power system. For example, a differential current may be detected using at least one sensor by temporarily enabling sampling of current flowing through one or more conductors. Additionally, current flow may be temporarily altered in order to sample current in a system. The measurements may be handled locally and/or remotely and appropriate actions may be taken to enhance the overall safety of the system. | 2021-04-15 |
20210111670 | PROCESSING DEVICE AND METHOD FOR FORMING CONNECTION CONDUCTORS FOR SEMICONDUCTOR COMPONENTS - A processing device for forming connection conductors for semiconductor components, in particular for producing a periodic structure, which device includes a forming unit for forming at least one connection conductor. The processing device has an advancing unit which is designed to move the connection conductors and the forming unit relative to one another in a direction of advance, and the forming unit has at least one step element, at least one forming element which can be moved relative to the step element, and a forming-element moving unit for moving the forming element relative to the stop element, the forming element, stop element and forming-element moving unit being designed to cooperate such that the connection conductor can be bent by moving the forming element between the stop element and the forming element by the forming-element moving unit. A method for forming connection conductors for semiconductor components is also provided. | 2021-04-15 |
20210111671 | SMART SELF-FEEDING FUSE WITH CURRENT DETECTION AND COMMUNICATION - A smart, self-feeding fuse with current detection and communication capabilities for use in overhead medium voltage electrical distribution networks (15 kV to 34 kV). The device is configured to detect transient or permanent electric faults (sensor), and/or to be used as a communication device (gateway) that preserves the main protection function of the fuse element. The device is assembled on a base fuse and is simply installed by using a maneuver pole, similarly to the installation of a conventional fuse tube. The invention is self-fed by a high output current transformer with the help of photovoltaic cells, using a supercapacitor bank as the only power storage element. | 2021-04-15 |
20210111672 | Remote Array Mapping - Electrical component location is provided. Employed location techniques may include providing a signal, having components to be located sense the signal and report back the sensed signal, and determining relative locations for one or more of the components using the sensed signals reported by the components. | 2021-04-15 |
20210111673 | RC OSCILLATOR - The disclosure relates to a square wave RC oscillator circuit, example embodiments of which include an oscillator circuit for generating an output square wave signal (OUT) having first and second voltage output levels (L, H), the oscillator circuit comprising: a comparator having an output and first and second inputs; a switching circuit configured to provide an oscillatory waveform at the first input of the comparator; and a feedback circuit arranged to sample the first input of the comparator each time the output square wave signal (OUT) switches between the first and second voltage output levels (L, H) and to compare this sampled voltage with first and second reference voltages (V | 2021-04-15 |
20210111674 | Source Injection Mixer - A source injection mixer includes an FET, an IF matching circuit between an IF port and a gate of the FET, and that matches impedance of the IF port and impedance of the gate as viewed from the IF port, a shorting stub of which one end is connected to a source of the FET and another end is grounded, and shorter than ¼ of an electric length at a frequency of LO signals, an LO matching circuit between an LO port and the source of the FET, and that matches impedance of the LO port and impedance of the source as viewed from the LO port, and an RF matching circuit between an RF port and a drain of the FET, and that matches impedance of the RF port and impedance of the drain as viewed from the RF port. | 2021-04-15 |
20210111675 | SIGNAL AMPLIFIERS THAT SWITCH BETWEEN DIFFERENT AMPLIFIER ARCHITECTURES FOR A PARTICULAR GAIN MODE - Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores in a particular gain mode to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a low noise figure amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity. The disclosed signal amplifiers can switch between a first active core and a second active core for a single or particular gain mode to achieve desired signal characteristics during different time periods. | 2021-04-15 |
20210111676 | High-Frequency Power Supply Circuit and Determining Method of Constants of Amplifier Circuit - A high-frequency power supply circuit includes an amplifier circuit. In the amplifier circuit, one end of an inductor is connected to a direct-current power supply. One end of a switching element is connected to the other end of the inductor. A parallel capacitor is connected in parallel to the switching element. One end of an LC series circuit is connected to the one end of the switching element. A circuit capacitor is connected between the other end of the LC series circuit and the other end of the switching element. The amplifier circuit amplifies a signal having a unique frequency input to a control terminal of the switching element. The amplifier circuit outputs, to a load, a current having the frequency from a connection point between the other end of the LC series circuit and the circuit capacitor. | 2021-04-15 |
20210111677 | MULTI-STAGE AMPLIFIER INCLUDING A PRE-DRIVER STAGE - A multi-stage amplifier including a pre-driver stage, and method of operating the same. In one example, the amplifier includes an output stage with a first output transistor coupled to an oppositely doped second output transistor and to an output terminal. The pre-driver stage includes with a first driver transistor coupled to the first output transistor, and a second driver transistor coupled to the second output transistor. The pre-driver stage also includes a first current mirror and a second current mirror coupled to the first driver transistor and the second driver transistor. The pre-driver stage also includes a first translinear loop having a first translinear loop transistor and a second translinear loop having a second translinear loop transistor coupled to the first output transistor and the second output transistor. | 2021-04-15 |
20210111678 | MIXER HAVING PHASE SHIFT FUNCTION AND COMMUNICATIONS DEVICE INCLUDING THE SAME - A mixer includes a load portion connected between an input terminal of a first power voltage and an output terminal of the radio frequency transmit signal and configured to adjust a magnitude of the radio frequency transmit signal, a first switching unit connected to an output terminal of the radio frequency transmit signal, and configured to perform a first switching operation in response to a plurality of local oscillation signals, and a second switching unit connected between the first switching unit and an input terminal of a second power voltage, lower than the first power voltage, and configured to perform a second switching operation in response to a plurality of baseband signals, the plurality of local oscillation signals include an I+ baseband signal, an I− baseband signal, a Q+ baseband signal, and a Q− baseband signal, and the second switching unit includes a first branch performing a switching operation under control of the I+ baseband signal and the Q+ baseband signal, a second branch performing a switching operation under control of the I− baseband signal and the Q− baseband signal, a third branch performing a switching operation under control of the Q+ baseband signal and the I− baseband signal, and a fourth branch performing a switching operation under control of the Q− baseband signal and the I+ baseband signal. | 2021-04-15 |
20210111679 | POWER SPLITTER WITH SIGNAL AMPLIFICATION - A power splitter that amplifies an input radio-frequency (RF) signal. The power splitter uses a single transistor in a common emitter stage of a cascode amplifier and two or more common base stages of the cascode amplifier to amplify and to split the input RF signal. A common base biasing signal can be used to simultaneously enable two or more of the common base stages to generate two or more amplified RF output signals. | 2021-04-15 |
20210111680 | INTERPOLATION OPERATIONAL AMPLIFIER CIRCUIT AND DISPLAY PANEL - Provided is an interpolation operational amplifier circuit, including: at least two sets of differential input pair transistors, each differential input pair transistor including first and second transistors, wherein base terminals of the first and second transistors are electrically connected to serve as a base terminal of the differential input pair transistor, and source electrodes of the first and second transistors are electrically connected to serve as a source electrode of the differential input pair transistor; and a voltage control unit electrically connected to the base terminal and source electrode of the differential input pair transistor, and configured to control a voltage of the base terminal of the P-type differential input pair transistor to be smaller than the first power supply voltage, and/or to control a voltage of the base terminal of the N-type differential input pair transistor to be larger than the second power supply voltage. | 2021-04-15 |
20210111681 | INSTRUMENTATION AMPLIFIER AND RELATED APPARATUS - A feedback network has a feedback output terminal. A digital to analog converter has an analog output terminal. An amplifier includes an input differential pair having an inverting input terminal, a non-inverting input terminal, a first output current terminal and a second output current terminal. The inverting input terminal is coupled to the feedback output terminal, and the non-inverting input terminal is coupled to the analog output terminal. The amplifier includes a feedback differential pair having a third output current terminal, a fourth output current terminal, a first input terminal and a second input terminal. The third output current terminal is coupled to the first output current terminal, and the fourth output current terminal is coupled to the second output current terminal. The amplifier includes an amplifier output terminal coupled to the first input terminal and the second input terminal. | 2021-04-15 |
20210111682 | SIGNAL OUTPUT CIRCUIT - A signal output circuit includes an inverting amplifier circuit, a feedback capacitor and a low pass filter. The inverting amplifier circuit includes an input terminal and an output terminal. The inverting amplifier circuit executes an inverting amplification based on an input signal to output a signal to the output terminal at a pull-up state. An output stage of the inverting amplifier circuit is an open collector or an open drain. The feedback capacitor is connected between the input terminal and the output terminal of the inverting amplifier circuit. The low pass filter has an input and an output. The input of the low pass filter is connected to the output terminal of the inverting amplifier. The output of the low pass filter is connected to the feedback capacitor. | 2021-04-15 |
20210111683 | FEEDBACK SYSTEM AND ASSOCIATED SIGNAL PROCESSING METHOD - The present invention provides a feedback system including a mixing circuit, a forward circuit, a feedback circuit, a feedback gain circuit and a control circuit. In the operations of the feedback system, the mixing circuit generates a mixed signal according to an input signal and a feedback signal, the forward circuit processes the mixed signal to generate an output signal, the feedback gain circuit and the feedback circuit generates the feedback signal according to the output signal, and the control circuit determines a feedback gain of the feedback gain circuit according to a gain of the forward circuit. | 2021-04-15 |
20210111684 | PROVIDING A CONSTANT IMPEDANCE AT AN INPUT OF A SIGNAL AMPLIFIER FOR DIFFERENT GAIN MODES - Disclosed herein are methods for use in operating signal amplifiers that provide impedance adjustments for different gain modes. The impedance adjustments are configured to result in a constant real impedance for an input signal at the amplifier. Some of the disclosed methods adjust impedance using switchable inductors to compensate for changes in impedance with changing gain modes. Some of the disclosed methods adjust a device size to compensate for changes in impedance with changing gain modes. By providing impedance adjustments, the amplifiers reduce losses and improve performance by improving impedance matching over a range of gain modes. | 2021-04-15 |
20210111685 | MULTI-INPUT AMPLIFIER WITH INDIVIDUAL BYPASS PATHS - Described herein are variable gain amplifiers and multiplexers that embed programmable attenuators into switchable paths to provide variable gain for individual amplifier inputs. The variable gain for an individual input is provided using an amplification stage that is common for each input of the amplifier. A variable attenuation is provided for individual inputs through a combination of a band selection switch and an attenuation selection branch. Individual inputs can be configured to bypass the variable attenuation in a high gain mode. | 2021-04-15 |
20210111686 | METHOD FOR GENERATING AUDIO LOUDNESS METADATA AND DEVICE THEREFOR - A method of generating audio loudness performed by an audio loudness generation device may include: receiving loudness information on each of a plurality of audio tracks included in one group; predicting an intermediate loudness distribution, which is a loudness distribution for the one group, on the basis of the loudness information on each of the plurality of audio tracks; and generating an integrated loudness for the one group on the basis of the intermediate loudness distribution. | 2021-04-15 |
20210111687 | CAPACITOR STACKS FOR NOISE FILTERING IN HIGH-FREQUENCY SWITCHING APPLICATIONS AND AN OPTICAL SUBASSEMBLY MODULE IMPLEMENTING SAME - The present disclosure is generally directed to utilizing capacitors stacks with capacitors mounted in a terminal-to-terminal mounting orientation to reduce overall footprint of capacitor arrays for bypass filtering circuits. In an embodiment, each capacitor stack includes at least a first capacitor, a second capacitor, and a ground plane interconnect. The first capacitor includes first and second terminals disposed opposite each other. The first terminal provides a mating surface to couple to the second capacitor, the second terminal couples to a ground plane. The second capacitor includes first and second terminals disposed opposite each other. The first terminal provides a mounting surface to electrically couple to and support the first capacitor, and the second terminal provides a mating surface to electrically and physically couple to the ground plane. Accordingly, the first capacitor can be inverted and mounted atop the second capacitor to eliminate the necessity of wire bonds, for example. | 2021-04-15 |
20210111688 | SURFACE ACOUSTIC WAVE DEVICE WITH MULTI-LAYER PIEZOELECTRIC SUBSTRATE - A surface acoustic wave device is disclosed. the surface acoustic wave device can include a single crystal support layer, an intermediate single crystal layer positioned over the single crystal support layer, a lithium based piezoelectric layer positioned over the intermediate single crystal layer, and an interdigital transducer electrode positioned over the lithium based piezoelectric layer, the surface acoustic wave device configured to generate a surface acoustic wave. The single crystal layer can be a quartz layer, such as a z-propagation quartz layer. A thermal conductivity of the single crystal support layer is greater than a thermal conductivity of the intermediate single crystal layer, and the thermal conductivity of the single crystal support layer is greater than a thermal conductivity of the lithium based piezoelectric layer. | 2021-04-15 |
20210111689 | METHOD OF MANUFACTURING ACOUSTIC WAVE DEVICE WITH MULTI-LAYER PIEZOELECTRIC SUBSTRATE - A surface acoustic wave device is disclosed. The surface acoustic wave device can include a single crystal support layer, an intermediate single crystal layer positioned over the single crystal support layer, a lithium based piezoelectric layer positioned over the intermediate single crystal layer, and an interdigital transducer electrode positioned over the lithium based piezoelectric layer, the surface acoustic wave device configured to generate a surface acoustic wave. The single crystal layer can be a quartz layer, such as a z-propagation quartz layer. A thermal conductivity of the single crystal support layer is greater than a thermal conductivity of the intermediate single crystal layer, and the thermal conductivity of the single crystal support layer is greater than a thermal conductivity of the lithium based piezoelectric layer. | 2021-04-15 |
20210111690 | CRYOGENIC RADIO-FREQUENCEY RESONATOR FOR SURFACE ION TRAPS - The present subject matter provides technical solutions for the technical problems facing cryogenic ion traps by providing a cryogenic radio-frequency (RF) resonator that is compact, monolithic, modular, and impedance-matched to a cryogenic ion trap. The cryogenic RF resonator described herein is power-efficient, properly impedance-matched to the RF source, has a stable gain profile, and is compatible with a low temperature and ultra-high vacuum environment. In some examples, the gain profile is selected so that the cryogenic RF resonator acts as a cryogenic RF amplifier. This cryogenic RF resonator improves the performance of ion traps by reducing or minimizing the heat load and reducing or minimizing the unwanted noise that may erroneously drive trapped ions. These features of the present subject matter improve the performance of atomic clocks and mass spectrometers, and especially improve the performance of trapped ion quantum computers. | 2021-04-15 |
20210111691 | N-Channel High-Power RF Multiplexer - A method for reducing a quantity of cable runs to antennas can include the step of providing a circuit of reactive elements coupled between an input terminal and at least two output terminals. The circuit can be used to separate a broadband signal into two or more disjoint expected frequency ranges. The circuit can match the impedance at the at least two output terminals to the impedance expected by the antennas. The elements of the circuit can have reactances and arrangement so that when a broadband RF signal is applied at the input terminal, two or more disjoint expected frequencies can be applied to the respective output terminals. The power at each output terminal can sufficiently match the antennas' expected power, and insertion losses can be minimized. | 2021-04-15 |
20210111692 | MULTIPLEXER WITH FLOATING RAISED FRAME BULK ACOUSTIC WAVE DEVICE - Aspects of this disclosure relate to a bulk acoustic wave device with a floating raised frame structure. The bulk acoustic wave device includes a first electrode, a second electrode, a piezoelectric layer positioned between the first electrode and the second electrode, and a floating raised frame structure positioned on a same side of the piezoelectric layer as the first electrode and spaced apart from the first electrode. The floating raised frame structure is at a floating potential. The bulk acoustic wave device can suppress a raised frame mode. Related methods, filters, multiplexers, radio frequency front ends, radio frequency modules, and wireless communication devices are disclosed. | 2021-04-15 |
20210111693 | Composite Piezoelectric Film and Bulk Acoustic Resonator Incorporating Same - A bulk acoustic wave resonator with better performance and better manufacturability is described. The bulk acoustic wave resonator includes a composite piezoelectric film. The composite piezoelectric film includes a first sublayer of a first piezoelectric material, a second sublayer of a second piezoelectric material, and a third sublayer of a third piezoelectric material that is disposed between the first sublayer and the second sublayer. The first piezoelectric material has a first lattice constant, the second piezoelectric material has a second lattice constant, and the third piezoelectric material has a third lattice constant that is distinct from the first lattice constant and from the second lattice constant. The composite piezoelectric film may include a sequence of alternating sublayers of two or more distinct piezoelectric materials, or a sequence of composition graded layers having gradually changing composition. | 2021-04-15 |
20210111694 | LAMB WAVE DELAY LINE WITH ALUMINUM NITRIDE PIEZOELECTRIC LAYER - An acoustic wave element is disclosed. The acoustic wave element can include a piezoelectric layer that includes aluminum nitride. The acoustic wave element can also include a diamond like carbon layer. The acoustic wave element can further include an interdigital transducer electrode that is positioned on the piezoelectric layer. The piezoelectric layer is positioned between the interdigital transducer electrode and the diamond like carbon layer. The acoustic wave element is configured to generate a Lamb wave having a wavelength of λ. | 2021-04-15 |
20210111695 | ELLIPTICAL STRUCTURE FOR BULK ACOUSTIC WAVE RESONATOR - An elliptical-shaped resonator device. The device includes a bottom metal plate, a piezoelectric layer overlying the bottom metal plate, and a top metal plate overlying the piezoelectric layer. The top metal plate, the piezoelectric layer, and the bottom metal plate are characterized by an elliptical shape having a horizontal diameter (dx) and a vertical diameter (dy), which can be represented as ellipse ratio R=dx/dy. Using the elliptical structure, the resulting bulk acoustic wave resonator (BAWR) can exhibit equivalent or improved insertion loss, higher coupling coefficient, and higher quality factor compared to conventional polygon-shaped resonators. | 2021-04-15 |
20210111696 | Aluminum Nitride Combined Overtone Resonators for the mmWave Spectrum - A resonator system is provided in which a combined overtone resonator device is excited with a two-dimensional mode of mechanical vibration in a cross sectional plane of a piezoelectric plate in response to an alternating voltage applied through an interdigitated electrode. The cross sectional plane extends along the width direction and the thickness direction, and the two-dimensional mode of mechanical vibration is a two-dimensional combined overtone mode of second and third order asymmetrical Lamb-wave overtones. | 2021-04-15 |
20210111697 | ACOUSTIC WAVE DEVICE - An acoustic wave device includes a support substrate and first and second resonant sections adjacent to each other on the support substrate. Each of the first and second resonant sections includes a piezoelectric thin film, an IDT electrode on the piezoelectric thin film, and a support layer surrounding the piezoelectric thin film in a plan view of the acoustic wave device. The support layer has a different linear expansion coefficient from the piezoelectric thin film. The piezoelectric thin film in the first resonant section and the piezoelectric thin film in the second resonant section are divided by the support layer between the resonant section and the resonant section. | 2021-04-15 |
20210111698 | BONDED BODY AND ELASTIC WAVE ELEMENT - A bonded body includes: a piezoelectric single crystal substrate; a supporting substrate composed of a single crystal silicon; a bonding layer provided between the supporting substrate and piezoelectric single crystal substrate and having a composition of Si | 2021-04-15 |
20210111699 | Bulk Acoustic Wave Resonator with Multilayer Base - A bulk acoustic (BAW) resonator having a multilayer base and method of fabricating the bulk acoustic resonator is disclosed. A BAW resonator comprises a substrate having a cavity and including a frame around the cavity, a multilayer base adjacent the cavity and supported by the frame. The multilayer base includes a first layer of crystalline material having a first lattice constant and a second layer of crystalline material having a second lattice constant that is distinct from the first lattice constant. The BAW resonator further includes a stack over the multilayer base. The stack includes a first electrode formed on the multilayer base, a piezoelectric layer having a first side coupled to the first electrode and a second side opposite to the first side of the piezoelectric layer, and a second electrode coupled to the second side of the piezoelectric layer. | 2021-04-15 |
20210111700 | BAW RESONATORS WITH ANTISYMMETRIC THICK ELECTRODES - A resonator circuit device. This device can include a piezoelectric layer having a front-side electrode and a back-side electrode spatially configured on opposite sides of the piezoelectric layer. Each electrode has a connection region and a resonator region. Each electrode also includes a partial mass-loaded structure configured within a vicinity of its connection region. The front-side electrode and the back-side electrode are spatially configured in an anti-symmetrical manner with the resonator regions of both electrodes at least partially overlapping and the first and second connection regions on opposing sides. This configuration provides a symmetric acoustic impedance profile for improved Q factor and can reduce the issues of misalignment or unbalanced boundary conditions associated with conventional single mass-loaded perimeter configurations. | 2021-04-15 |
20210111701 | Bulk Resonator with Symmetrically Positioned Temperature Compensation Layers - A bulk acoustic wave (BAW) resonator with better performance and better manufacturability is described. A BAW resonator includes a substrate, a BAW stack disposed over the substrate, a first temperature compensation layer disposed between the substrate and the stack, and a second temperature compensation layer disposed over the stack. The BAW stack includes a piezoelectric layer disposed between a first electrode and a second electrode. A method of making a BAW resonator is also disclosed. The method includes forming a first base layer over a substrate including a layer of sacrificial material and a frame surrounding the layer of sacrificial material, forming a first temperature compensation layer over the first base layer, forming a BAW stack over the first temperature compensation layer, forming a second temperature compensation layer over the BAW stack, and removing the layer of sacrificial material to form a cavity adjacent the base layer. | 2021-04-15 |
20210111702 | Bulk Acoustic Resonator Structures with Improved Edge Frames - A bulk acoustic wave (BAW) resonator includes a substrate, a stack over the substrate and including a piezoelectric layer disposed between two electrode layers, and one or more edge frames. The one or more edge frames can be a raised metal frame extending parallel to a periphery of an active region of the stack and has one or more slanted cuts such that the edge frame does not form a closed loop and loss of acoustic energy in the active region through the one or more cuts is reduced, minimized or prevented. Alternatively or additionally, the one or more edge frames include a recessed edge frame in the form of a trench in the piezoelectric layer extending parallel to a boundary of the active region, and may further include a second edge frame formed on the first electrode and embedded in the piezoelectric layer. | 2021-04-15 |
20210111703 | FILTER USING TRANSVERSELY-EXCITED FILM BULK ACOUSTIC RESONATORS WITH TWO FREQUENCY SETTING LAYERS - Acoustic filters and methods are disclosed. A piezoelectric is attached to a substrate, portions of the piezoelectric plate forming one or more diaphragms spanning respective cavities in the substrate. A conductor pattern is formed on a front surface of the piezoelectric plate, the conductor pattern including a plurality of interdigital transducers (IDTs) of a plurality of resonators, interleaved fingers of each of the plurality of IDTs disposed on a respective diaphragm of the one or more diaphragms. A first frequency setting dielectric layer having a first thickness is disposed over the fingers of the IDTs of a first subset of the plurality of resonators. A second frequency setting dielectric layer having a second thickness greater than the first thickness is disposed over the fingers of the IDTs of a second subset of the plurality of resonators, wherein the first subset and the second subset are not identical. | 2021-04-15 |
20210111704 | MULTI-RESONATOR FILTERS - A multi-resonator filter has a signal input terminal, a signal output terminal, and a plurality of resonator components. The plurality of resonator components include an input resonator component coupled to the signal input terminal, an output resonator component coupled to the signal output terminal, and at least one intermediate resonator component coupled between the input resonator component and the output resonator component. The input resonator component, output resonator component and the at least one intermediate resonator component are arranged in a sequence to define a signal path between the signal input terminal and the signal output terminal. The at least one intermediate resonator component includes at least one multiple resonator component, where each multiple resonator component includes a pair of individual resonators coupled in parallel where each individual resonator in a given pair of individual resonators has the same resonant frequency. | 2021-04-15 |
20210111705 | MULTIPLEXER INCLUDING ACOUSTIC WAVE FILTER WITH TRANSMISSION LINE BETWEEN RESONATORS - Aspects of this disclosure relate to a multiplexer that includes an acoustic wave filter including acoustic wave resonators on at least two die with a transmission line electrically connecting the acoustic wave resonators on the two die. The acoustic wave filter can include a plurality of acoustic wave resonators on a first die electrically connected to at least one acoustic wave resonator on a second die via the transmission line. The acoustic wave resonator on the second die can provide a relatively high impedance at a respective passband of one or more other filters of the multiplexer. This can reduce effects of the transmission line of the acoustic wave filter on a respective passband of one or more other filters of the multiplexer. | 2021-04-15 |
20210111706 | ZQ CALIBRATION USING CURRENT SOURCE - A memory device includes a terminal calibration circuit having at least one of a pull-down circuit or a pull-up circuit used in calibrating an impedance of a data bus termination. The memory device also includes a reference calibration circuit configured to generate a calibration current. The terminal calibration circuit can be configured to program an impedance of the least one of a pull-down circuit or a pull-up circuit based on the calibration current. | 2021-04-15 |
20210111707 | DIGITAL INTERPOLATION FILTER, CORRESPONDING RHYTHM CHANGING DEVICE AND RECEIVING EQUIPMENT - A digital interpolation filter delivering a series of output samples approximating a signal x(t) at sampling instants of the form (n+d)T s based on a series of input samples of the signal x(t) taken at sampling instants of the form nT s. Such a filter implements a transfer function in the Z-transform domain, H cd (Z−1), expressed as a linear combination between: a first transfer function H 1 d(Z−1) representing a Lagrange polynomial interpolation of the input samples implemented according to a Newton structure ( | 2021-04-15 |
20210111708 | DRIVING CIRCUIT OF AN ELECTROSTATIC ADHESION BOARD AND AN ELECTROSTATIC ADHESION APPARATUS USING THE DRIVING CIRCUIT - A driving circuit of electrostatic adhesion board, using a DC power source to drive an electrostatic adhesion board, comprising: a N-channel MOS power transistor having characteristics of high current and low On-resistance; a transformer having a primary winding and a secondary winding, the primary winding connected between the power supply voltage node of the DC power source and the drain node of the power transistor, accepting the potential difference between power supply voltage node of the DC power source and the power transistor as a primary voltage, the secondary winding outputting a secondary voltage which is already transformed; a voltage multiplier having an input side coupled to the secondary winding of the transformer, accepting the secondary voltage as its input voltage, then enlarging and coupling as its output voltage to the electrostatic adhesion board; a main controller connected between the power supply voltage node and a ground node of the DC power source, having a control node connected to a gate of the power transistor, controlling the adhesion force produced by the electrostatic adhesion board by controlling the on/off state of the power transistor; and a capacitor connected between the power supply voltage node and the ground node of the DC power source, stabilizing the potential difference of the DC power source. | 2021-04-15 |
20210111709 | METHODS AND SYSTEM FOR A RESETTABLE FLIP FLOP - Various embodiments of the present technology may comprise methods and system for a resettable flip flop. The flip flop may receive a clock signal along a first circuit path and a reset signal along a second circuit path. The first circuit path provides a first high voltage value and a first low voltage value, and the second circuit path provides a second high voltage value that is greater than the first high voltage value and a second low voltage value that is less than the first low voltage value. | 2021-04-15 |
20210111710 | COMPACT HIGH-VOLTAGE NANOSECOND PULSED-POWER GENERATOR - A pulsed-power circuit includes first, second, third and fourth compression stages. The first and second stages each include at least one pre-charged capacitor and at least one inductor in series, and at least one switch operative to pump a DSRD (drift-step-recovery diode). The pre-charged capacitor of the second stage is pre-charged in negative direction with respect to the pre-charged capacitor of the first stage. The third and fourth stages each include at least one DSRD. The switches of the first and second stage are operative to drive (pump and then pulse) the DSRDs of the third and fourth stages. | 2021-04-15 |
20210111711 | Pulse Stretcher Circuitry - Various implementations described herein are directed to an integrated circuit having clock generation circuitry that receives an input clock signal and provides a first clock signal having a first pulse width. The integrated circuit includes first pulse-stretching circuitry coupled between the clock generation circuitry and input latch control circuitry. The first pulse-stretching circuitry receives the first clock signal and provides a second clock signal to the input latch control circuitry based on an enable signal. The second clock signal has a second pulse width that is at least greater than the first pulse width. The integrated circuit may include second pulse-stretching circuitry coupled between the clock generation circuitry and read-write circuitry. The second pulse-stretching circuitry provides a third clock signal to the read-write circuitry based on the enable signal. The third clock signal has a third pulse width that is at least greater than the first pulse width. | 2021-04-15 |
20210111712 | CIRCUIT ARRANGEMENT WITH CLOCK SHARING, AND CORRESPONDING METHOD - In an embodiment, a system includes a slave circuit configured to receive an external clock signal from a master circuit, the slave circuit comprising first and second peripherals configured to receive respective clock signals obtained from the external clock signal, wherein the master circuit is configured to send to the slave circuit the external clock signal according to two different timing modes, wherein the slave circuit comprises a logic circuit configured to provide a locking signal to the first peripheral circuit when the logic circuit detects a given operating mode of the slave circuit, wherein the master circuit is configured to send the external clock signal according to a first timing mode before receipt of the locking signal, and wherein the master circuit is configured, following upon receipt of the locking signal, to send the external clock signal according to a second timing mode different from the first timing mode. | 2021-04-15 |
20210111713 | ELECTRONIC CIRCUIT WITH TWO VOLTAGE SUPPLY CIRCUITS - An electronic circuit includes an output, and a first supply circuit and a second supply circuit, which are each connected to the output. The first supply circuit and the second supply circuit each include a supply input; a first circuit node; a first electronic switch; a first rectifier element connected in parallel with the first electronic switch; at least one second electronic switch that is connected between the supply input and the first circuit node; at least one second rectifier element that is connected in parallel with the at least one second switch, wherein the at least one second rectifier element and the first rectifier element are connected in antiseries with one another; and a control circuit. The control circuit activates the first switch and the second switch and receives a supply voltage from the first circuit node at a supply input. | 2021-04-15 |
20210111714 | HIGH-VOLTAGE FAST SWITCHING DEVICES - A device for switching a high-voltage source, comprising: a plurality of switching devices coupled in series starting from a first switching device and ending in a last switching device, said device enabling coupling of said high-voltage source with at least a selected one of said switching devices; a voltage limiter coupled with said switching devices; and a switching time synchronizer; wherein said first switching device is configured to directly receive a control signal for changing a switching state of said device, said first switching device is configured to facilitate a cascaded transition of switching states in successive said switching devices in said series, where said switching time synchronizer is configured to synchronize a time at which transitions to said switching states of successive said switching devices take effect, and said voltage limiter is configured to limit overvoltage conditions to said switching devices during said transitions. | 2021-04-15 |
20210111715 | Adaptive Control of Non-Overlapping Drive Signals - An improved circuit or method generates first and second initial pulses that do not overlap. First and second drive pulses are generated based on the first and second initial pulses, respectively. A first transistor is turned on with the first drive pulses. A second transistor is turned on with the second drive pulses. A current flows in response to an on-time state of the first transistor overlapping with an on-time state of the second transistor. A delay of the second drive pulses is decreased based on a time of the current flow overlapping with one of the first initial pulses; and the delay of the second drive pulses is increased based on the time of the current flow overlapping with one of the second initial pulses. | 2021-04-15 |
20210111716 | ELECTRIC CIRCUIT FOR TESTING A POWER-ON RESET CIRCUIT - An electric circuit for testing a power-on reset circuit. The electric circuit including a comparator, which is configured to detect an undervoltage for an input voltage to be compared to a reference voltage and to output an output signal, a first noise filter for filtering out noise from the output signal received as a first input signal for a first time period and for outputting a first filtered output signal of a second noise filter for filtering out noise from a second input signal for a second time period, and for outputting a second filtered output signal, and a digital part having an OR gate for the logical linkage of a first filtered output signal and a second filtered output signal for the output of a power-on reset signal. | 2021-04-15 |
20210111717 | DIRECT CURRENT CIRCUIT SWITCH - An apparatus, system and method of controlling the supply of DC current from a power source to an electrical load provides for a protective circuit that senses the characteristics of the connected load prior to permitting the enablement of a switch connecting the supply and the load. A voltage arising from applying a constant current to the load during a time period is compared with a predetermined threshold determined by the intended capacity of the switch so that, when closed, the current through the switch is compatible with the switch. The protective circuit may be used in conjunction with semiconductor switches, electromechanical contactors or relays. A plurality of such devices may be incorporated in an enclosure and controlled by logic so as to manage the supply of power from a power source to a plurality of electrical loads having differing power requirements. | 2021-04-15 |
20210111718 | MULTIPLEXER DEVICE AND SIGNAL SWITCHING METHOD - A multiplexer device includes a plurality of selection circuits and potential setting circuits. The plurality of selection circuits respectively receive a first data signal and a second data signal, and select a corresponding one of the first data signal and the second data signal as an output signal according to the first selection signal. When the second data signal is selected as the output signal, the potential setting circuit sets a potential of a node of a first selection circuit of the plurality of selection circuits to a first voltage. The first selection circuit is configured to receive a first data signal. | 2021-04-15 |
20210111719 | Camera Control Key - A camera control key assembly including a metal housing with a pocket containing a sensor window, a metal strip abutting a side of the sensor window, a spacer positioned to abut the metal strip, at least one capacitive touch sensor abutting the spacer, and a control key set into the pocket of the housing and contacting a first side of the sensor window. Preferably, the plastic sensor window is insert molded into the metal housing making the assembly inherently watertight. The assembly comprises at least one force concentrator on the control key to act upon the sensor window which in turn allows the capacitive touch sensor to register a multitude of different user inputs, including pressure, varied pressure, duration, taps, slides and swipes. | 2021-04-15 |
20210111720 | DYNAMIC TRANSISTOR GATE OVERDRIVE FOR INPUT/OUTPUT (I/O) DRIVERS AND LEVEL SHIFTERS - An apparatus for generating an output voltage signal based on an input voltage signal. The apparatus includes a first field effect transistor (FET) including a first gate configured to receive a first gate voltage based on the input voltage signal; a second (FET) including a second gate configured to receive a second gate voltage based on the input voltage signal, wherein the first and second FETs are coupled in series between a first voltage rail and a second voltage rail, and wherein the output voltage signal is produced at an output node between the first and second FETs; and a gate overdrive circuit configured to temporarily reduce the first gate voltage during a portion of a transition of the output voltage signal from a logic low level to a logic high level. | 2021-04-15 |
20210111721 | Circuits And Methods For Programmable Memory - An integrated circuit includes a memory array circuit, flip-flop circuits, and a write programmable matrix circuit. A first one of the flip-flop circuits is coupled to store one of a first write address signal or a first data input signal. A second one of the flip-flop circuits is coupled to store one of a second write address signal or a second data input signal. A write programmable matrix circuit is coupled to receive signals stored in the flip-flop circuits. The write programmable matrix circuit is coupled to provide a subset of the signals stored in the flip-flop circuits to inputs of the memory array circuit through option conductors in the write programmable matrix circuit during write operations to the memory array circuit. | 2021-04-15 |
20210111722 | METHODS, APPARATUS, AND ARTICLES OF MANUFACTURE TO IMPROVE IN-MEMORY MULTIPLY AND ACCUMULATE OPERATIONS - Methods, apparatus, systems, and articles of manufacture are disclosed to improve in-memory multiply and accumulate operations. An example apparatus includes a first multiplexer in a subarray of memory, the first multiplexer to receive first values representative of a column of a lookup table (LUT) including entries to represent products of four-bit numbers and return second values from an intersection of a row and the column of the LUT based on a first element of a first operand; shift and adder logic in the subarray, the shift and adder logic to shift the second values based on at least one of the first element of the first operand or a first element of a second operand; and accumulation storage in the subarray, the accumulation storage to store at least the shifted second values. | 2021-04-15 |
20210111723 | DUAL ELECTRO-MECHANICAL OSCILLATOR FOR DYNAMICALLY REPROGRAMMABLE LOGIC GATE - Embodiments include a logic gate system comprising a first micro-cantilever beam arranged in parallel to a second micro-cantilever beam in which a length of the first micro-cantilever beam is shorter than a length of the second micro-cantilever beam. The first micro-cantilever beam is adjacent to the second micro-cantilever beam and the first micro-cantilever beam is coupled to an input DC bias voltage source to the logic gate system. The second micro-cantilever beam is coupled to an input AC voltage signal that dynamically sets a logic operation of the logic gate system by at least changing an operating resonance frequency for one or more of the first micro-cantilever beam and the second micro-cantilever beam. | 2021-04-15 |
20210111724 | PHASE-LOCKED LOOP CIRCUIT AND CLOCK GENERATOR INCLUDING THE SAME - A phase-locked loop (PLL) circuit may include a voltage-controlled oscillator, a sub-sampling PLL circuit, and a fractional frequency division control circuit. The fractional frequency division control circuit may include a voltage-controlled delay line that routes a feedback signal to generate delay information, a replica voltage-controlled delay line to which the delay information is applied and configured to route a reference clock signal to generate a plurality of delay reference clock signals each delayed by up to a different respective delay time, and a digital-to-time converter (DTC) configured to generate the selection reference clock signal from the plurality of delay reference clock signals and output the selection reference clock signal to the sub-sampling PLL circuit. | 2021-04-15 |
20210111725 | PHASE-LOCKED LOOP APPARATUS AND METHOD FOR CLOCK SYNCHRONIZATION - A phase-locked loop (PLL) apparatus and a method for clock synchronization are disclosed. According to an embodiment, the PLL apparatus includes an adjustable oscillator, one or more first difference determiners, one or more first parameter determiners and a loop integrator. The adjustable oscillator can generate an oscillating signal based on a control signal. Each first difference determiner can receive a first clock reference signal and determine a phase difference between the received first clock reference signal and the oscillating signal. Each first parameter determiner can receive a phase difference from the one or more first difference determiners and generate a first control parameter based on a variation of the phase difference. The loop integrator can integrate the one or more first control parameters to generate the control signal for the adjustable oscillator. | 2021-04-15 |
20210111726 | FREQUENCY LOCK LOOP CIRCUITS, LOW VOLTAGE DROPOUT REGULATOR CIRCUITS, AND RELATED METHODS - Frequency lock loop (FLL) circuits, low voltage dropout regulator circuits, and related methods are disclosed. An example gate driver integrated circuit includes a first die including a FLL circuit to generate a first clock signal having a first phase and a first frequency, a second clock signal having the first frequency and a second phase different from the first phase, and control a plurality of switching networks to increase the first frequency to a second frequency, and generate a feedback voltage based on the second frequency, and a second die coupled to the first die, the second die including a low dropout (LDO) circuit and a driver, the driver configured to control a transistor based on the first frequency, the second die configured to be coupled to the transistor, the LDO circuit to generate a pass-gate voltage based on an output current of the LDO circuit satisfying a current threshold. | 2021-04-15 |
20210111727 | DPLL RESTART WITHOUT FREQUENCY OVERSHOOT - A system includes a digital phase-locked loop (DPLL) having a loop filter and a digitally-controlled oscillator (DCO). The system also includes a clock generator coupled to an output of the DPLL, and a plurality of clock domains coupled to the clock generator. The DPLL is configured to transition between a low power mode and a normal mode, wherein the loop filter is configured to maintain its value when the DPLL transitions from the normal mode to the low power mode. The DCO is configured to output a DCO clock signal based on the maintained loop filter value when the DPLL transitions from the low power mode to the normal mode. | 2021-04-15 |
20210111728 | WIRELESS COMMUNICATION APPARATUS - According to one embodiment, a wireless communication apparatus includes receiver circuitry and transmitter circuitry. The receiver circuitry is configured to receive a first frame addressed to another apparatus, the first frame being transmitted by a first wireless communication apparatus, and estimate a difference between an oscillation frequency of an oscillator of the first wireless communication apparatus and an oscillation frequency of an oscillator of the wireless communication apparatus based on the first frame. The transmitter circuitry is configured to transmit a third frame at a frequency determined based on the difference during a period at least partially overlapping a period during which the first wireless communication apparatus transmits a second frame addressed to a second wireless communication apparatus. | 2021-04-15 |
20210111729 | Apparatus and Methods for Digital Phase Locked Loop with Analog Proportional Control Function - Described herein is a digital phase locked loop (PLL) which includes a phase frequency detector (PFD) outputting a pulse width modulated (PWM) up pulse and a PWM down pulse based on comparison of a reference clock and a feedback clock, a digital integral circuit connected to the PFD, the digital integral circuit outputting a digital control signal based on the PWM up and down pulses, and a controlled oscillator (CO) connected to the digital integral circuit and an output and input of the PFD. The CO receiving the PWM up and down pulses from the PFD and adjusting a frequency of the CO based on the digital control signal and the PWM up and down pulses to generate an output clock. The feedback clock is based on the output clock and the reference clock is aligned with the feedback clock by adjusting the output clock frequency until frequency/phase lock. | 2021-04-15 |
20210111730 | SYSTEMS AND METHODS FOR REMOVING LOW FREQUENCY OFFSET COMPONENTS FROM A DIGITAL DATA STREAM - A method for removing low frequency offset components from a digital data stream includes receiving, at an input of an analog-to-digital converter (ADC), an analog input signal from one or more analog front end components. The analog input signal has an associated low frequency offset due, at least in part, to the analog front end components. The method also includes generating, at an output of the ADC, a digital data stream representative of the analog input signal. The digital data stream having an associated low frequency offset due, at least in part, to the analog front end components and the ADC. One or more low pass finite impulse response (FIR) filters are applied to the digital data stream to detect the low frequency offset components in the digital data stream, and generate a filtered output signal with only the low frequency offset components present. A corrected digital data stream without the low frequency offset components is generated in response thereto, for example, by taking the difference of the filtered output signal from the digital data stream. | 2021-04-15 |
20210111731 | Reducing Harmonic Distortion by Dithering - A digital signal generation assumes that a base frequency (the frequency with which the primitive phase angles are specified relative to) is equal to the carrier frequency for all relevant times. But this causes errors in the digital signals output to each array element transducer. Thus, it is necessary for the development of a signal generation system that is capable of producing a digital signal using the free selection of amplitude and phase. This is used to produce a substantially error-free signal that preserves the amplitude and phase relative to a constant base frequency while allowing the carrier frequency to vary. | 2021-04-15 |
20210111732 | ANALOG-TO-DIGITAL CONVERTOR (ADC) WITH A SYNTHESIZED DELAY STAGE - Embodiments may relate to a circuit for use in an analog-to-digital converter (ADC) circuit. The circuit may include a first residue amplifier stage and a second residue amplifier stage. The circuit may further include a synthesized delay stage with a digital-to-analog converter (DAC) electrically positioned between a signal input and the input of the second residue amplifier stage. The circuit may further include a resistor electrically positioned between the signal input and the input of the second residue amplifier stage. Other embodiments may be described or claimed. | 2021-04-15 |
20210111733 | SYSTEM AND METHOD FOR A SUPER-RESOLUTION DIGITAL-TO-ANALOG CONVERTER BASED ON REDUNDANT SENSING - A digital-to-analog converter device including a set of components, each component included in the set of components including a number of unit cells, each unit cell being associated with a unit cell size indicating manufacturing specifications of the unit cell is provided by the present disclosure. The digital-to-analog converter device further includes a plurality of switches, each switch included in the plurality of switches being coupled to a component included in the set of components, and an output electrode coupled to the plurality of switches. The digital-to-analog converter device is configured to output an output signal at the output electrode. A first unit cell size associated with a first unit cell included in the set of components is different than a second unit cell size associated with a second unit cell included in the set of components. | 2021-04-15 |
20210111734 | DELTA-SIGMA MODULATOR AND METHOD FOR REDUCING NONLINEAR ERROR AND GAIN ERROR - Σ-Δ modulator and method for reducing nonlinear error and gain error. The Σ-Δ modulator includes: a plurality of sampling capacitors, configured to sample an input voltage or simultaneously sample an input voltage and a reference voltage signal; an operational amplifier; a plurality of switches, configured to select to sample the input voltage and the reference voltage signal; an integrating capacitor, configured to perform integration superposition on the input voltage and the reference voltage signal sampled by the sampling capacitors; and a control assembly, configured to control, to select to sample the reference voltage signal or simultaneously sample the input voltage and the reference voltage signal within a cycle, and to perform clock control on the sampling capacitors that simultaneously sample the input voltage and the reference voltage signal within a next cycle. During input sampling, Vref signals of two capacitors are simultaneously sampled to offset an overlarge area of the integrating capacitor, and a pseudo random number is used to control a polling timing of the capacitors to solve a problem of idle tone of a Σ-Δ modulator, so that the area of the integrating capacitor is effectively reduced, thereby reducing manufacturing costs of an integrated circuit and reducing an output swing. | 2021-04-15 |
20210111735 | SYSTEM AND METHOD FOR INCREASING LOGICAL SPACE FOR NATIVE BACKUP APPLIANCE - One embodiment provides a computer implemented method of data compression including segmenting user data into data segments; deduplicating the data segments to form deduped data segments; compressing the deduped data segments into compression units using a hardware accelerator; packing the compression units into compression regions; and packing the compression regions into one or more containers. | 2021-04-15 |
20210111736 | VARIATIONAL DROPOUT WITH SMOOTHNESS REGULARIZATION FOR NEURAL NETWORK MODEL COMPRESSION - A method, computer program, and computer system is provided for compressing a deep neural network model. Weight coefficients associated with a deep neural network are quantize and entropy-coded. The quantized and entropy-coded weight coefficients are locally smoothed. The smoothed weight coefficients are compressed based on applying a variational dropout to the weight coefficients. | 2021-04-15 |
20210111737 | LPDC CODE TRANSMISSION METHOD USING ROW-ORTHOGONAL STRUCTURE AND APPARATUS THEREFOR - A method for encoding a quasi-cyclic low-density parity-check (LDPC) code according to an embodiment of the present invention comprises: a step of generating a multi-edge LDPC code matrix which comprises a high rate code matrix and a single parity check code matrix; and a step of encoding a signal using the multi-edge LDPC code matrix, wherein the single parity check code matrix may be configured by connecting a first matrix which is configured as a quasi row-orthogonal structure matrix and a second matrix which is configured as a pure row-orthogonal structure. | 2021-04-15 |
20210111738 | APPLICATION OF LOW-DENSITY PARITY-CHECK CODES WITH CODEWORD SEGMENTATION - A low-density parity-check (LDPC) decoder performs check node computations as N different segments of the check nodes which have connections only to a codeword segment of length C/N bits as well as check nodes that have connections across the entire codeword of length C. The decoder can include a controller or other compute hardware to decode the codeword, including to perform computations for separate segments of C/N bits of the codeword. The system can perform computations including adjustment of the decode computations based on an expected error rate for selected segments of the codeword. | 2021-04-15 |
20210111739 | ENHANCED INFORMATION SEQUENCES FOR POLAR CODES - Systems and methods are disclosed for performing polar encoding of a number of information bits for transmission in a wireless communication system in a manner that is optimized for a specific code length. In some embodiments, a method of operation of a transmit node in a wireless communication system comprises performing polar encoding of a set of K information bits to thereby generate a set of polar-encoded information bits where the K information bits are mapped to the first K information bit locations specified in an information sequence S | 2021-04-15 |
20210111740 | SYSTEM AND METHOD FOR DECODING ENCODED MESSAGES IN A WIRELESS COMMUNICATION SYSTEM - Aspects of the subject disclosure may include, for example, obtaining a received channel-encoded data block having information bits, a transmitted error-check value, and redundant code bits. The redundant code bits correspond to a channel code applied to the received channel-encoded data block prior to transmission via a communication channel. A channel code type is identified and responsive to it being systematic, the information bits and the transmitted error-check value are obtained without decoding according to the channel code. The received channel-encoded data block is checked according to the transmitted error-check value to obtain a result. Responsive to the result not indicating an error, extracting the information bits without decoding the received channel-encoded data block according to the channel code. Responsive to the result indicating an error, decoding the received channel-encoded data block according to the channel code to obtain decoded information bits. Other embodiments are disclosed. | 2021-04-15 |
20210111741 | DECOMPRESSION APPARATUS AND CONTROL METHOD THEREOF - A decompression apparatus is provided. The decompression apparatus includes a memory configured to store compressed data decompressed and used in neural network processing of an artificial intelligence model, a decoder configured to include a plurality of logic circuits related to a compression method of the compressed data, decompress the compressed data through the plurality of logic circuits based on an input of the compressed data, and output the decompressed data, and a processor configured to obtain data of a neural network processible form from the data output from the decoder. | 2021-04-15 |