| 15th week of 2009 patent applcation highlights part 15 |
| Patent application number | Title | Published |
|---|
| 20090091315 | ROTATION DETECTOR - A rotation detector includes: a magnet to form a magnetic field between the magnet and a rotary member; a magnetism detection element positioned in the proximity of the magnet to detect a variation in the magnetic field due to a rotation of the rotary member; and a signal processing circuit | 2009-04-09 |
| 20090091316 | TURNING DEVICE POSITION SENSING SYSTEM AND METHOD - A system for determining an absolute position of a motor. The system includes first and second multi-polar magnetic rings, first and second processing units, and at least one external sensor The first multi-polar magnetic ring is concentrically positioned around the motor, and has a plurality of pole pairs. The second multi-polar magnetic ring is concentrically positioned around the first multi-polar magnetic ring, and has at least one pole pair. The first processing unit is positioned near the first multi-polar magnetic ring to determine an angular position over one of the pole pairs of the first multi-polar magnetic ring. The sensor is positioned external to the processing unit and over the second multi-polar magnetic ring to indicate a state of the pole pair of the second multi-polar magnetic ring. The second processing unit generates an absolute position of the motor based on the angular position and the state. | 2009-04-09 |
| 20090091317 | Contactless roration angle sensor - There is provided a rotation angle sensor which does not require resin and an O ring for sealing and is applicable to such a structure that a rotating body to be detected passes through a center portion. A waterproof surface on the main body side | 2009-04-09 |
| 20090091318 | PHASED SCAN EDDY CURRENT ARRAY PROBE AND A PHASED SCANNING METHOD WHICH PROVIDE COMPLETE AND CONTINUOUS COVERAGE OF A TEST SURFACE WITHOUT MECHANICAL SCANNING - A phased scanning method and phased scan eddy current array probe suitable for in-situ eddy current inspection of a structure without mechanical scanning. Overlapping subsets of the sensor elements within the array probe are dynamically connected in series and sequentially scanned to simulate the mechanical motion of a conventional array probe along a test surface. An algorithm to effectively balance the scan data is provided which comprises obtaining a reference scan at the time of probe installation, storing the measurement data from this reference scan in a memory device located within the probe, subtracting this reference curve from the curve obtained by all subsequent measurement scans to produce an adjusted curve, and processing the resulting adjusted curve through a high pass filter. A technique for verifying sensor elements of an eddy current array probe after permanent or semi-permanent installation against a test structure is also provided. | 2009-04-09 |
| 20090091319 | Device to test the good working order of a magnetic field generator - A device to test the good working order of a magnetic field generator, and namely a demining coil, such device comprising at least one evaluation means for the magnetic field coupled with at least one display means, device wherein said evaluation means comprise at least one wound coil able to be positioned so that the lines of the magnetic field pass through it, said wound coil linked to evaluation electronics powered by said wound coil itself. | 2009-04-09 |
| 20090091320 | Methods and Apparatus for Monitoring a Property of a Formation Fluid - Methods and apparatus for the characterization of formation fluids are disclosed. A downhole tool disposed in a borehole penetrating a subterranean formation obtains a NMR measurement, effects a change in a characteristic of the formation fluid, and obtains another NMR measurement subsequent to the change. Alternatively, the downhole tool effects a radial gradient of a characteristic of the formation and obtains NMR measurements at two or more selected radial distances from the wellbore wall. A parameter representative of the subterranean formation or the formation fluid is further determined from the NMR measurements. | 2009-04-09 |
| 20090091321 | SELF NAVIGATING CARTESIAN TRAJECTORY - A method for magnetic resonance imaging (MRI) is provided. A magnetic resonance excitation is provided. A magnetic field is read out through k-space using winders, wherein some of the winders overlap for a length of the winders. Readout data from overlapping lengths of winders is used to estimate motion. The readout may use a two dimensional discrete Fourier transform acquisition. | 2009-04-09 |
| 20090091322 | Single-shot magnetic resonance spectroscopic imaging with partial parallel imaging - The present invention has a magnetic resonance spectroscopic imaging (MRSI) method that allows collecting a complete spectroscopic image with one spectral dimension and up to three spatial dimensions in a single signal excitation. The method employs echo-planar spatial-spectral encoding combined with phase encoding interleaved into the echo-planar readout train and partial parallel imaging to reconstruct spatially localized absorption mode spectra. This approach enables flexible tradeoff between gradient and RF encoding to maximize spectral width and spatial resolution. Partial parallel imaging (e.g. SENSE or GRAPPA) is employed with this methodology to accelerate the phase encoding dimension. A preferred implementation is with the recently developed superresolution parallel MRI method, which accelerates along both the readout and phase encoding dimensions and thus enables particularly large spectral width and spatial resolution. The symmetrical k-space trajectory of this methodology is designed to compensate phase errors due to convolution of spatial and spectral encoding. This method is suitable for hyperpolarized MRSI, spatial mapping of the diffusion coefficients of biochemicals and functional MRI using quantitative mapping of water relaxation. | 2009-04-09 |
| 20090091323 | MAGNETIC RESONANCE IMAGING APPARATUS AND METHOD - A magnetic resonance imaging apparatus comprises static magnetic field generating means for generating a static magnetic field in an imaging space, a gradient magnetic field generating means for generating a gradient magnetic field in the imaging space, high-frequency magnetic field generating means for generating a high-frequency magnetic field so as to induce nuclear magnetic resonance in a subject placed in the imaging space, signal receiving means for detecting a nuclear magnetic resonance signal from the subject, signal processing means for reconstructing an image by using the detected nuclear magnetic resonance signal, display means for displaying the image, a table for placing the subject thereon to dispose the subject in the imaging means, and table moving means for moving the table on which the subject is placed. | 2009-04-09 |
| 20090091324 | MRI APPARATUS - A flip-angle calculating unit calculates a flip angle of a fat-suppression pulse by inputting scanning parameters read from a scanning-parameter storage unit based on scanning conditions set by a scan-condition setting unit and a desired fat-suppression level, into a predetermined computing program. A control unit suppresses fat signals to a desired level by performing irradiation of a fat-suppression pulse having the calculated flip angle and application of a spoiler gradient magnetic field onto a scan target portion of a subject by controlling a gradient magnetic-field generating unit and a transmitting-receiving unit, and further performs irradiation of an RF pulse and application of a gradient magnetic field in accordance with a predetermined pulse sequence, thereby detecting water signals and suppressed fat signals as MR signals. An image-data creating unit creates image data by reconstructing the MR signals. | 2009-04-09 |
| 20090091325 | METHOD OF DETERMINING DAMAGE TO SKIN - The invention provides a method for determining the presence of high molecular weight molecules, aminoacid molecules or protein fragments, in human or other mammalian skin, comprising irradiating a sample of the said skin with light at one or more wavelengths present in solar radiation, in the presence of a spin-trapping agent for radicals of said molecules, and using comparative electron spin resonance (ESR) spectroscopy to determine or investigate the presence of radicals of the said molecules induced in the skin by the light. The method may be used to investigate a range of skin and other tissue damage and the efficacy of agents and methods intended to protect skin from damage. | 2009-04-09 |
| 20090091326 | MAGNETIC RESONANCE RF TRANSMISSION ARRANGEMENT AND METHOD WITH COMMONLY FED LABELING AND EXCITATION ANTENNAS - A radio-frequency transmission device for a magnetic resonance system to generate magnetic resonance exposures of an examination region of an examination subject, has: a first radio-frequency transmission antenna that emits radio-frequency signals in the examination region, a radio-frequency amplifier that supplies the first radio-frequency transmission antenna, with radio-frequency signals with a predetermined radio-frequency transmission power, and a second radio-frequency transmission antenna fashioned to label a medium flowing in the examination region and/or examination regions via emission of labeling radio-frequency signals, such that the medium can be identified in the generated magnetic resonance exposures of the examination region. The second radio-frequency transmission antenna is coupled with the radio-frequency amplifier to supply the first radio-frequency transmission antenna, such that it likewise supplies the second radio-frequency transmission antenna with radio-frequency signals with a predetermined radio-frequency transmission power for the emission of radio-frequency labeling signals. | 2009-04-09 |
| 20090091327 | Protection of a Multidirectional Antenna - The disclosure provides an apparatus and method for estimating one or more formation properties downhole. The apparatus includes a tool body that has a longitudinal axis. The tool body has a number of metallic pillars that are attached to or are an integral part of the tool body. Antenna wires may be positioned on the tool body between the pillars in a plurality of orientations to provide a multidirectional antenna. An insulating material is used to cover the antenna wires. A high magnetic permeability material is placed between the antenna wires and the tool body. The antenna may be configured to operate as a transmitter or as a receiver for a resistivity sensor or an NMR sensor. | 2009-04-09 |
| 20090091328 | Determining correction factors representing effects of different portions of a lining structure - To determine effect on a magnetic field caused by a lining structure in a wellbore, an array may be deployed into the wellbore lined with the lining structure. The array comprises a plurality of sensors including sensor A configured to operate as a transmitter, sensor B configured to operate as either a transmitter or a receiver, and sensor C configured to operate as a receiver. The array measures magnetic fields using sensor B as a receiver and sensor C in response to activation of sensor B as a transmitter and sensor A. A plurality of lining structure correction factors can be calculated based on the measured magnetic fields, based on the reciprocity of the sensors. | 2009-04-09 |
| 20090091329 | ELECTRIC FIELD SENSOR FOR MARINE ENVIRONMENTS - A sensor (S) for marine measurements of an electric field, the sensor (S) including at least two electrodes ( | 2009-04-09 |
| 20090091330 | Device and method for actuator monitoring of a safety-related load circuit connected with two channels - The invention relates to a method and to devices for monitoring actuators arranged in the load circuit of an output circuit for switching the load circuit, wherein a number of actuators ( | 2009-04-09 |
| 20090091331 | CIRCUIT BOARD AND METHOD FOR AUTOMATIC TESTING - A circuit board (CB) and method for automatic testing of an electronic device under test (DUT). The circuit board (CB) has a first terminal (T | 2009-04-09 |
| 20090091332 | Vehicle power supply device - A vehicle power supply device comprises a lithium battery module that includes a plurality of lithium battery cells, first control devices, voltage detection harnesses via which terminal voltages at individual lithium battery cells are input to the first control devices, a second control device and a signal transmission path through which signals are transmitted. The first control device comprises a selection circuit that selects terminal voltages at individual lithium battery cells, a voltage measurement circuit that measures the selected terminal voltages, balancing switches used to discharge individual lithium battery cells, a balancing switch control circuit that controls open/close of the balancing switches, and a diagnosis circuit for detecting an electrically abnormal connection in the detection harnesses. | 2009-04-09 |
| 20090091333 | STACKED SEMICONDUCTOR APPARATUS WITH CONFIGURABLE VERTICAL I/O - The present invention provides an apparatus including a stacked plurality of devices and a related method. The apparatus includes a stacked plurality of devices including a master device and at least one secondary device; a plurality of segments, each segment being associated with one of the stacked plurality of devices; and a plurality of N vertical connection paths traversing the stacked plurality of devices. The apparatus further includes a plurality of M vertical signal paths configured from the plurality of N vertical connections paths, wherein M is less than N, and at least one of the plurality of M vertical signal paths is a merged vertical signal path adaptively configured by the master device using at least one segment from each one of at least two of the plurality of N vertical connection paths. | 2009-04-09 |
| 20090091334 | Calibration Circuit for Resistance Component - A calibration circuit including a plurality of first resistance components, a plurality of second resistance components, and a first feedback system is provided. The first feedback system selects M | 2009-04-09 |
| 20090091335 | Methods for Characterizing Dielectric Properties of Parts - Characterizing dielectric properties of a part includes placing a full-sized part within a dielectric property measurement apparatus. In one embodiment, the full-sized part is a dielectric part of a plasma processing system. The dielectric property measurement apparatus is operated to determine a dielectric constant value of the full-sized part and a loss tangent value of the full-sized part. The determined dielectric constant and loss tangent values are affixed to the full-sized part. | 2009-04-09 |
| 20090091336 | Capacitive Position Sensor - A method of manufacturing a non-contacting position sensor is disclosed. A sensor manufactured with the disclosed geometry, will typically obtain position resolutions of 1 part in 8*N*2 | 2009-04-09 |
| 20090091337 | CARBON FILM COMPOSITE, METHOD OF MANUFACTURING A CARBON FILM COMPOSITE AND SENSOR MADE THEREWITH - Manufacturing a carbon film composite including depositing a carbon film layer onto a substrate, depositing a catalyst suitable for catalyzing the growth of carbon nanotubes onto the carbon film layer and heating in the presence of a carbon-source gas in a substantially inert environment. A carbon film composite featuring a carbon film layer deposited onto a substrate. The carbon film layer has an active surface that is electrically sensitive to the presence of target chemicals. A chemical sensor featuring such a carbon film composite that also includes a first electrode and a second electrode in electrical contact with an active surface of the carbon film composite and a resistivity monitoring device connected to the first and second electrodes. A method of sensing a target chemical featuring exposing such a carbon film composite to a target chemical and recording a change in resistivity across the carbon film composite. | 2009-04-09 |
| 20090091338 | DISPOSABLE TOTAL DISSOLVED SOLIDS METER AND METHODS OF USE THEREOF - A disposable meter for testing the level of total dissolved solids in a water source and a method of testing the concentration of total dissolved solids are herein disclosed. The disposable meter may include a body with at least water resistant properties, a first indicator, the energization of which is indicative of a threshold level measured total dissolved solids, a pair of electrodes wherein energization passing between the pair of electrodes completes a circuit, and circuitry disposed within the body connected to the first indicator and the pair of electrodes. The circuitry may be configured to commence energization to pass between the pair of electrodes, measure the conductivity of the water between the pair of electrodes, and energize the first indicator if the measured conductivity value exceeds a predetermined threshold value. The method of testing the concentration of total dissolved solids present in a water supply may include projecting a current between a first electrode and a second electrode, measuring the conductivity of the water between the electrodes, comparing the measured conductivity to a plurality of threshold values, and energizing an indicator in a matter that is correlated to the highest threshold value met by the measured conductivity. | 2009-04-09 |
| 20090091339 | Method for detection and analysis of impurity content in refined metallurgical silicon - This invention discloses a method for detection and analysis of impurity content of refined metallurgical silicon, comprising: (1) select the measuring points on the crystal rods or crystal ingots along the crystallization direction, measuring the resistivity at each measuring point and acquire the measured value of resistivity according to the distribution of crystallized fraction; (2) get the estimated value of the content of boron and phosphorus at each measuring point and calculate the estimated net redundant carrier concentration and the measured value of resistivity; (3) compare the estimated value of net redundant carrier concentration with that of the measured value, and adjust the estimated value of impurity content in the silicon material to get the new estimated net redundant carrier concentration, and use regression analysis to determine the impurity content distribution of boron and phosphorus; (4) get the average impurity content of boron and phosphorus in the silicon material according to the distribution status of impurity based on all the measuring points. This invention can detect accurately the impurity contents of boron and phosphorus in refined metallurgical silicon, while the operation is simple, low-cost and suitable for industrial applications. | 2009-04-09 |
| 20090091340 | Apparatus for Measuring Dielectric Properties of Parts - A chamber formed from an electrically conductive material is connected to a ground potential. A hot electrode formed from an electrically conductive material is disposed within the chamber in a substantially horizontal orientation and is physically separated from the chamber. The hot electrode includes a top surface defined to support a part to be measured. A radiofrequency (RF) transmission rod is connected to extend from a bottom surface of the hot electrode through an opening in a bottom of the chamber and be physically separated from the chamber. The RF transmission rod is defined to transmit RF power from a conductor plate in an electrical components housing to the hot electrode. An upper electrode formed from an electrically conductive material is disposed within the chamber in a substantially horizontal orientation. The upper electrode is electrically connected to the chamber and is defined to be movable in a vertical direction. | 2009-04-09 |
| 20090091341 | Electrode for Use in Measuring Dielectric Properties of Parts - A plate of substantially uniform thickness is formed from an electrically conductive material. The plate has a top surface defined to support a part to be measured. The plate has a bottom surface defined to be connected to a radiofrequency (RF) transmission rod such that RF power can be transmitted through the RF transmission rod to the plate. The plate is defined to have a number of holes cut vertically through the plate at a corresponding number of locations that underlie embedded conductive material items in the part to be measured when the part is positioned on the top surface of the plate. | 2009-04-09 |
| 20090091342 | Node Extender for In-Circuit Test Systems - A node extender adaptor to enable existing in-circuit test systems to qualify printed circuit boards with a node count larger than the number of channels available on the in-circuit tester. The node extender adaptor routes signal channels within the in-circuit test platform to a probe from multiple probes in a test fixture. The probes connect to nets on a PCB undergoing qualification tests. The node extender adaptor sits atop test resources. A custom made test fixture attached onto the node extender adaptor. The node extender adaptor comprises multiple channel router line cards. Switches on the channel router line cards facilitate the switching of channels to one of the multiple probes. | 2009-04-09 |
| 20090091343 | METHOD FOR MAKING A CONDUCTIVE FILM AND A PROBE CARD USING THE SAME - A method for manufacturing a conductive film as well as the structure thereof and a probe card using the same are provided in the invention. The conductive film is substantially a stacked structure of a specific thickness formed by the adhering and stacking of at least an substrate in a vacuum environment by the use of surface processing and mechanical healing whereas each substrate has an array of metal micro-threads formed thereon, in which the plural metal micro-threads, each being wrapped in an insulating film, are arranged on the substrate to form the array in a unidirectional and single-layered manner by the use of a LIGA process and polymer thin film technology. In an exemplary embodiment, the insulating film can be a polymer thin film of high dielectric constant, being made of a material such as polydimethylsiloxane (PDMA) or polyimide (PI); and the metal micro-thread is made of a high conductivity and high strength Ni—Co alloy. Moreover, the so-formed conductive film can be cut into any desired dimensions by the use of an energy beam, such as laser beam, ion beam and plasma beam, etc. while combining the conductive film with a panel so as to be used for forming a probe card with large area detection ability that is low-cost, ease-to-maintain and capable of being adapted for wafers of various bonding pad arrangements. | 2009-04-09 |
| 20090091344 | MAGNETIC SENSOR INTEGRATED CIRCUIT WITH TEST CONDUCTOR - A magnetic sensor integrated circuit includes a plurality of magnetically sensitive elements, and at least one test conductor positioned adjacent to at least one of the magnetically sensitive elements and configured to generate a differential magnetic field that is adapted to be applied to the plurality of magnetically sensitive elements during a test mode. | 2009-04-09 |
| 20090091345 | STRUCTURE FOR PROVIDING A DUPLICATE TEST SIGNAL OF AN OUTPUT SIGNAL UNDER TEST IN AN INTEGRATED CIRCUIT - A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design is provided. The design structure provides a duplicate test signal of an output signal under test in an integrated circuit including selecting through a multiplexer an output signal under test, the output signal under test selected from a plurality of output signals of the integrated circuit; providing through the multiplexer a duplicate signal of the selected output signal under test; adding a high impedance load on the duplicate signal thereby reducing the amplitude of the duplicate signal; and amplifying the reduced duplicate signal thereby creating the duplicate test signal. | 2009-04-09 |
| 20090091346 | CIRCUITS AND METHODS FOR CHARACTERIZING DEVICE VARIATION IN ELECTRONIC MEMORY CIRCUITS - A circuit includes a comparator circuit configured such that its output toggles from a first digital logical level to a second digital logical level when its first and second inputs transition between a first state wherein the first input has an applied voltage greater than an applied voltage at the second input and a second state wherein the first input has an applied voltage less than an applied voltage at the second input. A plurality of cells each have at least one series-connected pair of field effect transistors interconnected at an output node intermediate the field effect transistors. Decoding logic is configured to select a given one of the cells for measurement, and selectively interconnect the output node of the given one of the cells to the first input of the comparator circuit. Voltage supply circuitry is configured to (i) apply voltages to the gates of the pair of transistors of the given one of the cells selected for measurement, such that the pair of transistors operate in a linear region, and have a variable voltage difference, Δ, between their gate-to-source voltages, and (ii) vary the Δ until the comparator circuit output toggles from the first digital logical level to the second digital logical level. | 2009-04-09 |
| 20090091347 | Emulating Behavior of a Legacy Test System - An apparatus for use in testing a device includes a communication channel having a set of programmable parameters associated therewith. The programmable parameters result in a bias condition on the communication channel. A bias control circuit is used to affect the bias condition that results from the programmable parameters in order to emulate a desired bias condition. | 2009-04-09 |
| 20090091348 | CIRCUIT FOR TESTING INTERNAL VOLTAGE OF SEMICONDUCTOR MEMORY APPARATUS - An internal voltage test circuit of a semiconductor memory apparatus includes a comparing unit for comparing a level of internal voltage with a level of external voltage to output a comparison result as an output signal during a test mode, and an output selecting unit for outputting the output signal to a data output pad during the test mode, and outputting a data signal to the data output pad during a normal operation mode. | 2009-04-09 |
| 20090091349 | High speed multiple memory interface I/O cell - An input/output (I/O) cell including one or more driver-capable segments and one or more on-die termination (ODT) capable segments. The I/O cell may be configured as an output driver in a first mode and Thevenin equivalent termination in a second mode. | 2009-04-09 |
| 20090091350 | METHOD AND CIRCUIT FOR OFF CHIP DRIVER CONTROL, AND MEMORY DEVICE USING SAME - An off chip driver impedance adjustment circuit includes a storage circuit adapted to receive and store a drive strength adjustment word. A counter circuit is coupled to the storage circuit to receive the drive strength adjustment word and develops a drive strength count responsive to the drive strength adjustment word. A programmable fuse code to preset the counter. An output driver circuit is coupled to the counter circuit to receive the drive strength count and is adapted to receive a data signal. The output driver circuit develops an output signal on an output responsive to the data signal and adjusts a drive strength as a function of the drive strength count. | 2009-04-09 |
| 20090091351 | CHIP IDENTIFICATION SYSTEM AND METHOD - Disclosed are embodiments of on-chip identification circuitry. In one embodiment, pairs of conductors (e.g., metal pads, vias, lines) are formed within one or more metallization layers. The distance between the conductors in each pair is predetermined so that, given known across chip line variations, there is a random chance (i.e., an approximately 50/50 chance) of a short. In another embodiment different masks form first conductors (e.g., metal lines separated by varying distances and having different widths) and second conductors (e.g., metal vias separated by varying distances and having equal widths). The first and second conductors alternate across the chip. Due to the different separation distances and widths of the first conductors, the different separation distances of the second conductors and, random mask alignment variations, each first conductor can short to up to two second conductors. In each embodiment the resulting pattern of shorts and opens, can be used as an on-chip identifier or private key. | 2009-04-09 |
| 20090091352 | NANOTUBE-BASED SWITCHING ELEMENTS WITH MULTIPLE CONTROLS - Nanotube-based switching elements with multiple controls and circuits made from such. A switching element includes an input node, an output node, and a nanotube channel element having at least one electrically conductive nanotube. A control structure is disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel between said input node and said output node. The output node is constructed and arranged so that channel formation is substantially unaffected by the electrical state of the output node. The control structure includes a control electrode and a release electrode, disposed on opposite sides of the nanotube channel element. The control and release may be used to form a differential input, or if the device is constructed appropriately to operate the circuit in a non-volatile manner. The switching elements may be arranged into logic circuits and latches having differential inputs and/or non-volatile behavior. | 2009-04-09 |
| 20090091353 | METHOD FOR DETECTING LEADING EDGE BLANKING PARAMETER OF POWER MANAGEMENT CHIP - A method for detecting a leading edge blanking parameter of a power management chip includes generating a pulse signal and inputting the pulse signal to the power management chip, wherein the amplitude of the pulse signal will cause a PWM signal of the power management chip to change its duty cycle; detecting the PWM signal to generate a detecting result; when the detecting result indicates that the duty cycle of the PWM signal does not change, adjusting a pulse width of the pulse signal to generate an adjusted pulse signal, inputting the adjusted pulse signal to the power management chip and detecting the PWM signal; and when the detecting result indicates that the duty cycle of the PWM signal changes, determining the leading edge blanking parameter of the power management chip according to the pulse width of the pulse signal. | 2009-04-09 |
| 20090091354 | Semiconductor circuit - In a conventional circuit to buffer differential clock signals at plural stages, the deteriorations of duty ratios caused by the variations of transistors constituting the circuit have not been compensated. Further, when it is attempted to increase the effect of compensating the duty ratios, the size of the circuit increases and the consumed electric current also increases accordingly. A semiconductor circuit according to the present invention includes: a differential input section to receive input differential signals; differential signal output terminals to output output differential signals in accordance with the voltages input into the differential input section; a low-pass filter to extract the DC components of signals output from the differential signal output terminals; and a load resistor section connected to the differential input section, wherein resistance values are determined on the basis of the DC components of the signals extracted with the low-pass filter. | 2009-04-09 |
| 20090091355 | Amplifier - An amplifier includes: an operation amplifier including a positive input terminal and a negative input terminal; and a detector which detects that a difference between a voltage of the positive input terminal and a voltage of the negative input terminal is equal to or exceeds a predetermined value and outputs a detection signal. | 2009-04-09 |
| 20090091356 | Current-mode differential transmitter and receiver - A current-mode differential transmitter, receiving a single-end input voltage signal and accordingly generating a differential output current signal, is provided. The transmitter includes a first switch, a second switch and a current mirror. The first switch is coupled in a first current path and controlled by the single-end input voltage signal. The second switch is coupled in a second current path and controlled by an inverted signal of the single-end input voltage signal. The current mirror mirrors a reference current to the first current path when the first switch is turned on, and mirrors the reference current to the second current path when the second switch is turned on. The differential output current signal is derived from the currents on the first and second current paths. | 2009-04-09 |
| 20090091357 | LOW VOLTAGE DIFFERENTIAL SIGNALLING DRIVER - A low voltage differential signal (LVDS) driver comprising a cascade current source circuit coupled to a positive voltage supply configured to supply a current, a cascade current sink circuit maintained at a ground voltage configured to receive the current; the cascade current source circuit being coupled to the cascade current sink circuit by a current switching circuit being provided by a positive voltage supply from the cascade current source circuit and with complementary logic signals, the current switching circuit configured to provide a constant differential output voltage while in operation. Other embodiments are also disclosed. | 2009-04-09 |
| 20090091358 | Compensated output buffer for improving slew control rate - The present invention provides a compensated output buffer circuit providing an improved slew rate control and a method for minimizing the variations in the current slew rate of the buffer over process, voltage and temperature (PVT) conditions. The output buffer circuit includes a split-gate compensated driver and a slew rate control circuit. Accordingly, a desired slew rate can be maintained with fewer variations over wide range of variations in PVT conditions. The slew rate control circuit consists of two separate slew rate control circuits called a pull-up PMOS driver and a pull-down NMOS driver. To minimize the variations in the slew rate, the rising and falling time of the pre-driver nodes are controlled by means of two current control networks, which are compensated against PVT variations by using separate NMOS and PMOS digital compensation codes. The compensation codes are provided by a compensation circuit, which sense the variation in PVT conditions and reflect these variations in the compensation codes. | 2009-04-09 |
| 20090091359 | CURRENT SOURCE DEVICE - The present invention provides a current source device comprising a plurality of current output circuits each including a current output FET, first and second switch FETS respectively series-connected to source and drain sides of the current output FET to form a series circuit, source voltage supply means which applies a positive-side potential of a source voltage to the first switch FET and applies a negative-side potential of the source voltage to the second switch FET to supply the source voltage to the series circuit, and an output terminal connected between the current output FET and the second switch FET; and a gate voltage supply circuit which supplies a common gate voltage to the gates of the current output FETS, wherein each of the current output circuits further includes a third switch FET provided between the current output FET and the second switch FET. | 2009-04-09 |
| 20090091360 | Delay-locked loop control - This invention relates to devices, a chip, a method and a computer-readable medium for controlling operation of a delay-locked loop. A delay-locked loop unit is adapted to trigger generation of first-type edges of a target signal. A main control unit is adapted to control operation of the delay-locked loop unit in a way that the delay-locked loop unit is turned on before generation of each first-type edge of the target signal and turned off after generation of each first-type edge. | 2009-04-09 |
| 20090091361 | Frequency divider configuration - A frequency divider including at least one frequency divider cell having an adjustable circuit configuration which may be selected adaptively according to properties of an oscillator signal to be frequency-divided in the frequency divider. Accordingly, the circuit configuration of the frequency divider may be changed on the fly during the operation. | 2009-04-09 |
| 20090091362 | DEVICE, SYSTEM AND METHOD OF DELAY CALIBRATION - System and method of calibrating delay mismatch for high-spectral purity applications. For example, a method includes measuring the delay of one delay element at a time in a fixed topology by moving a time reference generated by an auxiliary delay-locked loop. The auxiliary DLL may have a replica structure of the primary DLL being calibrated. The calibration method uses one output clock signal of the primary DLL and measures delay mismatch using a reference phase previously measured using the same topology. The calibration method takes into account all delay mismatches in the topology up to the primary DLL output clock signal, including any delay generated by an associated multiplexer. | 2009-04-09 |
| 20090091363 | DLL CIRCUIT - A DLL circuit including a first clock signal dividing block configured to selectively divide a frequency of a reference clock signal according to whether a lock completion signal is enabled, a phase comparing block configured to generate a phase comparison signal by comparing phases of a clock signal transmitted from the first clock signal dividing block with a feedback clock signal, and an operation mode setting block configured to generate the lock completion signal in response to the phase comparison signal is described herein. | 2009-04-09 |
| 20090091364 | Semiconductor circuit - A semiconductor circuit according to the present invention includes: a differential input section to receive input differential signals; a load resistance section to output a voltage according to a current output by the differential input section; differential signal output terminals to output a differential signal corresponding to the voltage output from the load resistance section; a low-pass filter to extract a direct-current component of the differential signal output from the differential signal output terminals; and a load adjustment section to feed back the direct-current component extracted by the low-pass filter to adjust a resistance value of the load resistance section. | 2009-04-09 |
| 20090091365 | METHODS FOR GENERATING PWM-SIGNALS - In a method for generating a PWM-signal to drive the power transistors of a half-bridge of a converter with the aid of a digital circuit, a digital reference value is compared to the counter content of a digital counting ramp, and a logic state of the PWM-signal is dependent upon whether the reference value is greater than the counter content of the counting ramp. In this context, at least two counters count counter contents of the counting ramp following one another in alternation, and the logic state of the PWM-signal is dependent upon whether the reference value is greater than the counter contents of counting ramps of each of the at least two counters. | 2009-04-09 |
| 20090091366 | VOLTAGE GENERATOR OF SEMICONDUCTOR INTEGRATED CIRCUIT - A voltage generator includes a detector for outputting a driving signal according to comparison results of a reference voltage and a pumping voltage, an oscillator for generating an oscillation signal in response to the driving signal and varying a period of the oscillation signal according to a level of the pumping voltage, and a pump for pumping an external voltage in response to the oscillation signal to generate the pumping voltage. The voltage generator can quickly increase a pumping voltage up to the target level and improve the efficiency of the pumping voltage by minimizing the ripple components of the pumping voltage. | 2009-04-09 |
| 20090091367 | LEVEL SHIFTER CONCEPT FOR FAST LEVEL TRANSIENT DESIGN - A driver including a first level shifter group and a second level shifter group is provided. The first level shifter group includes at least one first level shifter to receive a first input signal. The second level shifter group includes at least one second level shifter to receive a second input signal. The driver sequentially enables the first level shifter group and the second level shifter group to sequentially transfer voltage levels of the first input signal and the second input signal. | 2009-04-09 |
| 20090091368 | DESIGN STRUCTURE FOR A HIGH-SPEED LEVEL SHIFTER - Disclosed are embodiments of a design structure for a voltage level shifter circuit that operates without forward biasing junction diodes, regardless of the sequence in which different power supplies are powered up. The circuit embodiments incorporate a pair of series connected switches (e.g., transistors) between an input terminal and a voltage adjusting circuit. Each switch is controlled by a different supply voltage from a different power supply. Only when both power supplies are powered-up and the different supply voltages are received at both switches will a first signal generated using one of the supply voltages be passed to a voltage adjusting circuit and thereafter converted into a second signal representative of the first signal, but generated using the second supply voltage. Incorporation of the pair of series connected switches into the voltage level shifter circuit prevents forward biasing of junction diodes in the circuit and thereby prevents current leakage from the power supplies. | 2009-04-09 |
| 20090091369 | System And Method For Equalizing Transition Density In An Integrated Circuit - A system for equalizing transition density in an integrated circuit includes a first circuit configured to transition according to a data stream; and a second circuit configured to transition at a time when the first circuit is not transitioning. | 2009-04-09 |
| 20090091370 | LARGE SCALE INTEGRATED CIRCUIT FOR DYNAMICALLY CHANGING RESONANT POINT - The semiconductor intergrated circuit comprises: a circuit that executes a predetermined process and a switching circuit that selects a power impedance, The switching circuit selects the power impedance, in accordance with a variation in voltage supplied to the circuit, so that a resonant frequency of the semiconductor integrated circuit is different from a operation frequency of the circuit. | 2009-04-09 |
| 20090091371 | TOUCH SENSOR CONTROLLED SWITCH WITH INTELLIGENT USER INTERFACE - A module for controlling power supply to a load in a product which includes a microchip, and an electromechanical switch and a proximity/touch sensor connected to the microchip, preferably to the same input. The switch is primarily used to activate or deactivate the load and the proximity/touch sensor to vary the effect of operating the switch, or to control additional functions such as the activation of a signal, typically a light signal, which helps to locate the product, particularly in the dark, and to vary the duration of an automatic time-out period at the end of which the load is deactivated. | 2009-04-09 |
| 20090091372 | SYSTEM-ON-A-CHIP AND POWER GATING CIRCUIT THEREOF - A system-on-a-chip and a power gating circuit thereof are provided. The power gating circuit includes a first transistor, a charge pump circuit, and a hold circuit. A gate terminal of the first transistor is controlled by a first input signal. A first source/drain terminal of the first transistor is coupled to a first voltage. A second source/drain terminal of the first transistor outputs an output voltage. The charge pump circuit is coupled to a bulk terminal of the first transistor for changing a bulk voltage of the first transistor according to a second input signal. The hold circuit is coupled to the bulk terminal of the first transistor for holding the bulk voltage of the first transistor. | 2009-04-09 |
| 20090091373 | TEMPERATURE-SENSOR CIRCUIT, AND TEMPERATURE COMPENSATED PIEZOELECTRIC OSCILLATOR - A temperature-sensor circuit includes: a transistor having an emitter that is grounded, a collector, and a base; a first resistor having a first end and a second end, the first end being coupled with the collector; and a second resistor having a third end and a fourth end, the third end being coupled with the second end of the first resistor. A junction joining the first resistor and the second resistor is coupled with the base. | 2009-04-09 |
| 20090091374 | ELECTRONIC DEVICE FOR COMMUTATION OF ELECTRIC LOAD CONTROLLED BY A MICROCONTROLLER - An electronic device and method for commuting an electric load, including an electronic commutator controlled by a microcontroller, positively supplied at a voltage, with an outlet that may adopt at least three states and operating in a nominal mode that may be switched intentionally or by default to a failsafe mode in case of malfunction of the electronic commutation device. The electronic commutation device additionally includes a positive commuted supply greater than the voltage and connected to the microcontroller of the electronic commutation device by a resistive polarization device to carry out the function of safety barrier, and an interface device for recognizing the presence or absence of the positive commuted supply. | 2009-04-09 |
| 20090091375 | SYSTEM AND METHOD TO MINIMIZE TRANSITION TIME BETWEEN CIRCUIT OPERATING MODES - A system is disclosed. The system includes a first circuit, the first circuit includes a bias device for allowing the first circuit to transition between a first mode and a second mode. The system further includes a second circuit which controls the bias device. The second circuit provides a bias voltage at a sub-threshold voltage level to the bias device when the first device is in one of the first and the second mode. The second circuit provides a bias voltage at a threshold voltage level or higher when the first device is in one of the first and the second mode. Accordingly, the transition time between modes of the first circuit is minimized. | 2009-04-09 |
| 20090091376 | INTERNAL VOLTAGE GENERATING CIRCUIT - Disclosed is an internal voltage generating circuit that pumps charge to generate an internal driving voltage. The internal voltage generating circuit includes: a first oscillation signal generating unit that provides a first oscillation signal in response to a detected internal voltage and a predetermined test mode signal; a second oscillation signal generating unit that divides an external clock to provide a second oscillation signal having a variable oscillation period; and a switching unit that selects the first oscillation signal or the second oscillation signal in response to the predetermined test mode signal and provides the selected signal as a pumping period signal. | 2009-04-09 |
| 20090091377 | INTEGRATED SYSTEM AND METHOD FOR MULTICHANNEL NEURONAL RECORDING WITH SPIKE/LFP SEPARATION, INTEGRATED A/D CONVERSION AND THRESHOLD DETECTION - A CMOS integrated circuit for multi-channel neuronal recording with twelve true-differential channels, band separation and digital offset calibration. The recorded signal is separated into 2 bands: a low-frequency, local field potential (LFP); and high-frequency spike data. Digitally programmable gains for the LFP and spike bands are provided. A mixed-signal front-end processor for multi-channel neuronal recording is also described. It receives twelve differential-input channels of implanted recording electrodes. A programmable cutoff HPF blocks DC and low frequency input drift at about 1 Hz. The signals are band-split at about 200 Hz to low-frequency local field potential (LFP) and high-frequency spike data (SPK), which is band limited by a programmable-cutoff LPF. The analog signals are converted into digital form, and streamed out over a serial digital bus at up to 8 Mbps. A special interface system incorporating an embedded CPU core in a programmable logic device accompanied by real-time software allows connectivity to a computer host. | 2009-04-09 |
| 20090091378 | Statistical Switched Capacitor Droop Sensor for Application in Power Distribution Noise Mitigation - A circuit and a method for detecting noise events in a system with time variable operating points is provided. A switched capacitor filter comprising a plurality of capacitor units, samples a first voltage to determine an average of a set of voltage measurements, forming an average voltage. A filter control unit controls the plurality of capacitor units in the switched capacitor filter. A comparing unit compares the average voltage to the first voltage to form a comparison. A signaling unit generates a signal to instruct circuits in a processor to initiate actions to keep the first voltage from drooping below a threshold level in response to the comparison. | 2009-04-09 |
| 20090091379 | Active rectifier - In accordance with the present invention, the active rectifier is a circuit which directly takes the place of a passive rectifier by using a switching module (or simply a device in cases where a single device is used) controlled by a sensing circuit. Where passive devices have a single knee value determined by the physical properties of the semi-conductive material being used, the active circuit can be designed to a range of knee voltages and other performance criterion. Additional flexibility is available to the designer through the active rectifiers ability to allow for manipulation of the curve of response from the circuit in the knee region. Flexibility both in production, in designs, and in characteristics make the active rectifier highly valuable for engineering firms designing larger electronic circuits. | 2009-04-09 |
| 20090091380 | DIFFERENTIAL VARACTOR USING GATED VARACTOR - Provided is a differential varactor using a gated varactor, which has a wider tuning range and a better linearity and minimum to maximum capacitance ratio than conventional PN-junction and MOS varactors. Thus, the differential varactor having a wider tuning range, and better linearity and common-mode rejection ratio may be implemented. | 2009-04-09 |
| 20090091381 | GAIN CONTROL DEVICE - The present invention aims to suppress degradation of a reception characteristic even in such an environment that the signal strength of an inputted analog signal varies due to a variation in a received electric field. A controller acquires characteristic information showing each gain characteristic indicative of a relationship between the signal strength of the analog signal and the gain corresponding to the analog signal at an amplifier from a CPU. An AGC controller derives gains each corresponding to the signal strength detected at an ADC according to the gain characteristics indicated by the acquired characteristic information, whenever necessary, and outputs the same to the amplifier through a terminal. | 2009-04-09 |
| 20090091382 | AUDIO SIGNAL PROCESSING SYSTEM AND METHOD - An audio signal processing system and method is disclosed. In a particular embodiment, the audio signal processing system includes a first electrical path responsive to a power supply of an audio amplifier. The first electrical path can include a low pass filter to filter a direct current (DC) component of the power supply and a first analog-to-digital converter (ADC) responsive to the low pass filter. The audio signal processing system also includes a second electrical path responsive to the power supply. The second electrical path can include a high pass filter to filter an alternating current (AC) component of the power supply and a second ADC responsive to an output of the high pass filter. The audio signal processing system includes compensation logic to modify an audio signal based on a first signal generated from the first electrical path and a second signal generated from the second electrical path. | 2009-04-09 |
| 20090091383 | GAIN AMPLIFIER HAVING SWITCHED-CAPACITOR STRUCTURE FOR MINIMIZING SETTLING TIME - Provided is a gain amplifier having a switched-capacitor structure capable of minimizing settling time, in which an input capacitor is connected to an input terminal during a first clock sampling an input signal, and thus an output terminal of the amplifier is reset in advance to an estimated output voltage value rather than 0 by the input capacitor. Accordingly, the slight move of the output terminal of the amplifier is sufficient to settle to a desired value in an amplification mode, so that slewing time can be reduced, and as a result, overall settling time and power consumption can be minimized. | 2009-04-09 |
| 20090091384 | Systems and methods of RF power transmission, modulation and amplification - Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion. | 2009-04-09 |
| 20090091385 | DIFFERENTIAL AMPLIFIER CIRCUIT - A differential amplifier circuit of simple circuit configuration is disclosed, which is capable of releasing an output signal within a voltage range independent of the voltage range of a differential input signal. The differential amplifier circuit | 2009-04-09 |
| 20090091386 | Differential amplifier - A differential amplifier includes: a constant current source; first and second field effect transistors whose respective gates are imparted with positive-phase and negative-phase input signals and whose sources commonly connected to each other, the constant current source being connected to a common node of the sources; first and second loads serving as current paths for respective drain currents of the first and second field effect transistors; an amplifying unit which outputs positive-phase and negative-phase output signals which are amplified in response to the respective drain voltages of the first and second field effect transistors; and a current path generator which generates first and second current paths parallel to the respective first and second field effect transistors for a predetermined period of time at the time of start-up of the differential amplifier. | 2009-04-09 |
| 20090091387 | SWITCHED-CAPACITOR VARIABLE GAIN AMPLIFIER HAVING HIGH VOLTAGE GAIN LINEARITY - Provided is a switched-capacitor variable gain amplifier having high voltage gain linearity. According to the above amplifier, a sampling capacitor is shared and used at a sampling phase and an amplification phase, and thus a voltage gain error caused by capacitor mismatch can be reduced. Also, using a unit capacitor array enables circuit design and layout to be simplified. Further, in the amplifier, a voltage gain can be easily controlled to be more or less than 1, as necessary, and power consumption and kT/C noise can be reduced by a feedback factor that is relatively large, so that gain amplification performance can be improved. | 2009-04-09 |
| 20090091388 | Apparatus for slew rate enhancement of an operational amplifier - The present invention discloses an apparatus for slew rate enhancement of an operational amplifier, wherein an auxiliary control device and an auxiliary output device are added to the output stage of an operational amplifier. The auxiliary control device mirrors the current of the output stage and then compares the mirrored current with a reference current to generate an auxiliary push/pull control signal, which is used to control the auxiliary output device. When the output signal is different from the input signal, the auxiliary control device turns on the auxiliary output device to provide an auxiliary output current for the output terminal. When the output signal is equal to the input signal, the auxiliary output device is turned off. | 2009-04-09 |
| 20090091389 | LVDS RECEIVER CIRCUIT - The LVDS receiver circuit comprises a differential-input transistor pair, a control transistor pair, a current-mirror-load circuit, a first feedback inverter and a second feedback inverter. The first feedback inverter, the second feedback inverter and the control transistor pair constitute a feedback loop. The voltage change of the input voltage of the first feedback inverter is suppressed, and the input voltage is controlled around the threshold voltage of the first feedback inverter. | 2009-04-09 |
| 20090091390 | Programmable-gain amplifier systems to facilitate low-noise, low-distortion volume control - Programmable-gain amplifier systems are provided that are particularly suited for reducing degrading audio effects such as zipper noise. In one embodiment, these systems switchably couple an electronic potentiometer between an amplifier's inverting input terminal and interleaved tap points along a resistor that is coupled to the amplifier's output terminal. This arrangement introduces a number of fine gain steps between the gain steps that are realized with adjacent ones of the interleaved tap points to substantially reduce or eliminate zipper noise in a audio system that processes the system's output signal. The interleaved tap points facilitate efficient operation of the potentiometer during gain changes. They also permit the potentiometer to be effectively bypassed between gain changes so that distortion effects are substantially eliminated. | 2009-04-09 |
| 20090091391 | CONFIGURABLE FEEDBACK FOR AN AMPLIFIER - An amplifier is disclosed that includes configurable feedback based on the output of a received signal strength indicator. The feedback may be increased for high received signal levels, and decreased for low received signal levels. In an embodiment, the configurable impedance may comprise a plurality of discrete impedance settings. Amplitude and/or time hysteresis may be incorporated. | 2009-04-09 |
| 20090091392 | BIAS CIRCUIT FOR THE WIRELESS TRANSCEIVER - A bias circuit for the wireless transceiver is disclosed, which can be used for modulating the gain of the amplifier. The bias circuit comprises a first stage bias unit for receiving a constant current, a control voltage, and a first reference voltage and outputting a first outputting current, wherein the control voltage is used for controlling the value of the first outputting current, and further, the first outputting current can be increased or decreased by representing as an analog form, thus, the gain of the amplifier can be modulated according to the first outputting current, and the modulation of the gain can be represented as an analog form, such that the transient response occurred while the gain is modulated can be reduced. | 2009-04-09 |
| 20090091393 | DUAL-PATH CURRENT AMPLIFIER - A dual-path current amplifier having a slow high-gain path and a fast low-gain path is described. In one design, the slow high-gain path is implemented with a positive feedback loop and has a gain of greater than one and a bandwidth determined by a pole. The fast low-gain path has unity gain and wide bandwidth. The two signal paths receive an input current and provide first and seconds currents. A summer sums the first and second currents and provides an output current for the dual-path current amplifier. The dual-path current amplifier may be implemented with first and second current mirrors. The first current mirror may implement the fast low-gain path. The first and second current mirrors may be coupled together and implement the slow high-gain path. The first current mirror may be implemented with P-FETs. The second current mirror may be implemented with N-FETs, an operational amplifier, and a capacitor. | 2009-04-09 |
| 20090091394 | DEVICE TO GENERATE A MODULATED ELECTRICAL RADIO-FREQUENCY SIGNAL FOR A MAGNETIC RESONANCE APPLICATION - A device for generation a modulated electrical radio-frequency signal for a magnetic resonance application has a phase modulator that generates a phase-modulated radio-frequency base signal, an amplitude modulator that generates an amplitude-modulated supply voltage, and a non-linear transmission output stage that, to supply the radio-frequency base signal, is connected via a signal input with the phase modulator and, to feed in the supply voltage, is connected via a supply voltage input with the amplitude modulator. The amplitude modulator includes at least two switching power supplies connected in parallel and clocked phase-offset relative to one another. | 2009-04-09 |
| 20090091395 | Microwave signal generator - The microwave signal generator includes a magnetron generating microwave signal. A filter filters a signal that may be a signal of the intrinsic oscillation frequency band of the magnetron, which is fed-back to the magnetron. | 2009-04-09 |
| 20090091396 | METHOD AND SYSTEM FOR CALIBRATION OF A TANK CIRCUIT IN A PHASE LOCK LOOP - A phase lock loop includes a calibration loop for calibrating a tank circuit for capacitance variation through process variations of manufacturing an integrated circuit including the phase lock loop. A capacitance profile for setting the frequency of the phase lock loop at a process corner, such as a typical process corner is stored in driver software or a host processor. At power up, or after an idle time, a calibration is performed at two frequencies. The capacitances of operating the phase lock loop at the two frequencies are determined and stored. During a frequency change, the capacitance of operating the phase lock loop is determined from the capacitance profile and stored capacitances. In one aspect, the capacitance of the phase lock loop is presumed to change linearly with frequency and the two stored capacitances are used to determine a difference capacitance at the selected frequency by linear interpolating between the two stored capacitances. The interpolated difference capacitance is added to the capacitance in the capacitance profile at the selected frequency to generate an operating capacitance. The capacitance of a tank circuit of the phase lock loop is set to the operating capacitance. | 2009-04-09 |
| 20090091397 | OSCILLATING APPARATUS AND FREQUENCY CONVERT APPARATUS - An oscillating apparatus for outputting an oscillating signal includes a resonant circuit that generates the oscillating signal, an amplifier circuit that amplifies the oscillating signal generated by the resonant circuit, and feeds the amplified oscillating signal back to the resonant circuit, and an output circuit that receives the oscillating signal which is supplied to the amplifier circuit, and outputs the received oscillating signal to outside. Here, the output circuit includes a first buffer that (i) receives at an input end thereof the oscillating signal which is supplied to the amplifier circuit and outputs the received oscillating signal, and (ii) uses a capacitance component of the input end to feed a first current signal back to the amplifier circuit, wherein the first current signal has a phase displaced from a phase of a voltage component of the oscillating signal, and a second buffer that (I) receives at an input end thereof the oscillating signal which is output from the first buffer and outputs the received oscillating signal, and (II) uses a capacitance component of the input end to feed a second current signal back to the first buffer, wherein the second current signal has a phase displaced from a phase of a voltage component of the oscillating signal which is output from the first buffer. | 2009-04-09 |
| 20090091398 | OSCILLATING APPARATUS - Provided is an oscillating apparatus that includes a plurality of variable frequency oscillators, each of which is provided in correspondence with a different oscillating band from one another; and a selection section that selects an oscillating signal that is from a variable frequency oscillator provided in correspondence with a designated oscillating band, from among the plurality of variable frequency oscillators, and outputs the selected oscillating signal, where the selection section includes a plurality of selectors connected in a tree structure, each selector outputting a selected one of inputted two or more oscillating signals, and each of the plurality of variable frequency oscillators is connected to a selector positioned at an end of the tree structure of the plurality of selectors. | 2009-04-09 |
| 20090091399 | LOW VOLTAGE SYNCHRONOUS OSCILLATOR FOR DC-DC CONVERTER - Systems and methods which provide an oscillator circuit outputting non-overlapping trigger signals throughout a range of operating voltages using a reset-set (RS) flip-flop type circuit configuration are shown. Embodiments utilize output driver buffers internal to the RS flip-flop circuit configuration to provide oscillator feedback delay. Feedback control circuitry may be implemented to ensure that the delay associated with any one driver buffer does not solely provide the feedback delay. Embodiments further implement input delay circuitry adapted to maintain a relatively constant reset and set input feedback delay ratio throughout a large range of operating conditions. | 2009-04-09 |
| 20090091400 | Method and Apparatus for Generating Dynamically Varying Time Hopping Sequences for UWB Signals - A method and apparatus modulate a polarity of a burst of pulses of the impulse radio signal using a first pseudo noise sequence generated by a shift register and a position of the burst of pulses using a second pseudo noise sequence generated by the shift register. | 2009-04-09 |
| 20090091401 | METHOD AND APPARATUS FOR FACILITATING SIGNAL TRANSMISSION USING DIFFERENTIAL TRANSMISSION LINES - The illustrative embodiments described herein provide an apparatus and method for facilitating signal transmission using differential transmission lines. The apparatus includes a first differential transmission line. The first differential transmission line includes a first plurality of conductors. The first plurality of conductors includes a set of conductors. The apparatus also includes a second differential transmission line. The second differential transmission line includes a second plurality of conductors. The second plurality of conductors includes a first conductor and a second conductor. A first noise produced by the first conductor on the set of conductors is balanced by a second noise produced by the second conductor on the set of conductors. The first differential transmission line and the second differential transmission line facilitate signal transmission. | 2009-04-09 |
| 20090091402 | Compact stripline low frequency band reject filter - A low frequency reject filter element is formed on a printed circuit board that utilizes the fact that power transmission in a waveguide is cut-off below a certain frequency. A quasi waveguide cavity is formed in printed circuit board using the top and bottom ground plane of the stripline circuit and using conductive via holes to form the side walls of the cavity. Waveguide cavity mode is launched from the input and output striplines by shorting them to ground. Transformers and matching via hole elements may be used to improve matching. The resulting filter is compact and is highly effective in suppressing low frequency transmissions. | 2009-04-09 |
| 20090091403 | CONTACTLESS TRANSMISSION OF A DIFFERENTIAL SIGNAL BETWEEN A TRANSMITTER AND A RECEIVER - A method for the contactless transmission of at least one differential signal between a transmitter and a receiver given the existence of at least one common-mode noise signal, which has a low frequency in comparison with at least one signal to be transmitted, is provided. The suppression of at least one common-mode noise signal within the receiver a ground reference potential assigned to the receiver is separated into two ground reference potentials decoupled from one another. At least one common-mode noise signal may be suppressed by a filter unit at the input of a receive amplifier of the receiver. | 2009-04-09 |
| 20090091404 | ACOUSTIC WAVE FILTER DEVICE AND DUPLEXER - An acoustic wave filter device includes first to fourth longitudinally coupled resonator type surface acoustic wave filters that are configured such that the first and second longitudinally coupled resonator type surface acoustic wave filters are connected to a first balanced signal terminal, the third and fourth longitudinally coupled resonator type surface acoustic wave filters are connected to a first balanced signal terminal, and a transmission phase of a signal output from the first balanced signal terminal relative to an input signal differs by about 180 degrees with respect to a transmission phase of a signal output from the second balanced signal terminal relative to an input signal. In addition, the number of pairs of electrode fingers of at least one of IDTs of at least one of the first to fourth longitudinally coupled resonator type surface acoustic wave filters is different from the number of pairs of electrode fingers of corresponding IDTs of the remaining first to fourth longitudinally coupled resonator type surface acoustic wave filters. | 2009-04-09 |
| 20090091405 | RESONATOR, METHOD FOR MANUFACTURING FILTER BY USING RESONATOR AND FILTER MANUFACTURED BY THE SAME METHOD - There are provided a resonator for use in a filter, which interprets and reduces intermodulation distortion by analyzing characteristics of current density occurring at resonance and linear and nonlinear characteristics of the filter, a method for manufacturing filters by using the resonator and a filter manufactured by the method. The resonator has a ratio of an inside diameter to an outside diameter belonging to a range which is larger than about 1:3 and smaller than or equal to about 1:3.75 and its length (H) is about λ/4, wherein λ is a wavelength of a plane wave provided to the resonator. By employing the method, it is possible to effectively design the filters through the use of a circuitry and structural approach with breaking from a conventional approach depending on local and minute processing steps when manufacturing the filters. | 2009-04-09 |
| 20090091406 | COMPACT VIA TRANSMISSION LINE FOR PRINTED CIRCUIT BOARD AND DESIGN METHOD OF THE SAME - A compact via transmission line for a printed circuit board having preferred characteristic impedance and capable of miniaturizing the printed circuit board including a multilayer printed circuit board, and extending the frequency range of a via transmission line mounted on the printed circuit board, and a design method of the same. The transmission line has a central conductor forming an inner conductor layer boundary make up a signal via hole, a plurality of via holes arranged around the central conductor form an outer conductor layer boundary, and a plurality of conductor plates formed of a printed circuit board conductor layer, is further provided with a constitutive parameter adjustment clearance hole between the inner and outer conductor layer boundaries of the compact via transmission line, and electrically isolates to prevent cross-talk of a signal propagating through a signal via hole with other signals in a high-frequency signal band. | 2009-04-09 |
| 20090091407 | CONTACT ARM MECHANISM FOR CIRCUIT BREAKER - A mechanism for a circuit breaker contact arm that allows current limiting by reducing the opening time is disclosed. A contact arm is coupled to a contact arm mechanism that includes a carrier coupled to a first pair of linkages. A second pair of linkages is coupled to the first pair of linkages. A second carrier coupled to the second pair of linkages attaches to the contact arm mechanism to a main circuit breaker mechanism through a lay shaft assembly. Upon the occurrence of an undesired electrical condition, the contact arm mechanism moves from a locked to an open position allowing the contact arm to blow open. | 2009-04-09 |
| 20090091408 | Switch Device - A movable contact which is positioned inside a sealing case is moved by a magnetic shunt body which moves outside the sealing case. The movement of the movable contact by the movement of the magnetic shunt body is caused by a change of magnetic force of a magnet through a pair of yokes. The magnetic shunt body is assembled to a moving member, and elastically moves around the moving member resisting a first spring. | 2009-04-09 |
| 20090091409 | CURVED BEAM CONTROL MAGNET - A curved beam-guiding magnet is provided. The beam-guiding magnet without ferromagnetic material serves to deflect a beam of electrically charged particles along a curved particle path and incorporates a coil system made of at least six curved superconducting single coils arranged in pairs in mirror-inverted fashion relative to a beam-guiding plane. The coil system comprises two saddle-shaped main coils and two flat, banana-shaped curved secondary coils of the race-track type, each of which encloses a banana-shaped curved auxiliary coil of the race-track type. The beam-guiding magnet is particularly suitable for an irradiation unit of the gantry type. | 2009-04-09 |
| 20090091410 | MAGNETIC LEVITATION VIBRATION SYSTEMS AND METHODS FOR TREATING OR PREVENTING MUSCULOSKELETAL INDICATIONS USING THE SAME - A magnetic levitation vibration system comprising a top plate, a base plate, at least one first magnet, at least one second magnet, at least one electromagnetic actuator comprising an upper half and a lower half, a controller, a sensor, and a control circuit. A method for the treatment or prevention of musculoskeletal indications comprising providing a top plate, providing a base plate, generating a first magnetic field to levitate the top plate, generating a second magnetic field to drive the top plate into vibration, adjusting frequency of vibration of the top plate; and adjusting magnitude of vibration of the top plate. | 2009-04-09 |
| 20090091411 | PERMANENT MAGNET DEVICE - A magnet arrangement for creating a magnetic field. The magnet arrangement includes a first magnet having a first surface defining a first pole and a second surface defining a second pole opposite the first pole, and a second magnet having a third surface defining a third pole and a fourth surface defining a fourth pole opposite the third pole. The second surface has a higher magnetic flux density than the first surface. The third surface has a higher magnetic flux density than the fourth surface. The second magnet is spaced from the first magnet to define a first gap between the second surface and the third surface. Magnetic field lines of the magnetic field run from the first surface to the second surface, from the second surface to the third surface through the first gap, and from the third surface to the fourth surface. | 2009-04-09 |
| 20090091412 | Coil Integrated Inductor - Disclosed is a coil integrated inductor. The coil integrated inductor includes a coil wound a predetermined number of times, electrodes joined to respective ends of the coil, and a magnetic body integrated with the coil and internal electrodes of the electrodes, in which the magnetic body includes magnetic powder, an organic binder and epoxy silane. When the magnetic body is formed, the mixed magnetic material including epoxy silane is used, so that the surface resistance and mechanical strength of the inductor according to the present invention can be remarkably increased. | 2009-04-09 |
| 20090091413 | SIGNAL TRANSFER CIRCUIT - A signal transfer circuit is configured by including a driving circuit for applying a voltage to a transformer depending on an input signal, a secondary side circuit for causing an output signal to rise when a voltage with a positive polarity is generated in the transformer, and for causing the output signal to fall when a voltage with a negative polarity is generated in the transformer, and a resistor for applying a voltage with a negative polarity with a level, by which the secondary side circuit does not operate, to the transformer after a voltage with a positive polarity is generated in the transformer, and for causing a voltage with a positive polarity with a level, by which the secondary side circuit does not operate, to be generated in the transformer after the voltage with the negative polarity is applied to the transformer. | 2009-04-09 |
| 20090091414 | On-chip inductor for high current applications - Saturation of nonlinear ferromagnetic core material for on-chip inductors for high current applications is significantly reduced by providing a core design wherein magnetic flux does not form a closed loop, but rather splits into multiple sub-fluxes that are directed to cancel each other. The design enables high on-chip inductance for high current power applications. | 2009-04-09 |
