| 14th week of 2011 patent applcation highlights part 24 |
| Patent application number | Title | Published |
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| 20110081692 | POLYHYDROXYALKANOIC ACID COPOLYMER AND PROCESS FOR PREPARING SAME - A PHA copolymer comprising (R)-3-hydroxy-4-methyl valeric acid units and a production method thereof are provided. | 2011-04-07 |
| 20110081693 | PERHYDROLASE FOR ENZYMATIC PERACID PRODUCTION - A process is provided for rapidly producing target concentrations of peroxycarboxylic acids from carboxylic acid esters. More specifically, carboxylic acid esters are reacted with a source of peroxygen, such as hydrogen peroxide, in the presence of an enzyme catalyst comprising an enzyme having identity to an acetyl xylan esterase from | 2011-04-07 |
| 20110081694 | DICARBOXYLIC ACID PRODUCTION IN EUKARYOTES - The present invention relates to a recombinant eukaryotic microbial cell comprising a nucleotide sequence encoding a heterologous enzyme catalysing the conversion from phosphoenolpyruvate to oxaloacetate whereby ATP is generated. The invention further relates to a process for the preparation of a dicarboxylic acid such as succinic acid and fumaric acid, comprising fermenting the eukaryotic microbial cell according to the invention in a suitable fermentation medium. | 2011-04-07 |
| 20110081695 | METHOD FOR PROCESSING MOLASSES - A method of processing residual molasses from a procedure for the production of lactose from whey permeate. From this molasses, a mineral diminished component is extracted, concentrated, crystallized and therefrom a crystallized phase is separated. | 2011-04-07 |
| 20110081696 | Polypeptides Having Cellobiohydrolase II Activity and Polynucleotides Encoding Same - The present invention relates to polypeptides having cellobiohydrolase II activity and polynucleotides having a nucleotide sequence which encodes for the polypeptides. The invention also relates to nucleic acid constructs, vectors, and host cells comprising the nucleic acid constructs as well as methods for producing and using the polypeptides. | 2011-04-07 |
| 20110081697 | Progressive Fermentation of Lignocellulosic Biomass - Provided are methods for the efficient and cost-reduced production of ethanol or other fermentation products or both from cellulosic biomass, which methods exploit the optimal features of yeasts, fungi, and bacteria while simultaneously minimizing their limitations. For example, one aspect of the present invention relates to methods of producing ethanol or other fermentation products or both from lignocellulosic biomass via progressive fermentation using in series or parallel two or more of yeast, fungus, and bacteria. | 2011-04-07 |
| 20110081698 | METHOD AND INTRODUCTION OF GENE INTO YEAST CELL, AND VECTOR FOR THE METHOD - An object of the present invention is a method for introducing a foreign gene into a yeast cell that does not have an auxotrophic marker. The present invention provides a method for providing a target auxotrophy to a yeast cell and introducing a gene to be expressed into the yeast cell. The method includes the step of transforming a yeast cell with a fragment containing an expression cassette for the gene to be expressed, a cassette for a yeast selectable marker, and two homologous recombination fragments each homologous to a region on either side of a target auxotrophy controlling gene. According to the method, a target auxotrophy controlling gene is deleted from a yeast cell and a gene to be expressed is introduced into the yeast cell, and further the yeast selectable marker is eliminated from the transformed yeast cell. | 2011-04-07 |
| 20110081699 | NITRATE REDUCTION BY A PROBIOTIC IN THE PRESENCE OF A HEME - The invention relates to a method for reducing nitrate into nitrite wherein a probiotic and/or starter bacteriumis cultivated under anaerobic conditions in the presence of a nitrate, a heme and optionally a vitamin K. | 2011-04-07 |
| 20110081700 | Methods of Purifying Recombinant Adamts13 and Other Proteins and Compositions Thereof - Provided herein are methods for purifying recombinant A Disintegrin-like and Metallopeptidase with Thrombospondin Type 1 Motif 13 (ADAMTS13) protein from a sample. The method comprises enriching for ADAMTS13 protein by chromatographically contacting the sample with hydroxyapatite under conditions that allow ADAMTS13 protein to appear in the eluate or supernatant from the hydroxylapatite. The methods may further comprise tandem chromatography with a mixed mode cation exchange/hydrophobic interaction resin that binds ADAMTS13 protein. Additional optional steps involve ultrafiltration/diafiltration, anion exchange chromatography, cation exchange chromatography, and viral inactivation. Also provided herein are methods for inactivating virus contaminants in protein samples, where the protein is immobilized on a support. Also provided herein are compositions of ADAMTS13 prepared according to said methods. | 2011-04-07 |
| 20110081701 | SURGICAL COMPOSITIONS - The present disclosure relates to methods of cell encapsulation using multi-component hydrogels. The hydrogels may include a natural component having nucleophilic functional groups as well as an electrophilic component. In embodiments, at least one of the components may be branched, having drugs, antibodies, enzymes, and the like incorporated therein, which may react with at least one of the other components of the hydrogel. | 2011-04-07 |
| 20110081702 | Method for the Production of Proteins - The present invention relates to a process for the purification of a protease. | 2011-04-07 |
| 20110081703 | Chimeric isoprenoid synthases and uses thereof - Provided is a chimeric isoprenoid synthase polypeptide including a first domain from a first isoprenoid synthase joined to a second domain from a second, heterologous, isoprenoid synthase, whereby the chimeric isoprenoid synthase is capable of catalyzing the production of isoprenoid reaction products that are not produced in the absence of the second domain of the second, heterologous, isoprenoid synthase. Also provided is a chimeric isoprenoid synthase polypeptide including an asymmetrically positioned heterologous domain, whereby the chimeric isoprenoid synthase is capable of catalyzing the production of isoprenoid reaction products that are not produced when the domain is positioned at its naturally-occurring site in the isoprenoid synthase polypeptide. | 2011-04-07 |
| 20110081704 | THERMOSTABLE REVERSE TRANSCRIPTASES AND USES THEREOF - The present invention is in the fields of molecular and cellular biology. The invention is generally related to reverse transcriptase enzymes and methods for the reverse transcription of nucleic acid molecules, especially messenger RNA molecules. Specifically, the invention relates to reverse transcriptase enzymes which have been mutated or modified to increase thermostability, decrease terminal deoxynucleotidyl transferase activity, and/or increase fidelity, and to methods of producing, amplifying or sequencing nucleic acid molecules (particularly cDNA molecules) using these reverse transcriptase enzymes or compositions. The invention also relates to nucleic acid molecules produced by these methods and to the use of such nucleic acid molecules to produce desired polypeptides. The invention also concerns kits comprising such enzymes or compositions. | 2011-04-07 |
| 20110081705 | RECOMBINANT ELASTASE PROTEINS AND METHODS OF MANUFACTURING AND USE THEREOF - The present invention relates to methods for the manufacture, purification, formulation, and use of biologically active recombinant elastase proteins. Described are recombinant methods for producing therapeutically useful elastase proteins, as are pharmaceutical compositions comprising said elastase proteins. Novel recombinant elastase proteins and protein preparations are also disclosed. Methods are described for treating and preventing diseases of biological conduits using pharmaceutical compositions containing the elastase proteins of the invention. | 2011-04-07 |
| 20110081706 | Method and system for efficient harvesting of microalgae and cyanobacteria - The high-speed centrifugation heretofore required for harvesting micro algae and cyanobacteria cultured for biofuels and other co-products is a major cost constraint. Mixing algae/cyanobacteria at high-density culture with far less alkali than previously assumed is sufficient to flocculate the cells. The amount of flocculant required is a function of the logarithm of cell density, and is not a linear function of cell density as had been thought. The least expensive alkali treatments are with slaked limestone or dolomite (calcium hydroxide and magnesium hydroxides). Further water can be removed from the floc by sedimentation, low speed centrifugation, dissolved air flotation or filtration, prior to further processing to separate oil from valuable co-products. | 2011-04-07 |
| 20110081707 | LACTOBACILLUS ACIDOPHILUS NUCLEIC ACID SEQUENCES ENCODING CARBOHYDRATE UTILIZATION-RELATED PROTEINS AND USES THEREFOR - Carbohydrate utilization-related and multidrug transporter nucleic acids and polypeptides, and fragments and variants thereof, are disclosed in the current invention. In addition, carbohydrate utilization-related and multidrug transporter fusion proteins, antigenic peptides, and anti-carbohydrate utilization-related and anti-multidrug transporter antibodies are encompassed. The invention also provides vectors containing a nucleic acid of the invention and cells into which the vector has been introduced. Methods for producing the polypeptides and methods of use for the polypeptides of the invention are further disclosed. | 2011-04-07 |
| 20110081708 | Method of Sequence Optimization for Improved Recombinant Protein Expression using a Particle Swarm Optimization Algorithm - An improved gene sequence optimization method, the systematic optimization method, is described for boosting the recombinant expression of genes in bacteria, yeast, insect and mammalian cells. This general method takes into account of multiple, preferably most or all, of the parameters and factors affecting protein expression including codon usage, tRNA usage, GC-content, ribosome binding sequences, promoter, 5′-UTR, ORF and 3′-UTR sequences of the genes to improve and optimize the gene sequences to boost the protein expression of the genes in bacteria, yeast, insect and mammalian cells. In particular, the invention relates to a system and a method for sequence optimization for improved recombinant protein expression using a particle swarm optimization algorithm. The improved systematic optimization method can be incorporated into a software for more efficient optimization. | 2011-04-07 |
| 20110081709 | METHOD AND APPARATUS FOR EXTRACTING CARBON DIOXIDE FROM AIR - A method and apparatus for extracting CO | 2011-04-07 |
| 20110081710 | METHOD AND APPARATUS FOR EXTRACTING CARBON DIOXIDE FROM AIR - A method and apparatus for extracting CO | 2011-04-07 |
| 20110081711 | Streptomyces Protease - Certain aspects of this disclosure relate to an isolated protease, and cleaning compositions containing the same. In some embodiments, the protease may comprise an amino acid sequence that is at least 80% identical to the wild type | 2011-04-07 |
| 20110081712 | METHOD AND APPARATUS FOR EXTRACTING CARBON DIOXIDE FROM AIR - A method and apparatus for extracting CO | 2011-04-07 |
| 20110081713 | System and Apparatus for Feeding, Solubilizing, Growing and Discharging a Biological Material - Apparatus useful for feeding a particulate starter material comprising nutrient and bacteria to a mixing tank, for solubilizing the starter material inside the mixing tank, for promoting growth of the bacteria and for discharging an aqueous slurry comprising the bacteria from the mixing tank. The apparatus preferably has a gravity-flow feeder and discharge port, does not require a pump, and comprises disposable parts. | 2011-04-07 |
| 20110081714 | Single layer plastic test sample culture bottle - A bottle for culturing a test sample, e.g., blood, includes a plastic vessel made from a single layer of plastic material. The bottle features a gas barrier. In one embodiment the gas barrier is in the form of a plastic shrink-wrap partially or alternatively completely enveloping the plastic vessel. Other embodiments feature a silica or glass coating to the bottle to provide the gas barrier. Other embodiments are made from a gas barrier plastic which is also autoclavable and possesses sufficient strength characteristics. Another embodiment features a single layer plastic bottle and a gas barrier adhesive label covering the cylindrical side wall of the bottle. Kits comprising two or more of such bottles and methods of manufacturing the bottles are also disclosed. | 2011-04-07 |
| 20110081715 | Single layer plastic test sample culture bottle - A bottle for culturing a test sample, e.g., blood, includes a plastic vessel made from a single layer of plastic material. The bottle features a glass barrier coating applied to the bottle, such as a silica or glass coating. An alternative embodiment features a single layer plastic bottle and a gas barrier adhesive label covering the cylindrical side wall of the bottle. Kits comprising two or more of such bottles and methods of manufacturing the bottles are also disclosed. | 2011-04-07 |
| 20110081716 | AUTOMATED SEED SAMPLER AND METHODS OF SAMPLING, TESTING AND BULKING SEEDS - A seed sampler system generally includes an automated sampling station configured to orient a seed and remove a tissue sample from the oriented seed. The seed sampler system may include a support configured to orient a seed received by the support, and an automated sampling mechanism configured to remove a tissue sample from the oriented seed. | 2011-04-07 |
| 20110081717 | DOUBLE-STRANDED NUCLEIC ACID MOLECULE, CANCER CELL PROLIFERATION INHIBITOR AND PHARMACEUTICAL AGENT SUITABLE FOR PREVENTION OR TREATMENT OF CANCER - A double-stranded nucleic acid molecule including (a) a sense strand which includes a nucleotide sequence corresponding to a target sequence indicated by any one of SEQ ID Nos.: 1 to 21, and (b) an antisense strand which includes a nucleotide sequence complementary to that of the sense strand specified in (a), wherein the double-stranded nucleic acid molecule is for suppressing the expression of at least one of APP and EBAG9 genes. | 2011-04-07 |
| 20110081718 | SYSTEM FOR PACKAGING HIGH-CAPACITY ADENOVIRUSES - The invention relates to a nuew system for production and packaging of high capacity adenoviral vectors which does not require the use of helper virues and which is characterized in that it integrates the adenoviral genes needed for the control, replication and packaging of the viral particuiles in the genome of a host cell, which results in the improvement of the long term stability of the production system. | 2011-04-07 |
| 20110081719 | Substantially pure human retinal progenitor, forebrain progenitor, and retinal pigment epithelium cell cultures and methods of making the same - Methods for producing substantially pure cultures of human neural retinal progenitor cells, forebrain progenitor cells, and retinal pigment epithelial cells are disclosed. In addition, the successful differentiation of human embryonic stem cells and human induced pluripotent stem cells through the major developmental stages of human retinogenesis is disclosed. | 2011-04-07 |
| 20110081720 | METHOD OF DIFFERENTIATING STEM CELLS INTO CELLS OF THE ENDODERM AND PANCREATIC LINEAGE - Methods are described to more efficiently produce cells of the endoderm and pancreatic lineage from mammalian pluripotent stem cells. These methods provide a simple, reproducible culture protocol using defined media components to enable consistent, large-scale production of pancreatic cell types for research or therapeutic uses. | 2011-04-07 |
| 20110081721 | PROCESS FOR PRODUCING A TISSUE TRANSPLANT CONSTRUCT FOR RECONSTRUCTING A HUMAN OR ANIMAL ORGAN - A process for producing a tissue transplant construct for reconstructing a human or animal organ. The process may include the steps of: (a) isolation and two-dimensional cultivation of organ-specific tissue cells; (b) application of the organ-specific tissue cells to a biocompatible, collagen-containing membrane; and, (c) cultivation of the organ-specific tissue cells on the membrane with biochemical and mechanical stimulation of the organ-specific tissue cells. Tissue transplant constructs and methods for using tissue transplant constructs are also taught. | 2011-04-07 |
| 20110081722 | ANIMAL PROTEIN-FREE MEDIA FOR CULTIVATION OF CELLS - The present invention relates to animal protein-free cell culture media comprising polyamines and a plant- and/or yeast-derived hydrolysate. The invention also relates to animal protein-free culturing processes, wherein cells can be cultivated, propagated and passaged without adding supplementary animal proteins in the culture medium. These processes are useful in cultivating cells, such as recombinant cells or cells infected with a virus, and for producing biological products by cell culture processes. | 2011-04-07 |
| 20110081723 | Detection of Explosives Through Luminescence - A method of simultaneously detecting peroxide and nitrogen-based explosives includes the steps of applying a conversion reagent to a sample, the conversion reagent oxidizing in the presence of peroxide and inorganic nitrate explosives; applying a test reagent including a luminescent compound to the sample; exciting the luminescent compound with ultraviolet light; and simultaneously determining the presence of one or more explosives based on quenching, brightening or a shift in wavelength of the luminescence over time. Explosives may also be detected based on color changes of the sample. Optionally, phase transfer reagents, catalysts, colorimetric agents and zinc dust may be added to improve detection of explosives. Alternatively, an assay-type method may be utilized wherein a sample is added to the conversion and/or test reagents and the reagent is spotted on a substrate before exposure to ultraviolet light. | 2011-04-07 |
| 20110081724 | METHOD AND APPARATUS FOR DETERMINING RADIATION - The present invention relates to devices, systems, and methods for determination of ionizing radiation. In some embodiments, the devices comprise nanocomposite materials containing nanostructures (e.g., carbon nanotubes) dispersed in radiation sensitive polymers. In some cases, the device may include a conductive pathway that may be affected upon exposure to ionizing radiation. Embodiments described herein may provide inexpensive, large area, low power, and highly sensitive radiation detection materials/devices. | 2011-04-07 |
| 20110081725 | ASSESSMENT OF COMPLICATIONS OF PATIENTS WITH TYPE 1 DIABETES - Described is a method of predicting a risk of a diabetes type 1 patient to suffer from one or more complications selected from cardiovascular complications, terminal renal failure, and death, the method involving a) determining the amount of a cardiac troponin, preferably troponin T, in a sample of a diabetes type 1 patient; and optionally b) determining the amount of a natriuretic peptide, preferably NT-proBNP, in a sample of a diabetes type 1 patient; and c) comparing the amount of the cardiac troponin and optionally the natriuretic peptide determined in steps a) and b) to reference amounts, and establishing a prediction. Also described are devices and kits for carrying out the aforementioned methods. | 2011-04-07 |
| 20110081726 | Signal Dropout Detection and/or Processing in Analyte Monitoring Device and Methods - Methods and devices for receiving a plurality of signals from a transcutaneously positioned analyte sensor, receiving a reference data, calibrating the analyte sensor based on the received reference data to generate calibrated sensor data, detecting a change in the level of the received plurality of signals from the analyte sensor exceeding a predetermined threshold level within a preset time period after calibrating the analyte sensor, and generating an output signal based on the detected change are provided. Systems and kits for performing the same are also provided. | 2011-04-07 |
| 20110081727 | Oxidation Resistant Indicator Molecules - Compounds having enhanced oxidation stability are disclosed. The compounds have an aryl boronic acid residue having one or more electron withdrawing groups on the aromatic moiety which contains the boronic acid residue, such that the molecule has enhanced oxidation resistance as compared to a corresponding molecule without the one or more electron withdrawing groups. | 2011-04-07 |
| 20110081728 | VISUAL, CONTINUOUS AND SIMULTANEOUS MEASUREMENT OF SOLUTION AMMONIA AND HYDROGEN ION CONCENTRATION - Particular aspects provide novel devices and methods for accurately measuring total ammonia (NH | 2011-04-07 |
| 20110081729 | Hydrate Inhibition Test Loop - The detecting and monitoring of solid structure or phase transformation, such as those used for testing the formation of gas hydrates and their inhibition by chemical additives may be conducted in a multi-test assembly of laboratory bench scale loops. The test loop contains a fluid that includes water and hydrate-forming guest molecules such as methane, ethane, carbon dioxide and the like at hydrate-forming conditions of low temperature and high pressure. A small bit or “pig” may be circulated through the test loop at variable speeds to circulate the fluid in the loop. The pig may be moved or impelled through the test loop remotely. The exterior of the pig and/or the interior of the loop may be smooth and/or have a friction-reducing coating thereon to facilitate movement of the pig through the loop. The formation of hydrates may be monitored with consistent and reproducible results. | 2011-04-07 |
| 20110081730 | ACTIVATING MUTATIONS OF PLATELET DERIVED GROWTH FACTOR RECEPTOR ALPHA (PDGFRA) AS DIAGNOSTIC MARKERS AND THERAPEUTIC TARGET - This disclosure provides tyrosine kinase protein and nucleic acid variants, particularly PDGFRA variants, which are activating forms of these molecules and are linked to neoplasms and/or the development or progression of cancer. The disclosure further provides methods of diagnosis and prognosis, and development of new therapeutic agents using these molecules and fragments thereof, and kits for employing these methods and compositions. | 2011-04-07 |
| 20110081731 | Method of Assaying Antigen and Reagent Therefor - A latex agglutination method by which the measurement range is extended and the sensitivity of the measurement in the low concentration range is increased, is disclosed. The method for measuring a test antigen by latex agglutination uses two types of large and small particles, having different average particle sizes. Each latex particle is sensitized with an antibody which undergoes antigen-antibody reaction with the test antigen. The purity of the antibody immobilized on the latex particles is within a specific range. The ratio of the amount of the antibody immobilized per one small latex particle to the amount of the antibody immobilized per one large latex particle; the average particle size of the large latex particles; the average particle size of the small latex particles; the concentration of the large sensitized latex particles in the antigen-antibody reaction system; and the concentration of the small sensitized latex particles in the reaction system are within a specific range. The large sensitized latex particles and the small sensitized latex particles are reacted with the test antigen in the state suspended in a buffer, and then the agglutination of the sensitized latex particles is optically measured. | 2011-04-07 |
| 20110081732 | Method of Manufacturing Magnetic Tunnel Junction Device and Apparatus for Manufacturing the Same - A method of manufacturing a magnetic tunnel junction device includes a barrier layer forming step of forming a tunnel barrier layer. The barrier layer forming step comprises a step of depositing a first metal layer, an oxygen surfactant layer forming step of forming an oxygen surfactant layer on the first metal layer, a step of deposing a second metal layer above the first oxygen surfactant layer, and an oxidation step of oxidizing the first metal layer and the second metal layer to form a metal oxide layer. | 2011-04-07 |
| 20110081733 | Thin film photovoltaic device - The present invention provides a thin film photovoltaic device and a method of forming a thin film photovoltaic device. The thin film photovoltaic device has a substrate, a thin film layer formed on the substrate and first and second electrodes formed on one side of the thin film layer. By applying an electric field over the first and second electrodes, the thin film layer is polarized in a direction parallel to the surface plane of the film. Upon exposure to light, the thin film layer converts light energy into electricity. According to the method, a thin film layer is formed on a substrate. A first electrode and a second electrode are formed on one side of the thin film layer. By applying an electric field over the first and second electrodes, the thin film layer is polarized in a direction parallel to the surface plane of the film. | 2011-04-07 |
| 20110081734 | METHOD AND ARRANGEMENT FOR PRODUCING AN N-SEMICONDUCTIVE INDIUM SULFIDE THIN LAYER - A method of producing, at atmospheric pressure, an n-type semiconductive indium sulfide thin film on a substrate using an indium-containing precursor, hydrogen sulfide as a reactive gaseous precursor, and an inert carrier gas stream includes cyclically repeating first and second steps so as to produce an indium sulfide thin film of a desired thickness. The first method phase includes converting the indium-containing precursor to at least one of a dissolved and a gaseous phase, heating the substrate to a temperature in a range of 100° C. to 275° C., directing the indium containing precursor onto the substrate and supplying hydrogen sulfide to the indium-containing precursor in a mixing zone in an amount so as to provide an absolute concentration of hydrogen sulfide that is greater than zero and no greater than 1% by volume. The indium concentration of the indium-containing precursor is set so as to produce a compact In(OH | 2011-04-07 |
| 20110081735 | PROCESS FOR FORMING ENCAPSULATED ELECTRONIC DEVICES - There is provided herein a process for forming an encapsulated electronic device. The device has active areas and sealing areas on a substrate. The process includes providing the substrate; forming a discontinuous pattern of a material having a first surface energy on at least a portion of the sealing areas; forming multiple active layers, where at least one active layer is formed by liquid deposition from a liquid medium having a surface energy greater than the first surface energy; providing an encapsulation assembly; and bonding the encapsulation assembly to the substrate in the sealing areas. Also provided are devices formed by the disclosed processes. | 2011-04-07 |
| 20110081736 | METHOD FOR MANUFACTURING LIGHT-EMITTING DIODE DEVICES - A method for manufacturing light-emitting diode devices. Multiple metal frames are provided. The metal frames are adjacent to each other and are arranged on a same plane. Each metal frame includes a first connection pin and a second connection pin. A light-emitting diode chip is disposed on and electrically connected to each metal frame. The metal frames are respectively bent, enabling the adjacent metal frames to separate from each other. A moldboard formed with a plurality of mold cavities is provided. The bent metal frames are respectively disposed in the mold cavities, locating each light-emitting diode chip in each mold cavity. The mold cavities are respectively filled with package gel. The package gel filled in each mold cavity covers each light-emitting diode chip. The package gel is solidified. The mold cavities are separated from the package gel. The metal frames are separated from each other, forming the light-emitting diode devices. | 2011-04-07 |
| 20110081737 | METHOD FOR MANUFACTURING LIGHT EMITTING DIODE ASSEMBLY - A method for manufacturing a light emitting diode (LED) assembly comprises the steps of: covering a light-reflection layer onto a substrate layer, covering a light-emitting layer onto the light-reflection layer, and forming a P type electrode and an N type electrode extended from the light-emitting layer, perforating through the light-reflection layer, and exposed from the substrate layer to form an LED chip structure; packaging the LED chip structure with a light-transmissible packaging material and keeping the P type electrode and the N type electrode exposed from the light-transmissible packaging material to form a molded LED chip cell; and electrically connecting the P type electrode and the N type electrode of the molded LED chip cell to a circuit board, so as to manufacture the LED assembly. | 2011-04-07 |
| 20110081738 | Semiconductor composite apparatus, method for manufacturing the semiconductor composite apparatus, LED head that employs the semiconductor composite apparatus, and image forming apparatus that employs the LED head - A semiconductor composite apparatus includes a semiconductor thin film layer and a substrate. The semiconductor thin film layer and the substrate are bonded to each other with a layer of an alloy of a high-melting-point metal and a low-melting-point metal formed between the semiconductor thin film layer and the substrate. The alloy has a higher melting point than the low-melting-point metal. The layer of the alloy contains a product resulting from a reaction of the low-melting-point metal and a material of said semiconductor thin film layer. | 2011-04-07 |
| 20110081739 | ELECTRONIC DEVICE INCLUDING MEMS DEVICES AND HOLED SUBSTRATES, IN PARTICULAR OF THE LGA OR BGA TYPE - An electronic device includes a substrate provided with a passing opening and a MEMS device including an active surface wherein a portion of the MEMS device is integrated sensitive to chemical/physical variations of a fluid. The active surface of the MEMS device faces the substrate and is spaced therefrom, the sensitive portion being aligned to the opening. A protective package incorporates at least partially the MEMS device and the substrate, leaving at least the sensitive portion of the MEMS device, and the opening of the substrate exposed. A barrier element is positioned in an area which surrounds the sensitive portion to realize a protection structure for the MEMS device, so that the sensitive portion is free. | 2011-04-07 |
| 20110081740 | Low Stress Photo-Sensitive Resin with Sponge-Like Structure and Devices Manufactured Employing Same - System and method for forming a structure including a MEMS device structure. In order to prevent warpage of a substrate arising from curing process for a sacrificial material (such as a photoresist), and from subsequent high temperature process steps, an improved sacrificial material comprises (i) a polymer and (ii) a foaming agent or special function group. The structure can be formed by forming a trench in a substrate and filling the trench with a sacrificial material. The sacrificial material includes (i) a polymer and (ii) a foaming agent or special function group. After further process steps are completed, the sacrificial material is removed from the trench. | 2011-04-07 |
| 20110081741 | THERMOELECTRIC CONVERSION MODULE AND METHOD FOR MANUFACTURING THERMOELECTRIC CONVERSION MODULE - A thermoelectric conversion module includes a laminated body including a plurality of thermoelectric components laminated therein. Each of the thermoelectric components includes an insulating layer, and a thermoelectric conversion element section in which a plurality of p-type thermoelectric conversion material layers and a plurality of n-type thermoelectric conversion material layers are arranged on the insulating layer in a series connection. A step eliminating insulating material layer is arranged to eliminate a step between the thermoelectric conversion element section and a vicinity thereof, in a region between the insulating layers adjacent to each other in a laminating direction, around the p-type thermoelectric conversion material layers and n-type thermoelectric conversion material layers constituting the thermoelectric conversion element section. The thermoelectric conversion element section has a serpentine shape. Thicknesses of the p-type and n-type thermoelectric conversion material layers constituting the thermoelectric conversion element section are greater than the thickness of the insulating layer. | 2011-04-07 |
| 20110081742 | TEXTURING SEMICONDUCTOR SUBSTRATES - Semiconductors are textured with aqueous solutions containing non-volatile alkoxylated glycols, their ethers and ether acetate derivatives having molecular weights of 170 or greater and flash points of 75° C. or greater. The textured semiconductors can be used in the manufacture of photovoltaic devices. | 2011-04-07 |
| 20110081743 | BUFFER LAYER AND MANUFACTURING METHOD THEREOF, REACTION SOLUTION, PHOTOELECTRIC CONVERSION DEVICE, AND SOLAR CELL - A buffer layer manufacturing method, including: a preparation step for preparing a reaction solution which includes a component (Z) of at least one kind of zinc source, a component (S) of at least one kind of sulfur source, a component (C) of at least one kind of citrate compound, a component (N) of at least one kind selected from the group consisting of ammonia and ammonium salt, and water, in which the concentration of the component (C) is 0.001 to 0.25M, the concentration of the component (N) is 0.001 to 0.40M, and the pH of the reaction solution before the start of reaction is 9.0 to 12.0; and a film forming step for forming a Zn compound layer consisting primarily of Zn(S, O) and/or Zn(S, O, OH) by a liquid phase method with a reaction temperature of 70 to 95° C. | 2011-04-07 |
| 20110081744 | BUFFER LAYER AND MANUFACTURING METHOD THEREOF, REACTION SOLUTION, PHOTOELECTRIC CONVERSION DEVICE, AND SOLAR CELL - A buffer layer manufacturing method, including the steps of forming a fine particle layer of ZnS, Zn(S, O), and/or Zn(S, O, OH), mixing an aqueous solution (I) which includes a component (Z), an aqueous solution (II) which includes a component (S), and an aqueous solution (III) which includes a component (C) to obtain a mixed solution and mixing an aqueous solution (IV) which includes a component (N) in the mixed solution to prepare a reaction solution in which the concentration of the component (C) is 0.001 to 0.25M, concentration of the component (N) is 0.41 to 1.0M, and the pH before the start of reaction is 9.0 to 12.0, and, using the reaction solution, forming a Zn compound layer of Zn(S, O) and/or Zn(S, O, OH) on the fine particle layer by a liquid phase method with a reaction temperature of 70 to 95° C. | 2011-04-07 |
| 20110081745 | Method of Manufacturing Selective Emitter Solar Cell - The present disclosure uses ammonia plasma for nitrification and for further forming a barrier pattern on a substrate. Then, a selective emitter is fabricated by forming light doping and heavy doping at one time through diffusion into the substrate. Therein, a plurality of trenches for obtaining a front contact is formed at the same time on forming the barrier pattern. Thus, the fabrication process is simplified and the cost is reduced for fabricating a selective emitter solar cell. | 2011-04-07 |
| 20110081746 | METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - A method for producing a semiconductor device includes the steps of forming an organic semiconductor layer on a substrate; forming a protective pattern on the organic semiconductor layer; and patterning the organic semiconductor layer by dissolving, in an organic solvent, or subliming the organic semiconductor layer using the protective pattern as a mask. | 2011-04-07 |
| 20110081747 | METHOD FOR REMOVING ELECTRICITY AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - An object is to suppress a significant change in electrical characteristics of thin film transistors and a deviation thereof from the designed range due to static electricity, and to improve the yield in manufacturing semiconductor devices. In order to prevent a substrate from being charged with static electricity by heat treatment or to favorably reduce static electricity with which a substrate is charged in a manufacturing process of a semiconductor device, heat treatment is performed with a substrate provided with a thin film transistor stored in a conductive container. In addition, a heating apparatus for performing the heat treatment is electrically connected to a ground potential, and the container and the substrate are also electrically connected to the ground potential. | 2011-04-07 |
| 20110081748 | METHODS FOR FORMING RESISTIVE-SWITCHING METAL OXIDES FOR NONVOLATILE MEMORY ELEMENTS - Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed from resistive-switching metal oxide layers. Metal oxide layers may be formed using sputter deposition at relatively low sputtering powers, relatively low duty cycles, and relatively high sputtering gas pressures. Dopants may be incorporated into a base oxide layer at an atomic concentration that is less than the solubility limit of the dopant in the base oxide. At least one oxidation state of the metal in the base oxide is preferably different than at least one oxidation sate of the dopant. The ionic radius of the dopant and the ionic radius of the metal may be selected to be close to each other. Annealing and oxidation operations may be performed on the resistive switching metal oxides. Bistable metal oxides with relatively large resistivities and large high-state-to-low state resistivity ratios may be produced. | 2011-04-07 |
| 20110081749 | SURFACE MODIFICATION FOR HANDLING WAFER THINNING PROCESS - A wafer is provided with a through via extending a portion of a substrate, an interconnect structure electrically connecting the through via, and a polyimide layer formed on the interconnect structure. Surface modification of the polyimide layer is the formation of a thin dielectric film on the polyimide layer by coating, plasma treatment, chemical treatment, or deposition methods. The thin dielectric film is adhered strongly to the polyimide layer, which can reduce the adhesion between the wafer surface and an adhesive layer formed in subsequent carrier attaching process. | 2011-04-07 |
| 20110081750 | MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICES - The reliability of a semiconductor device is enhanced. A first lead frame, a first semiconductor chip, a second lead frame, and a second semiconductor chip are stacked over an assembly jig in this order with solder in between and solder reflow processing is carried out to fabricate their assembly. Thereafter, this assembly is sandwiched between first and second molding dies to form an encapsulation resin portion. The upper surface of the second die is provided with steps. At a molding step, the second lead frame is clamped between the first and second dies at a position higher than the first lead frame; and a third lead frame is clamped between the first and second dies at a higher position. The assembly jig is provided with steps at the same positions as those of the steps in the upper surface of the second die in positions corresponding to those of the same. | 2011-04-07 |
| 20110081751 | LATERAL INSULATED GATE BIPOLAR TRANSISTOR HAVING A RETROGRADE DOPING PROFILE IN BASE REGION AND METHOD OF MANUFACTURE THEREOF - In a semiconductor device of the present invention, a first base region | 2011-04-07 |
| 20110081752 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A thin semiconductor wafer, on which a top surface structure and a bottom surface structure that form a semiconductor chip are formed, is affixed to a supporting substrate by a double-sided adhesive tape. Then, on the thin semiconductor wafer, a trench to become a scribing line is formed by wet anisotropic etching with a crystal face exposed so as to form a side wall of the trench. On the side wall of the trench with the crystal face thus exposed, an isolation layer for holding a reverse breakdown voltage is formed by ion implantation and low temperature annealing or laser annealing so as to be extended to the top surface side while being in contact with a p collector region as a bottom surface diffused layer. Then, laser dicing is carried out to neatly dice a collector electrode, formed on the p collector region, together with the p collector region, without presenting any excessive portions and any insufficient portions under the isolation layer. Thereafter, the double-sided adhesive tape is removed from the collector electrode to produce semiconductor chips. A highly reliable reverse-blocking semiconductor device can thus be formed at a low cost. | 2011-04-07 |
| 20110081753 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device is provided for improving the reliability of a semiconductor device including a MISFET with a high dielectric constant gate insulator and a metal gate electrode. A first Hf-containing insulating film containing Hf, La, and O as a principal component is formed as a high dielectric constant gate insulator for an n-channel MISFET. A second Hf-containing insulating film containing Hf, Al, and O as a principal component is formed as a high dielectric constant gate insulator for a p-channel MISFET. Then, a metal film and a silicon film are formed and patterned by dry etching to thereby form first and second gate electrodes. Thereafter, parts of the first and second Hf-containing insulating films not covered with the first and second gate electrodes are removed by wet etching. At this time, a wet process with an acid solution not containing hydrofluoric acid, and another wet process with an alkaline solution are performed, and then a further wet process with an acid solution containing hydrofluoric acid is performed. | 2011-04-07 |
| 20110081754 | METHODS FOR OBTAINING GATE STACKS WITH TUNABLE THRESHOLD VOLTAGE AND SCALING - Methods of forming complementary metal oxide semiconductor (CMOS) structures with tunable threshold voltages are provided. The methods disclose a technique of obtaining selective placement of threshold voltage adjusting materials on a semiconductor substrate by using a block mask prior to deposition of the threshold voltage adjusting materials. The block mask is subsequently removed to obtain a patterned threshold voltage adjusting material on the semiconductor substrate. The methods are material independent and can be used in sequence for both nFET threshold voltage adjusting materials and pFET threshold voltage adjusting materials. | 2011-04-07 |
| 20110081755 | Methods Of Fabricating An Access Transistor Having A Polysilicon-Comprising Plug On Individual Of Opposing Sides Of Gate Material - Fabrication methods for gate transistors in integrated circuit devices enable the formation of recessed access device structures or FinFET structures having P-type workfunctions. The fabrication methods also provide for the formation of access transistor gates of an access device following formation of the periphery transistor gates. Access devices and systems including same are also disclosed. | 2011-04-07 |
| 20110081756 | Semiconductor device having vertical mosfet and method of manufacturing the same - A method of manufacturing a semiconductor device, includes forming a first trench and a second trench in a semiconductor region of a first conductivity type simultaneously, forming a gate insulating film and a gate electrode in the first trench, forming a channel region of a second conductivity type in the semiconductor region, forming a source region of the first conductivity type in the channel region, forming a diffusion region of the first conductivity type which has a higher concentration than that of the semiconductor region in a part of the semiconductor region located immediately under the second trench by implanting impurity ions of the first conductivity type through the second trench, and forming a drain electrode in a part of the second trench. | 2011-04-07 |
| 20110081757 | MEMORY HAVING A VERTICAL ACCESS DEVICE - Semiconductor memory devices having vertical access devices are disclosed. In some embodiments, a method of forming the device includes providing a recess in a semiconductor substrate that includes a pair of opposed side walls and a floor extending between the opposed side walls. A dielectric layer may be deposited on the side walls and the floor of the recess. A conductive film may be formed on the dielectric layer and processed to selectively remove the film from the floor of the recess and to remove at least a portion of the conductive film from the opposed sidewalls. | 2011-04-07 |
| 20110081758 | Semiconductor device including I/O oxide nitrided core oxide on substrate, and method of manufacture - A semiconductor device includes a semiconductor substrate, wherein the semiconductor substrate includes a core area for core circuits and a peripheral area for peripheral circuits. The semiconductor device includes a core oxide on the semiconductor substrate in the core area, a portion of the core oxide being nitrided, a first polysilicon pattern on the core oxide, an I/O oxide including pure oxide on the semiconductor substrate in the peripheral area, and a second polysilicon pattern on the I/O oxide. | 2011-04-07 |
| 20110081759 | POWER MOS ELECTRONIC DEVICE AND CORRESPONDING REALIZING METHOD - Power MOS device of the type comprising a plurality of elementary power MOS transistors having respective gate structures and comprising a gate oxide with double thickness having a thick central part and lateral portions of reduced thickness. Such device exhibiting gate structures comprising first gate conductive portions overlapped onto said lateral portions of reduced thickness to define, for the elementary MOS transistors, the gate electrodes, as well as a conductive structure or mesh. Such conductive structure comprising a plurality of second conductive portions overlapped onto the thick central part of gate oxide and interconnected to each other and to the first gate conductive portions by means of a plurality of conducive bridges. | 2011-04-07 |
| 20110081760 | METHOD OF MANUFACTURING LATERAL DIFFUSION METAL OXIDE SEMICONDUCTOR DEVICE - A method of manufacturing a lateral diffusion metal oxide semiconductor device includes following steps. First, a substrate having a first conductive type is provided. The substrate has a well, and the well has a second conductive type. Then, a body region is formed in the well, and a channel defining region is formed in the body region. The body region has the second conductive type, and the channel defining region has the first conductive type, so that the body region disposed between the channel defining region and the well and uncovered with the channel defining region forms a channel of the lateral diffusion metal oxide semiconductor device. Then, a gate structure is formed on the channel. | 2011-04-07 |
| 20110081761 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device may include, but is not limited to the following processes. A first recess is formed in a semiconductor substrate to define an active region on the semiconductor substrate. The active region includes a protruding portion of the semiconductor substrate surrounded by the first recess. The protruding portion has a sloped side surface. A first insulating film that fills the first recess is formed. A gate recess is formed in the active region to form a thin film portion that upwardly extends. The thin film portion is positioned between the gate recess and the first insulating film. The thin film portion is a part of the protruding portion. An upper part of the thin film portion is removed by wet-etching to adjust a height of the thin film portion. | 2011-04-07 |
| 20110081762 | Methods of fabricating non-volatile memory devices with discrete resistive memory material regions - A semiconductor memory device includes a first conductive line on a semiconductor substrate, an interlayer insulating layer on the first conductive line, a second conductive line on the interlayer insulating layer, and a memory cell in an hole through the interlayer insulating layer wherein the first and second conductive lines cross, the memory cell including a discrete resistive memory material region disposed in the hole and electrically connected between the first and second conductive lines. The resistive memory material region may be substantially contained within the hole. In some embodiments, contact between the resistive memory material region and the interlayer insulating layer is substantially limited to sidewalls of the interlayer insulating layer in the hole. | 2011-04-07 |
| 20110081763 | PROCESS USING OXIDE SUPPORTER FOR MANUFACTURING A CAPACITOR LOWER ELECTRODE OF A MICRO STACKED DRAM - A process using oxide supporter for manufacturing a capacitor lower electrode of a micron stacked DRAM is disclosed. First, form a stacked structure. Second, form a photoresist layer on an upper oxide layer and then etch them. Third, deposit a polysilicon layer onto the upper oxide layer and the nitride layer. Fourth, deposit a nitrogen oxide layer on the polysilicon layer and the upper oxide layer. Sixth, partially etch the nitrogen oxide layer, the polysilicon layer and the upper oxide layer to form a plurality of vias. Seventh, oxidize the polysilicon layer to form a plurality of silicon dioxides surround the vias. Eighth, etch the nitride layer, the dielectric layer and the lower oxide layer beneath the vias. Ninth, form a metal plate and a capacitor lower electrode in each of the vias. Tenth, etch the nitrogen oxide layer, the polysilicon layer, the nitride layer and the dielectric layer. | 2011-04-07 |
| 20110081764 | METHODS FOR FORMING ISOLATED FIN STRUCTURES ON BULK SEMICONDUCTOR MATERIAL - Methods are provided for fabricating a semiconductor device. A method comprises forming a layer of a first semiconductor material overlying the bulk substrate and forming a layer of a second semiconductor material overlying the layer of the first semiconductor material. The method further comprises creating a fin pattern mask on the layer of the second semiconductor material and anisotropically etching the layer of the second semiconductor material and the layer of the first semiconductor material using the fin pattern mask as an etch mask. The anisotropic etching results in a fin formed from the second semiconductor material and an exposed region of first semiconductor material underlying the fin. The method further comprises forming an isolation layer in the exposed region of first semiconductor material underlying the fin. | 2011-04-07 |
| 20110081765 | METHOD TO IMPROVE WET ETCH BUDGET IN FEOL INTEGRATION - A method of forming a semiconductor device is provided where in one embodiment an STI fill is recessed below the pad nitride and pad oxide layers, to a level substantially coplanar with the top surface of the substrate. A thin (having a thickness in the range of about 10 Å-100 Å) wet etch resistant layer is formed in contact with and completely covering at least the top surface of the recessed STI fill material. The thin wet etch resistant layer is more resistant to a wet etch process than at least the pad oxide layer. The thin wet etch resistant layer may be a refractory dielectric material, or a dielectric such as HfO | 2011-04-07 |
| 20110081766 | METHOD FOR DOPING A SELECTED PORTION OF A DEVICE - A method includes forming a protective layer with an opening over a substrate, thereafter implanting a dopant into a substrate region through the opening, the protective layer protecting a different substrate region, and reducing thickness of the protective layer. A different aspect includes etching a substrate to form a recess therein, thereafter implanting a dopant into a substrate region within the recess and through an opening in a protective layer provided over the substrate, and reducing thickness of the protective layer. Another aspect includes forming a protective layer over a substrate, forming photoresist having an opening over the protective layer, etching the protective layer through the opening to expose the substrate, etching the substrate to form a recess in the substrate, implanting a dopant into a substrate portion, the protective layer protecting a different substrate portion thereunder, and etching the protective layer to reduce its thickness. | 2011-04-07 |
| 20110081767 | PRECISION TRENCH FORMATION THROUGH OXIDE REGION FORMATION FOR A SEMICONDUCTOR DEVICE - Structures and methods for precision trench formation are disclosed. In one embodiment, a method for manufacturing a semiconductor device comprises forming a first oxygen-containing region in a semiconductor substrate by performing an oxygen ion implantation to a portion of the semiconductor substrate, and oxidizing the first oxygen-containing region using oxygen contained therein by performing a thermal processing to the semiconductor substrate, where the first oxygen-containing region is converted to a first oxide region. The method further comprises forming a groove in the semiconductor substrate by eliminating the first oxide region, where the performing thermal processing comprises subjecting the first oxygen-containing region to a gas low on oxygen. | 2011-04-07 |
| 20110081768 | WORKPIECE DIVIDING METHOD - In a workpiece dividing method, an expansion tape is stuck to an adhesive film side of a workpiece in a state where an adhesive film is stuck to the rear surface of a wafer. Respective positions of the predetermined dividing lines on the front surface of the wafer are detected. On the basis of information on the detected predetermined dividing lines, a laser beam passing through the wafer from the front surface of the wafer is focused on and directed to the front surface or inside of the adhesive film to form modified areas on the front surface of or in the inside of the adhesive film. On the basis of information on the detected predetermined dividing lines, a laser beam passing through the wafer from the front surface of the wafer is focused on and directed to the inside of the wafer to form modified areas in the inside of the wafer. The expansion tape is expanded to divide the workpiece along the predetermined dividing lines with the modified areas taken as start points. | 2011-04-07 |
| 20110081769 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A chip provided with a layer for separation of a surface region and a hydrophilic surface is manufactured. One or both of a hydrophilic region and a hydrophobic region are formed on a substrate surface where the chip is placed. Liquid is dropped onto the hydrophilic region on the substrate surface, and the chip is placed thereon. The substrate and the chip are heated while being pressure-bonded so that the chip is fixed on the substrate surface, and then the surface region of the chip is separated. By providing a liquid layer in a position where the chip is placed, the chip can be placed on the substrate with high accuracy and thus productivity can be increased. | 2011-04-07 |
| 20110081770 | REMOVING UNDESIRABLE NANOTUBES DURING NANOTUBE DEVICE FABRICATION - Fabricating single-walled carbon nanotube transistor devices includes removing undesirable types of nanotubes. These undesirable types of nanotubes may include nonsemiconducting nanotubes, multiwalled nanotubes, and others. The undesirable nanotubes may be removed electrically using voltage or current, or a combination of these. This approach to removing undesirable nanotubes is sometimes referred to as “burn-off.” The undesirable nanotubes may be removed chemically or using radiation. The undesirable nanotubes of an integrated circuit may be removed in sections or one transistor (or a group of transistors) at a time in order to reduce the electrical current used or prevent damage to the integrated circuit during burn-off. | 2011-04-07 |
| 20110081771 | MULTICHAMBER SPLIT PROCESSES FOR LED MANUFACTURING - Embodiments described herein generally relate to methods for forming Group III-V materials by metal-organic chemical vapor deposition (MOCVD) processes and/or hydride vapor phase epitaxial (HVPE) processes. In one embodiment, deposition of a group III | 2011-04-07 |
| 20110081772 | METHODS OF FABRICATING SILICON CARBIDE DEVICES INCORPORATING MULTIPLE FLOATING GUARD RING EDGE TERMINATIONS - Edge termination for silicon carbide devices has a plurality of concentric floating guard rings in a silicon carbide layer that are adjacent and spaced apart from a silicon carbide-based semiconductor junction. An insulating layer, such as an oxide, is provided on the floating guard rings and a silicon carbide surface charge compensation region is provided between the floating guard rings and is adjacent the insulating layer. Methods of fabricating such edge termination are also provided. | 2011-04-07 |
| 20110081773 | Method for Forming a Shielded Gate Trench FET - A method for forming a shielded gate field effect transistor (FET) includes forming a plurality of trenches in a semiconductor region and forming a shield electrode in a bottom portion of each trench. The method also includes forming a dielectric layer comprising a first oxide layer and a nitride layer both laterally extending over the shield electrode. The method also includes forming a gate electrode over the dielectric layer. | 2011-04-07 |
| 20110081774 | METHODS FOR A GATE REPLACEMENT PROCESS - A method for fabricating a semiconductor device is disclosed. In one embodiment, the method may include providing a substrate; forming a gate structure including a first dummy gate over the substrate; removing the first dummy gate from the gate structure to form a trench; forming an interfacial layer, high-k dielectric layer, and capping layer to partially fill in the trench; forming a second dummy gate over the capping layer, wherein the second dummy gate fills the trench; and replacing the second dummy gate with a metal gate. In one embodiment, the method may include providing a substrate; forming an interfacial layer over the substrate; forming a high-k dielectric layer over the interfacial layer; forming an etch stop layer over the high-k dielectric layer; forming a capping layer including a low thermal budget silicon over the etch stop layer; forming a dummy gate layer over the capping layer; forming a gate structure; and performing a gate replacement process. | 2011-04-07 |
| 20110081775 | METHOD FOR ADJUSTING THE THRESHOLD VOLTAGE OF A GATE STACK OF A PMOS DEVICE - A method for fabricating a semiconductor device comprising a gate stack of a gate dielectric and a gate electrode, the method including forming a gate dielectric layer over a semiconductor substrate the gate dielectric layer being a metal oxide or semimetal oxide having a first electronegativity; forming a dielectric V | 2011-04-07 |
| 20110081776 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A first insulating film is formed on or above a substrate, and a first conductor is formed in an upper portion of the formed first insulating film. Then, a second insulating film is formed on the first insulating film so as to cover the first conductor. Then, a film quality alteration process is performed for the second insulating film. Moreover, a third insulating film is formed on the second insulating film, and a curing process is performed for the formed third insulating film. | 2011-04-07 |
| 20110081777 | Methods of forming a pattern and methods of fabricating a semiconductor device having a pattern - Methods of forming a pattern and methods of fabricating a semiconductor device having a pattern are provided, the methods include forming a self-assembly induction layer including a first region and a second region on a semiconductor substrate. A block copolymer layer is coated on the self-assembly induction layer. A first pattern, a second pattern and a third pattern are formed by phase separating the block copolymer. At least one of the first, second and third patterns may be removed to form a preliminary pattern. An etching process may be performed using the preliminary pattern as an etching mask. The first pattern contains the same material as that of the second pattern, and the third pattern contains a material different from that of the first pattern. | 2011-04-07 |
| 20110081778 | SEMICONDUCTOR DEVICE HAVING FINE PATTERN WIRING LINES INTEGRALLY FORMED WITH CONTACT PLUG AND METHOD OF MANUFACTURING SAME - A semiconductor device and method are disclosed in which an interlayer insulating layer is patterned using multiple overlaying masks to define the geometry of contact plugs and corresponding wiring layers separated by fine pitches. | 2011-04-07 |
| 20110081779 | Method and Apparatus for Material Deposition - Broadly speaking, a method and an apparatus are provided for depositing a material on a semiconductor wafer (“wafer”). More specifically, the method and apparatus provide for selective heating of a surface of the wafer exposed to an electroless plating solution. The selective heating is provided by applying radiant energy to the wafer surface. The selective heating of the wafer surface causes a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase at the interface in turn causes a plating reaction to occur at the wafer surface. Thus, material is deposited on the wafer surface through an electroless plating reaction that is initiated and controlled by varying the temperature of the wafer surface using an appropriately defined radiant energy source. | 2011-04-07 |
| 20110081780 | AQUEOUS DISPERSION FOR CHEMICAL MECHANICAL POLISHING AND CHEMICAL MECHANICAL POLISHING METHOD - A chemical mechanical polishing aqueous dispersion includes (A) silica particles, and (B1) an organic acid, the number of silanol groups included in the silica particles (A) calculated from a signal area of a | 2011-04-07 |
| 20110081781 | METHOD FOR MANUFACTURING SEMICONDUCTOR - A method for manufacturing a semiconductor device includes forming a first stress film covering a first transistor arranged in a first region and a second transistor arranged in a second region on a semiconductor substrate; forming an etching stopper film, which possesses etching characteristics different from etching characteristics of the first stress film, on the first stress film; etching the etching stopper film to selectively leave the etching stopper film at a portion covering a sidewall portion of the first stress film in the first region; removing both the etching stopper film and the first stress film in the second region; and forming a second stress film, which possesses etching characteristics different from the etching characteristics of the etching stopper film, on the semiconductor substrate in such a manner as to cover the second transistor, the first stress film. | 2011-04-07 |
| 20110081782 | POST-PLANARIZATION DENSIFICATION - Processes for forming high density gap-filling silicon oxide on a patterned substrate are described. The processes increase the density of gap-filling silicon oxide particularly in narrow trenches. The density may also be increased in wide trenches and recessed open areas. The densities of the gap-filling silicon oxide in the narrow and wide trenches/open areas become more similar following the treatment which allows the etch rates to match more closely. This effect may also be described as a reduction in the pattern loading effect. The process involves forming then planarizing silicon oxide. Planarization exposes a new dielectric interface disposed closer to the narrow trenches. The newly exposed interface facilitates a densification treatment by annealing and/or exposing the planarized surface to a plasma. | 2011-04-07 |
| 20110081783 | SHOWERHEAD ELECTRODE ASSEMBLIES FOR PLASMA PROCESSING APPARATUSES - Showerhead electrode assemblies are disclosed, which include a showerhead electrode adapted to be mounted in an interior of a vacuum chamber; an optional backing plate attached to the showerhead electrode; a thermal control plate attached to the backing plate or to the showerhead electrode at multiple contact points across the backing plate; and at least one thermally and electrically conductive gasket separating the backing plate and the thermal control plate, or the backing plate and showerhead electrode, at the contact points. Methods of processing semiconductor substrates using the showerhead electrode assemblies are also disclosed. | 2011-04-07 |
| 20110081784 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device includes: forming step of forming an etching mask on a second main face of a substrate, the etching mask being made of Cu or Cu alloy and having an opening, the second main face being on an opposite side of a first main face of the substrate where a nitride semiconductor layer is provided; a first etching step of applying a dry etching to the second main face of the substrate with use of the etching mask so that all of or a part of the nitride semiconductor layer is left; a removing step of removing the etching mask after the first etching step; and a second etching step of dry-etching the left nitride semiconductor layer after the removing step. | 2011-04-07 |
| 20110081785 | SOLUTION FOR THE SELECTIVE REMOVAL OF METAL FROM ALUMINUM SUBSTRATES - The present disclosure relates to a solution for selectively removing metal, such as Ta or TaN, from a substrate, such as an aluminum containing substrate. The solution comprises an acid, such as HF or buffered HF, an ingredient comprising a fluorine ion, such as ammonium fluoride (NH | 2011-04-07 |
| 20110081786 | METHODS OF REDUCING DEFECT FORMATION ON SILICON DIOXIDE FORMED BY ATOMIC LAYER DEPOSITION (ALD) PROCESSES - Methods for reducing and inhibiting defect formation on silicon dioxide formed by atomic layer deposition (ALD) are disclosed. Defect reduction is accomplished by performing processing on the silicon dioxide subsequent to deposition by ALD. The post-deposition processing may include at least one of a pump/purge cycle and a water exposure cycle performed after formation of the silicon dioxide on a substrate. | 2011-04-07 |
| 20110081787 | PLASMA PROCESSING METHOD AND APPARATUS - With evacuation of interior of a vacuum chamber halted and with gas supply into the vacuum chamber halted, in a state that a mixed gas of helium gas and diborane gas is sealed in the vacuum chamber, a plasma is generated in a vacuum vessel and simultaneously a high-frequency power is supplied to a sample electrode. By the high-frequency power supplied to the sample electrode, boron is introduced to a proximity to the substrate surface. | 2011-04-07 |
| 20110081788 | Multi-contact universally jointed power and/or signal connector devices constructed utilizing deformed printed circuit boards - An adjustable at least three-way electrical connector device for signal, power, voice and/or data communication, comprising at least three adjustable electrical connections utilizing a ball and socket type physical connection device, preferably including a weatherproofing gasket, and further including being constructed utilizing deformable printed circuit boards, deformed and embedded in thermosetting plastic material with elastomeric properties, and including methods of construction. | 2011-04-07 |
| 20110081789 | Multi Contact Brush For Slip Rings - A sliding-contact arrangement or slipring includes a slide-track having a V-shaped groove and also a brush having at least two slide-wires which simultaneously make sliding contact with the V-shaped groove of the slide-track. Furthermore, the two slide-wires have different diameters and contact the slide-track at different angular positions. Thereby an increased tolerance to mechanical vibrations and shocks as well as a reduced contact resistance results. | 2011-04-07 |
| 20110081790 | CONNECTOR AND SYSTEM FOR CONNECTORS - A connector and a system for connectors of a mobile device wherein the connector is angled, that is, wherein the connector includes an external interface for receiving an external connection and an internal interface configured for connection to a printed circuit board, wherein the internal interface is connected to the external interface and the internal interface is at a predetermined angle with respect to the external interface. In a mobile device, the external interface is at an angle to a main printed circuit board of the mobile device. | 2011-04-07 |
| 20110081791 | CONNECTOR FOR FLEXIBLE CABLE - A connector for a flexible cable is provided. Connection parts of an even terminal and an odd terminal alternately cross each other to align a rotation center with the center of an X-shape. Operation parts of the terminals are divided into rotation start sections and rotation end sections. Recesses of the rotation start sections are deeper than recesses of the rotation end sections. A stopper prevents reduction of a contact pressure after a rotator engages with the rotation end sections at an angle of 90°. | 2011-04-07 |
