| 14th week of 2013 patent applcation highlights part 11 |
| Patent application number | Title | Published |
|---|
| 20130082190 | STAGE APPARATUS - Fluctuation in speed when a stage with a sample mounted thereon is moved at low speed is reduced such that an image to be observed is moved at constant speed when performing high-magnification observation using a scanning electron microscope. A control amount is obtained by compensation means from the deviation between position information obtained from position information detected by position detection means through a first low-pass filter and a command value obtained by integrating a speed command value input from stage operation input means and through a second low-pass filter having the same frequency characteristic as the first low-pass filter, and a driving signal to be output to driving means is generated from the added value of the control amount and the speed command value by waveform output means. | 2013-04-04 |
| 20130082191 | STRESS-SENSITIVE MATERIAL AND METHODS FOR USING SAME - A stress-sensing material containing a matrix material and a photo-luminescent particle is disclosed, together with adhesives and coatings containing the stress-sensing material. Also disclosed are methods for preparing the stress-sensing material and measuring the stress on an article using the stress-sensing material. | 2013-04-04 |
| 20130082192 | LITHOGRAPHY METHOD AND DEVICE - An installation and method for etching at least one wafer coated with an etch-ready, blank photosensitive layer is disclosed. In accordance with an embodiment, the wafer has thickness irregularities, wherein the wafer is arranged to be able to be submitted to irradiation-beam scanning, a sheet transparent to the radiation to which the photosensitive layer is sensitive covers the wafer, and a probe beam intended to reflect on the upper portion of the sheet perpendicularly to the irradiation beam spot on the photosensitive layer is provided. | 2013-04-04 |
| 20130082193 | CHARGED PARTICLE BEAM WRITING APPARATUS AND CHARGED PARTICLE BEAM WRITING METHOD - A charged particle beam writing apparatus according to one aspect of the present invention includes a substrate cover attachment/detachment unit to attach or detach a substrate cover that covers a whole periphery of a substrate being a writing target from an upper part, to/from the substrate, a writing unit to write a pattern on the substrate, in a state where the substrate cover is attached to the substrate, by a charged particle beam, a position measurement unit, before and after writing by the writing unit, to measure a position of the substrate cover in a state attached to the substrate, at a predetermined measurement position, and a correction unit, with respect to a position of the substrate to which the substrate cover is attached, to correct a positional deviation amount between a position of the substrate cover measured after writing and a position of the substrate cover measured before writing. | 2013-04-04 |
| 20130082194 | CHARGED PARTICLE RADIATION DEVICE AND SOUNDPROOF COVER - A charged particle radiation device includes a sample chamber in which a sample stage adapted to mount a sample is installed, a charged particle radiation irradiation section adapted to irradiate the sample with a charged particle radiation to observe and fabricate the sample, sidewalls installed on a periphery of the sample chamber and the charged particle radiation irradiation section, a ceiling board installed on a plane located in an upper part of the sidewalls, and a sound absorbing structure section disposed below the ceiling board, and including a plurality of hole sections and a hollow section communicated with the hole sections. The sound absorbing structure section has an absorption band including a frequency band of a standing wave generated in a space surrounded by the sidewalls and the ceiling board. Further, a soundproof cover may include the sidewalls, ceiling board and sound absorbing structure. | 2013-04-04 |
| 20130082195 | METHOD AND APPARATUS FOR IRRADIATING A SEMICONDUCTOR MATERIAL SURFACE BY LASER ENERGY - An apparatus for irradiating semiconductor material is disclosed having, a laser generating a primary laser beam, an optical system and a means for shaping the primary laser beam, comprising a plurality of apertures for shaping the primary laser beam into a plurality of secondary laser beams. Wherein the shape and/or size of the individual apertures corresponds to that of a common region of a semiconductor material layer to be irradiated. The optical system is adapted for superposing the secondary laser beams to irradiate said common region. Further, the use of such an apparatus in semiconductor device manufacturing is disclosed. | 2013-04-04 |
| 20130082196 | COMPACT MODULAR PARTICLE FACILITY HAVING LAYERED BARRIERS - A layered barrier for a compact particle facility is provided; the layered barrier includes a first layer formed from first shielding elements and a second layer formed from second shielding elements. The first and second shielding elements are modular and have different shielding characteristics from one another. | 2013-04-04 |
| 20130082197 | SEMICONDUCTOR PROCESSING SYSTEM AND METHODS USING CAPACITIVELY COUPLED PLASMA - Substrate processing systems are described that have a capacitively coupled plasma (CCP) unit positioned inside a process chamber. The CCP unit may include a plasma excitation region formed between a first electrode and a second electrode. The first electrode may include a first plurality of openings to permit a first gas to enter the plasma excitation region, and the second electrode may include a second plurality of openings to permit an activated gas to exit the plasma excitation region. The system may further include a gas inlet for supplying the first gas to the first electrode of the CCP unit, and a pedestal that is operable to support a substrate. The pedestal is positioned below a gas reaction region into which the activated gas travels from the CCP unit. | 2013-04-04 |
| 20130082198 | FLOW NOISE RESTRICTOR - A flow noise restrictor for use with a valve. The flow noise restrictor reduces the flow area as the valve closes and forms vortices to reduce the noise such as due to the Bernoulli effect. | 2013-04-04 |
| 20130082199 | CONTROL VALVE - A control valve according to an embodiment includes a guide member of a cylindrical shape extending coaxially with a valve hole, a valve element of a bottomed cylindrical shape for opening and closing a valve section such that the valve element touches and leaves the valve hole, and a pressure-canceling structure for canceling out at least part of pressure acting on the valve element by introducing a working fluid into a back pressure chamber via a leak passage, the pressure-canceling structure including the back pressure chamber, surrounded by the valve element and the guide member, and the leak passage communicating between the valve hole and the back pressure chamber. A sliding portion and a spacing are formed in an overlapped portion which is a region overlapped by the valve element and the guide member. The sliding portion is connected circumferentially at least when the valve section is closed, and the proportion of the spacing occupied in the overlapped portion is larger than the proportion of the sliding portion occupied at the time when the valve section is open. | 2013-04-04 |
| 20130082200 | FLOW CONTROL VALVE - A flow control valve, in particular in the form of an electromagnetic proportional directional flow control valve ( | 2013-04-04 |
| 20130082201 | Recessed Wall-Mounted Outlet Box with Push-Pull Handle Assembly - An outlet box housing a stop valve that is connected to a water supply line of a building. The outlet box enables a user to control the internally housed stop valve by axial movement of a handle assembly linked to a handle on the valve. The outlet box has a faceplate with at least one aperture through which the handle assembly and water outlet line can pass. Valve inlet shanks (or adaptors) connect the stop valve to the water supply line and allow for quick and easy replacement of the stop valve. | 2013-04-04 |
| 20130082202 | BALL VALVE FLOAT EQUIPMENT - Embodiments of the invention generally relate to a ball valve assembly for use during a cementing operation. In one aspect, a ball valve is provided. The ball valve includes a housing. The ball valve further includes a spherical body disposed within the housing. Additionally, the ball valve includes an actuating member movable relative to the housing between a first position and a second position, wherein the movement of the actuating member causes the spherical body to rotate within the housing. In another aspect, a method of using a ball valve in a cementing operation is provided. | 2013-04-04 |
| 20130082203 | VALVE STEM SEAL - A valve stem seal ( | 2013-04-04 |
| 20130082204 | Manual Control Part of a Suction Device - The invention relates to a manual control part of a suction device with a valve, which manual control part can be adjoined downstream by a suction line and upstream by a pipette or pipette tip. The manual control part consists of a cylindrical, elastically deformable jacket, which defines a receiving space for a valve body, and of a valve body, which is received in the jacket and which defines, within the receiving space, a first space located in the upstream direction and a second space located in the downstream direction. In the valve body a flow connection between the first space and the second space is provided by at least one radially outwardly directed valve seat with a valve opening. The valve seat bears on the inner wall of the jacket, wherein the jacket can be compressed laterally of the valve seat in order to open the valve. In this way, the inner wall is moved away from the at least one valve seat. | 2013-04-04 |
| 20130082205 | FIBER PRODUCTS HAVING TEMPERATURE CONTROL ADDITIVES - A fiber product is described which includes fibers, a binder and a temperature control additive. The fiber product has properties that make it useful for a variety of applications. The fibers may be glass fibers and the product may be a fiberglass insulation product for use in buildings, vehicles, or other structures for acoustic and/or thermal insulation. The fibers may be cellulosic fibers and the product may be a wood board product. The temperature control additive is incorporated into the uncured fiber product to prevent deleterious self-heating during or after binder curing. The temperature control additive undergoes an endothermic process that consumes at least a portion of the energy generated during the exothermic curing reaction. | 2013-04-04 |
| 20130082206 | LIQUID CRYSTAL POLYESTER COMPOSITION - The invention intends to provide a connector high in resistance to rupture of a lattice and a liquid crystal polyester composition superior in melt flowability and suitable for the production of the connector. The invention provides a liquid crystal polyester composition comprising a fibrous filler, a platy filler, a granular filler, and a liquid crystal polyester, wherein the content of the platy filler is not more than 0.6 where the total content (based on mass) of the fibrous filler and the granular filler is considered to be 1; and a connector made of the liquid crystal polyester composition. | 2013-04-04 |
| 20130082207 | CORE-SHELL PHOSPHOR AND METHOD OF MAKING THE SAME - In accordance with one aspect of the present invention, a core−shell phosphor composition is provided that includes a core comprising magnesium oxide; and a shell at least partially enclosing the core, wherein the shell comprises a shell material having formula (I) | 2013-04-04 |
| 20130082208 | STRONTIUM CERATE LUMINESCENT MATERIAL AND THE PREPARATION METHOD AND APPLICATION THEREOF - Disclosed is a strontium cerate luminescent material having a chemical formula of Sr | 2013-04-04 |
| 20130082209 | METAL COMPLEXES - The present invention relates to metal complexes and to elec | 2013-04-04 |
| 20130082210 | Syngas Production Using Scrap Tire Gasification - A first carbon containing substance, which may be scrap tires, is introduced to pyrolitic reactor. The pyrolitic reactor produces at least a tar/char stream and a pyrolysis oil stream. Pyrolysis oil stream may also be combined with hydrogen stream and hydrotreated to produce synthetic diesel, synthetic jet fuel, or synthetic gasoline. At least a portion of hydrogen/carbon monoxide stream may be separated to provide hydrogen stream. An oxidant containing first gas may be oxygen or an oxygen rich stream. Gasification reactor may be a fluidized bed reactor, moving bed reactor, double fired reactor, entrained bed reactor or molten bath reactor. Pyrolitic reactor and gasification reactor may be thermally linked, with the exothermic pyrolitic reactor providing at least a portion of the heat required by endothermic gasification reactor. | 2013-04-04 |
| 20130082211 | PROCESS FOR THE PREPARATION OF SYNTHESIS GAS - Process for the preparation of synthesis gas from an essentially dry hydrocarbon feedstock (1) comprising olefins, hydrogen and carbon monoxide, the process comprising the steps: (a) selectively hydrogenating the olefins in the hydrocarbon feedstock at a temperature between 60 to 190° C. (2) to obtain a hydrogenated hydrocarbon feedstock comprising hydrogen, carbon monoxide and saturated hydrocarbons (3; (b) adding steam (4) to the hydrogenated hydrocarbon feedstock; (c) performing a water gas shift reaction in the presence of steam on the hydrogenated hydrocarbon feedstock (6) to obtain a shifted, hydrogenated hydrocarbon mixture; (d) converting the shifted, hydrogenated hydrocarbon mixture (8) to obtain a synthesis gas. | 2013-04-04 |
| 20130082212 | Consolidation Methodologies for Semiconductor Nanomaterials - Embodiments of the invention relate generally to methods of consolidating semiconductor nanomaterials. In one embodiment, the invention provides a method of consolidating a material comprising: mixing a population of semiconductor nanocrystals with a matrix material and a solvent; heating the mixture to remove the solvent; and consolidating the semiconductor nanocrystals and the matrix material into a consolidated material | 2013-04-04 |
| 20130082213 | HYDROCHLORIC ACID WASHING OF CARBON AND GRAPHITE FOR MAKING CONDUCTIVE INK FOR ULTRACAPACITORS - Water-based conductive ink compositions may include acid-washed graphite particles, carbon black particles, at least one polymeric dispersant, at least one acrylic binder, at least one polyvinylpyrrolidone binder, at least one defoamer, and an aqueous carrier. At least 90 wt. % of the acid-washed graphite particles and the carbon black particles, based on the combined weight of the acid-washed graphite particles and the carbon black particles, may have particle sizes less than 10 μm. The water-based conductive ink composition may have a total elemental contaminant level of less than 100 ppm, based on the total weight of the water-based conductive ink composition. Methods for preparing the water-based conductive ink compositions may include preparing a letdown phase from a first premix containing carbon black and a second premix containing acid-washed graphite. The methods may include washing graphite particles in an strong acid such as hydrochloric acid, nitric acid, sulfuric acid, or mixtures thereof. | 2013-04-04 |
| 20130082214 | CONDUCTIVE SEALANT COMPOSITIONS - Embodiments of the present disclosure are directed to sealant compositions comprising a base composition comprising at least one sulfur-containing polymer, and an electrically conductive filler comprising carbon nanotubes and conductive carbon black; and a curing agent composition. The sealant compositions are substantially Ni-free, are particularly useful in lightning strike applications, and exhibit unexpectedly superior tensile elongation and low specific gravity. | 2013-04-04 |
| 20130082215 | Electrically Conductive, Mesophase-Separated Olefin Multiblock Copolymer Compositions - Free radically crosslinked, electrically conductive compositions exhibiting a highly stable volume resistivity comprise an olefin multiblock copolymer (OBC) having a high, e.g., greater than 20 mole percent comonomer content, e.g., butylene or octene, and carbon black. These compositions exhibit a highly stable volume resistivity relative to a composition similar in essentially all aspects save that the high comonomer OBC is replaced with a low comonomer OBC of similar density and melt index. | 2013-04-04 |
| 20130082216 | Single-Source Precursor for Semiconductor Nanocrystals - A single-source solid precursor matrix for semiconductor nanocrystals includes 45-55% by weight of zinc, 28-35% by weight of oxygen, 0.70-1.2% by weight of carbon, 1.5-2.5% by weight of hydrogen, 4-6% by weight of nitrogen, 5-7% by weight of sulphur and 1-5% by weight of dopant ions with respect to the weight of zinc atoms. Doped semiconductor nanocrystals for multicolor displays and bio markers include 60-65% by weight of zinc, 30-32% by weight of sulphur, 1.2-1.3% by weight of copper and 1.2-1.3% by weight of dopant ions. | 2013-04-04 |
| 20130082217 | METHOD OF PRODUCING METAL PARTICLES, AND INK COMPOSITION AND PASTE COMPOSITION PRODUCED BY THE SAME - Disclosed is a method of producing metal particles, including preparing a first solution including a silver (Ag) compound and a solvent, heating and stirring the first solution, adding an organophosphorus compound to the first solution and heating the first solution, and forming metal particles capped with a phosphorus (P) compound from the first solution. | 2013-04-04 |
| 20130082218 | SINTERED OXIDE MATERIAL, TARGET COMPRISING SAME, AND OXIDE SEMICONDUCTOR THIN FILM - An oxide sintered body including an oxide of indium and aluminum and having an atomic ratio Al/(Al+In) of 0.01 to 0.08. | 2013-04-04 |
| 20130082219 | Method for Producing Highly Conformal Transparent Conducting Oxides - A method for forming a transparent conducting oxide product layer. The method includes use of precursors, such as tetrakis-(dimethylamino) tin and trimethyl indium, and selected use of dopants, such as SnO and ZnO for obtaining desired optical, electrical and structural properties for a highly conformal layer coating on a substrate. Ozone was also input as a reactive gas which enabled rapid production of the desired product layer. | 2013-04-04 |
| 20130082220 | POLYMERIZABLE COMPOSITIONS CONTAINING (METH)ACRYLATE MONOMERS HAVING SULFIDE LINKAGES - Provided is a polymerizable composition including (meth)acrylate monomers having at least two sulfide (—S—) linkages in the monomer. The polymerizable compositions include a first (meth)acrylate monomer represented by the following Formula (I), | 2013-04-04 |
| 20130082221 | ROOFING GRANULES INCLUDING BASE PARTICLES AND A COATING - A roofing product can include roofing granules that can include substrates and a coating covering the substrates of the roofing granules. The substrates can be in the form of base particles, such as ceramic base particles or proppants, or base particles having a coating with an L* of at least approximately 55. In a particular aspect, a coating at an exposed surface of the roofing granule can include a compound that includes a metallic element; and nitrogen, carbon, or a combination of nitrogen and carbon. In another aspect, the coating has a relatively low L*, reasonably high solar reflectance, and good emissivity. The coating can be formed on a substrate using a fluidized bed. In a particular aspect, the coating can be performed as a chemical vapor deposition or a sol-gel process. If needed or desired, the roofing granules can be doped to achieve their desired properties. | 2013-04-04 |
| 20130082222 | POLYCARBONATE-BASED RESIN COMPOSITION AND MOLDED ARTICLE THEREOF - Provided are a polycarbonate-based resin composition that brings together an excellent impact strength and excellent flame retardancy and a molded article thereof. The polycarbonate-based resin composition is a polycarbonate-based resin composition, including, with respect to 100 parts by mass of (A) a resin mixture formed of 30 to 100 mass % of (A-1) a polycarbonate-polyorganosiloxane copolymer which has a constituent unit represented by a general formula (I) and a constituent unit represented by a general formula (II), and in which an average number of repetitions of the constituent unit represented by the general formula (II) is 30 to 500, and 70 to 0 mass % of (A-2) an aromatic polycarbonate resin except the polycarbonate-polyorganosiloxane copolymer, 0.01 to 0.15 part by mass of (B) an alkali metal salt and/or alkaline earth metal salt of an organosulfonic acid, and 0.1 to 1 part by mass of (C) a mixed powder formed of polytetrafluoroethylene particles and organic polymer particles, in which: a content of a polyorganosiloxane block moiety formed of the constituent unit represented by the general formula (II) in the resin mixture (A) is 2 to 30 mass %; and the composition is free of an organohalogen-based flame retardant and an organophosphate-based flame retardant. | 2013-04-04 |
| 20130082223 | TENSION CONTROL DEVICE FOR AN ANCHOR LINE ROPE - A tension control device for an anchor line rope of large diameter, which winds off or onto a winch drum at a marine vessel includes an arm with a first inner link arm with a first sheave arranged near the first link arm's outer end, a second, intermediate link arm arranged rotatable adjustable on the first arm and arranged with a second intermediate sheave near the second link arm's outer end, and a third, outer link arm arranged rotatable adjustable on the second, intermediate link arm and arranged with a third sheave near the third, outer link arm's outer end. The second, intermediate link arm's angle is regulated by use of a first actuator arranged between the first, inner link arm and the second link arm. The third, outer link arm's relative angle to the second, intermediate link arm is regulated by a second actuator. Each sheave includes a brake. | 2013-04-04 |
| 20130082224 | PORTABLE WINCH - A portable winch and method of use is shown. One advantage of winches shown includes an ability to lower a boom or boom sections into limited access exit pit for winching operations such as pipe bursting. Sectional boom designs shown provide the ability to easily raise and lower a boom large distances without the need for a single long boom. Selected winch designs shown include flexible inserts between the boom and the winch frame that help resist damage from unforeseen shifting of the device during operation. Designs and methods shown also include multiple pulleys on a boom end unit. Fasteners are shown that reduce build up of debris. | 2013-04-04 |
| 20130082225 | CAPSTAN MECHANISM - A capstan mechanism has one base, two location holes, one rotation axis, one driven gear set, one combination driving gear set and one rotation handle. Location holes on the base are needed to be made due to the combined style of the combination driving gear set and the rotation axis, and the hole diameter shall be big enough to let the rotation hole go through it. Thus the concentricity among the parts of the capstan mechanism is realized and the production cost is saved. | 2013-04-04 |
| 20130082226 | Wire-Mesh Security Fence and Fence Panel - A wire-mesh security fence panel and security fence is provided. In at least on example the fence panel includes: a first set of substantially parallel wires, each wire having a first and a second end; a second set of substantially parallel wires, the second set of wires being welded across the first set on one picket-wire side of the first set; a cross-wire-side connection strip welded across the first end of the first set on the picket-wire side of the first set; and an opposite side connection strip welded across the second end of the first set on the opposite side of the picket-wire side. In one such example each connection strip has an outside edge and each outside edge is equally spaced from the end of the wires to which the strip is welded. | 2013-04-04 |
| 20130082227 | ROOF SAFETY RAIL SYSTEM - The present relates generally to a roof safety rail for use on a building for fall prevention. In particular the inventions relates to a roof safety rail system for use on the outer perimeter of a roof that provides an improved safety rail system where permanent installation is accomplished without penetrating the roof membrane or the exterior roofing material that covers the anchoring points of safety rail whereby eliminating the possibility of weather elements entering the building through the rail fasteners. | 2013-04-04 |
| 20130082228 | Memory Device Using Multiple Tunnel Oxide Layers - A memory element (ME) including at least one layer of conductive metal oxide (CMO) that includes mobile oxygen ions and including at least two layers of insulating metal oxide (IMO) is disclosed. In one configuration a layer of IMO that is directly in contact with a CMO layer is specifically selected so that a material of the IMO layer is non-reactive with a material of the CMO. In another configuration, at least one pair of adjacent IMO layers are made from materials having different band gaps operative to an generate an internal electric field positioned in the layers and present in the at least two adjacent IMO layers in the absence of electrical power. The internal electric field can be a static electric field. The IMO and/or CMO layers can be deposited in part or in whole using ALD, PEALD, or nano-deposition. The ME can be formed BEOL. | 2013-04-04 |
| 20130082229 | MIXED IONIC-ELECTRONIC CONDUCTION MEMORY CELL - A mixed ionic-electronic conduction (MIEC) memory cell including a mixed ionic-electronic conductor containing dopants therein, a heater disposed adjacent to the mixed ionic-electronic conductor, a pair of first electrodes electrically connected to the mixed ionic-electronic conductor, and at least one pair of second electrodes electrically connected to the mixed ionic-electronic conductor is provided. The pair of first electrodes drive the dopants in the mixed ionic-electronic conductor to drift along a first direction when the mixed ionic-electronic conductor is heated by the heater. The pair of second electrodes locally modify a distribution of the dopants along a second direction when the mixed ionic-electronic conductor is heated by the heater, and the first direction is different from the second direction. | 2013-04-04 |
| 20130082230 | METHOD OF MANUFACTURING NONVOLATILE MEMORY ELEMENT, AND NONVOLATILE MEMORY ELEMENT - A variable resistance nonvolatile memory element manufacturing method includes: forming a first electrode on a substrate; forming a first metal oxide layer having a predetermined oxygen content atomic percentage on the first electrode; forming, in at least one part of the first metal oxide layer, a modified layer higher in resistance than the first metal oxide layer, by oxygen deficiency reduction; forming a second metal oxide layer lower in oxygen content atomic percentage than the first metal oxide layer, on the modified layer; and forming a second electrode on the second metal oxide layer. A variable resistance layer includes the first metal oxide layer having the modified layer and the second metal oxide layer, connects to the first electrode and the second electrode, and changes between high and low resistance states according to electrical pulse polarity. | 2013-04-04 |
| 20130082231 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE - A semiconductor device includes multilayer interconnects and two variable resistance elements ( | 2013-04-04 |
| 20130082232 | Multi Layered Conductive Metal Oxide Structures And Methods For Facilitating Enhanced Performance Characteristics Of Two Terminal Memory Cells - A memory cell including a two-terminal re-writeable non-volatile memory element having at least two layers of conductive metal oxide (CMO), which, in turn, can include a first layer of CMO including mobile oxygen ions, and a second layer of CMO formed in contact with the first layer of CMO to cooperate with the first layer of CMO to form an ion obstruction barrier. The ion obstruction barrier is configured to inhibit transport or diffusion of a subset of mobile ion to enhance, among other things, memory effects and cycling endurance of memory cells. At least one layer of an insulating metal oxide that is an electrolyte to the mobile oxygen ions and configured as a tunnel barrier is formed in contact with the second layer of CMO. | 2013-04-04 |
| 20130082233 | SELECTIVE PLACEMENT OF CARBON NANOTUBES VIA COULOMBIC ATTRACTION OF OPPOSITELY CHARGED CARBON NANOTUBES AND SELF-ASSEMBLED MONOLAYERS - A method of forming a structure having selectively placed carbon nanotubes, a method of making charged carbon nanotubes, a bi-functional precursor, and a structure having a high density carbon nanotube layer with minimal bundling. Carbon nanotubes are selectively placed on a substrate having two regions. The first region has an isoelectric point exceeding the second region's isoelectric point. The substrate is immersed in a solution of a bi-functional precursor having anchoring and charged ends. The anchoring end bonds to the first region to form a self-assembled monolayer having a charged end. The substrate with charged monolayer is immersed in a solution of carbon nanotubes having an opposite charge to form a carbon nanotube layer on the self-assembled monolayer. The charged carbon nanotubes are made by functionalization or coating with an ionic surfactant. | 2013-04-04 |
| 20130082234 | Carbon-based semiconductors - All-carbon-based semiconductor devices are provided. In accordance with an example embodiment, an apparatus includes n-type and p-type carbon-based semiconductor material that form a p-n junction, which are respectively coupled to electrodes having a carbon allotrope. A first one of electrodes is connected to the n-type material and a second one of the electrodes is connected to the p-type material, and collect charge presented at the p-n junction. | 2013-04-04 |
| 20130082235 | MONOLITHIC 3-D INTEGRATION USING GRAPHENE - A monolithic three dimensional integrated circuit device includes a first layer having first active devices. The monolithic three dimensional integrated circuit device also includes a second layer having second active devices that each include a graphene portion. The second layer can be fabricated on the first layer to form a stack of active devices. A base substrate may support the stack of active devices. | 2013-04-04 |
| 20130082236 | LIGHT EMITTING REGIONS FOR USE WITH LIGHT EMITTING DEVICES - A light emitting device comprises a first layer having an n-type Group III-V semiconductor, a second layer adjacent to the first layer, the second layer comprising an active material that generates light upon the recombination of electrons and holes. The active material in some cases has one or more V-pits at a density between about 1 V-pit/μm | 2013-04-04 |
| 20130082237 | ULTRAVIOLET LIGHT EMITTING DEVICES HAVING ENHANCED LIGHT EXTRACTION - Light emitting devices having an enhanced degree of polarization, P | 2013-04-04 |
| 20130082238 | LIGHT-EMITTING DEVICE - Disclosed is a light-emitting device, comprising: a first multi-quantum well structure comprising a plurality of first well layers and a first barrier layer stacked alternately, wherein the energy gap of the first barrier layer is larger than that of any one of the first well layers; a second multi-quantum well structure comprising a plurality of second well layers and a second barrier layer stacked alternately, wherein the energy gap of the second barrier layer is larger than that of any one of the second well layers; and a third barrier layer disposed between the first multi-quantum well structure and the second multi-quantum well structure, and the third barrier layer connected with the first well layer and the second well layer, wherein the energy gap of the third barrier layer is larger than that of any one of the first well layers and the second well layers, and the thickness of the third barrier layer is larger than that of any one of the first barrier layer and the second barrier layer. | 2013-04-04 |
| 20130082239 | LIGHT EMITTING DIODE FABRICATED BY EPITAXIAL LIFT-OFF - A method of fabricating a light emitting diode using an epitaxial lift-off process includes forming a sacrificial layer on a substrate, forming a light emitting diode structure on the sacrificial layer with an epitaxial material, forming a light reflecting layer on the light emitting diode structure, and removing the sacrificial layer using an etching process to separate the substrate from the light emitting diode structure. | 2013-04-04 |
| 20130082240 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A high electron mobility transistor (HEMT) includes a substrate, an HEMT stack spaced apart from the substrate, and a pseudo-insulation layer (PIL) disposed between the substrate and the HEMT stack. The PIL layer includes at least two materials having different phases. The PIL layer defines an empty space that is wider at an intermediate portion than at an entrance of the empty space. | 2013-04-04 |
| 20130082241 | Graphene on Semiconductor Detector - Ultraviolet or Extreme Ultraviolet and/or visible detector apparatus and fabrication processes are presented, in which the detector includes a thin graphene electrode structure disposed over a semiconductor surface to provide establish a potential in the semiconductor material surface and to collect photogenerated carriers, with a first contact providing a top side or bottom side connection for the semiconductor structure and a second contact for connection to the graphene layer. | 2013-04-04 |
| 20130082242 | TRANSISTOR DEVICE WITH REDUCED GATE RESISTANCE - A device with reduced gate resistance includes a gate structure having a first conductive portion and a second conductive portion formed in electrical contact with the first conductive portion and extending laterally beyond the first conductive portion. The gate structure is embedded in a dielectric material and has a gate dielectric on the first conductive portion. A channel layer is provided over the first conductive portion. Source and drain electrodes are formed on opposite end portions of a channel region of the channel layer. Methods for forming a device with reduced gate resistance are also provided. | 2013-04-04 |
| 20130082243 | TRANSISTOR DEVICE WITH REDUCED GATE RESISTANCE - A device with reduced gate resistance includes a gate structure having a first conductive portion and a second conductive portion formed in electrical contact with the first conductive portion and extending laterally beyond the first conductive portion. The gate structure is embedded in a dielectric material and has a gate dielectric on the first conductive portion. A channel layer is provided over the first conductive portion. Source and drain electrodes are formed on opposite end portions of a channel region of the channel layer. Methods for forming a device with reduced gate resistance are also provided. | 2013-04-04 |
| 20130082244 | OLED DEVICES COMPRISING HOLLOW OBJECTS - Embodiments of the present disclosure include organic light emitting diode (OLED) devices having hollow objects configured to scatter otherwise trapped light out of the device, thereby improving the performance of the device. The hollow objects are dispersed in one or more organic layers of the OLED device. The hollow objects may have a similar refractive index to that of air, such that visible light emitted by the emissive layer may contact the hollow objects in the OLED device and may be scattered out of the device. In some embodiments, the hollow objects may be spherical or tubular, and may be sized to be larger than the visible light wavelength spectrum. | 2013-04-04 |
| 20130082245 | TETRADENTATE PLATINUM COMPLEXES - Novel phosphorescent tetradentate platinum compounds of Formula I are provided. The complexes contain a dibenzo moiety, which allows for the creation of OLED devices with improved properties when compounds of Formula I are incorporated into such devices. Compounds of Formula I′ that comprise two ligands that contain a 5-membered carbocyclic or heterocyclic ring, one of which contains an imidazole ring with a twisted aryl group attached to N−1 and a second aromatic ring that is attached to the platinum via a carbon atom. These compounds may be advantageously used in OLEDs. | 2013-04-04 |
| 20130082246 | DISPLAY UNIT - A display unit having satisfactory emission characteristics can be produced more easily and stably. Organic light emitting devices comprise an organic compound layer including at least a first and a second light emitting layer common in the respective organic devices. A layer constituting the organic layer has the same thickness in all the organic devices. The first layer contains a first and a second light emission dopant which are different in an emission color, a light emission spectrum, and a light emitting position in a thickness direction. The second layer contains a third light emission dopant different from the first and the second dopant in the emission color and the light emission spectrum. In at least two kinds of dopants, a distance between the first electrode and the light emitting position in the thickness direction satisfies an optical constructive condition in optical interference. | 2013-04-04 |
| 20130082247 | Light-Emitting Device - To provide a light-emitting device which can emit bright light without increasing the projected area of a light-emitting element and be manufactured with high yield. A light-emitting device of one embodiment of the present invention includes a plurality of projections; a first electrode formed along the plurality of projections; a layer containing a light-emitting organic compound formed along the plurality of projections and over the first electrode; and a second electrode formed along the plurality of projections and over the layer containing a light-emitting organic compound. Further, the plurality of projections each have a bottom surface having a side in contact with a bottom surface of an adjacent projection; a plurality of side surfaces each having a certain angle greater than 0° and less than or equal to 80° with respect to the bottom surface; and a vertex having a first continuously curved surface. | 2013-04-04 |
| 20130082248 | ELECTROLUMINESCENT DEVICES BASED ON PHOSPHORESCENT IRIDIUM AND RELATED GROUP VIII METAL MULTICYCLIC COMPOUNDS - Disclosed herein are phosphorescent materials comprising a complex of a metal atom M selected from Ir, Pt, Rh, Pd, Ru and Os and at least one ligand L, wherein the ligand L is represented by formula (1). Also disclosed are organic electroluminescent devices including such phosphorescent materials. | 2013-04-04 |
| 20130082249 | METHOD FOR MANUFACTURING ORGANIC LIGHT-EMITTING ELEMENT, ORGANIC LIGHT-EMITTING ELEMENT, ORGANIC DISPLAY DEVICE, ORGANIC LIGHT-EMITTING DEVICE, METHOD FOR FORMING FUNCTIONAL LAYER, FUNCTIONAL MEMBER, DISPLAY DEVICE, AND LIGHT-EMITTING DEVICE - A functional layer of an organic light-emitting element is formed by using an ink including a first solvent and a second solvent having equal or similar boiling points, and a functional material. The first solvent is such that an imitatively formed functional layer formed by replacing the second solvent with the first solvent, in a light-emitting region of an organic light-emitting element, is thicker at both end portions than at a central portion and top surfaces of the end portions are positioned higher than a top surface of the central portion. The second solvent is such that an imitatively formed functional layer formed by replacing the first solvent with the second solvent, in a light-emitting region of an organic light-emitting element, is thicker at a central portion than at both end portions and a top surface of the central portion is positioned higher than top surfaces of the end portions. | 2013-04-04 |
| 20130082250 | PHOTOELECTRIC CONVERSION FILM, PHOTOELECTRIC CONVERSION DEVICE AND COLOR IMAGE SENSOR HAVING THE PHOTOELECTRIC CONVERSION DEVICE - A blue color photoelectric conversion film includes: a p-type layer formed by depositing tetracene; a p,n-type layer formed by co-depositing tetracene and naphthalene- tetracarboxylic-dianhydride (“NTCDA”) on the p-type layer; and an n-type layer formed by depositing NTCDA on the p,n-type layer. | 2013-04-04 |
| 20130082251 | ELECTROACTIVE MATERIALS - There is disclosed a compound having Formula I or Formula I′: | 2013-04-04 |
| 20130082252 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A highly reliable semiconductor device is provided. A semiconductor device is manufactured at a high yield, so that high productivity is achieved. In a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, an oxide semiconductor film containing indium, and an insulating layer provided on and in contact with the oxide semiconductor film so as to overlap with the gate electrode layer are stacked and a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the insulating layer, the chlorine concentration and the indium concentration on a surface of the insulating layer are lower than or equal to 1×10 | 2013-04-04 |
| 20130082253 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - Provided is a bottom-gate transistor including an oxide semiconductor, in which electric-field concentration which might occur in the vicinity of an end portion of a drain electrode layer (and the vicinity of an end portion of a source electrode layer) when a high gate voltage is applied to a gate electrode layer is reduced and degradation of switching characteristics is suppressed, so that the reliability is improved. The cross-sectional shape of an insulating layer which overlaps over a channel formation region is a tapered shape. The thickness of the insulating layer which overlaps over the channel formation region is 0.3 μm or less, preferably 5 nm or more and 0.1 μm or less. The taper angle 0 of a lower end portion of the cross-sectional shape of the insulating layer which overlaps over the channel formation region is 60° or smaller, preferably 45° or smaller, further preferably 30° or smaller. | 2013-04-04 |
| 20130082254 | SEMICONDUCTOR DEVICE - A highly reliable structure is provided when high-speed driving of a semiconductor device is achieved by improving on-state characteristics of the transistor. The on-state characteristics of the transistor are improved as follows: an end portion of a source electrode and an end portion of a drain electrode overlap with end portions of a gate electrode, and the gate electrode surely overlaps with a region serving as a channel formation region of an oxide semiconductor layer. Further, embedded conductive layers are formed in an insulating layer so that large contact areas are obtained between the embedded conductive layers and the source and drain electrodes; thus, the contact resistance of the transistor can be reduced. Prevention of coverage failure with a gate insulating layer enables the oxide semiconductor layer to be thin; thus, the transistor is miniaturized. | 2013-04-04 |
| 20130082255 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An object is, in a thin film transistor in which an oxide semiconductor is used as an active layer, to prevent change in composition, film quality, an interface, or the like of an oxide semiconductor region serving as an active layer, and to stabilize electrical characteristics of the thin film transistor. In a thin film transistor in which a first oxide semiconductor region is used as an active layer, a second oxide semiconductor region having lower electrical conductivity than the first oxide semiconductor region is formed between the first oxide semiconductor region and a protective insulating layer for the thin film transistor, whereby the second oxide semiconductor region serves as a protective layer for the first oxide semiconductor region; thus, change in composition or deterioration in film quality of the first oxide semiconductor region can be prevented, and electrical characteristics of the thin film transistor can be stabilized. | 2013-04-04 |
| 20130082256 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region. | 2013-04-04 |
| 20130082257 | VIA CHAINS FOR DEFECT LOCALIZATION - Method form via chain and serpentine/comb test structures in kerf areas of a wafer. The via chain test structures comprise a first via chain and a second via chain in a first kerf area. The via chain test structures are formed such that geometrically shaped portions of the first via chain and geometrically shaped portions of the second via chain alternate along the length of the first kerf area. The methods perform relatively low (first) magnification testing to identify a defective geometrically shaped portion that contains a defective via structure. The methods then perform relatively high (second) magnification testing only within the defective geometrically shaped portion. The first magnification testing is performed at a lower magnification relative to the second magnification testing. | 2013-04-04 |
| 20130082258 | METHOD FOR STRIP TESTING OF MEMS DEVICES, TESTING STRIP OF MEMS DEVICES AND MEMS DEVICE THEREOF - A method for testing a strip of MEMS devices, the MEMS devices including at least a respective die of semiconductor material coupled to an internal surface of a common substrate and covered by a protection material; the method envisages: detecting electrical values generated by the MEMS devices in response to at least a testing stimulus; and, before the step of detecting, at least partially separating contiguous MEMS devices in the strip. The step of separating includes defining a separation trench between the contiguous MEMS devices, the separation trench extending through the whole thickness of the protection material and through a surface portion of the substrate, starting from the internal surface of the substrate. | 2013-04-04 |
| 20130082259 | TEST CARRIER - A test carrier which can suppress the occurrence of contact defects while securing positional precision of the terminals is provided. A test carrier | 2013-04-04 |
| 20130082260 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INSPECTION METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - Integrated circuit layers to be stacked on top of each other are formed with a plurality of inspection rectifier device units, respectively. The plurality of inspection rectifier device units including rectifier devices are connected between a plurality of connection terminals and a positive power supply lead and a grounding lead and emit light in response to a current. After electrically connecting the plurality of connection terminals to each other, a bias voltage is applied between the positive power supply lead and the grounding lead, and the connection state between the connection terminals is inspected according to a light emission of the inspection rectifier device unit. This makes it possible to inspect, in a short time every time a layer is stacked, whether or not an interlayer connection failure exists in a semiconductor integrated circuit device constructed by stacking a plurality of integrated circuit layers in their thickness direction. | 2013-04-04 |
| 20130082261 | SEMICONDUCTOR DEVICE - A semiconductor device comprising: a Metal Oxide Semiconductor Field Effect Transistor including: a semiconductor substrate including a first semiconductor layer of a first conductivity type; second semiconductor layers of a second conductivity type extending in a depth direction from one surface of the semiconductor substrate, and having space each other; a first diode including a fifth semiconductor layer of the second conductivity type contacting the second semiconductor layer in one surface side of the semiconductor substrate, the first semiconductor layer and the second semiconductor layers; and an anode of the second diode connected to an anode of the first diode. | 2013-04-04 |
| 20130082262 | SEMICONDUCTOR DEVICE - A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion. | 2013-04-04 |
| 20130082263 | SEMICONDUCTOR DEVICE - A decrease in on-state current in a semiconductor device including an oxide semiconductor film is suppressed. A transistor including an oxide semiconductor film, an insulating film which includes oxygen and silicon, a gate electrode adjacent to the oxide semiconductor film, the oxide semiconductor film provided to be in contact with the insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the interface with the insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. | 2013-04-04 |
| 20130082264 | PHOTODETECTOR HAVING IMPROVED QUANTUM EFFICIENCY - The present approach involves a radiation detector module with increased quantum efficiency and methods of fabricating the radiation detector module. The module includes a scintillator substrate and a photodetector fabricated on the scintillator substrate. The photodetector includes an anode, active organic elements, and a cathode. The module also includes a pixel element array disposed over the photodetector. During imaging, radiation attenuated by an object to be imaged may propagate through the pixel element array and through the layers of the photodetector to be absorbed by the scintillator which in response emits optical photons. The photodetector may absorb the photons and generate charge with improved quantum efficiency, as the photons may not be obscured by the cathode or other layers of the module. Further, the module may include reflective materials in the cathode and at the pixel element array to direct optical photons towards the active organic elements. | 2013-04-04 |
| 20130082265 | PIXEL STRUCTURE OF DISPLAY PANEL AND METHOD OF FABRICATING THE SAME - A pixel structure of a display panel includes a substrate, a thin film transistor (TFT), a first transparent connecting pad, a passivation layer and a transparent pixel electrode. The TFT disposed on the substrate includes a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode. The gate insulating layer is disposed on the gate electrode, the semiconductor layer is disposed on the gate insulating layer, and the source electrode and the drain electrode are disposed on the semiconductor layer. The first transparent connecting pad disposed on the drain electrode partially overlaps and is electrically connected to the drain electrode. The passivation layer disposed on the first transparent connecting pad includes at least a contact hole. Furthermore, the transparent pixel electrode disposed on the passivation layer is electrically connected to the first transparent connecting pad through the contact hole of the passivation layer. | 2013-04-04 |
| 20130082266 | Display Device And Driving Method Thereof - A display device in which not only a variation in a current value due to a threshold voltage but also a variation in a current value due to mobility are prevented from influencing luminance with respect to all the levels of grayscale to be displayed. After applying an initial potential for correction to a gate and a drain of a driving transistor, the gate and the drain of the driving transistor is kept connected in a floating state, and a voltage is held in a capacitor before a voltage between the gate and a source of the driving transistor becomes equal to a threshold voltage. When a voltage obtained by subtracting the voltage held in the capacitor from a voltage of a video signal is applied to the gate and the source of the driving transistor, a current is supplied to a light-emitting element. A value of an initial voltage for correction differs in accordance with the voltage of the video signal. | 2013-04-04 |
| 20130082267 | SEMICONDUCTOR DEVICE AND DISPLAY DEVICE EQUIPPED WITH SAME - Disclosed is a semiconductor device | 2013-04-04 |
| 20130082268 | IMPLEMENTING VERTICAL SIGNAL REPEATER TRANSISTORS UTILIZING WIRE VIAS AS GATE NODES - A method and structures are provided for implementing vertical transistors utilizing wire vias as gate nodes. The vertical transistors are high performance transistors fabricated up in the stack between the planes of the global signal routing wire, for example, used as vertical signal repeater transistors. An existing via or a supplemental vertical via between wire planes provides both an electrical connection and the gate node of the novel vertical transistor. | 2013-04-04 |
| 20130082269 | ELECTRO-OPTICAL APPARATUS AND ELECTRONIC APPARATUS - A capacitance element includes a first capacitance electrode formed over a TFT with a insulating interlayer therebetween, and a second capacitance electrode formed so as to oppose the first capacitance electrode with a first dielectric layer therebetween, the second capacitance electrode being electrically connected to a semiconductor layer of the TFT through a contact hole formed in the insulating interlayer. The second capacitance electrode includes a first conductive layer and a second conductive layer stacked on the first conductive layer. A portion of the first conductive layer overlapping the contact hole is removed, and the second conductive layer and the semiconductor layer are electrically connected to each other through the contact hole. | 2013-04-04 |
| 20130082270 | THIN-FILM TRANSISTOR ARRAY DEVICE, EL DISPLAY PANEL, EL DISPLAY DEVICE, THIN-FILM TRANSISTOR ARRAY DEVICE MANUFACTURING METHOD, EL DISPLAY PANEL MANUFACTURING METHOD - A thin-film transistor array includes first and second bottom-gate transistors, a passivation film, a conductive oxide film below the passivation film, and a relay electrode between a first conductive material in a same layer as a first electrode of the first transistor and a second conductive material in an electroluminescence layer. A first line is in a layer lower than the passivation film and a second line is above the passivation film. A terminal to which an external signal is input is provided in a periphery of the substrate in the same layer as the first electrode. The conductive oxide film covers an upper surface of the terminal and is between the relay electrode and the first conductive material. The relay electrode is formed in a same layer and comprises a same material as the second line. | 2013-04-04 |
| 20130082271 | THIN-FILM SEMICONDUCTOR DEVICE FOR DISPLAY APPARATUS, METHOD FOR MANUFACTURING THIN-FILM SEMICONDUCTOR DEVICE FOR DISPLAY APPARATUS, EL DISPLAY PANEL, AND EL DISPLAY APPARATUS - A thin-film semiconductor device for a display apparatus according to the present disclosure includes: a gate electrode above a substrate; a gate insulating film above the gate electrode; a semiconductor layer on the gate insulating film; a first electrode above the semiconductor layer; a second electrode in a same layer as the first electrode; an interlayer insulating film covering the first electrode and the second electrode; a gate line above the interlayer insulating film; and a power supply line in a same layer as the gate line and adjacent to the gate line. Furthermore, the gate electrode and the gate line are electrically connected via a first conductive portion, and the second electrode and the power supply line are electrically connected via a second conductive portion. | 2013-04-04 |
| 20130082272 | ACTIVE MATRIX SUBSTRATE - Disclosed is an active matrix substrate ( | 2013-04-04 |
| 20130082273 | P-TYPE DOPING LAYERS FOR USE WITH LIGHT EMITTING DEVICES - A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits. | 2013-04-04 |
| 20130082274 | LIGHT EMITTING DEVICES HAVING DISLOCATION DENSITY MAINTAINING BUFFER LAYERS - A method for forming a light emitting device comprises forming a buffer layer having a plurality of layers comprising a substrate, an aluminum gallium nitride layer adjacent to the substrate, and a gallium nitride layer adjacent to the aluminum gallium nitride layer. During the formation of each of the plurality of layers, one or more process parameters are selected such that an individual layer of the plurality of layers is strained. | 2013-04-04 |
| 20130082275 | METHOD FOR GROWING CONFORMAL EPI LAYERS AND STRUCTURE THEREOF - A method for forming a conformal buffer layer of uniform thickness and a resulting semiconductor structure are disclosed. The conformal buffer layer is used to protect highly-doped extension regions during formation of an epitaxial layer that is used for inducing mechanical stress on the channel region of transistors. | 2013-04-04 |
| 20130082276 | NITRIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - The present invention relates to a nitride semiconductor device and a manufacturing method thereof. According to one aspect of the present invention, a nitride semiconductor device including: a nitride semiconductor layer having a 2DEG channel; a source electrode in ohmic contact with the nitride semiconductor layer; a drain electrode in ohmic contact with the nitride semiconductor layer; a p-type nitride layer formed on the nitride semiconductor layer between the source and drain electrodes; an n-type nitride layer formed on the p-type nitride layer; and a gate electrode formed between the source and drain electrodes to be close to the source electrode and in contact with the n-type nitride layer so that a source-side sidewall thereof is aligned with source-side sidewalls of the p-type and n-type nitride layers is provided. Further, a method of manufacturing a nitride semiconductor device is provided. | 2013-04-04 |
| 20130082277 | NITRIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - The present invention relates to a nitride semiconductor device and a manufacturing method thereof. According to one aspect of the present invention, a nitride semiconductor device including: a nitride semiconductor layer having a 2DEG channel; a source electrode in ohmic contact with the nitride semiconductor layer; a drain electrode in ohmic contact with the nitride semiconductor layer; a plurality of p-type nitride semiconductor segments formed on the nitride semiconductor layer and each formed lengthways from a first sidewall thereof, which is spaced apart from the source electrode, to a drain side; and a gate electrode formed to be close to the source electrode and in contact with the nitride semiconductor layer between the plurality of p-type semiconductor segments and portions of the p-type semiconductor segments extending in the direction of a source-side sidewall of the gate electrode aligned with the first sidewalls of the p-type nitride semiconductor segments is provided. | 2013-04-04 |
| 20130082278 | NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME - A nitride semiconductor device and a method to produce the same are disclosed. The method includes steps of sequentially growing a channel layer and a first layer with bandgap energy Eg greater than that of channel layer; forming a gate replica on the first layer; selectively growing a second layer with Eg also greater than or equal to Eg of the channel layer; removing the gate replica to form a recess in the second layer; and forming the gate electrode in the recess and onto the first layer. | 2013-04-04 |
| 20130082279 | GROUP III-V SUBSTRATE MATERIAL WITH PARTICULAR CRYSTALLOGRAPHIC FEATURES - A substrate including a body comprising a Group III-V material and having an upper surface, the body comprising an offcut angle defined between the upper surface and a crystallographic reference plane, and the body further having an offcut angle variation of not greater than about 0.6 degrees. | 2013-04-04 |
| 20130082280 | LIGHT EMITTING DEVICES HAVING LIGHT COUPLING LAYERS - A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling layer is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling layer is formed by roughening a buffer layer of the light emitting device. The light emitting device includes an electrode in electrical communication with one of the first layer and the second layer through a portion of the light coupling layer. | 2013-04-04 |
| 20130082281 | METHOD AND STRUCTURE HAVING MONOLITHIC HETEROGENEOUS INTEGRATION OF COMPOUND SEMICONDUCTORS WITH ELEMENTAL SEMICONDUCTOR - A semiconductor structure having compound semiconductor (CS) device formed in a compound semiconductor of the structure and an elemental semiconductor device formed in an elemental semiconductor layer of the structure. The structure includes a layer having an elemental semiconductor device is disposed over a buried oxide (BOX) layer. A selective etch layer is disposed between the BOX layer and a layer for a compound semiconductor device. The selective etch layer enables selective etching of the BOX layer to thereby maximize vertical and lateral window etch process control for the compound semiconductor device grown in etched window. The selective etch layer has a lower etch rate than the etch rate of the BOX layer. | 2013-04-04 |
| 20130082282 | SILICON CARBIDE SEMICONDUCTOR DEVICE - Disclosed is a semiconductor device which includes a silicon carbide layer, a trench formed in the silicon carbide layer, and a channel formed on at least one of a bottom of the trench, a side-wall surface, or the silicon carbide layer, in which an electrical conduction direction of the channel is parallel to a surface of the silicon carbide layer. | 2013-04-04 |
| 20130082283 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE THEREOF - A semiconductor device includes an insulating substrate, a wiring pattern formed on the insulating substrate, a semiconductor chip secured to the wiring pattern, a junction terminal formed of the same material as the wiring pattern and electrically connected to the semiconductor chip, one end of the junction terminal being secured to the insulating substrate, the other end of the junction terminal extending upward away from the insulating substrate, and a control circuit for transmitting a control signal for the semiconductor chip, the control circuit being electrically connected to the junction terminal. | 2013-04-04 |
| 20130082284 | ELECTRONIC CIRCUIT - An electronic circuit includes a bipolar device, a unipolar device connected in parallel to the bipolar device, and an output line connected to the bipolar device and to the unipolar device. An inductance between the unipolar device and the output line is smaller than an inductance between the bipolar device and the output line. | 2013-04-04 |
| 20130082285 | SEMICONDUCTOR DEVICE AND PROCESS FOR PRODUCTION THEREOF - A semiconductor device according to the present invention includes a contact region | 2013-04-04 |
| 20130082286 | Single Photon IR Detectors and Their Integration With Silicon Detectors - Apparatuses and systems for photon detection can include a first optical sensing structure structured to absorb light at a first optical wavelength; and a second optical sensing structure engaged with the first optical sensing structure to allow optical communication between the first and the second optical sensing structures. The second optical sensing structure can be structured to absorb light at a second optical wavelength longer than the first optical wavelength and to emit light at the first optical wavelength which is absorbed by the first optical sensing structure. Apparatuses and systems can include a bandgap grading region. | 2013-04-04 |
| 20130082287 | Thin Film Transistor and Manufacturing Method thereof, Array Substrate, and Liquid Crystal Display Device - The present invention discloses a thin film transistor (TFT), a manufacturing method thereof, an array substrate, and a liquid crystal display (LCD) device. The TFT comprises a gate electrode and a source electrode. The gate electrode comprises a first metal layer block and a second metal layer block positioned on the first metal layer block. The thermal expansion coefficient of the second metal layer block is less than that of the first metal layer block. The top surface of the first metal layer block is in contact with the bottom surface of the second metal layer block, and the width of the top surface of the first metal layer block accords with that of the bottom surface of the second metal layer block. The present invention can prevent hillocks from being produced, and can effectively avoid the phenomenon of electricity leakage. | 2013-04-04 |
| 20130082288 | ORGANIC LIGHT EMITTING DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME - The present invention relates to an organic light emitting display device which can prevent a light compensation layer from cracking and a method for fabricating the same. | 2013-04-04 |
| 20130082289 | SEMICONDUCTOR LIGHT-EMITTING DEVICE, SEMICONDUCTOR LIGHT-EMITTING SYSTEM AND ILLUMINATION FIXTURE - The present invention provides a semiconductor light-emitting device that emits light with a specific low correlated color temperature and with a high Ra, and a semiconductor light-emitting system provided with the semiconductor light-emitting device. This object is attained by the semiconductor light-emitting device having the below-described configuration. | 2013-04-04 |
