| 14th week of 2009 patent applcation highlights part 15 |
| Patent application number | Title | Published |
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| 20090085529 | POWER SOURCE - An electronics system module is provided. The electronics system module includes an electronics device and a power source. The power source includes a capacitor coupling to the electronics device and providing power thereto and an adjustable resistance connected in series between the capacitor and the electronics device. The resistance is adjusted by a control mechanism, so that the voltage supplied to the electronics device from the capacitor is constant. | 2009-04-02 |
| 20090085530 | POWER GENERATOR AND ELECTRONIC APPARATUS - A power generator capable of improving power generation efficiency is obtained. This power generator includes a movable portion moving by kinetic energy acting on a power generator body, a first conversion portion converting kinetic energy of the movable portion to electric energy and a movement direction changing portion changing a direction in which the movable portion moves to a direction along a direction in which acceleration applied to the movable portion is larger regardless of a direction of the power generator body. | 2009-04-02 |
| 20090085531 | Vehicle-mounted alternator - The stator of the vehicle-mounted alternator includes a stator core formed with a plurality of slots located along a circumferential direction thereof, and first and second multi-phase windings wound in the slots, the first and second multi-phase windings being spaced from each other by a predetermined electrical angle. An output of the first multi-phase winding is rectified by a first rectifier device, and an output of the second multi-phase winding is rectified by a second rectifier device. The second rectifier device is constituted by a plurality of switching devices. The vehicle-mounted alternator includes a control device to perform on/off control on the switching devices such that a phase angle difference between an output of the first rectifier device and an output of the second rectifier device is varied depending on a rotation speed of the stator. | 2009-04-02 |
| 20090085532 | DC-DC CONVERTER - A DC-DC converter providing a DC output voltage at an output node. The DC-DC converter comprises an output stage, a digital controller, and a controller. The output stage comprises a pull-up circuit having a control terminal and coupled between a first fixed voltage and a internal node, a pull-down circuit coupled between the internal node and a second fixed voltage, and a low pass filter coupled between the internal node and the output node. The digital controller is powered by the DC output voltage and adjusts the DC output voltage by controlling the output stage. The controller controls a connection of a feedback path, comprising the digital controller, between the output node and the control terminal according to the DC output voltage. | 2009-04-02 |
| 20090085533 | Parallel supply current sharing using thermal feedback - The current sharing using thermal feedback, in accordance with various embodiments, includes controlling an amount of current output from each of a plurality of power modules based on the thermal characteristics of each respective power module. | 2009-04-02 |
| 20090085534 | WIDEBAND LOW DROPOUT VOLTAGE REGULATOR - Method and apparatus for regulating a supply voltage. Native NMOS source followers may be stacked and coupled to a supply a regulated voltage to a load. The gates of the native NMOS source followers are coupled to the outputs of internal regulators. The internal regulators may also contain stacked NMOS source followers. In an embodiment, the internal regulators may be supplied by a high voltage source, while the native NMOS source followers may be supplied by a low voltage source. In another embodiment, low-pass filters may filter the signal from the internal regulators to the NMOS source followers. In yet another embodiment, the gates of the source followers may be coupled to the sources of the transistors within the internal regulators. | 2009-04-02 |
| 20090085535 | DC/DC BOOST CONVERTER WITH PULSE SKIPPING CIRCUITRY - A DC to DC boost converter circuit receives a DC input voltage and converts it to a DC output voltage at a different voltage level than the DC input voltage. The DC to DC boost converter includes a switching power converter for receiving the input voltage on an input and converting the input voltage to an output as the DC output voltage in response to pulse control signals. A switching controller generates the pulse control signals during a switching cycle. The switching controller further includes pulse skipping circuitry for generating a pulse width modulated signal to the switching power converter. A pulse width of the pulse width modulated signal is decreased responsive to a voltage level of an output voltage of the DC to DC boost converter being less than a control saw tooth waveform and the pulses width of the pulse width modulated signal is increased responsive to the voltage level of the output voltage of the DC to DC boost converter being greater than the control saw tooth waveform. | 2009-04-02 |
| 20090085536 | Systems and methods for improved coupled inductor topology efficiency utilizing a light load signal - Embodiments include systems and methods for voltage regulation in a coupled inductor topology. Embodiments comprise a switching voltage regulator that is responsive to a light load signal from the device to which power is supplied. When the light load signal indicates that the device is not in a light load condition, the voltage regulator exhibits a low resistance to reduce I | 2009-04-02 |
| 20090085537 | Power supply apparatus - A first booster circuit and a second booster circuit include input capacitors, reactors, diodes, switch elements, and output capacitors, and are arranged to be symmetric to each other on a positive side and a negative side. The reactors are magnetically coupled to each other. With such configuration, the switch elements are on/off controlled simultaneously based on terminal voltages of the input capacitors and the output capacitors. | 2009-04-02 |
| 20090085538 | Power Supply Device, Electronic Device, and A/D Converter Used for Them - In the power supply apparatus which performs voltage conversion of an input voltage (Vbat), with a predetermined set voltage as a target value, and outputs the converted voltage, a boost ratio setting unit sets a boost ratio (XCP) of the charge pump circuit based on the input voltage (Vbat) and a predetermined set voltage. A voltage adjustment unit is a regulator circuit, and adjusts voltage (Vx) so that output voltage (Vout) of the charge pump circuit approaches the set voltage. An output voltage setting unit generates a predetermined set voltage as a digital value (Dset). An A/D converter performs analog-digital conversion of the input voltage (Vbat). The boost ratio setting unit sets the boost ratio based on a result of comparing an input voltage (Ddet) that has undergone analog-digital conversion, and the set voltage (Dset). | 2009-04-02 |
| 20090085539 | FEEDBACK AND COMPARISON APPARATUS AND DC-DC VOLTAGE CONVERTER - A feedback and comparison apparatus applicable to a DC-DC voltage converter is provided. The feedback and comparison apparatus includes a comparator and a voltage feedback circuit. The voltage feedback circuit includes a first voltage dividing component and a second voltage dividing component. The comparator compares a feedback voltage with a first reference voltage, and outputs a control signal to the DC-DC voltage converter according to the comparing result. One end of the first voltage dividing component is coupled to an output voltage output by the DC-DC voltage converter and the other end of the first voltage dividing component is coupled to one end of the second voltage dividing component, for providing the feedback voltage. The other end of the second voltage dividing component is coupled to a second reference voltage. The present invention is applicable to a situation that the output voltage is smaller than the reference voltage. | 2009-04-02 |
| 20090085540 | Voltage Rising/Falling Type Switching Regulator and Reverse Current Prevention Method - A voltage rising/falling type switching regulator includes an inductor, a voltage-falling switching element, a voltage-falling rectifier element, a voltage-rising switching element, a voltage-rising synchronous rectification switching element, a control circuit part, and a reverse current detecting part. The control circuit part is arranged so that the voltage-falling switching element is switched ON and set in a conduction state at the time of voltage-rising operation, and the voltage-rising synchronous rectification switching element is switched ON and set in a conduction state at the time of voltage-falling operation. If the reverse current detecting part detects a reverse current, the voltage-falling switching element is switched OFF and set in a cut-off state. | 2009-04-02 |
| 20090085541 | Semiconductor Device, Method for Fabricating the Same, and Transformer Circuit Using the Same - A semiconductor device, a method for fabricating the same, and a transformer circuit using the same are disclosed. The semiconductor device includes a trench metal oxide semiconductor (MOS) transistor for switching a load of current supplied from a power source, and a boost controller for controlling driving of the trench MOS transistor, the boost controller being formed with the trench MOS transistor on a single semiconductor device to form an integrated structure. In this structure, the physical space of the semiconductor device is reduced, thereby reducing the size of a DC-DC transformer circuit using the semiconductor device. It is possible to obtain finely-adjusted output values by controlling values of the ripple current and ripple voltage. A desired operational stability according to a variation in temperature can also be secured. | 2009-04-02 |
| 20090085542 | DRIVE SYSTEM FOR POWER SEMICONDUCTOR DEVICE - An output signal from a driver is provided to an output unit which includes first and second transistors to output a drive signal for driving a power device. A control signal is supplied from a control signal supply. The control signal indicates an enabled state and a disabled state to control the first and second transistors. The control signal is provided to a voltage output circuit. An output signal from the voltage output circuit is provided to a voltage hold circuit. The first and second transistors are turned off by a disable circuit when the control signal is in the disabled state. A shutdown circuit operates to draw out current from an output terminal of the output unit based on a signal provided from the voltage hold circuit and the control signal when the control signal is in the disabled state. | 2009-04-02 |
| 20090085543 | Variable Output Voltage Power Converter - A method of generating at least a first voltage and a second voltage in a power converter including at least one DC-DC converter is disclosed. The method includes operating the DC-DC converter as a full-bridge converter to generate the first voltage and operating the DC-DC converter as a half-bridge converter to generate the second voltage. Power supplies including a DC-DC converter selectively configurable as a full bridge converter to provide a first DC voltage and as a half bridge converter to produce a second DC voltage and controller circuits for such configuration are also disclosed. | 2009-04-02 |
| 20090085544 | Current regulator and method for regulating current - A regulator and a method for regulating a current through a load. The regulator may include, for example, a first circuit portion configured to alternately apply and remove a voltage across the load in accordance with a first signal, the voltage causing a current to flow, and a second circuit portion configured to generate the first signal so as to have a duty cycle that depends upon an amount of the current and a second signal when the amount of current is below a threshold amount, and to generate the first signal so as to have a duty cycle that depends upon the amount of the current but not the second signal when the amount of current exceeds the threshold amount. | 2009-04-02 |
| 20090085545 | VOLTAGE REGULATOR - In some implementations, a system includes a low-power voltage regulator that can switch between three power modes: a power shutdown mode, a low power mode, and a higher power mode. The system includes a selector coupled to the voltage regulator to switch between the low power mode and the higher power mode, and a switch to switch between the power shutdown mode and the low or higher power mode. The system also has a control circuit to control the switch and the selector to control operation of the voltage regulator in any of the three power modes. A total current used in the voltage regulator in the low power mode is on the order of microamps or nanoamps. The voltage regulator in the low power mode has two to more orders of magnitude of lower current use than the voltage regulator in the higher power mode. | 2009-04-02 |
| 20090085546 | Fast Transient Step Load Response in a Power Converter - A method of controlling a power converter having at least one switching device for supplying an output voltage and a load current to a load is disclosed. The method includes sensing the output voltage and sensing the load current. The method further includes controlling a duty cycle of the switching device according to the sensed output voltage and a voltage control loop when a rate of change of the load current does not exceed a threshold level. The method also includes adjusting the duty cycle of the switching device set by the voltage control loop when the rate of change of the load current exceeds the threshold level. | 2009-04-02 |
| 20090085547 | Switching Power Supply Unit - A step-up switching power supply unit for generating a predetermined output voltage through a feedback control of its output voltage based on a first detection voltage indicative of the output voltage. The power supply unit is adapted to monitor a second detection voltage associated with the output voltage that is compared with a reference voltage. Open-circuit malfunction arising from, for example, connection failures within the power supply unit can be detected by determining whether the second detection voltage is lower than the reference voltage or not. In the event that open-circuit malfunction has taken place, the switching signal controlling the power supply unit is promptly stopped, thereby preventing abnormal rise of the output voltage (i.e. over-voltage). | 2009-04-02 |
| 20090085548 | CONVERTER CIRCUIT AND METHOD FOR OPERATING SUCH A CONVERTER CIRCUIT - A converter circuit is specified in which, in order to avoid losses to the greatest possible extent, a first inductance is connected in series into the connection of a DC voltage source of the converter circuit to a first switch of the converter circuit, and in which, moreover, a second inductance is connected in series into the connection of a second switch of a switching group of the converter circuit to the junction point between a second capacitive energy store and a second unidirectional non-drivable power semiconductor switch of the switching group. Two further alternative converter circuits and also a method for operating the converter circuit are furthermore specified. | 2009-04-02 |
| 20090085549 | BANDGAP REFERENCE CIRCUIT WITH REDUCED POWER CONSUMPTION - A bandgap voltage reference circuit and methods for generating a bandgap reference voltage are disclosed. An operational amplifier receives first and second input voltages from a first and second current path, respectively. A buffer stage is coupled to an output of the operational amplifier and generates third and fourth voltages on the first and second path. A temperature dependent current is generated using the third and fourth voltages in combination with a first diode, second diode and a resistor. A third current path mirrors the temperature dependent current and a temperature independent voltage is generated for the bandgap reference voltage in the third current path using the temperature dependent current in combination with a second resistor and related diode. | 2009-04-02 |
| 20090085550 | Constant current source circuit - A constant current source circuit is constituted of a control voltage generation section which detects the output voltage at the output terminal so as to generate a control voltage, a reference current adjustment section which adjust a reference current based on the control voltage, and a current mirror section which outputs the output current responsive to the adjusted reference current at the output terminal. This reduces variations of the output current due to variations of the output voltage; hence, the constant current source circuit can precisely operate in a low-voltage region. | 2009-04-02 |
| 20090085551 | Circuitry and Method for Monitoring a Supply Voltage - A method for monitoring the supply voltage of an electronic device includes the steps of: determining an operating condition of the electronic device, adjusting a plurality of reference voltages dependent on the operating condition of the electronic device, wherein each of the plurality of reference voltages is adjusted at a different time, and comparing the supply voltage of the electronic device with at least one of the plurality of reference voltages. | 2009-04-02 |
| 20090085552 | POWER MANAGEMENT USING DYNAMIC EMBEDDED POWER GATE DOMAINS - In some embodiments of the invention, a processor with a power management scheme using dynamically switchable embedded power gates. | 2009-04-02 |
| 20090085553 | Reconfigurable battery pack - In some embodiments, a system comprises a voltage regulator having two or more inputs with each having its own input voltage level and at least one switch to select between the input voltage levels, a configurable battery pack comprising at least two cells and at least one switch capable of configuring the battery in either a series configuration or a parallel configuration, a detector to measure a load parameter on the system; and a controller to send a signal to the at least one switch to select between the input voltage levels based on the measured load parameter. | 2009-04-02 |
| 20090085554 | POWER SUPPLY CIRCUIT FOR MOTHERBOARD - A power supply circuit for a motherboard includes a first resistor, a second resistor, a Schottky diode, and a direct current (DC) voltage source. The Schottky diode includes a first anode, a second anode, and a cathode. The first anode of the Schottky diode is respectively coupled to terminals of the first and second resistors, another terminal of each of the first and second resistors is respectively coupled to a power supply and ground. The second anode of the Schottky diode is coupled to the DC voltage source, the cathode of the Schottky diode is coupled to a south bridge. | 2009-04-02 |
| 20090085555 | SYSTEMS AND METHODS FOR PROVIDING SIGNAL ANALYSIS DATA - A method for displaying signal analysis data comprises performing a plurality of sweep operations upon a received signal. With the sweep operations, spectral analysis is performed upon a first frequency band of the received signal. Displays are rendered of data generated from the spectral analysis in the first band and a second band different from the first band simultaneously, and the displays in the first band and the second bands are updated according to the sweep operations. | 2009-04-02 |
| 20090085556 | METHOD OF FABRICATING MONOLITHIC NANOSCALE PROBES - A monolithic pair of nanoscale probes, including: a substrate having a cavity that extends from a surface of the substrate into its body; a dielectric layer formed on the substrate; a pair of nanoscale probe precursors formed over the dielectric layer; a plurality of sub-monolayers of electrode material selectively atomic layer deposited over the pair of nanoscale probe precursors. The dielectric layer includes a window that extends through it to the cavity of the substrate such that a portion of the dielectric layer adjacent to the window extends over the cavity. The pair of nanoscale probe precursors includes a pair of edges facing each other across the window. These edges correspond to tips of the pair of nanoscale probes. The sub-monolayers of electrode material include the pair of edges, so that a distance between the tips of the nanoscale probes is between about 0.1 nm and about 20 nm. | 2009-04-02 |
| 20090085557 | DETECTION DEVICE AND METHOD - The present invention relates to method and device for detecting changes of a magnetic response of at least one magnetic particle in a carrier fluid. The method comprises: using a measuring procedure comprising measuring the characteristic rotation time of said magnetic particle, said measuring procedure further involving measuring Brownian relaxation in said carrier fluid under influence of an external pulsed excitation magnetic field, and based on said influence of said external pulsed excitation magnetic field measuring a hydrodynamic volume of a particle or a change in a hydrodynamic volume of the particle change upon modification of an effective volume of the particle or its interaction with said carrier fluid by detecting change of magnetization of the particle with time by monitoring change of an output signal in detection coil. | 2009-04-02 |
| 20090085558 | HALL-EFFECT BASED LINEAR MOTOR CONTROLLER - A linear motion control device for use in a linear control system is presented. The linear motion control device includes a coil driver to drive a coil that, when driven, effects a linear movement by a motion device having a magnet. The linear motion control device also includes a magnetic field sensor to detect a magnetic field associated with the linear movement and an interface to connect an output of the magnetic field sensor and an input of the coil driver to an external controller. The interface includes a feedback loop to relate the magnetic field sensor output signal to the coil driver input. | 2009-04-02 |
| 20090085559 | SYSTEM AND METHOD FOR MINIMIZING ELECTROMAGNETIC FIELD DISTORTION IN AN ELECTROMAGNETIC TRACKING SYSTEM - A system and method of minimizing the electromagnetic field distortion in an electromagnetic tracking system. The system and method comprising a transmitter or receiver coil arrangement comprising at least two coils connected in series and symmetrically about opposite ends of an object to be tracked. The object to be tracked may be a medical device, implant or instrument that may be made of a magnetic field distorting electrically conductive material. | 2009-04-02 |
| 20090085560 | APPARATUS AND METHODS FOR AN INDUCTIVE PROXIMITY SENSOR - An inductive proximity sensor is disclosed. The proximity sensor includes a housing having at least a first pair of inductive coils disposed within the housing. One of the first pair of inductive coils is opposite in polarity from another one of the first pair of inductive coils. The sensor optionally includes a second set of inductive coils, having opposite polarity. | 2009-04-02 |
| 20090085561 | METHOD AND APPARATUS FOR TESTING A MAGNETIC HEAD - A testing apparatus for a magnetic head tests electromagnetic conversion characteristics of the magnetic head by causing a magnetic head | 2009-04-02 |
| 20090085562 | Method of Operating a Dynamic Nuclear Polarization System - A method of operating a DNP system comprising: a cryostat ( | 2009-04-02 |
| 20090085563 | Magnetic resonance imaging system - A magnetic resonance measurement technique is provided which shortens the measurement time while suppressing artifacts caused by body movement of a measuring object and enables high-speed imaging. An excitation pulse which excites a plurality of slice planes and an excitation pulse which excites slice planes perpendicular to the slice planes are applied and a plurality of substantially parallel linear crossing areas are simultaneously measured. Spatial information of a linear direction of the crossing areas is acquired by modulating a magnetic resonance signal from the crossing areas by a gradient magnetic field. A spatial information of a direction perpendicular to the linear direction is acquired by changing the position of the plane and an image is reconstructed. | 2009-04-02 |
| 20090085564 | SYSTEM, METHOD AND COMPUTER ACCESSIBLE MEDIUM FOR MAGNETIC RESONANCE SPECTROCOPIC IMAGING - An exemplary embodiment of system, method, and computer accessible medium for magnetic resonance spectroscopic imaging for improving signal-to-noise ratio per unit time and optimizing duty cycle in MRSI and/or for reducing chemical-shift artifacts can be provided. One exemplary embodiment includes forwarding an excitation pulse to the target and acquiring a signal from the target by multiplexing in time and space. Multiplexing in time may involve segmenting a field of view of the at least one portion of the target into a predetermined number of slabs that are acquired sequentially during each repetition time. Multiplexing in space may involve acquiring multiple voxels. Data may be generated based on the acquired signal. A further exemplary embodiment includes providing an excitation pulse to the target and acquiring a signal from the target. The excitation pulse can be a series of cascaded Hadamard pulse components. Data may be generated based on the acquires signal. | 2009-04-02 |
| 20090085565 | Parametric Nuclear Quadrupole Resonance Spectroscopy System and Method - A system and method for probing a specimen to determine one or more components by utilizing a first signal to excite the specimen at a nuclear quadrupole resonant frequency and observing changes in a specimen property. One exemplary property may be dielectric constant. Another exemplary property may be magnetic permeability. In one embodiment, the first signal is unmodulated and a second signal is observed for the presence of modulation at the frequency of the first signal. Alternatively, the first signal may be modulated and the second signal may be observed for the presence of the modulation. A system is disclosed wherein the specimen is excited using the first frequency and a radar at the second frequency is used to observe changes in radar reflectivity of the specimen due to the excitation. | 2009-04-02 |
| 20090085566 | MAGNETIC RESONANCE IMAGING APPARATUS AND ANALYSIS METHOD FOR FAT SUPPRESSION EFFECT IN MAGNETIC RESONANCE IMAGING APPARATUS - A magnetic resonance imaging apparatus includes an imaging unit which performs imaging more than once with respect to an imaging target while changing a central frequency of a fat suppression pulse, a generation unit which generates a plurality of images based on magnetic resonance signals obtained by imaging performed more than once, and a calculation unit which calculates factor information of spatial inhomogeneity of a fat suppression effect based on the plurality of images. | 2009-04-02 |
| 20090085567 | MAGNETIC RESONANCE APPARATUS WITH SHIM ARRANGEMENT - A magnetic resonance apparatus has an examination region to accommodate a patient to be examined, and a body coil that circumferentially encompasses the examination region and is designed for magnetic resonance examination of the patient. A gradient coil circumferentially encompasses the examination region and the body coil and is designed to detect the position of magnetic resonance measurement values. A basic field magnet is designed to form a basic magnetic field in the examination region for a patient examination to be conducted. The basic field magnet at least partially encompasses the examination region, the body coil and the gradient coil. A shim device is used that is designed to influence the basic magnetic field. Components of the shim device and components of the body coil are associated to exhibit a common distance relative to the longitudinal axis of symmetry of the examination region and thus encompass the examination region. | 2009-04-02 |
| 20090085568 | Locator Using Two Horizontally Displaced Measrement Points - A method and receiver system for identifying a location of a magnetic field source using two horizontally displaced tri-axial antennas. In a preferred embodiment two tri-axial antennas are positioned at opposite ends of a receiver frame. Each antenna detects in three dimensions a magnetic field from a source or transmitter. The receiver is maintained in a horizontal plane and the receiver is moved in the horizontal plane until a flux angle measured at each of the two points is zero so that the receiver is in the vertical plane perpendicular to the axis of the source. The depth and location of the source in three dimensions relative to the receiver is determined using the detected field values. The receiver is moved in a direction defined by a line containing the two points of the receiver until a magnitude of the magnetic field detected at each of the two points is substantially the same so that the receiver is positioned above the source. | 2009-04-02 |
| 20090085569 | Method and Device for Sea Electrical Survey of Oil-and-Gas Deposits - A sea electrical survey method for carbohydrates deposits, situated under seabed not exceeding 10 meters of depth, is disclosed, comprising: providing a plurality of multi-channel bottom systems with receiving lines having at least three electrodes and capable to register electromagnetic signals, excitation means generating a series of alternating-sign pulses controlled by a computer a horizontally positioned dipole, synchronizing the excitation means and bottom systems, submerging the systems upon the seabed along a predetermined direction, aligning the receiving lines, moving the dipole within the survey zone, excitation of the pulses, registering signals measuring the potentials difference and the spatial derivatives of the signals during the pulses and the pauses, recording data, analyzing the data with accounting the fields behavior in time and in space simultaneously, determining the environment resistivity and environment polarizability based on a predetermined mathematical model, and compiling the deposit prognosis. Preferable distance, time, and angular parameters are specified. | 2009-04-02 |
| 20090085570 | Apparatus and Method for Azimuthal MWD Resistivity Imaging at Multiple Depths of Investigation - A combination of a shallow-reading and a deep-reading, azimuthally sensitive, multiple propagation devices is used for providing depth images the earth formation with different depth of investigation. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b). | 2009-04-02 |
| 20090085571 | BATTERY TESTERS WITH SECONDARY FUNCTIONALITY - An electronic vehicle tester includes a battery tester configured to measure a parameter of a battery of a vehicle. A tire tester is configured to receive a parameter of a tire of the vehicle. A wireless receiver can be configured to receive pressure information from a transmitter associated with a tire of a vehicle. | 2009-04-02 |
| 20090085572 | METHOD AND APPARATUS FOR DIAGNOSING INVERTER LINKAGES - A method for diagnosing the linkages of an inverter including a controller connected to switching devices that are between a DC input and a multi-phase output. The inverter can be diagnosed to determine whether the control signals provided to the switching devices are being properly provided to the inverter and whether the inverter is operating properly. Diagnosis of the inverter is advisable upon commissioning or after completion of a repair. The controller can provide at least one signal to the switching devices and the signal can be monitored adjacent to the switching devices to ensure that the switching devices are receiving the correct signals from the controller. The controller can provide at least one signal to the switching devices and the output of the inverter can be monitored to determine whether the inverter operates in accordance with the provided signal. | 2009-04-02 |
| 20090085573 | DIFFERENTIAL-MODE-CURRENT-SENSING METHOD AND APPARATUS - Systems, methods, and devices are disclosed, including a ground-fault sensor that has a plurality of conductors each disposed one inside of another except for an outer conductor and a field sensor configured to sense an electric field, a magnetic field, or both. In some embodiments, the field sensor is disposed adjacent the outer conductor. | 2009-04-02 |
| 20090085574 | Method for locating phase to ground faults in DC distribution systems - A method for locating phase to ground faults in DC distribution systems. The method includes utilizing wavelet analysis using Multi-Resolution Analysis (MRA) as a signal processing tool for recognition of characteristic features in the voltage signal. The voltage signal contains characteristic information in the high frequency range above the switching frequencies of the PE converters which allows for localization of the fault. | 2009-04-02 |
| 20090085575 | Testing method for a ground fault detector - A testing system for a ground fault detection system of an electrical system of a machine is disclosed. The testing system has a low voltage power source, the low voltage power source capable of operation that is independent from a high voltage power source of the machine. The testing system also has a variable current source that is permanently connected to a positive voltage bus or to a negative voltage bus of the electrical system of the machine, where the machine operates self-sufficiently. The testing system also has a controller connected to the variable current source. The testing system also has an input device, where the input device is connected to the controller. | 2009-04-02 |
| 20090085576 | APPARATUS, SYSTEM AND METHODS FOR GROUND CURRENT DETECTION - Various systems, methods and apparatus are described for detecting an excessive or faulty ground current in a conductive wire or electronic device. A ground current detector is coupled to a known earth ground to determine whether other ground lines are carrying excessive, faulty and/or leaking currents. If these types of unsafe conditions are detected, then a user can take appropriate action to locate and correct these problems. | 2009-04-02 |
| 20090085577 | SYSTEM FOR TERMINATING HIGH SPEED INPUT/OUTPUT BUFFERS IN AN AUTOMATIC TEST EQUIPMENT ENVIRONMENT TO ENABLE EXTERNAL LOOPBACK TESTING - An apparatus comprising a test termination card having a first set of connections and a second set of connections. The first set of connections may be configured to connect to a specific pinout of a device under test. The second set of connections may be configured to connect to a general pinout of a tester load board. The termination card may toggle between (a) connecting the first set of connectors to the second set of connectors to implement a first test type and (b) disconnecting the first set of connectors from the second set of connectors to implement a second test type. | 2009-04-02 |
| 20090085578 | INTEGRATED CIRCUITS WITH PROGRAMMABLE WELL BIASING - An integrated circuit includes a substrate, a storage device formed in the substrate to hold bias settings, and operational blocks formed in the substrate, each operational block including an operational circuit and a charge pump to provide well bias voltages to the operational circuit in response to one or more of the bias settings. A method for testing an integrated circuit having two or more operational blocks includes: (a) determining a maximum operating speed of each of the blocks at a minimum supply voltage; (b) selecting a block that has a slow operating speed; (c) selecting a well bias to speed up the selected block; (d) selecting a supply voltage to meet a target operating frequency at the selected well bias and measuring power; (e) repeating acts (b)-(d) while the measured power is less than a baseline power; and (f) saving the selected well bias and supply voltage settings for operation of the integrated circuit. | 2009-04-02 |
| 20090085579 | ATTENUATION APPARATUS AND TEST APPARATUS - There is provided an attenuation apparatus for attenuating a signal received via a first terminal thereof and outputting the attenuated signal via a second terminal thereof. The attenuation apparatus includes a first transmission path and a second transmission path which respectively have different attenuation amounts for the signal, a connection switching section that switches, between the first and second transmission paths, a transmission path connected to the first and second terminals so as to be positioned therebetween, and a first ground connection switching section that connects, to a reference potential, respective ends of the first transmission path and a contact point positioned on a path between the respective ends of the first transmission path, when the second transmission path is electrically connected to the first and second terminals so as to be positioned therebetween. | 2009-04-02 |
| 20090085580 | Apparatus for testing catalysis electrode of fuel cell - An apparatus is disclosed for testing a catalysis electrode of a fuel cell. The apparatus includes a driving module, a loading module, a containing module and an analyzing unit. The containing module includes a hollow threaded bolt, a sleeve and a contact plate. The hollow threaded bolt is operatively connected to driving module. The sleeve receives and is operatively connected to the hollow threaded bolt. The contact plate is located below the hollow threaded bolt in the sleeve. The analyzing unit includes a working electrode, an auxiliary electrode and a reference electrode. The working electrode is connected to the contact plate. The auxiliary electrode includes an end located below the containing module in the loading module. The reference electrode is connected to the loading module. | 2009-04-02 |
| 20090085581 | MEASURING DEVICE, AND DETECTION DEVICE - A measuring apparatus that measures a characteristic of a device under measurement is provided. The measuring apparatus includes: a signal generating section that outputs a forward signal to the device under measurement through a device side terminal; a directional coupler that outputs a backward split signal obtained by splitting a part of a backward signal inputted from the device under measurement through the device side terminal; a backward mixer that outputs a backward detection signal obtained by multiplying a local signal having a predetermined frequency by the backward split signal; and an analysis section that analyzes a characteristic of the device under measurement based on the backward detection signal. The directional coupler is included in a multilayer substrate, and the backward mixer is included in a chip provided on a surface of the multilayer substrate. | 2009-04-02 |
| 20090085582 | MICROWAVE DETERMINATION OF LOCATION AND SPEED OF AN OBJECT INSIDE A PIPE - Apparatus and method are described for measuring the location and speed of an object, such as instrumentation on a movable platform, disposed within a pipe, using continuous-wave, amplitude-modulated microwave radiation. | 2009-04-02 |
| 20090085583 | MEASUREMENT TOOL AND METHOD OF USE - This invention relates to a measurement tool and method of use, and in particular to a measurement tool for use in determining a parameter of a stationary or moving fluid. The measurement tool has been designed primarily for use in borehole formation testing. The measurement tool can measure the dielectric constant of a fluid within a pipe or surrounding the tool. The pipe or wall between the tool and the fluid is electrically insulating. The tool has pair of capacitor plates mounted adjacent to the pipe or wall, a signal generator which can deliver an alternating electrical signal to at least one of the capacitor plates, and a detector for measuring a signal dependent upon the electrical capacitance between the capacitor plates. The measurement tool can additionally measure the electrical resistivity of the fluid. | 2009-04-02 |
| 20090085584 | SUBSYSTEMS AND METHODS FOR USE IN PATCH CLAMP SYSTEMS - Subsystems and methods for use in patch clamp systems are provided. For example, in certain embodiments, compensation circuitry is used to compensate for non-idealities present in the patch clamp system. The accuracy of this compensation may be verified by employing, for example, circuitry that models the patch clamp system. | 2009-04-02 |
| 20090085585 | APPARATUS, SYSTEM, AND ASSOCIATED METHOD FOR MONITORING SURFACE CORROSION - An article includes an electrically conductive corrodible element; a device that can inject electricity at a plurality of operation frequencies into the corrodible element; and a measurement apparatus operable to measuring impedance of the electrically conductive corrodible element under various operation frequencies. | 2009-04-02 |
| 20090085586 | DETECTION OF PRESENCE OR ABSENCE OF AC MAINTAIN POWER SIGNATURE IN POWER-OVER-ETHERNET SYSTEM - An AC maintain power signature detection circuit in a power sourcing equipment (PSE) for a Power over Ethernet system injects an AC test signal onto a power port of the PSE. The AC test signal is driven onto a first power terminal of the power port through a sense resistor. The voltages across the sense resistor are measured and scaled by first and second resistor dividers having different resistor ratios. The voltage and the scaled voltage at the first power terminal side of the sense resistor have a peak voltage being proportional to the load impedance of the load coupled to the power port. The comparator compares the scaled voltages measured across the sense resistor and generates the output signal indicative of the load impedance at the power port. | 2009-04-02 |
| 20090085587 | HIGH CURRENT PRECISION RESISTANCE MEASUREMENT SYSTEM - A resistance testing apparatus makes use of a modular design for cascaded, parallel, bipolar current sources to obviate the need for electromechanical or pneumatic switching systems. | 2009-04-02 |
| 20090085588 | Method and Apparatus for Detecting Molecules - A molecular sensor includes a membrane layer having parallel pores extending through the membrane layer and incorporating therein probe molecules that bind with corresponding target molecules when present in the pores, electrodes, and an ionic solution in contact with the electrodes and the pores, wherein the electrodes are energized to induce an electrical current in the solution through the pores, wherein the electrical current induces an electrical parameter in the electrodes that is indicative of a through-pore electrical impedance of the pores, wherein the through-pore electrical impedance is increased when there is probe-to-target molecule binding in the pores relative to when there is an absence of such binding. | 2009-04-02 |
| 20090085589 | WAFER LEVEL TESTING METHOD FOR RFID TAGS - A wafer level testing method for RFID tags is disclosed. The method comprises: providing a semiconductor wafer having a plurality of RFID tag chips, wherein each of the RFID tag chips includes at least one detachable inductance and an embedded capacitance to form a resonant circuit; exposing the RFID tag chips to microwave energy, wherein the RFID tag chips send a plurality of wireless signals after a wireless power conversion; receiving the wireless signals and calculating a power level thereof; and comparing the power level to a predetermined power level to obtain the wafer yield. | 2009-04-02 |
| 20090085590 | Method And Apparatus For Testing Devices Using Serially Controlled Intelligent Switches - Methods and apparatus for testing devices using serially controlled intelligent switches have been described. In some embodiments, a probe card assembly can be provided that includes a plurality of integrated circuits (ICs) serially coupled to form a chain, the chain coupled to at least one serial control line, the plurality of ICs including switches coupled to test probes, each of the switches being programmable responsive to a control signal on the at least one serial control line. | 2009-04-02 |
| 20090085591 | PROBE TIP INCLUDING A FLEXIBLE CIRCUIT BOARD - A probe tip for attaching to a device to be tested includes a flexible circuit board, at least one contact pad arranged to be able to be attached to at least one contact of a probe tip connector, at least one electrical component having first and second ends, and at least one test pad arranged to be able to be attached to the device to be tested. The at least one contact pad is connected to the first end of the at least one electrical component, and the at least one test pad is connected to the second end of the at least one electrical component. Each of the electrical components of the probe tip is connected to at least one contact pad and is connected to at least one test pad. | 2009-04-02 |
| 20090085592 | PROBING A DEVICE - An electronic device is moved into a first position such that terminals of the electronic device are adjacent probes for making electrical contact with the terminals. The electronic device is then moved horizontally or diagonally such that the terminals contact the probes. Test data are then communicated to and from the electronic device through the probes. | 2009-04-02 |
| 20090085593 | Test socket - A support block has a first face, a second face opposed to the first face, and first and second through holes communicating between the first face and the second face, and is formed with resin material. The first face, the second face, and the first and second through holes are covered with an electrically conductive plated coating. First and second probes are electrically connected to terminals of a device to be tested provided on a side of the first face and to terminals connected to a testing apparatus provided on a side of the second face. The first probe is provided in the first through hole and is electrically connected to the plated coating on the first through hole, the second probe is provided in the second through hole and is electrically connected to the plated coating on the second through hole. A pattern for defining a first region electrically connected to the first probe via the plated coating and a second region electrically connected to the second probe via the plated coating is formed by partially removing the plated coating on the first face and the second face, where the second region is electrically isolated from the first region. Electrodes of an electronic component are respectively connected to the first and second regions. | 2009-04-02 |
| 20090085594 | PROBE APPARATUS AND PROBING METHOD - A probe apparatus includes an imaging unit imaging probes and a first and a second imaging unit imaging the wafer surface. The apparatus further includes a control unit obtaining positions of a mounting table at which focuses of the imaging unit and the first imaging unit are made to coincide with each other and then the focuses of the image unit and the second imaging unit are made to coincide with each other by moving the mounting table; obtaining positions of the mounting table at which the images of the wafer are sequentially taken by the first and the second imaging unit by moving the mounting table; obtaining a position of the mounting table at which the probes are imaged by the imaging unit, and calculating a position of the mounting table at which the wafer contacts with the probes based on the obtained positions of the mounting table. | 2009-04-02 |
| 20090085595 | METHOD AND ARRANGEMENT FOR POSITIONING A PROBE CARD - A method for perpendicular positioning of a probe card relative to a test substrate, includes storing a separation position approached in a first positioning step as a distance between the needle tips of the probe card and the substrate, storing a contact position approached in a second positioning step until the probe card contacts the substrate, and displaying an image of the needle tips. For avoiding erroneous operation after a probe card has been changed, when imaging the needle tips, the stored contact position is imaged and is changed until presentation of this contact position corresponds to actual height of the tips appropriate for the respective probe card and this setting is then stored as a new contact position. A display device presents the needle tips and the stored contact position and is connected to a memory, a recording device and an input device which changes the contact position. | 2009-04-02 |
| 20090085596 | SYSTEM AND METHOD FOR TESTING SEMICONDUCTOR DEVICES - A system for testing semiconductor devices is disclosed. In one embodiment, the test system being configured to be electrically connected via parallel wiring paths to a plurality of contact pins of a number of devices under test. The test system having at least one signal distribution matrix arranged in the wiring path to provide signals for testing and/or power supply to the devices. | 2009-04-02 |
| 20090085597 | Process Monitor for Monitoring an Integrated Circuit Chip - A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals. | 2009-04-02 |
| 20090085598 | INTEGRATED CIRCUIT TEST SYSTEM AND METHOD WITH TEST DRIVER SHARING - An integrated circuit test system and method for testing integrated circuits or chips is disclosed. One embodiment provides a test signal from a test driver via a primary test channel and distributed via parallel wiring paths to a plurality of contact pads of one or more integrated circuits or chips under test. At least one operational amplifier is arranged in the wiring path connected to the contact pads of the integrated circuits or chips. | 2009-04-02 |
| 20090085599 | Semiconductor device having ESD protection circuit and method of testing the same - A semiconductor device having an electrostatic discharge (ESD) protection circuit and a method of testing the same may provided. The semiconductor device may include one or more stacked chips, each stacked chip may include a test circuit configured to output a test control signal and a selection control signal in response to a test enable signal, an internal circuit configured to perform an operation and output a plurality of test signals in response to the test control signal, at least one multiplexer (MUX) configured to select and output one of the plurality of test signals based on the selection control signal, at least one test pad configured to receive the selected test signal, and at least one electrostatic discharge (ESD) protection circuit configured to discharge static electricity applied through the test pad externally. | 2009-04-02 |
| 20090085600 | Method and System for Derivation of Breakdown Voltage for MOS Integrated Circuit Devices - A method and system for multi-point (e.g., double-point) GOI test that can efficiently judge failure modes by testing only two points. We can measure leakage currents at only two voltages, which are the cut points of mode A-B and B-C, instead of the whole ramped voltages to save time and cost with the same test effectiveness according to a specific embodiment. By correlating leakage current at extrinsic field to the breakdown voltage, we can also evaluate the intrinsic reliability even if the samples are not subjected to actual breakdown according to a specific embodiment. | 2009-04-02 |
| 20090085601 | SET DOMINANT LATCH WITH SOFT ERROR RESILIENCY - A logic circuit includes a storage node coupled to a data line and a soft-error protection circuit to change a logical value of the storage node from a first value to a second value when the logical value of the storage node does not correspond a logical value of an output node. The logic circuit may be a set dominant latch and a memory circuit may be formed based on the set dominant latch. | 2009-04-02 |
| 20090085602 | DELIBERATE DESTRUCTION OF INTEGRATED CIRCUITS - A method is provided for intentionally permanently disabling a target device. The target device comprises an integrated circuit having one or more electronic devices, where the target device is disabled by destroying at least one or more electronic devices. The method comprises charging at least one capacitor in an integrated circuit disabling device, detecting when at least one capacitor is charged, and selecting at least one target signal path associated with the target device for disabling. The method further includes connecting the integrated circuit disabling device to the target signal path and rapidly discharging at least one capacitor to the selected target signal path. The discharging step may apply a high energy impulse to destroy the one or more electronic devices of the target device. | 2009-04-02 |
| 20090085603 | FPGA configuration protection and control using hardware watchdog timer - An apparatus and method provides automatic reconfiguration of an FPGA, such as in case of lost configuration or configuration error, and software-controlled reconfiguration may be provided that does not require the use of additional devices. An apparatus for FPGA configuration protection comprises watchdog signal generator circuitry in the FPGA configured to output a watchdog signal when the FPGA is properly configured and watchdog circuitry configured to receive the watchdog signal and to initiate reconfiguration of the FPGA if the watchdog signal is not received for or within a predetermined time. The circuitry in the FPGA may be configured to receive a signal from a processor and to output the watchdog signal when the signal from the processor is received. | 2009-04-02 |
| 20090085604 | MULTIPLE ADDRESS OUTPUTS FOR PROGRAMMING THE MEMORY REGISTER SET DIFFERENTLY FOR DIFFERENT DRAM DEVICES - A method, device, and system are disclosed. In one embodiment, the method includes programming a first On Die Termination (ODT) value into a first plurality of dynamic random access memory (DRAM) devices. The first plurality of DRAM devices are located on a dual inline memory module (DIMM). Additionally, the method also includes programming a second ODT value into a second plurality of additional DRAM devices. The second plurality of additional DRAM devices are also located on the DIMM. The method also specifies that the first and second ODT values are not the same value. | 2009-04-02 |
| 20090085605 | SYSTEM AND METHOD FOR PARALLEL BURNING USING MULTIPLEX TECHNOLOGY - A system and method for parallel burning using multiplex technology is used for burning chips of different bus types on the same transmission bus at the same time in parallel. A main control unit divides bandwidth of the transmission bus into different frequency bands, sends a control command including a command for sending data carrying bus signals of designated types, and controls data carrying the bus signals of the designated types to be transmitted in designated frequency bands of the transmission bus. Then, a sending unit sends the data carrying the bus signals of the designated types in the designated frequency band. Finally, receiving units receive the data transmitted in the designated frequency bands, and then output them to a plurality of burners such as to burn the data onto the chips of the designated bus types in parallel. | 2009-04-02 |
| 20090085606 | ELECTRONIC DEVICE AND INTEGRATED CIRCUIT - An electronic device with a CMOS circuit (CC) comprises a first driver circuit ( | 2009-04-02 |
| 20090085607 | EMBEDDED POWER GATING - With embodiments disclosed herein, the distribution of gated power is done using on-die layers without having to come back out and use package layers. | 2009-04-02 |
| 20090085608 | Systems, methods and devices for arbitrating die stack position in a multi-bit stack device - Embodiments are described for arbitrating stacked dies in multi-die semiconductor packages. In one embodiment, die identification data for at least two stacked dies are arbitrated to select one of the dies as the primary die and the other as secondary. Each die includes an input/output buffer that drives an output signal to a commonly shared output terminal in response to receiving a die identification data bit as the input signal. Each die also includes an arbitration circuit that generates a control signal in response to the identification bit of one die being mismatched to a corresponding identification bit of the other die. The control signal programs a stack enable fuse in accordance with the arbitration to designate one of the dies as the secondary die. | 2009-04-02 |
| 20090085609 | MULTIPLEXOR WITH LEAKAGE POWER REGULATOR - A circuit for a multiplexer includes a pair of NAND gates with outputs coupled to an OAI gate constructed from a complementary circuit formed from solid state devices. A current flow controller formed from solid state devices is coupled to one of the NAND gates. When activated the controller inhibits the flow of current through the NAND gate and a portion of the OAI gate to which the controller is connected. As a consequence, leakage power is not consumed within the multiplexer. Several of the applications in which the circuit is used are also demonstrated in the specification. | 2009-04-02 |
| 20090085610 | GENERAL PURPOSE COMPARATOR WITH MULTIPLEXER INPUTS - A circuitry comprises a comparator for comparing a signal received on a first input to a signal received on a second input. A control register associated with the first multiplexer stores control values enabling connection of one input of the first multiplexer to the output of the first multiplexer. | 2009-04-02 |
| 20090085611 | Method And System For A Programmable Local Oscillator Generator Based On Quadrature Mixing Using A Phase Shifter - Methods and systems for a local oscillator generator based on quadrature mixing using a phase shifter. Aspects of one method may include generating a local oscillator signal, where a frequency of the local oscillator signal may be determined by controlling a phase of in-phase (I) components and quadrature phase (Q) components of a first signal and a second signal. For example, by appropriately controlling a phase of each component that is to be mixed, the local oscillator signal may have a frequency that is the sum of a frequency of the first signal and a frequency of the second signal, or a difference of the frequency of the first signal and the frequency of the second signal. | 2009-04-02 |
| 20090085612 | MULTI-PURPOSE CURRENT DRIVER SYSTEM AND METHOD - A current driver system and method for generating one or more independent current signals for controlling or driving an external device. In one embodiment the system includes a programmable controller having both serial and parallel interfaces, and controls six independent current driver channels. Each current driver channel may form a dual stage channel that generates two different level current signals. Each current driver channel may include an overcurrent monitoring circuit as well as a loop back subsystem, where the loop back subsystem generates a signal that the programmable controller, and thus an external device in communication with the controller, can use to verify that proper communication is occurring between the controller and the current driver channel. The controller also synchronizes the turn on and turn off points for each current signal to a master system clock. | 2009-04-02 |
| 20090085613 | LOW CURRENT WIDE VREF RANGE INPUT BUFFER - A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages. | 2009-04-02 |
| 20090085614 | Circuits and methods for programming integrated circuit input and output impedances - An integrated circuit may include at least a first replica driver stage coupled between a reference impedance input and a first power supply node and having a first programmable driver impedance set by a first driver configuration value in the same manner as a first output driver section of the integrated circuit. At least a first replica input termination stage may be coupled between the reference impedance input and the first power supply node and having a first programmable termination impedance set by a first termination configuration value in the same manner as a first input termination section of the integrated circuit. An impedance programming circuit may generate at least the first driver configuration value and the first termination configuration value in response to a potential at the reference node. | 2009-04-02 |
| 20090085615 | METHOD AND APPARATUS FOR SIMPLIFYING THE CONTROL OF A SWITCH - A technique for simplifying the control of a switch is presented. In one embodiment, a method of controlling a switch as a function of the voltage across the switch is presented. In one embodiment a method of controlling a switch as a function of the slope of the voltage across the switch is present. In one embodiment a switching is switched on for an on time period that is substantially fixed in response to a voltage across the switch while the switch is off. In one embodiment a switch is switched on for an on time period that is substantially fixed in response to the slope of the voltage across the switch while the switch is off. | 2009-04-02 |
| 20090085616 | SEMICONDUCTOR INTEGRATED CIRCUIT, COMMUNICATION APPARATUS, INFORMATION PLAYBACK APPARATUS, IMAGE DISPLAY APPARATUS, ELECTRONIC APPARATUS, ELECTRONIC CONTROL APPARATUS AND MOBILE APPARATUS - The semiconductor integrated circuit having a transmitter circuit for transmitting a supplied external data signal DIN. The transmitter circuit includes: a transmitter flip-flop circuit having a reference clock CK as an input for holding the external data signal DIN in synchronization with the reference clock CK; a frequency divider circuit for multiplying the frequency of the reference clock CK by n/m (m and n are integers equal to or more than 2 and m>n); a data signal buffer circuit for transmitting a data signal held by the transmitter flipflop circuit; and a clock buffer circuit for transmitting the output of the frequency divider circuit. | 2009-04-02 |
| 20090085617 | RAMP VOLTAGE CIRCUIT - Implementations related to ramp voltage generating circuits and systems implementing the same are presented herein. | 2009-04-02 |
| 20090085618 | WAKE-UP CIRCUIT - Disclosed herein is a wake-up circuit for a bias input of a circuit such as a slave DLL circuit, to allow it to be placed in a reduced power mode and be “awoken” (brought up to a control bias level) in a sufficiently small enough amount of time. The wake-up circuit couples a bias input node to a voltage level that is higher then the control bias level in response to a wake-up event, and then it couples the control bias node to the bias input node in response to their voltage levels being sufficiently close to one another. | 2009-04-02 |
| 20090085619 | POWER SUPPLY VOLTAGE MONITORS - The single chip microcontroller unit includes a processing unit having normal power mode of operation and a low power mode of operation. Analog circuitry and digital circuitry are connected to the processing unit. Monitoring circuitry determines if a chip supply voltage level exceeds a threshold level necessary to maintain operation of the digital circuitry. | 2009-04-02 |
| 20090085620 | CLOCK SYSTEM AND APPLICATIONS THEREOF - A clock system includes a phase locked loop, a phase divider, and a control module. The phase locked loop (PLL) produces a plurality of phase-offset output oscillations. The phase divider generates a clock signal from one or more of the plurality of phase-offset output oscillations based on a phase divider control signal. The control module generates the phase divider control signal based on a desired setting for the clock signal. | 2009-04-02 |
| 20090085621 | LOOP FILTERS - Loop filters are provided, in which a first resistor comprises a first terminal coupled to a first node, and a second terminal coupled to a second node; a first capacitor is coupled between the second node and a ground voltage, a second resistor comprises a first terminal coupled to the first node and a second terminal coupled to a third node. An operational amplifier comprises a non-inversion input terminal coupled to the second node, an inversion input terminal coupled to the third node, and an output terminal, and a second capacitor is coupled between the output terminal of the operational amplifier and the third node. | 2009-04-02 |
| 20090085622 | PHASE-LOCKED LOOP START-UP TECHNIQUES - Implementations feature systems and techniques for phase-locked loops (PLLs). In some aspects, implementations feature a system that has a PLL circuit including an oscillator and programmable reference frequency divider circuit or a programmable feedback frequency divider circuit. The PLL includes a control circuit to reduce a time required for a PLL settling time by programming a division value into the programmable reference frequency divider circuit and/or the programmable feedback frequency divider circuit to target the oscillator to operate outside of a system operating frequency range of the oscillator during start-up of PLL operations. The control circuit can program another division value into the programmable reference frequency divider circuit and/or the programmable feedback frequency divider circuit after stabilization of the variable oscillator. | 2009-04-02 |
| 20090085623 | BIAS SIGNAL DELIVERY - Provided herein are approaches for controlling remote slave DLL circuits with a master DLL circuit by conveying a relevant bias signal as a current signal instead of as a voltage signal. | 2009-04-02 |
| 20090085624 | FLIP-FLOP CIRCUIT AND DUTY RATIO CORRECTION CIRCUIT USING THE SAME - A flip-flop circuit includes a first unit configured to receive a reference clock signal and a reset signal, and a second unit configured to change an output node to a first level in response to the reference clock signal and change the output node to a second level by precharging the output node in response to a signal output from the first unit according to the reset signal. | 2009-04-02 |
| 20090085625 | TIME-BASED CONTROL OF A SYSTEM HAVING INTEGRATION RESPONSE - A time-based controller provides control for a controlled system including a plant having an integration response. The time-based controller includes a comparator that detects a polarity change in a comparison of a sensed signal from the plant and a reference signal while a control signal is in a first state, time calculation logic that, responsive to detection of the change in the comparison, determines a time at which to change a state of a control signal supplied to the plant, and a modulator that, at the determined time, changes the state of the control signal supplied to the plant from the first state to a second state. | 2009-04-02 |
| 20090085626 | Semiconductor integrated circuit and method for controlling semiconductor integrated circuit - When a master circuit is in an inactive state, a slave circuit assigned to the master circuit is not used. Accordingly, the use efficiency of system recourses is decreased. To solve the above problem, a semiconductor integrated circuit reassigns a M2 region of a slave circuit, previously assigned to a first master circuit, to a second master circuit. That is to say, the M2 region of the slave circuit previously assigned to the first master circuit is reassigned to the second master circuit based on the operational status of the first master circuit. This improves the use efficiency of system resources of the semiconductor integrated circuit. | 2009-04-02 |
| 20090085627 | Soft error rate hardened latch - A latch is provided that includes a first inverter, a second inverter, a first latch circuit and a second latch circuit. The first inverter to receive the first clock signal from an input port and to provide a clock signal. The second inverter to receive the first clock signal from the input port and to provide a clock signal. The first latch circuit is to store data and to receive a clock signal from the second inverter. The second latch circuit is further to store data and to receive a clock signal from the first inverter. | 2009-04-02 |
| 20090085628 | SEMICONDUCTOR DEVICE REDUCING LEAKAGE CURRENT OF TRANSISTOR - A semiconductor device includes: a first transistor having a control electrode coupled to an input node receiving a signal synchronized with a clock, a first conductive electrode coupled to an output node, and a second conductive electrode; a second transistor having a control electrode coupled to the input node, a first conductive electrode coupled to the output node, and a second conductive electrode coupled to a power supply node; and a first switch element connected between the power supply node and the second conductive electrode of the second transistor and turned on and off based on a first control signal indicating a detection result of a frequency of the clock. | 2009-04-02 |
