12th week of 2020 patent applcation highlights part 60 |
Patent application number | Title | Published |
20200090867 | MEASURING METHOD FOR MEASURING CONCENTRATION OF DONOR ELEMENT SOLID-SOLVED IN CERAMIC GRAINS IN CERAMIC DIELECTRIC LAYERS - A measuring method for measuring a concentration of a donor element which is solid-solved in ceramic grains of a plurality of ceramic dielectric layers, includes measuring (a current value at 10 V/μm when a direct voltage is applied to a plurality of ceramic dielectric layers at 125 degrees C.)/(a current value at 10 V/μm when a direct voltage is applied to the plurality of the ceramic dielectric layers at 85 degrees C.), with respect to a multilayer ceramic capacitor having a multilayer structure in which each of the plurality of ceramic dielectric layers and each of a plurality of internal electrode layers are alternately stacked. | 2020-03-19 |
20200090868 | DIELECTRIC COMPOSITION AND ELECTRONIC COMPONENT - A dielectric composition including a complex oxide represented by a general formula of A | 2020-03-19 |
20200090869 | DIELECTRIC COMPOSITION AND ELECTRONIC COMPONENT - A dielectric composition comprising a complex oxide represented by a general formula of A | 2020-03-19 |
20200090870 | ELECTRONIC COMPONENT - An electronic component includes: a multilayer ceramic capacitor including a capacitor body and a pair of external electrodes, and an interposer including an interposer body having grooves and a pair of external terminals. Each of the external terminals includes a bonding portion, a mounting portion and a connection portion; and ΔL=|A−A′|/2 in which A is a distance from one end portion of the interposer in a length direction to one end portion of the multilayer ceramic capacitor in the length direction, A′ is a distance from the other end portion of the interposer in the length direction to the other end portion of the multilayer ceramic capacitor in the length direction, and ΔL is an offset between the multilayer ceramic capacitor and the interposer in the length direction, and ΔL/L≤0.100 in which L is a length of the multilayer ceramic capacitor. | 2020-03-19 |
20200090871 | MULTILAYER CAPACITOR - A multilayer capacitor includes a body including a stack structure of a plurality of dielectric layers, and a plurality of internal electrodes stacked with the dielectric layers interposed therebetween. A stress alleviation portion is disposed on at least one surface among surfaces of the body, and an external electrode is disposed on an external portion of the body and connected to the internal electrodes. The stress alleviation portion includes a first resin layer adjacent to the body, and a second resin layer covering the first resin layer and including a filler dispersed in a resin of the second resin layer. | 2020-03-19 |
20200090872 | MULTI-LAYER CERAMIC CAPACITOR AND CIRCUIT BOARD - A multi-layer ceramic capacitor includes: a ceramic body including first and second end surfaces, first and second side surfaces, first internal electrodes drawn to the first and second end surfaces, second internal electrodes drawn to at least one of the first side surface and the second side surface, and dielectric layers, the first and second internal electrodes being alternately laminated via the dielectric layers; first and second external electrodes that respectively cover the first and second end surfaces, and extend to each of the first and second side surfaces; a third external electrode including a first side-surface region formed on the first side surface and a second side-surface region formed on the second side surface, the first side-surface region and the second side-surface region being formed to be mutually shifted along the first direction and at least partially facing each other in the second direction. | 2020-03-19 |
20200090873 | CAPACITOR COMPONENT INCLUDING AMORPHOUS SECOND PHASE - A capacitor component includes a body including a dielectric layer and first and second internal electrodes, alternately disposed in a first direction, and first and second external electrodes, respectively disposed on opposite end surfaces of the body in a second direction, perpendicular to the first direction in the body. An amorphous second phase is disposed at an interface between the first and second internal electrodes and the dielectric layer, and ls/le is between 0.02 and 0.07, where ls is a total length of the amorphous second phase disposed in a boundary line between the first or second internal electrode and the dielectric layer in the second direction and le is a length of the first or second internal electrode in the second direction. | 2020-03-19 |
20200090874 | METHOD FOR MANUFACTURING SOLID ELECTROLYTIC CAPACITOR - A method of producing a solid electrolytic capacitor, including a step of forming a dielectric film on the surface of a valve-acting metal having fine pores and a step of forming a solid electrolyte layer containing a conductive polymer on the dielectric film; wherein the solid electrolyte layer containing the conductive polymer is formed without using an oxidizing agent by: (i) a method of polymerizing at least one of the compounds (A1) represented by formula (1) disclosed herein in the presence of a compound (B) having a sulfo group; (ii) a method of copolymerizing at least one compound (A2) represented by formula (2) disclosed herein; and (iii) a method of polymerizing at least one of the compounds (A1) and (A2). | 2020-03-19 |
20200090875 | Method to Reduce Anode Lead Wire Embrittlement in Capacitors - An improved capacitor, and method of manufacturing the improved capacitor, is provided. The method includes deoxygenating and leaching the anode wire to produce a capacitor comprising an anode having a surface area of at least 4.0 m | 2020-03-19 |
20200090876 | MIXED THREE-DIMENSIONAL AND TWO-DIMENSIONAL PEROVSKITES AND METHODS OF MAKING THE SAME - An aspect of the present disclosure is a perovskite that includes A | 2020-03-19 |
20200090877 | HEAT ENERGY-POWERED ELECTROCHEMICAL CELLS - The present disclosure provides a heat energy-powered electrochemical cell including an anode, a cathode, and a solid metal polymer/glass electrolyte. The solid metal polymer/glass electrolyte includes between 1% and 50% metal polymer by weight as compared to total solid metal polymer/glass electrolyte weight and between 50% and 90% solid glass electrolyte by weight as compared to the total solid metal polymer/glass electrolyte weight. The solid glass electrolyte includes a working cation and an electric dipole. The heat energy-powered electrochemical cells may be used to capture heat from a variety of sources, including solar hear, waste heat, and body heat. The heat energy-powered electrochemical cells may be fabricated at large-area, thin cells. | 2020-03-19 |
20200090878 | METHOD AND ASSOCIATED CAPACITORS HAVING ENGINEERED ELECTRODES WITH VERY HIGH ENERGY DENSITY - An apparatus and associated method for an energy-storage device (e.g., a capacitor) having a plurality of electrically conducting electrodes including a first electrode and a second electrode separated by a non-electrically conducting region, and wherein the non-electrically conducting region further includes a non-uniform permittivity (K) value. In some embodiments, the method includes providing a substrate; fabricating a first electrode on the substrate; and fabricating a second electrode such that the second electrode is separated from the first electrode by a non-electrically conducting region, wherein the non-electrically conducting region has a non-uniform permittivity (K) value. The capacitor devices will find benefit for use in electric vehicles, of all kinds, uninterruptible power supplies, wind turbines, mobile phones, and the like requiring wide temperature ranges from several hundreds of degrees C. down to absolute zero, consumer electronics operating in a temperature range of −55 degrees C. to 125 degrees C. | 2020-03-19 |
20200090879 | ELECTROCHEMICAL DEVICE, JOINED BODY, METHOD OF PRODUCING ELECTROCHEMICAL DEVICE, AND METHOD OF PRODUCING JOINED BODY - An electrochemical device includes: an exterior can formed of metal containing a first metal type; an electricity storage device that includes a positive electrode, a negative electrode, and a separator, the positive electrode and the negative electrode being stacked via the separator and wound, the electricity storage device further including a lead plate that is electrically connected to one of the positive electrode and the negative electrode, contains a second metal type different from the first metal type, and is formed of metal different from that of the exterior can, the electricity storage device being housed in the exterior can; and a reinforcement plate formed of metal containing the first metal type, the exterior can and the reinforcement plate being welded with the lead plate being sandwiched therebetween, the first metal type and the second metal type coexisting at a welding portion thereof. | 2020-03-19 |
20200090880 | HIGH-VOLTAGE DEVICES - The present disclosure provides supercapacitors that may avoid the shortcomings of current energy storage technology. Provided herein are supercapacitor devices, and methods of fabrication thereof comprising the manufacture or synthesis of an active material on a current collector and/or the manufacture of supercapacitor electrodes to form planar and stacked arrays of supercapacitor electrodes and devices. Prototype supercapacitors disclosed herein may exhibit improved performance compared to commercial supercapacitors. Additionally, the present disclosure provides a simple, yet versatile technique for the fabrication of supercapacitors through masking and etching. | 2020-03-19 |
20200090881 | SMART CIRCUIT BREAKER BOX SYSTEM - The invention comprises a smart circuit breaker, system, and method of use. The system comprises a circuit breaker box assembly having at least one breaker switch or panel coupled to a display. The system further having an operating system and graphical user interface configured to identify electrical nodes on branch circuits and organize the electrical nodes corresponding with individual breaker switches or panels and display the organized data through the graphical user interface. Additional aspects of the invention include network communication means configured to relay system data to an external mobile computing device or cloud server. Additional aspects of the invention include the external mobile computing device or cloud server configured to remotely control the functionality of the system and power to each electrical node. | 2020-03-19 |
20200090882 | PUSH-BUTTON FOR GAME MACHINE - To achieve a push-button for a game machine, capable of maintaining excellent waterproof performance and having excellent operability even when a large amount of liquid is spilled, or even when liquid is spilled while the push-button is pressed. A push-button for a game machine includes: an elastic body provided in a flange shape integrally with a key top with an outer periphery of the key top and having an outer end held between a base and a bezel; and a discharge path that communicates with a space partitioned by the key top, the bezel, and the elastic body and discharges liquid having entered the space to the outside. | 2020-03-19 |
20200090883 | MEMBRANE KEYBOARD STRUCTURE AND CONDUCTIVE METHOD OF SAME - A membrane keyboard structure and a conductive method thereof allows a first surrounding portion of a first flexible circuit layer to be deformed to pass through an through hole to be in direct contact and conduction with a second surrounding portion temporarily when it is pressed through the coordination of a first flexible sheet body, first flexible circuit layer configured on the first flexible sheet body, spacer layer positioned on one side of the first flexible sheet body adjacent to the first flexible circuit layer, second flexible sheet body configured on one side of the spacer away from the first flexible circuit layer and second flexible circuit layer configured on one side of the second flexible sheet body adjacent to the spacer layer. Whereby, the present invention can achieve the contact and conduction anywhere to make the use thereof easier and more convenient. | 2020-03-19 |
20200090884 | INFORMATION HANDLING SYSTEM KEYBOARD BACKLIGHT - An information handling system keyboard includes a backlight that illuminates keys by transmitting light from a light source through a light guide under the keys and reflects the light towards the keys with a reflector disposed under the light guide. Varied thickness of one or more of the light source, light guide and reflector at an intersection of the light source, light guide and reflector improve the efficiency of light transmission to the keys, thus providing for a thinner light guide and/or reduced illumination to have a given key illumination. | 2020-03-19 |
20200090885 | INTERKEY SUPPORT FOR KEYBOARDS - Keyboards and other input devices are provided with at least one flexible layer that extends over or under the keycaps. The flexible layer spans interkey spaces and provides finger support and key definition as the user feels the top surface of the keycaps and flexible layer. The flexible layer therefore smooths the top surface of the keyboard, supports fingers during key travel, prevents ingress of contaminants, fluids, or debris into the keyboard, and provides a surface that can be used as a touch interface that coincides with the keyboard. | 2020-03-19 |
20200090886 | ELECTRICAL SWITCH FOR AN ELECTRICAL DEVICE AND SEALING ASSEMBLY FOR AN ELECTRICAL SWITCH - A sealing assembly for prevention of ingress of particulates and water into an electrical switch includes an engagement element with a rigid first abutment portion for circumscribing an aperture extending through the outer surface of the switch housing and a rigid first retention portion. Also included is a sealing element being slidingly engageable with the engagement element that includes a first complementary abutment portion. The sealing element is formed from an elastically resilient polymeric material so that sealing engagement with the engagement element occludes passage and ingress of external particulates, dust and water. | 2020-03-19 |
20200090887 | ROTARY SWITCH - The present disclosure provides a rotary switch. The rotary switch may comprise a fixing body, a rotating body disposed in the fixing body, a cover coupled to an upper portion of the fixing body, and a first elastic body positioned under the cover to contact a plurality of protrusions formed on the rotating body. The protrusions of the rotating body may protrude in a side direction and radial direction of the rotating body to improve a rotational operation feeling and the quality of a rotational sound. | 2020-03-19 |
20200090888 | MOLDED CASE CIRCUIT INTERRUPTER HAVING CIRCUITRY COMPONENT SITUATED ADJACENT REAR EXTERIOR SURFACE - A molded case circuit interrupter advantageously employs a circuitry component that is situated adjacent a rear exterior surface of the molded case of the molded case circuit interrupter. Previous circuit interrupters have sometimes employed a non-conductive backsheet of a nominal thickness of 0.062 inches that was adhered to the rear surface of the molded case circuit interrupter in order to electrically isolate screws, posts, and the like that were mounted to and that were exposed on the rear portion of a molded case thereof. The disclosed and claimed concept provides a circuitry component in place of or in addition to the back sheet, with the circuitry component including flexible ribbons having electrical conductors that extend through holes formed in the molded case and that are electrically connected with electronic components that are situated within the interior of the molded case. | 2020-03-19 |
20200090889 | REINFORCEMENT STRUCTURE FOR A VACUUM INTERRUPTER - A reinforcement structure for a vacuum interrupter is disclosed. For example, in some implementations, a vacuum interrupter includes a first electrical contact; a second electrical contact; a vessel that encloses the first electrical contact and the second electrical contact in an evacuated space, the vessel including an endcap; and a reinforcement structure at an exterior surface of the endcap, the reinforcement structure including a first side, a second side, and an opening that passes through the reinforcement structure from the first side to the second side. The exterior surface of the endcap includes a recessed region, and at least a portion of the opening is positioned over the recessed region. | 2020-03-19 |
20200090890 | RIVET-TYPE CONTACT AND METHOD FOR MANUFACTURING THE SAME - A rivet-type contact of the present invention has a head part made of a contact material, and a leg part narrower than the head part in width and configured to be deformed at fixation. The leg part includes a flange part larger than the leg part in diameter, in an end part of the side of the head part, the flange part is embedded in the head part such that a lower end surface of the flange part and a lower end surface of the head part become approximately flat, and a length (l) between an endmost part of the flange part and a starting point of the leg part satisfies l2020-03-19 | |
20200090891 | CIRCUIT BREAKERS INCLUDING DUAL TRIGGERING DEVICES AND METHODS OF OPERATING SAME - A circuit breaker includes a first electrical contact and a second electrical contact moveable between an open state and a closed state; an armature, wherein movement of the armature from a first position to a second position initiates the first electrical contact and the second electrical contact to move from the closed state to the open state; a first electromagnetic device configured to move the armature from the first position to the second position in response to being energized by a first signal; and a second electromagnetic device configured to move the armature from the first position to the second position in response to being energized by a second signal and in response to generation of the first signal and the first electrical contact and the second electrical contact still being in the closed state. Other circuit breakers and methods of operating circuit breakers are disclosed. | 2020-03-19 |
20200090892 | COMPACT HIGH VOLTAGE POWER FUSE AND METHODS OF MANUFACTURE - A high voltage power fuse having a dramatically reduced size facilitated by silicated filler material, a formed fuse element geometry, arc barrier materials and single piece terminal fabrications. Methods of manufacture are also disclosed. | 2020-03-19 |
20200090893 | FUSE - A kind of fuse, comprising, outer cartridge body with both open ends, inner cartridge body with both open ends and provided inside the said outer cartridge body, fuse core provided inside the said inner cartridge body, left and right inner copper bushes provided at and covering both ends of the said outer cartridge body, left and right outer copper bushes provided at and covering the said inner copper bushes and both ends of the said outer cartridge body; Wherein, one end of the said inner copper bush is the first open end, and the other end is the first closed end, the end face of the said first closed end has the first opening; preferably, the said first open end and the said outer cartridge body form interference fit connect through punching. End of the said fuse core extends and passes through the said first opening, and is preferably fixed to the end face of the said first closed end through spot welding. One end of the said outer copper bush is the open end, the other end is the closed end. Preferably, through pressing, the open end of the said outer copper bush and the said first closed end and/or the said outer cartridge body form interference fit joint. | 2020-03-19 |
20200090894 | HIGH CURRENT FUSE BLOCK - A power distribution box assembly can include a power distribution box housing, a fuse block, and a plurality of eyelet terminals. The fuse block can include a stamped busbar assembly, a plurality of studs, and a housing. The stamped busbar assembly can include a main power supply portion, a plurality of fuse elements, and a plurality of terminal connecting portions coupled to the plurality of fuse elements. Each of the plurality of terminal connecting portions can: (i) extend from its respective fuse element in a terminal direction that is orthogonal to both directions that the main power supply portion and the fuse elements extend. | 2020-03-19 |
20200090895 | METAL ENCAPSULATED PHOTOCATHODE ELECTRON EMITTER - A photocathode structure, which can include one or more of Cs | 2020-03-19 |
20200090896 | PIEZOELECTRIC VACUUM TRANSISTOR - A vacuum transistor includes a substrate and a first terminal formed on the substrate. A piezoelectric element has a second terminal formed on the piezoelectric element, wherein the piezoelectric element is provided over the first terminal to provide a gap between the first terminal and the second terminal. The gap is adjusted in accordance with an electrical field on the piezoelectric element. | 2020-03-19 |
20200090897 | CHARGED PARTICLE BEAM DEVICE - An object of the invention is to stably supply an electron beam from an electron gun, that is, to prevent variation in intensity of the electron beam. The invention provides a charged particle beam device that includes an electron gun having an electron source, an extraction electrode to which a voltage used for extracting electrons from the electron source is applied, and an acceleration electrode to which a voltage used for accelerating the electrons extracted from the electron source is applied, a first heating unit that heats the extraction electrode, and a second heating unit that heats the acceleration electrode. | 2020-03-19 |
20200090898 | METHODS AND SYSTEMS FOR PLASMA DEPOSITION AND TREATMENT - An ion beam treatment or implantation system includes an ion source emitting ion beams. The ion source includes a microwave source and a curved waveguide conduit having openings therein. The waveguide conduit is coupled to the microwave source for transmitting microwaves from the microwave source through the plurality of openings. The ion source also includes a curved plasma chamber in communication with the waveguide conduit through the openings. The plasma chamber receives through the openings microwaves from the waveguide conduit. The plasma chamber includes magnets disposed in an outer wall of the plasma chamber for forming a magnetic field in the plasma chamber. The plasma chamber further includes a charged cover at a side of the chamber opposite the side containing the openings. The cover includes extraction holes through which the ion beams are extracted. | 2020-03-19 |
20200090899 | MULTI-ELECTRON-BEAM IMAGING APPARATUS WITH IMPROVED PERFORMANCE - A multi-electron beam imaging apparatus is disclosed herein. An example apparatus at least includes an electron source for producing a precursor electron beam, an aperture plate comprising an array of apertures for producing an array of electron beams from said precursor electron beam, an electron beam column for directing said array of electron beams onto a specimen, where the electron beam column is configured to have a length less than 300 mm, and where the electron beam column comprises a single individual beam crossover plane in which each of said electron beams forms an intermediate image of said electron source, and a single common beam crossover plane in which the electron beams in the array cross each other. | 2020-03-19 |
20200090900 | CHARGED PARTICLE BEAM SYSTEM - A charged particle beam system includes a charged particle beam device | 2020-03-19 |
20200090901 | REAL-TIME DIRECT MEASUREMENT OF MECHANICAL PROPERTIES IN-SITU OF SCANNING BEAM MICROSCOPE - System and methods are described for directly measuring mechanical properties of a sample while concurrently imaging the sample using a scanning beam microscope (e.g., a scanning electron microscope (SEM)). The system includes a clamping mount configured to hold the sample and a load cell positioned proximal to the clamping mount and configured to provide a direct, real-time measurement of force on the sample end. The system further includes a controllable probe configured to apply a force to the sample. In some embodiments, the sample load cell is tiltably couplable to a sample held by the clamping mount and the controllable probe is moveable between a plurality of different mounting positions relative to the load cell. | 2020-03-19 |
20200090902 | Primary Beam Scanning Apparatus and Signal Processing Method - There is provided a primary beam scanning apparatus capable of producing data having a bit depth higher than the resolution of an analog-to-digital converter. The primary beam scanning apparatus is capable of controlling a scan rate of a primary beam for scanning a specimen. The scanning apparatus includes a detector for detecting signals generated in response to irradiation of the specimen with the primary beam and providing an analog output signal, an analog-to-digital converter for sampling the analog signal and converting it into a digital signal, and an arithmetic section for averaging the digital signal. | 2020-03-19 |
20200090903 | Charged Particle Beam Device - A charged particle beam device includes: a charged particle source that emits a charged particle beam; a boosting electrode disposed between the charged particle source and a sample to form a path of the charged particle beam and to accelerate and decelerate the charged particle beam; a first pole piece that covers the boosting electrode; a second pole piece that covers the first pole piece; a first lens coil disposed outside the first pole piece and inside the second pole piece to form a first lens; a second lens coil disposed outside the second pole piece to form a second lens; and a control electrode formed between a distal end portion of the first pole piece and a distal end portion of the second pole piece to control an electric field formed between the sample and the distal end portion of the second pole piece. | 2020-03-19 |
20200090904 | DETECTING DEFECTS IN A LOGIC REGION ON A WAFER - Methods and systems for detecting defects in a logic region on a wafer are provided. One method includes acquiring information for different types of design-based care areas in a logic region of a wafer. The method also includes designating the different types of the design-based care areas as different types of sub-regions and, for a localized area within the logic region, assigning two or more instances of the sub-regions located in the localized area to a super-region. In addition, the method includes generating one scatter plot for all of the two or more instances of the sub-regions assigned to the super-region. The one scatter plot is generated with different segmentation values for the output corresponding to the different types of the sub-regions. The method further includes detecting defects in the sub-regions based on the one scatter plot. | 2020-03-19 |
20200090905 | ION ENERGY BIAS CONTROL WITH PLASMA-SOURCE PULSING - This disclosure describes systems, methods, and apparatus for controlling ion energy in a plasma processing chamber. In particular, a system for plasma processing includes a plasma processing chamber, a plasma source coupled to the plasma processing chamber, a plasma power supply coupled to the plasma source that is configured to apply power to the plasma processing chamber in periodic pulse envelopes to control a density of a plasma in the plasma processing chamber, and a support within the plasma processing chamber to support a substrate. A bias supply is configured to provide a modified periodic voltage function to the substrate support within each of the periodic pulse envelopes to control an energy of ions impacting the substrate support in the plasma processing chamber. | 2020-03-19 |
20200090906 | FEEDBACK SYSTEM - A feedback system for controlling properties of a single layer or multiple layer stack is applied on a substrate by means of a vacuum coating process controlled by a plurality of process controlling means. The system includes at least one monitoring device for at least implementing at least two distinct measurement techniques for determining measurement signals at each of a plurality of locations spatially distributed over the coated substrate; at least one processing unit adapted for at least receiving the measurement signals; and a controller for at least providing actuation signals for actuating the plurality of process controlling means. | 2020-03-19 |
20200090907 | SYSTEMS AND PROCESSES FOR PLASMA TUNING - Systems and methods may be used to enact plasma tuning. Exemplary semiconductor processing chambers may include a pedestal positioned within the chamber and configured to support a substrate. The pedestal may include an electrode operable to form a plasma within a processing region of the semiconductor processing chamber, with the processing region at least partially defined by the pedestal. The pedestal may include a heater embedded within the pedestal, and the heater may be coupled with a power supply. An RF filter may be coupled between the power supply and the heater. A shunt capacitor may also be coupled between the RF filter and the heater. | 2020-03-19 |
20200090908 | SWITCHABLE MATCHING NETWORK AND AN INDUCTIVELY COUPLED PLASMA PROCESSING APPARATUS HAVING SUCH NETWORK - A switchable matching network and an inductively coupled plasma processing apparatus having such network are disclosed. The switchable matching network enables selection between two bias power frequencies. The network is particularly suitable for an inductively-coupled plasma processing apparatus. The switchable matching network comprises: a first match circuit having a first input port connected to a first signal source and a first output port coupled to a load; a second match circuit having a second input port connected to a second signal source and a second output port coupled to the load; a switching device having a first connection port, a second connection port and a third connection port, the first connection port connected to the first input port and the second connection port connected to the second output port; a variable capacitor connected between ground and the third connection port of the switching device. | 2020-03-19 |
20200090909 | FILLING A CAVITY IN A SUBSTRATE USING SPUTTERING AND DEPOSITION - A method may include providing a cavity in a surface of a substrate, the cavity comprising a sidewall portion and a lower surface; directing depositing species to the surface of the substrate, wherein the depositing species condense to form a fill material on the sidewall portion and lower surface; and directing angled ions at the cavity at a non-zero angle of incidence with respect to a perpendicular to a plane defined by the substrate, wherein the angled ions strike an exposed part of the sidewall portion and do not strike the lower surface, and wherein the cavity is filled by the fill material in a bottom-up fill process. | 2020-03-19 |
20200090910 | POWER CABLE WITH AN OVERMOLDED PROBE FOR POWER TRANSFER TO A NON-THERMAL PLASMA GENERATOR AND A METHOD FOR CONSTRUCTING THE OVERMOLDED PROBE - A transfer module for transferring power to a non-thermal plasma generator includes a power cable; a first epoxy; a second epoxy; an interface between the first epoxy and the second epoxy; and a well; the power cable including a conductor for conducting electrical power and an insulation layer for surrounding a portion of the conductor; the first epoxy being located within the well to surround the insulation layer; the second epoxy being located within the well to surround the conductor located within the well; the second epoxy being located outside the well to surround the conductor located outside the well. | 2020-03-19 |
20200090911 | Substrate Processing Apparatus - A capacitively coupled plasma substrate processing apparatus includes: a process chamber which is exhausted to vacuum and provides a sealed internal space; a gas inflow pipe which is connected to the process chamber to provide a process gas into the process chamber; a gas distribution unit which is connected to the gas inflow pipe to inject the process gas flowing into the gas inflow pipe in the internal space; an impedance matching network which is disposed outside the process chamber and transfers an RF power of an RF power supply to the gas distribution unit; an RF connection line which connects an output of the impedance matching network to the gas inflow pipe or the gas distribution unit; and a shielding plate which is configured such that at least one of the RF connection line and the gas inflow pipe penetrates the shielding plate and includes a ferromagnetic material. | 2020-03-19 |
20200090912 | HIGH TEMPERATURE RF HEATER PEDESTALS - Semiconductor processing systems are described, which may include a substrate support assembly having a substrate support surface. Exemplary substrate support assemblies may include a ceramic heater defining the substrate support surface. The assemblies may include a ground plate on which the ceramic heater is seated. The assemblies may include a stem with which the ground plate is coupled. The assemblies may include an electrode embedded within the ceramic heater at a depth from the substrate support surface. The chambers or systems may also include an RF match configured to provide an AC current and an RF power through the stem to the electrode. The RF match may be coupled with the substrate support assembly along the stem. The substrate support assembly and RF match may be vertically translatable within the semiconductor processing system. | 2020-03-19 |
20200090913 | APPARATUS AND A METHOD OF CONTROLLING THICKNESS VARIATION IN A MATERIAL LAYER FORMED USING PHYSICAL VAPOUR DEPOSITION - A magnet assembly is disclosed for steering ions used in the formation of a material layer upon a substrate during a pulsed DC physical vapour deposition process. Apparatus and methods are also disclosed incorporating the assembly for controlling thickness variation in a material layer formed via pulsed DC physical vapour deposition. The magnet assembly comprises a magnetic field generating arrangement for generating a magnetic field proximate the substrate and means for rotating the ion steering magnetic field generating arrangement about an axis of rotation, relative to the substrate. The magnetic field generating arrangement comprises a plurality of magnets configured to an array which extends around the axis of rotation, wherein the array of magnets are configured to generate a varying magnetic field strength along a radial direction relative to the axis of rotation. | 2020-03-19 |
20200090914 | METHODS AND APPARATUS FOR UNIFORMITY CONTROL IN SELECTIVE PLASMA VAPOR DEPOSITION - Methods and apparatus for producing a uniform deposition layer for a selective plasma vapor deposition (PVD) chamber. Flux generated by a cylindrical target is adjusted using a magnetron assembly that controls the amount of flux that passes through a slit in the selective PVD chamber. In some embodiments, a magnetron assembly disposed within the cylindrical has a magnetic field strength that varies along a length of the magnetron assembly. The magnetron assembly disposed within the cylindrical target may have a center height greater than either end such that flux generated during processing for a center region of the cylindrical target is directed away from the opening. In some embodiments, a magnetron assembly disposed within the cylindrical target is rotatable such that flux generated during processing for a center region of the cylindrical target is directed away from the opening or towards the opening. | 2020-03-19 |
20200090915 | TARGET ASSEMBLY FOR SAFE AND ECONOMIC EVAPORATION OF BRITTLE MATERIALS - The present invention discloses a target assembly which allows safe, fracture-free and economic operation of target materials with low fracture toughness and/or bending strength during arc evaporation processes as well as in sputtering processes. The present invention discloses a target assembly for PVD processes, comprising a target, and a target holding device ( | 2020-03-19 |
20200090916 | Insertable Target Holder For Solid Dopant Materials - An ion source with an insertable target holder for holding a solid dopant material is disclosed. The insertable target holder includes a pocket or cavity into which the solid dopant material is disposed. When the solid dopant material melts, it remains contained within the pocket, thus not damaging or degrading the arc chamber. Additionally, the target holder can be moved from one or more positions where the pocket is at least partially in the arc chamber to one or more positions where the pocket is entirely outside the arc chamber. In certain embodiments, a sleeve may be used to cover at least a portion of the open top of the pocket. | 2020-03-19 |
20200090917 | TUNED SYNTHETIC DENDRIMER CALIBRANTS FOR MASS SPECTROMETRY - Provided are synthetic dendrimer calibrants for mass spectrometry. The calibrants are distinguished by their relative case and rapidity of synthesis, comparatively low cost, long shelf life, high purity, and amenability to batch synthesis as mixtures. The latter characteristic enables parallel preparation of higher molecular weight compounds displaying useful distributions of discrete molecular weights, thereby providing multi-point mass spectrometry calibration standards. Methods of making, tuning and using said calibrants are provided. | 2020-03-19 |
20200090918 | Library Search Tolerant to Isotopes - One or more known compounds of a sample are ionized using an ion source, producing an ion beam of precursor ions. A tandem mass spectrometer receives the ion beam from the ion source, selects one or more precursor ions from the ion beam using a precursor ion mass selection window, fragments precursor ions within the precursor ion mass selection window, and mass analyzes the resulting product ions, producing an unknown product ion mass spectrum. A library product ion mass spectrum for a known compound is retrieved from a memory. Each peak of the unknown spectrum is analyzed for a potential non-halogen isotopic peak using a processor, and if a potential non-halogen isotopic peak is found, it is removed if it does not have a corresponding peak in the library spectrum. | 2020-03-19 |
20200090919 | Multi-Reflecting Time-of-Flight Mass Spectrometer - A multi-reflecting time-of-flight mass spectrometer (MR-TOF MS) includes an ion source, an orthogonal accelerator, and an ion mirror assembly. The ion source is capable of generating a beam of ions, and is arranged to accelerate the ions in a first direction along a first axis. The orthogonal accelerator is arranged to accelerate the ions in a second direction along a second axis. The second direction is orthogonal to the first direction. The ion mirror assembly includes a plurality of gridless planar mirrors and a plurality of electrodes. The plurality of electrodes are arranged to provide time-focusing of ions along a third axis substantially independent of ion energy and ion position. | 2020-03-19 |
20200090920 | METHOD FOR ANALYZING A GAS BY MASS SPECTROMETRY, AND MASS SPECTROMETER - A method for analyzing a gas by mass spectrometry includes exciting ions of the gas to be analyzed in an FT ion trap, and recording a first frequency spectrum in a first measurement time interval during or after the excitation of the ions. The first frequency spectrum contains ion frequencies of the excited ions and interference frequencies. The method also includes recording a second frequency spectrum in a second measurement time interval. The second frequency spectrum contains the interference frequencies, but not the ion frequencies of the first frequency spectrum. The method further includes comparing the first frequency spectrum with the second frequency spectrum to identify the interference frequencies in the first frequency spectrum. The disclosure also relates to a mass spectrometer which is suitable for carrying out the method for analyzing the gas by mass spectrometry. | 2020-03-19 |
20200090921 | ION TRAP DEVICE - An ion trap includes: an ion trap including a plurality of electrodes; a rectangular voltage generator including a voltage source for generating a direct voltage and a switching section, the rectangular voltage generator configured to operate the switching section to generate a rectangular voltage by switching the direct voltage generated by the voltage source and to apply the rectangular voltage to at least one of the plurality of electrodes; and a switching section temperature controller configured to control a temperature of the switching section so as to maintain the temperature of the switching section at a target temperature which is higher than a highest reaching temperature of the switching section. | 2020-03-19 |
20200090922 | FAST START DIMMABLE RF INDUCTION LAMP - A dimmable induction RF fluorescent lamp comprising a dimming circuit enabling the induction RF fluorescent lamp to dim in response to a signal from an external dimming circuit, and having a main mercury amalgam having a vapor pressure at room temperature which is higher than the vapor pressure of the mercury amalgam formed on the flag. | 2020-03-19 |
20200090923 | WAFER SURFACE BEVELING METHOD, METHOD OF MANUFACTURING WAFER, AND WAFER - Example features relate to a method of polishing a chamfered wafer surface, the method including beveling a wafer to generate the chamfered wafer surface, the chamfered wafer surface being inclined with respect to a main wafer surface by an angle θ; and polishing the chamfered wafer surface with a polishing pad, a polishing surface of the polishing pad being inclined with respect to the chamfered wafer surface by an angle α; wherein the angle α is equal to or smaller than the angle θ. Example features relate to a system for polishing the chamfered surface, the system including a polishing pad mounting jig configured to polish the chamfered surface, an angle θ being defined between the chamfered surface and the main surface; and a polishing pad in contact with the chamfered surface at an angle α during polishing; wherein the angle α is smaller than the angle θ. | 2020-03-19 |
20200090924 | SELECTIVE ALUMINUM OXIDE FILM DEPOSITION - Methods of depositing films are described. Specifically, methods of depositing metal oxide films are described. A metal oxide film is selectively deposited on a metal layer relative to a dielectric layer by exposing a substrate to an organometallic precursor followed by exposure to an oxidant. | 2020-03-19 |
20200090925 | METHOD FOR DEHYDRATING SEMICONDUCTOR STRUCTURE AND DEHYDRATING METHOD OF THE SAME - The present disclosure provides a method for dehydrating a semiconductor structure, including providing a semiconductive substrate, forming a trench on the semiconductive substrate, dispensing an agent in liquid form into the trench, solidifying the agent, and dehydrating a surface in the trench by transforming the agent from solid form to vapor form. | 2020-03-19 |
20200090926 | PATTERN FORMING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - In one embodiment, a pattern forming method includes forming a first film on a substrate. The method further includes supplying energy to the first film to form a first region to which the energy have been supplied, and a second region including at least a region to which the energy has not been supplied. The method further includes impregnating at least the first region out of the first and second region with metal atoms. The method further includes developing the first film after impregnating the first region with the metal atoms to remove the second region while leaving the first region. | 2020-03-19 |
20200090927 | MASK FORMING METHOD - There is provided a mask forming method, including: forming a photosensitive organic film on a workpiece; generating a first region and a second region in the photosensitive organic film by performing a selective exposure and a post-exposure baking on the photosensitive organic film, the first region having an acidic functional group in the photosensitive organic film, and the second region having a protective group in which the acidic functional group is protected; forming a salt in the first region by causing a basic substance to permeate into the first region using a substance staying in a gaseous state or a solid state; and removing the first region by dissolving the salt in a developer. | 2020-03-19 |
20200090928 | PATTERNING DIRECTLY ON AN AMORPHOUS SILICON HARDMASK - The invention herein includes enhancing the surface of an amorphous silicon hardmask through implantation of nonpolar, hydrophobic elements, resulting in increased hydrophobicity and increased resist adhesion of the amorphous silicon surface. According to the invention, implanting the hydrophobic elements may involve introduction of the hydrophobic elements into the surface of the amorphous silicon by way of low energy implantation and plasma treatment. The implanted hydrophobic element may be Boron, Xenon, Fluorine, Phosphorus, a combination thereof, or other hydrophobic elements. According to the invention, the surface of the amorphous silicon is enhanced with 10-15% hydrophobic element, however in other embodiments, this composition may be adjusted as needed. In any case, however, the invention herein includes maintaining an etch selectivity of the bulk amorphous silicon hardmask. | 2020-03-19 |
20200090929 | METHODS FOR DEVICE FABRICATION USING PITCH REDUCTION - Embodiments of a method for device fabrication by reverse pitch reduction flow include forming a first pattern of features above a substrate and forming a second pattern of pitch-multiplied spacers subsequent to forming the first pattern of features. In embodiments of the invention the first pattern of features may be formed by photolithography and the second pattern of pitch-multiplied spacers may be formed by pitch multiplication. Other methods for device fabrication are provided. | 2020-03-19 |
20200090930 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM - There is provided a technique that includes: (a) forming a first film including a cyclic structure composed of silicon and carbon and also including nitrogen so as to fill a recess formed in a surface of a substrate by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: supplying a precursor including the cyclic structure and also including halogen to the substrate having the recess formed on its surface; and supplying a nitriding agent to the substrate; (b) converting the first film into a second film including the cyclic structure and also including oxygen by supplying a first oxidizing agent to the substrate; and (c) converting the second film into a third film including silicon and oxygen and not including carbon and nitrogen by supplying a second oxidizing agent to the substrate. | 2020-03-19 |
20200090931 | SUBSTRATE PROCESSING APPARATUS AND METHOD OF PRODUCING SEMICONDUCTOR DEVICE - A substrate processing apparatus includes a chamber to accommodate a substrate. The apparatus includes a stage to support the substrate in the chamber. The apparatus includes an electrode disposed above the stage and containing aluminum. The electrode generates plasma from gas supplied into the chamber to form a first film on the substrate by the plasma. The apparatus further includes a second film formed on a surface of the electrode and containing aluminum and fluorine or containing aluminum and oxygen. | 2020-03-19 |
20200090932 | ORDERED NANOSCALE ELECTRIC FIELD CONCENTRATORS FOR EMBEDDED THIN FILM DEVICES - A method comprises depositing forming a first oxide layer comprising a bottom surface in contact with a first electrode, positioning a template at a specified position on a top surface of the first oxide, the template comprising a plurality of nanopores that extend through the template, depositing a metal material into at least a portion of the plurality of nanopores, allowing the metal material to at least partially solidify in at least the portion of the plurality of nanopores to form nanostructures in contact with the first oxide top surface, separating the template from the first oxide layer and the nanostructures, forming a second oxide layer comprising a bottom surface in contact with the first oxide top surface and the nanostructures, and forming a second electrode in electrical contact with at least a portion of a top surface of second oxide top surface. | 2020-03-19 |
20200090933 | CRYSTALLINE TRANSITION METAL DICHALCOGENIDE FILMS AND METHODS OF MAKING SAME - Methods of making molybdenum sulfide (MoS | 2020-03-19 |
20200090934 | PROCESSING METHOD OF WORKPIECE - There is provided a processing method of a workpiece. In the processing method, a protective film including a water-insoluble resin is formed on the front surface of a workpiece and the workpiece on which the protective film is formed is processed. Furthermore, the protective film is deteriorated by supplying an organic solvent to the workpiece processed and the protective film is removed from the front surface of the workpiece by supplying cleaning water to the protective film deteriorated. | 2020-03-19 |
20200090935 | PATTERNING PROCESS - A patterning process includes: (1) forming on a substrate an organic underlayer film, a silicon-containing middle layer film thereon, and further an upper layer resist film thereon; (2) subjecting the upper layer resist film to exposure and development to form an upper layer resist pattern; (3) transferring the upper layer resist pattern to the silicon-containing middle layer film by dry etching, and further transferring the upper layer resist pattern to the organic underlayer film to form an organic underlayer film pattern; (4) forming an inorganic silicon film by a CVD method or an ALD method; (5) removing a portion of the inorganic silicon film by dry etching to expose an upper portion of the organic underlayer film pattern; and (6) removing the organic underlayer film pattern with a stripping liquid to form an inorganic silicon film pattern. The process can solve problems of poor product performance and yield decrease. | 2020-03-19 |
20200090936 | METHOD TO IMPROVE ADHESION OF PHOTORESIST ON SILICON SUBSTRATE FOR EXTREME ULTRAVIOLET AND ELECTRON BEAM LITHOGRAPHY - An etch process that includes removing an oxide containing surface layer from a semiconductor surface to be etched by applying a hydrofluoric (HF) based chemistry, wherein the hydrofluoric (HF) based chemistry terminates the semiconductor surface to be etched with silicon-hydrogen bonds, and applying a vapor priming agent bearing chemical functionality based on the group consisting of alkynes, alcohols and a combination thereof to convert the silane terminated surface to a hydrophobic organic surface. The method continues with forming a photoresist layer on the hydrophobic organic surface; and patterning the photoresist layer. Thereafter, the patterned portions of the photoresist are developed to provide an etch mask. The portions of the semiconductor surface exposed by the etch mask are then etched. | 2020-03-19 |
20200090937 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Included herein are, a step of forming an active region for a semiconductor device on a front surface of a SiC substrate, a step of forming a SiC substrate-to-drain electrode bonding region on a back surface of the SiC substrate by grinding it using an abrasive whose average abrasive grain size is within a specified range, a step of depositing a film of a first drain electrode on the SiC substrate-to-drain electrode bonding region, a step of electrically connecting the first drain electrode with the SiC substrate-to-drain electrode bonding region, and a step of depositing a film of a second drain electrode on the first drain electrode, so that a SiC semiconductor device having a high mechanical strength with a reduced energization loss is achieved. | 2020-03-19 |
20200090938 | Metal Gate Stack Having TaAlCN Layer - Gate stacks for improving integrated circuit device performance and methods for fabricating such gate stacks are disclosed herein. An exemplary gate stack includes a gate dielectric layer disposed over the substrate, a multi-function layer disposed over the gate dielectric layer, and a work function layer disposed over the multi-function layer. The multi-function layer includes a first metal nitride sub-layer having a first nitrogen (N) concentration and a second metal nitride material with a second metal nitride sub-layer having a second N concentration. The second metal nitride sub-layer is disposed over the first metal nitride-sub layer and the first N concentration is greater than the second N concentration. In some implementations, the second N concentration is from about 2% to about 5% and the first N concentration is from about 5% to about 15%. | 2020-03-19 |
20200090939 | Semiconductor Device and Methods of Manufacture - A semiconductor device and method of manufacture are provided. In an embodiment a metal layer is formed over a substrate using a fluorine-free deposition process, a nucleation layer is formed over the metal layer using a fluorine included deposition process, and a fill material is formed to fill an opening and form a gate stack. | 2020-03-19 |
20200090940 | Self-Protective Layer Formed on High-K Dielectric Layer - Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a first gate structure and a second gate structure formed on a substrate, wherein the first gate structure includes a first work function metal having a first material, and the second gate structure includes a second work function metal having a second material, the first material being different from the second material, wherein the first gate structure further includes a gate dielectric layer, a self-protective layer having metal phosphate, and the first work function metal on the self-protective layer. | 2020-03-19 |
20200090941 | METHOD FOR PRODUCING PATTERNS IN A SUBSTRATE - A method for producing at least one pattern in a substrate is provided, including providing a substrate having a front face surmounted by at least one masking layer carrying at least one mask pattern, carrying out an ion implantation of the substrate so as to form at least one first zone having a resistivity ρ1 less than a resistivity ρ2 of at least one second non-modified zone, after the ion implantation step, immersing the substrate in an electrolyte, and removing the at least one first zone selectively at the at least one second zone, the removing including at least an application of an electrochemistry step to the substrate to cause a porosification of the at least one first zone selectively at the at least one second zone. | 2020-03-19 |
20200090942 | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor-device in which a semiconductor-substrate is provided, including a SOI-wafer having a carrier-layer (CL) defining a rear-side, a functional-layer (FL), an insulation-layer (IL) situated between the CL and FL, and a passivation-layer (PL) applied to the FL and defining a front-side. The FL includes a functional-area having functional-structures. The front-side of the semiconductor-substrate is masked, a first-mask opening being configured, which defines an interior-area containing the functional-area, and the PL and FL are removed by etching the front-side of the semiconductor-substrate. The rear-side of the semiconductor-substrate is masked, a second-mask opening being configured, and a circumferential-edge of the second-mask opening being spaced outwardly relative to an outer-circumferential-edge of the interior-area. The CL and the IL are removed at least in the area of the second-mask opening by etching the rear-side of the semiconductor-substrate to expose the interior-area. A semiconductor-device is also described. | 2020-03-19 |
20200090943 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - A semiconductor device includes a stacked structure on a substrate. The stacked structure includes stepped regions and a central region between the stepped regions, an upper insulation layer on the stacked structure, and a capping insulation layer on the stepped regions of the stacked structure. The capping insulation layer includes a first upper end portion and a second upper end portion that are adjacent to the upper insulation layer. The upper insulation layer is between the first upper end portion and the second upper end portion. The first upper end portion and the second upper end portion extends a first height relative to the substrate that is different from a second height relative to the substrate of the second upper end portion. | 2020-03-19 |
20200090944 | SEMICONDUCTOR DEVICES - A semiconductor device includes a conductive structure on a substrate, an etch stop layer on the conductive structure, an insulation layer on the etch stop layer, and a contact plug extending through the etch stop layer and the insulation layer and contacting the conductive structure. The contact plug may include first and second conductive pattern structures sequentially stacked and contacting with each other. A width of an upper surface of the first conductive pattern structure may be greater than that of a lower surface of the second conductive pattern structure. At least an upper portion of the first conductive pattern structure may have a sidewall not perpendicular but inclined to an upper surface of the substrate. | 2020-03-19 |
20200090945 | METHOD OF ACHIEVING HIGH SELECTIVITY FOR HIGH ASPECT RATIO DIELECTRIC ETCH - Various embodiments herein relate to methods and apparatus for etching a feature in a substrate. Often, the feature is etched in the context of forming a DRAM device. The feature is etched in dielectric material, which often includes silicon oxide. The feature is etched using chemistry that includes WF | 2020-03-19 |
20200090946 | METHODS FOR DEPOSITING DIELECTRIC MATERIAL - Embodiments of the present invention provide an apparatus and methods for depositing a dielectric material using RF bias pulses along with remote plasma source deposition for manufacturing semiconductor devices, particularly for filling openings with high aspect ratios in semiconductor applications. In one embodiment, a method of depositing a dielectric material includes providing a gas mixture into a processing chamber having a substrate disposed therein, forming a remote plasma in a remote plasma source and delivering the remote plasma to an interior processing region defined in the processing chamber, applying a RF bias power to the processing chamber in pulsed mode, and forming a dielectric material in an opening defined in a material layer disposed on the substrate in the presence of the gas mixture and the remote plasma. | 2020-03-19 |
20200090947 | METHOD FOR MAKING A WELL DISPOSED OVER A SENSOR - A method for forming a well providing access to a sensor pad includes patterning a first photoresist layer over a dielectric structure disposed over the sensor pad; etching a first access into the dielectric structure and over the sensor pad, the first access having a first characteristic diameter; patterning a second photoresist layer over the dielectric structure; and etching a second access over the dielectric structure and over the sensor pad. The second access has a second characteristic diameter. The first and second accesses overlapping. A diameter ratio of the first characteristic diameter to the second characteristic diameter is not greater than 0.7. The first access exposes the sensor pad. The second access has a bottom depth less than a bottom depth of the first access. | 2020-03-19 |
20200090948 | THREE OR MORE STATES FOR ACHIEVING HIGH ASPECT RATIO DIELECTRIC ETCH - Systems and methods for applying three or more states for achieving a high aspect ratio dielectric etch operation are described. In one of the methods, a middle state is introduced between a high state and a low state. The middle state is applied to both a source radio frequency (RF) generator and a bias radio frequency (RF) generator. During the middle state, RF power is maintained to be between a high amount of RF power associated with the high state and a low amount of RF power associated with the low state to achieve the high aspect ratio dielectric etch. | 2020-03-19 |
20200090949 | HEAT TREATMENT METHOD AND HEAT TREATMENT APPARATUS FOR MANAGING DUMMY WAFER - When a carrier storing a plurality of dummy wafers therein is transported into a heat treatment apparatus, the carrier is registered as a dummy carrier exclusive to the dummy wafers. A dummy database in which a treatment history of each of the dummy wafers is associated with the carrier is held in a storage part. The treatment history of each of the dummy wafers registered in the dummy database is displayed on a display part of the heat treatment apparatus. An operator of the heat treatment apparatus views the displayed information to thereby appropriately grasp and manage the treatment history of each of the dummy wafers. | 2020-03-19 |
20200090950 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film. | 2020-03-19 |
20200090951 | TRANSIENT LIQUID PHASE MATERIAL BONDING AND SEALING STRUCTURES AND METHODS OF FORMING SAME - A method of forming a bonding element including a first transient liquid phase (TLP) bonding element including a first material and a second material, the first material having a higher melting point than the second material, a ratio of a quantity of the first material and the second material in the first TLP bonding element having a first value, and a second TLP bonding element including the first material and the second material, a ratio of a quantity of the first material and the second material in the second TLP bonding element having a second value different from the first value. | 2020-03-19 |
20200090952 | ELECTRONIC PACKAGE AND METHOD FOR FABRICATING THE SAME - The present disclosure provides an electronic package and a method for fabricating the same. A protective layer is formed on a carrier of the electronic component. The electronic component and the protective layer are covered by a covering layer. A through hole is formed in the covering layer and extends through the protective layer, such that a portion of a surface of the carrier is exposed to the through hole. A conductive structure is disposed in the through hole and electrically connected with the carrier. Through the formation of the protective layer, the buffering effect of the protective layer can prevent the laser from directly burning through the covering layer and the protective layer to avoid damages to the carrier. | 2020-03-19 |
20200090953 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device according to an embodiment includes forming a bonding layer containing a metal on a first surface of a first semiconductor substrate having the first surface and a first back surface; bonding the first semiconductor substrate and a second semiconductor substrate having a second surface and a second back surface so that the second surface is in contact with the bonding layer; and forming a coating layer covering the bonding layer on an outer peripheral portion of the second semiconductor substrate. | 2020-03-19 |
20200090954 | Semiconductor Device with Encapsulant Deposited Along Sides and Surface Edge of Semiconductor Die in Embedded WLCSP - A semiconductor device has a semiconductor wafer including a plurality of semiconductor die. An insulating layer is formed over the semiconductor wafer. A portion of the insulating layer is removed by LDA to expose a portion of an active surface of the semiconductor die. A first conductive layer is formed over a contact pad on the active surface of the semiconductor die. The semiconductor wafer is singulated to separate the semiconductor die. The semiconductor die is disposed over a carrier with the active surface of the semiconductor die offset from the carrier. An encapsulant is deposited over the semiconductor die and carrier to cover a side of the semiconductor die and the exposed portion of the active surface. An interconnect structure is formed over the first conductive layer. Alternatively, a MUF material is deposited over a side of the semiconductor die and the exposed portion of the active surface. | 2020-03-19 |
20200090955 | INTEGRATED PASSIVE DEVICE PACKAGE AND METHODS OF FORMING SAME - An embodiment device package includes a first die, a second die, and a molding compound extending along sidewalls of the first die and the second die. The package further includes redistribution layers (RDLs) extending laterally past edges of the first die and the second die. The RDLs include an input/output (I/O) contact electrically connected to the first die and the second die, and the I/O contact is exposed at a sidewall of the device package substantially perpendicular to a surface of the molding compound opposite the RDLs. | 2020-03-19 |
20200090956 | METHOD AND APPARATUS FOR PROCESSING WAFER-SHAPED ARTICLES - A device for processing wafer-shaped articles comprises a closed process chamber that provides a gas-tight enclosure. A rotary chuck is located within the closed process chamber. A heater is positioned relative to the chuck so as to heat a wafer shaped article held on the chuck from one side only and without contacting the wafer shaped article. The heater emits radiation having a maximum intensity in a wavelength range from | 2020-03-19 |
20200090957 | APPARATUS FOR ENHANCING FLOW UNIFORMITY IN A PROCESS CHAMBER - Methods and apparatus for processing substrates are provided herein. In some embodiments, a shroud for controlling gas flow in a process chamber includes a closed walled body having an upper end and a lower end, the closed walled body defining a first opening of the shroud at the lower end and a second opening of the shroud at the upper end, wherein the second opening is offset from the first opening; and a top wall disposed atop a portion of the upper end of the closed walled body in a position above the first opening to define, together with a remaining portion of the upper end of the closed walled body, the second opening, wherein the shroud is configured to divert a gas flow from the second opening through the first opening. | 2020-03-19 |
20200090958 | Substrate Treatment Device and Substrate Treatment Method - A substrate treatment device according to an embodiment includes: a liquid treatment part configured to supply a liquid onto a substrate to form a liquid film remaining in a liquid state on the substrate; an imaging part configured to capture an image of a front surface of the substrate, on which the liquid film remaining in the liquid state is formed; a determination part configured to determine a quality of a formation state of the liquid film based on the captured image of the substrate; and a post-treatment part configured to treat the substrate on which the liquid film is formed, when the determination part determines that the formation state of the liquid film is good. | 2020-03-19 |
20200090959 | MEMBER FOR SEMICONDUCTOR MANUFACTURING APPARATUS - A member for a semiconductor manufacturing apparatus includes a plate, at least one through hole, and an insulating pipe (cylindrical member). The plate is formed of an alumina sintered body, has a front surface serving as a wafer placement surface, and includes therein an electrode. The through hole penetrates through the plate in a thickness direction. The insulating pipe is formed of an alumina sintered body and is joined to a rear surface of the plate with a first joining layer having a ring shape and formed of an alumina sintered body interposed between the insulating pipe and the rear surface of the plate. | 2020-03-19 |
20200090960 | SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - In one embodiment, a semiconductor manufacturing apparatus includes a liquid supplier configured to supply liquid to a film on a substrate and cause a substance to dissolve from the film in the liquid. The apparatus further includes a first channel configured to recover the liquid supplied to the film and feed the liquid again to the liquid supplier, and a second channel configured to drain the liquid supplied to the film. The apparatus further includes a first switching module configured to switch a discharge destination of the liquid supplied to the film between the first and second channels, and a second switching module configured to switch between supplementing and not supplementing the first channel with new liquid. The apparatus further includes a controller configured to control the first and second switching modules to adjust concentration of the substance in the liquid to be supplied to the film. | 2020-03-19 |
20200090961 | DE-BONDING LEVELING DEVICE AND DE-BONDING METHOD - A debonding leveling device and a debonding method are for leveling during a process for debonding a first object and a second object. The first and second objects are retained by a first fixation plate ( | 2020-03-19 |
20200090962 | DEVICE AND METHOD FOR BONDING ALIGNMENT - An apparatus and method for bonding alignment are provided. The apparatus for bonding alignment includes a press assembly and an objective lens group ( | 2020-03-19 |
20200090963 | APPARATUS FOR AND METHOD OF MANUFACTURING AN ARTICLE USING PHOTOLITHOGRAPHY AND A PHOTORESIST - An apparatus configured to manufacture an article using a photoresist comprising photoresist material, the apparatus comprising:
| 2020-03-19 |
20200090964 | WAFER SUPPORT TABLE - A ceramic heater includes a ceramic substrate including, on an upper surface, a wafer mount surface that receives a wafer, and a heater electrode embedded in an inside of the ceramic substrate. The ceramic substrate includes a core portion and a surface layer portion disposed on a surface of the core portion. The surface layer portion has volume resistivity higher than volume resistivity of the core portion. The core portion has thermal conductivity higher than thermal conductivity of the surface layer portion. The surface layer portion is disposed over an area of at least one of a side surface of the core portion and an upper surface of the core portion, the area being not covered with the wafer. | 2020-03-19 |
20200090965 | SUBSTRATE PROCESSING APPARATUS AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A substrate processing a technology including: a substrate holder; a tubular reactor that houses the substrate holder; an inlet flange connected to the tubular reactor including a plurality of gas introduction ports; a lid that closes a lower opening of the inlet flange in a manner such that the substrate holder can be carried in and out; heater elements disposed along the outer peripheral surface of the inlet flange while avoiding the gas introduction ports; temperature sensors thermally coupled to the inlet flange or any heater element and adapted to detect temperatures; and a temperature controller that divides of the heater elements into groups and controls power supply to the respective heater elements independently for each of the groups based on temperatures detection temperatures detected by the temperature sensors. | 2020-03-19 |
20200090966 | PROCESSING SYSTEM HAVING A FRONT OPENING UNIFIED POD (FOUP) LOAD LOCK - An embodiment is a processing system for processing a substrate. The processing system includes a Front Opening Unified Pod (FOUP) load lock (FLL) and a vacuum system. The FLL has walls defining an interior space therein. The FLL includes load lock isolation and tunnel isolation doors. The load lock isolation door is operable to close a first opening in a first sidewall of the FLL. The first opening is sized so that a FOUP is capable of passing therethrough. The tunnel isolation door is operable to close a second opening in a second sidewall of the FLL. The second opening is sized so that a substrate is capable of passing therethrough. The vacuum system is fluidly connected to the interior space of the FLL and is operable to pump down a pressure of the interior space of the FLL. | 2020-03-19 |