10th week of 2009 patent applcation highlights part 56 |
Patent application number | Title | Published |
20090061492 | Method for producing biodiesel - The present invention relates to the production of biodiesel. In particular, the present invention provides systems and methods for fermenting biomass materials with transgenic plant materials expressing the WRI1 transcription factor. In preferred embodiments, WRI1 is expressed in canola. The transgenic canola plants are fermented with a biomass source so that oil is produced using carbohydrates from the biomass source as an energy source. | 2009-03-05 |
20090061493 | Lipid Pathway Modification in Oil-Bearing Microorganisms - The invention provides methods of modifying the lipids produced by microbial organisms through genetic engineering. The invention also provides genetically engineered microbes and methods of fermenting microbes for oil production. Also provided are oils, fuels, oleochemicals, chemical precursors, and other compounds manufactured by such modified microorganisms. Exemplary oil-bearing organisms include organisms containing one or more exogenous genes encoding a fatty acyl-ACP thioesterase, fatty acyl-CoA/aldehyde reductase, fatty acyl-CoA reductase, fatty aldehyde reductase, fatty aldehyde decarbonylase, and/or an acyl carrier protein. | 2009-03-05 |
20090061494 | Enzymatic Conversion of Epoxides to Diols - Diols of the formula I: or corresponding polymers wherein R | 2009-03-05 |
20090061495 | Treatment Systems and Processes for Lignocellulosic Substrates that Contain Soluble Carbohydrates - A biorefining process used to convert lignocellulosic biomass into ethanol via a fermentation pathway. In a first pretreatment process step, the biomass is mixed with an aqueous wash solution to remove soluble carbohydrates from the biomass structure. Next, the solid fraction is separated from a liquid fraction. In a second pretreatment process, the solid fraction is pre-treated to make the fiber bundles and complex polysaccharides more amenable to enzymatic hydrolysis. Following the second pretreatment process, the pre-treated biomass is subjected to one or more enzymes in a hydrolysis process. The liquid fraction isolated from the first pretreatment process is diverted past the second pretreatment process and is recombined with the solid fraction in the hydrolysis process. The enzyme cocktail in the hydrolysis process breaks down the alpha- and hemicellulose polymers into fermentable sugars. Finally, a fermentation process produces a “beer” that is further processed in a distillation and dehydration process. | 2009-03-05 |
20090061496 | Encapsulation of bacteria and viruses in electrospun fibers - A method of preserving organisms in viable form, the method comprising: suspending organisms in a solution of electrospinnable polymer; drawing droplets of said solution through a spinneret; applying an electrostatic field to said droplets under electrospinning conditions; so as to form fibers having a diameter no greater than about 5 μm within which distinct organisms are encapsulated in viable form. | 2009-03-05 |
20090061497 | Methods for Extraction and Purification of Components of Biological Samples - A method is provided for extracting and purifying components of biological samples with a two-step process for elution and neutralization of the components from the sample. The separate elution and neutralization steps use adjustment of the buffer pH to improve extraction and purification of the desired components. | 2009-03-05 |
20090061498 | POLYHYDROXYALKANOATE-CONTAINING STRUCTURE AND MANUFACTURING METHOD THEREOF - A method for manufacturing polyhydroxyalkanoate-containing structure, at least a part of a base material surface of the structure being coated with polyhydroxyalkanoate, the method comprises the steps of immobilizing a polyhydroxyalkanoate synthase on the base material surface, synthesizing, on the base material surface, polyhydroxyalkanoate using a 3-hydroxyacyl coenzyme A to become the substrate of the synthase and the synthase and coating at least a part of the base material surface with the synthesized polyhydroxyalkanoate, wherein the synthase contains an amino acid sequence capable of binding to the base material. A polyhydroxyalkanoate-containing structure, at least a part of a base material surface of the structure being coated with a polyhydroxyalkanoate, comprises the base material, a polyhydroxyalkanoate synthase immobilized on the base material surface, and the polyhydroxyalkanoate with which at least a part of the base material surface is coated, wherein the synthase contains an amino acid sequence capable of binding to the base material. | 2009-03-05 |
20090061499 | METHOD FOR INDUSTRIAL PRODUCTION OF BIOCATALYSTS IN THE FORM OF ENZYMES OR MICROORGANISMS IMMOBILIZED IN POLYVINYL ALCOHOL GEL, THEIR USE AND DEVICES FOR THEIR PRODUCTION - A method for the industrial production of the biocatalysts with biologically active material in the form of immobilized enzymes or microorganisms which are immobilized into the polyvinyl alcohol gel, and their use based on the fact, that the active biological material, formed by the mixture of free native or pretreated (aggregated) enzyme catalyst, or production microorganism, or part of them, and the polyvinyl alcohol gel, is used for their industrial production, the mixture is gelated and shaped in a stream of drying air at the temperature of 800 C to 150 C, considering the extent of the biologically active material, at the biocatalyst geometrical ratio of the surface to the volume kept larger than 7 mm‘l, and consequently thus prepared biocatalysts can be cultivated or stored and then use in biotechnological processes in the conditions, which ensure given biotechnological process higher productivity, higher production and enzymatic stability, long-term and repeated usage or definable process control with consequence easy separation of the biocatalyst. The industrial production device, providing optimization of the biological carrier volume and surface in dependence on biologically active material extent, consisting of a casting mechanism ( | 2009-03-05 |
20090061500 | Novel protein-deamidating enzyme, microorganism producing the same, gene encoding the same, production process therefor, and use thereof - A method for the production of an enzyme, which comprises culturing in a medium a strain that belongs to a bacterium classified into Cytophagales or Actinomycetes, or a new bacterium | 2009-03-05 |
20090061501 | Ethanol resistant and furfural resistant strains of E. coli FBR5 for production of ethanol from cellulosic biomass - Ethanol and furfural challenged strains of | 2009-03-05 |
20090061502 | ETHANOL PRODUCTIVITIES OF SACCHAROMYCES CEREVISIAE STRAINS IN FERMENTATION OF DILUTE-ACID HYDROLYZATES DEPEND ON THEIR FURAN REDUCTION CAPACITIES - The present invention relates to an ethanol producing microbial strain, such as | 2009-03-05 |
20090061503 | HEAP LEACHING OF SULPHIDE ORES - A process for the heap leaching of multiple ores, the process characterized by the process steps of: (i) the agglomeration or wetting of an ore feed; (ii) exposing the agglomerated or wetted ore to an inoculum containing one or more bacterial species capable of biooxidizing sulphide minerals in that ore; (iii) forming one or more heaps from the ore of step (ii); (iv) dispersing further bacterial inoculum over at least a portion of the or each heap; and (v) recovering leach solution draining from the heap and passing a portion thereof to a means for metal recovery. | 2009-03-05 |
20090061504 | Apparatus for Performing Magnetic Electroporation - An apparatus for performing magnetic electroporation is disclosed. A required electric field for electroporation is generated using a pulsed magnetic field through a closed magnetic yoke, such as a toroid, placed in a flow path of a fluid medium to be processed. The fluid medium flows through the orifice of the magnetic yoke, with the fluid medium flowing through and around the yoke. The required power to send a maximum flux through the magnetic yoke is less than the required power in a conventional apparatus for performing electroporation. | 2009-03-05 |
20090061505 | APPARATUS FOR SELECTIVE EXCITATION OF MICROPARTICLES - Nucleic acid microparticles are sequenced by performing a sequencing reaction on the microparticles using one or more selectively exciting the microparticles in an excitation pattern, optically imaging the microparticles at a resolution insufficient to resolve individual microparticles, and processing the optical images of the microparticles using information on the excitation pattern to determine the presence or absence of the optical signature, which indicates the sequence information of the nucleic acid. An apparatus for optical excitation of the microparticles comprises an optical fiber delivering a first laser beam, and an interference pattern generation module coupled to the optical fiber. The interference pattern generation module splits the first laser beam into second and third laser beams and generates the excitation pattern for selectively exciting the microparticles by interference between the second and third laser beams. | 2009-03-05 |
20090061506 | Method for precipitating mono and multiple layers of organophosphoric and organophosphonic acids and the salts thereof in addition to use thereof - The invention relates to a method for precipitating mono or multiple layers of organophosphoric acids of the general formula I (A) | 2009-03-05 |
20090061507 | Fluorescence-based lateral flow device with improved sensitivity - The invention describes how to use nanometer scale fluorescence particles as a label material for fluorescence lateral flow device application. The utilization of the nanoparticles instantly increases the fluorescence intensity by thousands to millions of times. The resulting signal enhancement not only significantly increase sensitivity for analyte detection, but also makes it possible to use low power light sources for illumination and low cost detectors for fluorescence detection. | 2009-03-05 |
20090061508 | Laminar flow reactor - A Laminar Flow reactor for large scale culturing or packaging of cell suspensions, three-dimensional tissue and other biological systems is disclosed. The Laminar Flow reactor consists of an upper housing and a lower housing. The housings are interconnected by a plurality of connectors and a plurality of rigid spacers, an inlet fluid, an outlet fluid, a fluid reservoir, and a means for transporting fluid within the system. During treatment, liquid media is transported from the fluid reservoir to the inlet manifold, which will in turn evenly distribute the media to each of the connected connectors and internal culture pockets. Laminar flow through the device is maintained by the cylindrical shape of the device and by bypasses. An outlet fluid manifold is also provided to ensure that each treatment chamber is evenly filled and to ensure that any air bubbles formed during treatment are removed from the treatment chambers. | 2009-03-05 |
20090061509 | TREATMENT SYSTEM OF HIGH CONCENTRATION ORGANIC SEWAGE - The present invention relates to a treatment system of high concentration organic sewage treatment. The system mainly comprises a chemical settling device, an anoxic biochemical treatment fluidized bed, an anaerobic biochemical treatment fluidized bed and an aerobic biochemical treatment fluidized bed. The said primary filter device, chemical settling device, anoxic biochemical treatment fluidized bed, anaerobic biochemical treatment fluidized bed and aerobic biochemical treatment fluidized bed are connected in sequence. The said primary filter device is composed of several filter modules. The said chemical settling device is composed of several chemical settling units. The said anoxic biochemical treatment fluidized bed unit is equipped with several anoxic biochemical treatment modules. The said anaerobic biochemical treatment fluidized bed is equipped with several anaerobic biochemical treatment modules, and the said aerobic biochemical treatment fluidized bed is equipped with several aerobic biochemical treatment modules. The system is suitable to treat high concentration organic sewage of small scale, having good treatment effect, compact structure, small land used. Therefore, it is suitable to treat organic sewage in organic chemistry factories, pharmaceutical factories, tanneries and other places. | 2009-03-05 |
20090061510 | ANTI-ANGIOGENIC POLYPEPTIDES - Anti-angiogenic polypeptides A | 2009-03-05 |
20090061511 | GAMMA-1 AND GAMMA-3 ANTI-HUMAN CD23 MONOCLONAL ANTIBODIES AND USE THEREOF AS THERAPEUTICS - Monoclonal antibodies which specifically bind human CD23, the low affinity receptor for IgE (FceRII/CD23), and contain either a human gamma-1 or human gamma-3 constant domain, are disclosed. The antibodies are useful for modulating or inhibiting induced IgE expression. Accordingly, they have practical utility in the treatment or prophylaxis of disease conditions wherein inhibition of induced IgE production is therapeutically desirable, including allergic conditions, autoimmune diseases and inflammatory diseases. | 2009-03-05 |
20090061512 | CULTURE MEDIUM FOR GINGIVAL FIBROBLASTS - The present invention relates to a gingival fibroblast culture medium free of animal serum, comprising an animal cell culture medium, free of animal serum, to which is added:
| 2009-03-05 |
20090061513 | Cell sorting and cell cultivation methods - A method of cell seeding is provided, which comprises the steps of:
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20090061514 | USE OF CYTOKINES AND MITOGENS TO INHIBIT GRAFT VERSUS HOST DISEASE - A method for inducing T cell tolerance in peripheral blood mononuclear cells (PBMCs) comprising adding a suppressive composition to said cells. | 2009-03-05 |
20090061515 | Methods of inhibiting or suppressing cellular proliferation - Methods of inhibiting or suppressing cellular proliferation are disclosed that include delivering at least one antiproliferative agent into or proximate a cell. In certain embodiments, the antiproliferative agent(s) are hydrolysis products of a biodegradable polymer (e.g., a polyketal polymer). | 2009-03-05 |
20090061516 | ANIMAL CELL CULTURE MEDIA COMPRISING NON ANIMAL OR PLANT DERIVED NUTRIENTS - The present invention provides serum-free cell culture media formulations which are capable of supporting the in vitro cultivation of animal cells. The media comprise at least one nutrient of non-animal derivation, such as at least one plant peptide and/or at least one non-animal or plant lipid and/or fatty acid. The media may further optionally comprise an enzymatic digest or extract of yeast cells. The present invention also provides methods of cultivating animal cells in vitro using these cell culture media formulations. In addition, the media of tile present invention can be used for growth of animal cells for virus production. | 2009-03-05 |
20090061517 | Cell culture apparatus and methods of making and using same - The present invention provides compositions and articles for cell culture and methods for preparing the compositions and articles. Generally, the article can include a porous biocompatible polymer scaffold. The scaffold may be prepared by preparing a polymer composition that includes a biocompatible polymer and a porogen, then removing the porogen. In some embodiments, the polymer composition may be applied to a substrate. In some embodiments, the polymer composition may be secured to the substrate. | 2009-03-05 |
20090061518 | System and Method for Dispensing Dehydrated Culture Media Powder - An improved system and method for dispensing dehydrated culture media (DCM) powder into containers for preparation as a culture media. The manual and automated systems and methods operate to dispense DCM powder, as well as liquid, into vessels or media preparation instruments in a manner to avoid DCM dust inhalation by persons in the surrounding area and contamination of equipment and surfaces in the surrounding area. | 2009-03-05 |
20090061519 | METABOLIC REGULATORS - The present invention provides methods to make soluble or membrane-anchored metabolic regulators for use in prokaryotes or eukaryotes. The present invention provides methods of expressing novel protein constructs that bind to specific metabolites to control their availability in the cell. The invention utilizes bacterial periplasmic binding proteins, or domains from prokaryotic and eukaryotic proteins that are functionally similar to the bacterial periplasmic binding proteins, fused together and/or fused to a peptide that encodes a transmembrane domain. Changes in metabolite availability will result in altered metabolism or receptor activity to improve growth, yield, crop quality, or tolerance to biotic and abiotic stress. | 2009-03-05 |
20090061520 | Synthetic Biology Vectors - The present invention provides compositions, methods and kits for generating synthetic genetic circuits in biological systems. In particular, the present invention provides vectors, reagents and methods of their use in constructing synthetic genetic circuits in bacteria. | 2009-03-05 |
20090061521 | Recombinant negative strand RNA virus expression systems and vaccines - The present invention relates methods of generating infectious negative-strand virus in host cells by an entirely vector-based system without the aid of a helper virus. In particular, the present invention relates methods of generating infectious recombinant negative-strand RNA viruses intracellularly in the absence of helper virus from expression vectors comprising cDNAs encoding the viral proteins necessary to form ribonucleoprotein complexes (RNPs) and expression vectors comprising cDNA for genomic viral RNA(s) (vRNAs) or the corresponding cRNA(s). The present invention also relates to methods of generating infectious recombinant negative-strand RNA viruses which have mutations in viral genes and/or which express, package and/or present peptides or polypeptides encoded by heterologous nucleic acid sequences. The present invention further relates the use of the recombinant negative-strand RNA viruses or chimeric negative-strand RNA viruses of the invention in vaccine formulations and pharmaceutical compositions. | 2009-03-05 |
20090061522 | Automated Protein Analyzer - A direct rapid automated protein analyzer is disclosed. The protein analyzer includes means for reducing protein samples to small particles, a reaction vessel in material transfer communication with the homogenizer, a reservoir for binding dye composition in fluid communication with the reaction vessel, a metering pump in fluid communication with the reservoir and the reaction vessel for distributing discrete predetermined amounts of a binding dye composition to the reaction vessel, a filter in fluid communication with the reaction vessel for separating solids from filtrate after a dye binding reaction has taken place in the reaction vessel, and a calorimeter in fluid communication with the filter and the reaction vessel for measuring the absorbance of the filtrate from the reaction vessel and the filter. The rapid analyzer can be used in conjunction with a kit that includes a sample cup for mixing a protein sample with a dye-binding solution and a filter holder for being positioned in the sample cup. The filter holder includes a filter media and a depending spout below the filter media that reaches bottom portions of the cup when the filter media is positioned above the cup. The kit can also include dye concentrate solution. | 2009-03-05 |
20090061523 | MASS DEFECT LABELING AND METHODS OF USE THEREOF - Briefly described, embodiments of this disclosure include mass defect labeled peptides, methods of identifying peptides, and the like. | 2009-03-05 |
20090061524 | Enzyme-Channeling Based Electrochemical Biosensors - Low-cost, non-toxic and fast immunoassay systems (immunosensors) and uses thereof as analytical and diagnostic tools for detecting an immune response in a subject are disclosed. The systems and methods disclosed are based on recording an electrochemical signal which is generated proportionally to an enzymatic cascade reaction (enzyme-channeling) upon detecting an analyte, and therefore can be used to determine the titer level of an antibody analyte in a liquid sample such as artificial media, serum or blood both qualitatively and quantitatively, in a one-step and separation free immunoassay. Systems and methods based on recording an electrochemical signal which is generated proportionally to an enzymatic cascade reaction (enzyme-channeling) upon detecting an analyte, which utilize a non-toxic secondary substrate such as acetaminophen are also disclosed. | 2009-03-05 |
20090061525 | ON-CHIP ANALYSIS OF COVALENTLY LABELLED SAMPLE SPECIES - A method for analyzing a sample comprising different sample compounds is described. The method comprises staining the sample compounds by adding a dye species to a solution of the sample, the dye species having reactive groups adapted for forming covalent bonds with specific groups of the sample compounds, and providing the modified sample compounds to a microfluidic chip, the microfluidic chip being adapted to provide an electrophoretic separation. The method further comprises electrophoretically separating the modified sample compounds, and detecting separated compounds. | 2009-03-05 |
20090061526 | NUCLEIC ACID SEQUENCING BY SELECTIVE EXCITATION OF MICROPARTICLES - Nucleic acid microparticles are sequenced by performing a sequencing reaction on the microparticles using one or more reagents, selectively exciting the microparticles in an excitation pattern, optically imaging the microparticles at a resolution insufficient to resolve individual microparticles, and processing the optical images of the microparticles using information on the excitation pattern to determine the presence or absence of the optical signature, which indicates the sequence information of the nucleic acid. An apparatus for optical excitation of the microparticles comprises an optical fiber delivering a first laser beam, and an interference pattern generation module coupled to the optical fiber. The interference pattern generation module splits the first laser beam into second and third laser beams and generates the excitation pattern for selectively exciting the microparticles by interference between the second and third laser beams. | 2009-03-05 |
20090061527 | Methods and Devices for Detecting Nucleic Acid Hybridization - The present invention provides novel methods and devices for detecting hybridization of nucleic acids using liquid crystals and cationic surfactants. | 2009-03-05 |
20090061528 | HPTS-MONO AND BIS CYS-MA POLYMERIZABLE FLUORESCENT DYES FOR USE IN ANALYTE SENSORS - Novel fluorescent dyes are disclosed for use in analyte detection. In particular, mono- and bis-substituted HPTS dyes and methods of making them are provided. | 2009-03-05 |
20090061529 | METHOD FOR DETECTING SUBSTANCE IN LIQUID AND SENSOR FOR DETECTING SUBSTANCE IN LIQUID - A method for detecting a substance in a liquid with high accuracy and high sensitivity includes recording frequency drifts of output frequencies of oscillator circuit outputs of m sensing oscillator circuits respectively including sensing SAW elements and frequency drifts of output frequencies of oscillator circuit outputs of n reference oscillator circuits respectively including reference SAW elements; determining at least one of the sensing oscillator circuits whose frequency drifts fall within a predetermined range and at least one of the reference oscillator circuits whose frequency drifts fall within the predetermined range to be acceptable; selecting at least one of the sensing oscillator circuits from among the acceptable sensing oscillator circuits and at least one of the reference oscillator circuits from among the acceptable reference oscillator circuits; and comparing an oscillator circuit output of the selected at least one of sensing oscillator circuits with an oscillator circuit output of the selected at least one of reference oscillator circuits to thereby detect a detection target substance. | 2009-03-05 |
20090061530 | METHOD FOR DESIGNATING A COMPONENT HAVING A HEAT INSULATION LAYER AND FOR DETERMINING ITS OPERATING TIME - A method for designating a component, coated with a heat insulation layer including zirconium dioxide (ZrO | 2009-03-05 |
20090061531 | DNA BINDING PROTEIN - Methods of screening for compounds which are, for example, capable of modulating amino acid-DNA interaction, modulating DNA replication, modulating cell proliferation, and for identifying compounds which inhibit cellular proliferation caused by cancer, are provided. | 2009-03-05 |
20090061532 | FLUORESCENCE RESONANCE ENERGY TRANSFER DETECTION WITH NANOPARTICLES FOR IN VITRO AND IN VIVO APPLICATIONS - A combination of nanoparticles is disclosed comprised of amine functionalized polyethylene glycol in which one particle with a fluorescent donor dye having one wavelength excitation maximum and at least one additional particle with a second fluorescent dye having a second, higher wavelength excitation maximum, the particles having the same or different biomolecule targeting moieties bound to their external surfaces. | 2009-03-05 |
20090061533 | STRUCTURE, TARGET SUBSTANCE DETECTION ELEMENT AND TARGET SUBSTANCE DETECTION KIT - A target substance detection element that can effectively prevent the nonspecific adsorption of a target substance or impurities and detects the target substance with high sensitivity, a target substance detection kit, and a structure constituting the target substance detection element. The structure has a substrate, polymers present on the substrate surface, and first target substance capturing molecules bonded to the polymers. The polymer is composed of a polymer of a carboxybetaine monomer represented by General Formula (1) below. The first target substance capturing molecules are bonded to some of the carboxyl groups of the polymers. A compound represented by General Formula (2) is bonded to at least some of the carboxyl groups, from among the carboxyl groups of the polymers, that are not bonded to the first target substance capturing molecules. | 2009-03-05 |
20090061534 | Assay Device with Shared Zones - Disclosed is an assay device for determining the presence and/or extent of one or more analytes in liquid sample containing a) first and second assays each comprising a flow-path having a detection zone for immobilising a labelled binding reagent, wherein detection of a labelled binding reagent at one or both detection zones is indicative of the presence and/or extent of one or more analytes; b) a shared reference zone; c) one or more light sources to illuminate the detection zones and the reference zone; d) one or more photodetectors to detect light from the detection zones and the reference zone, which photodetector/s generate a signal, the magnitude of which signal is related to the amount of light detected; and e) signal processing means for processing signals from the photodetector/s. | 2009-03-05 |
20090061535 | Method of adjusting the working range of multi-analyte assay - The invention features a method of adjusting the concentration of at least one but not all of a plurality of analytes in a fluid sample to match a known working range of detection of an analyte assay system, where each of the plurality of analytes may or may not be present within an expected initial concentration range having a high end and a low end, and at least one analyte has a high end expected concentration range that exceeds the high end of the working range of the assay system. The expected concentration of the high concentration analyte is adjusted by a proportional scaling constant, α, so that the high end of the adjusted expected concentration range is less than or equal to the high end of the working range, without adjusting the expected concentration range of at least one other of the plurality of analytes. Adjustment is preferably accomplished by adding to the solution phase of the assay one or more scaling agents, each scaling agent binding with specificity to an analyte and thereby preventing it from being detected by the assay system, e.g., by competing with binding to immobilized capture agent. This scaling method contrasts with prior methods, in which a concentration of available analyte is offset by a fixed amount to adjust the detectable threshold of the assay. Here, the amount of scaling agent is proportional to a scaling coefficient, and the scaling agent is present in the solution phase of the assay at high concentrations relative to analyte. Due to the equilibrium conditions established by the laws of mass transfer, the amount of free analyte remaining in solution in the presence of scaling agent is predictable and finite, and can be measured as a quantitative indicator of the initial concentration of the analyte in the sample. | 2009-03-05 |
20090061536 | Si/Si3N4 SYSTEM NANOSIZED PARTICLES, BIOSUBSTANCE LABELING AGENT EMPLOYING THE NANOSIZED PARTICLES, AND METHOD OF MANUFACTURING THE NANOSIZED PARTICLES - An objective is to provide Si/Si | 2009-03-05 |
20090061537 | METHOD OF MANUFACTURING OSCILLATOR DEVICE - A method of manufacturing oscillator devices each having an oscillator and a resilient supporting member for supporting the oscillator for oscillatory motion, includes a step of processing one and the same substrate to form oscillators and resilient supporting members of oscillator devices so that oscillators of adjacent oscillator devices are connected to each other, a step of forming or placing a magnetic material so that it extends across the connected oscillators of the adjacent oscillator devices, and a step of simultaneously cutting and separating the connected oscillators and the magnetic material formed or placed to extend across the connected oscillators, whereby oscillator devices such as oscillatory type actuators having good reliability and performance evenness can be manufactured with a good productivity. | 2009-03-05 |
20090061538 | Methods of forming ferroelectric capacitors and methods of manufacturing semiconductor devices using the same - In a method of forming a ferroelectric capacitor, a lower electrode layer is formed on a substrate. A first crystalline layer is formed on the lower electrode layer. A ferroelectric layer is formed on the first crystalline layer. The first crystalline layer one of prevents a component of the ferroelectric layer from diffusing into the lower electrode layer and mitigates fatigue of the ferroelectric layer. An upper electrode layer is formed on the ferroelectric layer. | 2009-03-05 |
20090061539 | Substrate holding structure and method of producing semiconductor device using the same - A substrate holding structure includes a wafer stage having a first main surface and a second main surface opposite to the first main surface. A substrate placing area is defined on the first main surface. The substrate holding structure further includes a static capacity measurement electrode having a center circular electrode and at least one circular ring electrode for measuring a combined capacity among a substrate to be placed in the substrate placing area, the center circular electrode, and the circular ring electrode; at least one temperature measurement unit; an electrode control unit connected to the center circular electrode and the circular ring electrode; a temperature control unit connected to the temperature measurement unit and the temperature adjustment unit; a storage unit; a calculation unit connected to the storage unit; and a control unit connected to the electrode control unit and the temperature control unit. | 2009-03-05 |
20090061540 | Plasma process detecting sensor - The present invention provides a plasma process detecting sensor. In the plasma process detecting sensor, a hole diameter of an insulating film is spread with almost no spread of a hole diameter of an upper electrode. Therefore, when the plasma process detecting sensor is exposed to a plasma, positive ions incident onto the bottom of a contact hole are hard to collide with an inner wall surface of a hole main body of the insulating film. As a result, the inner wall surface of the hole main body of the insulating film is hard to undergo damage, and the generation of a defect level that assists electric conduction can be suppressed. It is thus possible to suppress age deterioration of a sensor function during the measurement of a charge-up under an environment of a plasma etching condition. | 2009-03-05 |
20090061541 | SEMICONDUCTOR FABRICATION SYSTEM, AND FLOW RATE CORRECTION METHOD AND PROGRAM FOR SEMICONDUCTOR FABRICATION SYSTEM - Zero point shift based on thermal siphon effect occurring actually when a substrate is processed is detected accurately and corrected suitably. The semiconductor fabrication system comprises a gas supply passage ( | 2009-03-05 |
20090061542 | Method and apparatus for diagnosing status of parts in real time in plasma processing equipment - Apparatus and methods for diagnosing status of a consumable part of a plasma reaction chamber, the consumable part including at least one conductive element embedded therein. The method includes the steps of: coupling the conductive element to a power supply so that a bias potential relative to the ground is applied to the conductive element; exposing the consumable part to plasma erosion until the conductive element draws a current from the plasma upon exposure of the conductive element to the plasma; measuring the current; and evaluating a degree of erosion of the consumable part due to the plasma based on the measured current. | 2009-03-05 |
20090061543 | METHOD FOR CALIBRATING AN INSPECTION TOOL - Provided is a method for manufacturing a semiconductor device. The method, in one embodiment, includes calibrating an inspection tool configured to obtain a measurement of a semiconductor feature, including: 1) providing a test structure comprising a substrate having a trench therein, and a post feature located over the substrate adjacent the trench. The post feature, in this embodiment, includes a second layer positioned over a first layer, wherein the first layer has a notch or bulge in a sidewall thereof; 2) finding a location of the notch or bulge relative to a different known point of the test structure using a probe of the inspection tool; and 3) calculating a dimension of the probe using the relative locations of the notch or bulge and the different known point. | 2009-03-05 |
20090061544 | TRAJECTORY BASED CONTROL OF PLASMA PROCESSING - A method of controlling a plasma processing according to trajectories connecting start and stop values of parameters controlling the plasma processing, for example, gas flow and power supplied to generate the plasma. The trajectories maybe based on equations including at least time as a variable. At set times within the processing, the values of the parameters are updated according to the predetermined trajectories. Sensors associated with the chamber may also adjust the trajectories, provide variables to the equations, and/or define the trajectories. | 2009-03-05 |
20090061545 | Edge Removal Of Silicon-On-Insulator Transfer Wafer - A silicon-on-insulator transfer wafer having a front surface with a circumferential lip around a circular recess is polished. In one version, the circular recess on the front surface of the wafer is masked by filling the recess with spin-on-glass. The front surface of the wafer is exposed to an etchant to preferentially etch away the circumferential lip, while the circular recess is masked by the spin-on-glass. The spin-on glass is removed, and the front surface of the transfer wafer is polished. Other methods of removing the circumferential lip include applying a higher pressure to the circumferential lip in a polishing process, and directing a pressurized fluid jet at the base of the circumferential lip. | 2009-03-05 |
20090061546 | METHOD FOR SETTING PREDEFINABLE PARAMETERS - A method for setting predefinable parameters is described, in which for an electronic component, for example a voltage regulator having at least one integrated circuit, the latter has an external connection, via which it is connectable to a programming device. For the latter, a so-called zero programming is provided in the manufacture of the integrated circuit, and predefinable parameters or settings are programmed in following the completion of the manufacturing process, in particular following the assembly of the component or the voltage regulator with the associated generator. | 2009-03-05 |
20090061547 | Landing Pad for Use As a Contact to a Conductive Spacer - A landing pad for use as a contact to a conductive spacer adjacent a structure in a semiconductor device comprises two islands, each of which is substantially rectangularly shaped and is spaced apart from one another and from the structure. Conductive spacers are adjacent to each island and overlapping each other and overlapping with the conductive spacer adjacent to the structure. The contact to the landing pad is on the conductive spacers adjacent to the islands and spaced apart from the structure. | 2009-03-05 |
20090061548 | METHOD FOR FABRICATING PIXEL STRUCTURE - A method for fabricating a pixel structure is provided. First, a substrate having an active device formed thereon is provided. The active device has a gate, a gate dielectric layer, and a semiconductor layer having a channel, a source, and a drain region. Then, a dielectric layer is formed to cover the active device, and a photo-resist layer having a first photo-resist block and a second photo-resist block thinner than the first photo-resist block is formed on the dielectric layer. The second photo-resist block has openings above the source and the drain region, respectively. The source and the drain regions are exposed by removing part of the dielectric layer with the photo-resist layer as a mask. A second metal layer is formed after removing the second photo-resist block. A source and a drain are formed after removing the first photo-resist block. A pixel electrode connected to the drain is formed. | 2009-03-05 |
20090061549 | PROCESS FOR PRODUCING OPTICAL SEMICONDUCTOR DEVICE - The present invention relates to a process for producing an optical semiconductor device, the process including: disposing a sheet for optical-semiconductor-element encapsulation including a resin sheet A and a plurality of resin layers B discontinuously embedded in the resin sheet A and a plurality of optical semiconductor elements mounted on a substrate in such a way that each of the plurality of optical semiconductor elements faces either one of the plurality of resin layers B; and followed by embedding each of the plurality of optical semiconductor elements in either one of the plurality of resin layers B. According to the process of the invention, optical semiconductor elements can be embedded at once. As a result, an optical semiconductor device which is excellent in LED element protection and durability can be easily obtained. Consequently, the optical semiconductor device obtained can have a prolonged life. | 2009-03-05 |
20090061550 | LED PACKAGE AND FABRICATING METHOD THEREOF - The invention provides an LED package capable of effectively releasing heat emitted from an LED chip out of the package and a fabrication method thereof. For this purpose, at least one groove is formed on an underside surface of the substrate to package the LED chip and the groove is filled with carbon nanotube material. In the LED package, a substrate having at least one groove on the underside surface is prepared. A plurality of electrodes are formed on a top surface of the substrate. Also, at least the one LED chip is mounted over the substrate to have both terminals electrically connected to the upper electrodes. In addition, carbon nanotube filler is filled in the groove of the substrate. | 2009-03-05 |
20090061551 | Light Emitting Apparatus and Method of Fabricating the Same - Although an ink jet method known as a method of selectively forming a film of a high molecular species organic compound, can coat to divide an organic compound for emitting three kinds (R, G, B) of light in one step, film forming accuracy is poor, it is difficult to control the method and therefore, uniformity is not achieved and the constitution is liable to disperse. In contrast thereto, according to the invention, a film comprising a high molecular species material is formed over an entire face of a lower electrode connected to a thin film transistor by a coating method and thereafter, the film comprising the high molecular species material is etched by etching by plasma to thereby enable to selectively form a high molecular species material layer. Further, the organic compound layer is constituted by a material for carrying out luminescence of white color or luminescence of single color and combined with a color changing layer or a coloring layer to thereby realize full color formation. | 2009-03-05 |
20090061552 | LIGHT EMITTING APPARATUS AND METHOD FOR THE SAME - A light emitting apparatus includes a patterned conductive layer, a light emitting component, and a first light diffusion layer, wherein the light emitting component is disposed on the patterned conductive layer and the light emitting component and the patterned conductive layer are embedded into the first light diffusion layer. The method for manufacturing the light emitting apparatus is also disclosed. | 2009-03-05 |
20090061553 | MAUNFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY SUBSTRATE - A thin film transistor array substrate and the manufacturing method thereof are disclosed herein. A first patterned metal layer, an insulating layer, a patterned layer, and a second patterned metal layer are sequentially formed on a substrate. Then, a number of scan lines and a number of source lines are disposed on the substrate and define a number of pixel regions. A number of the storage capacitance lines are disposed on the substrate in a direction extending along the scan lines and across the pixel regions, wherein each of the storage capacitance lines is essentially perpendicular to each of the source lines and to form a cross portion. A number of patterned thin films are disposed on the storage capacitance lines and above the cross portion. | 2009-03-05 |
20090061554 | RESINOUS HOLLOW PACKAGE AND PRODUCING METHOD THEREOF - The present invention provides a resinous hollow package that includes a moisture-proof island that is a planar structure disposed below a semiconductor element mounting surface of the resinous hollow package, the semiconductor element mounting surface having an area of 200 mm | 2009-03-05 |
20090061555 | RADIATION DETECTING APPARATUS AND METHOD FOR MANUFACTURING THE SAME - An underlayer of a phosphor layer is disposed on a sensor panel including two-dimensionally arranged photoelectric conversion devices. The surface of the underlayer is subjected to atmospheric pressure plasma treatment. The phosphor layer is formed on the surface-treated underlayer. Then, the phosphor layer is covered with a moisture-resistant protective layer, a reflection layer, and another protective layer. Thus, the phosphor layer is prevented from peeling due to adhesion failure, and is constituted of uniformly shaped crystals by vapor deposition. A resulting radiation detecting apparatus exhibits high sensitivity and high definition, producing a uniform photoelectric conversion efficiency. | 2009-03-05 |
20090061556 | Method for Manufacturing Image Sensor - A method for manufacturing an image sensor according to an embodiment includes performing a plasma surface treatment on an oxide film microlens to mitigate high surface morphology. The image sensor can include a passivation layer on a substrate having a pad region and a pixel region and a color filter layer on the passivation layer. A first low temperature oxide can be formed over the substrate including the color filter layer; and an oxide film microlens can be formed on the first low temperature oxide layer. A portion of the first low temperature oxide layer can provide a seed microlens upon which a second low temperature oxide layer is formed to form the oxide film microlenses. The plasma surface treatment can then be applied with respect to the oxide film microlenses. | 2009-03-05 |
20090061557 | METHOD FOR MANUFACTURING SUBSTRATE FOR PHOTOELECTRIC CONVERSION ELEMENT - A silicon layer having a conductivity type opposite to that of a bulk is provided on the surface of a silicon substrate and hydrogen ions are implanted to a predetermined depth into the surface region of the silicon substrate through the silicon layer to form a hydrogen ion-implanted layer. Then, an n-type germanium-based crystal layer whose conductivity type is opposite to that of the silicon layer and a p-type germanium-based crystal layer whose conductivity type is opposite to that of the germanium-based crystal layer are successively vapor-phase grown to provide a germanium-based crystal. The surface of the germanium-based crystal layer and the surface of the supporting substrate are bonded together. In this state, impact is applied externally to separate a silicon crystal from the silicon substrate along the hydrogen ion-implanted layer, thereby transferring a laminated structure composed of the germanium-based crystal and the silicon crystal onto the supporting substrate. | 2009-03-05 |
20090061558 | METHOD OF FABRICATING ORGANIC ELECTRONIC DEVICE - A fabricating method of organic electronic device is provided. The method comprises: providing a flexible substrate; fabricating a plurality of organic elements on the flexible substrate; depositing a patterned spacing layer on the flexible substrate with a spacing material deposition source and a mask; and arranging a cover substrate on the patterned spacing layer, and sealing the edges of the flexible substrate and the cover substrate with a sealant, wherein the patterned spacing layer is used to maintain a space between the flexible substrate and the cover substrate. | 2009-03-05 |
20090061559 | MANUFACTURE METHOD FOR ZnO-CONTAINING COMPOUND SEMICONDUCTOR LAYER - A manufacture method for a ZnO-containing compound semiconductor layer has the steps of: (a) preparing a substrate; and (b) growing a ZnO-containing semiconductor layer above the substrate by supplying at the same time at least Zn and O as source gases and S as surfactant. There is provided the manufacture method for the ZnO-containing compound semiconductor layer with improved flatness. | 2009-03-05 |
20090061560 | METHOD OF FABRICATING ORGANIC ELECTRONIC DEVICE - A fabricating method of organic electronic device is provided. The method comprises: providing a flexible substrate; fabricating a plurality of organic elements on the flexible substrate; depositing a spacing material layer on the flexible substrate; patterning the spacing material layer to form a patterned spacing layer; and arranging a cover substrate on the patterned spacing layer, and sealing the edges of the flexible substrate and the cover substrate with a sealant, wherein the patterned spacing layer is used to maintain a space between the flexible substrate and the cover substrate. | 2009-03-05 |
20090061561 | METHOD OF PRODUCING ELECTRONIC APPARATUS - To provide a method of producing an electronic apparatus that is inexpensive, contributes to high productivity, and can achieve good communication characteristics. A method of producing an electronic apparatus composed of an IC chip ( | 2009-03-05 |
20090061562 | METHOD OF FABRICATING MICROELECTROMECHANICAL SYSTEMS DEVICES - A method of fabricating microelectromechanical systems devices is disclosed. A silicon substrate having a plurality of microelectromechanical systems elements formed on a first surface thereof is provided. A guard layer defining a plurality of recesses is applied to the silicon substrate such that respective microelectromechanical systems elements are located within respective recesses. The silicon substrate is then segmented into discrete parts and an adhesive layer is bonded to a second surface of the silicon substrate. The guard layer is next segmented into discrete parts corresponding to the discrete parts of the silicon substrate, thereby forming individual microelectromechanical systems devices. Finally, the adhesive layer is selectively exposed to a light source allowing removal of individual microelectromechanical systems devices. | 2009-03-05 |
20090061563 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING PLURAL SEMICONDUCTOR CHIPS - A method for manufacturing a semiconductor device includes mounting a first chip over a first area of a chip mounting section of a lead frame and mounting a second chip over a second area of the chip mounting section, wherein the second area is adjacent to the first area via the slit. The chip mounting section is disposed on a flat heating jig. First pads of the first chip are connected with second pads of the second chip via first wires, respectively, and the first pads are connected with leads of the lead frame via second wires, respectively. the first chip, the second chip, the first wires and the second wires are sealed with a resin such that a part of each of the leads is exposed from the resin, and each of the leads is then separated from the lead frame. | 2009-03-05 |
20090061564 | METHOD OF PACKAGING AN INTEGRATED CIRCUIT DIE - A structure ( | 2009-03-05 |
20090061565 | STRUCTURE COMBINING AN IC INTEGRATED SUBSTRATE AND A CARRIER, AND METHOD OF MANUFACTURING SUCH STRUCTURE - The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The interface between the IC integrated substrate and the carrier has a specific area at which the interface adhesion is different from that at the remaining area of the interface. The present invention also provides a method of manufacturing the above structure and a method of manufacturing electronic devices using the above structure. | 2009-03-05 |
20090061566 | SEMICONDUCTOR PACKAGE HAVING A GRID ARRAY OF PIN-ATTACHED BALLS - Semiconductor chip ( | 2009-03-05 |
20090061567 | VIA CONFIGURABLE ARCHITECTURE FOR CUSTOMIZATION OF ANALOG CIRCUITRY IN A SEMICONDUCTOR DEVICE - A semiconductor device having a plurality of layers and a plurality of circuit elements arranged in tiles. At least one of the plurality of layers in the semiconductor device may be a via layer configured to determine the connections of the plurality of circuit elements. The semiconductor device may include an interconnection quilt having a plurality of metal layers disposed to interconnect the plurality of circuit elements. The plurality of circuit elements may be analog circuit element and/or digital circuit elements. The tiles may be analog tiles and digital tiles that form a mixed signal structured array. | 2009-03-05 |
20090061568 | Techniques for Fabricating Nanowire Field-Effect Transistors - Techniques for the fabrication of field-effect transistors (FETs) having nanowire channels are provided. In one aspect, a method of fabricating a FET is provided comprising the following steps. A substrate is provided having a silicon-on-insulator (SOI) layer. At least one nanowire is deposited over the SOI layer. A sacrificial gate is formed over the SOI layer so as to cover a portion of the nanowire that forms a channel region. An epitaxial semiconductor material is selectively grown from the SOI layer that covers the nanowire and attaches the nanowire to the SOI layer in a source region and in a drain region. The sacrificial gate is removed. An oxide is formed that divides the SOI layer into at least two electrically isolated sections, one section included in the source region and the other section included in the drain region. A gate dielectric layer is formed over the channel region. A gate is formed over the channel region separated from the nanowire by the gate dielectric layer. A metal-semiconductor alloy is formed over the source and drain regions. | 2009-03-05 |
20090061569 | CONTACT STRUCTURE - There is disclosed a contact structure for electrically connecting conducting lines formed on a first substrate of an electrooptical device such as a liquid crystal display with conducting lines formed on a second substrate via conducting spacers while assuring a uniform cell gap among different cells if the interlayer dielectric film thickness is nonuniform across the cell or among different cells. A first conducting film and a dielectric film are deposited on the first substrate. Openings are formed in the dielectric film. A second conducting film covers the dielectric film left and the openings. The conducting spacers electrically connect the second conducting film over the first substrate with a third conducting film on the second substrate. The cell gap depends only on the size of the spacers, which maintain the cell gap. | 2009-03-05 |
20090061570 | SEMICONDUCTOR DEVICE AND LTPS-TFT WITHIN AND METHOD OF MAKING THE SAME - A thin film transistor (TFT) formed on a substrate includes a polycrystalline film, a gate insulator, a hydrogen-supplying film and a gate electrode. The polycrystalline film is formed on the substrate. Two sides of the polycrystalline film serve as the source and the drain of the semiconductor device, and the central region of the polycrystalline layer serves as the channel. The gate insulator is formed on the polycrystalline film, then the polycrystalline film is ions implanted, and the hydrogen-supplying film is formed on the gate insulator. The gate electrode is formed on the hydrogen-supplying film above the channel. The hydrogen-supplying film supplies hydrogen to the polycrystalline film, especially to the channel, so as to transform the unsaturated bonds into hydrogen bonds in the channel for avoiding the unsaturated bonds to degrade the charge carrier efficiency of the channel. | 2009-03-05 |
20090061571 | Method for Manufacturing a Pixel Structure of a Liquid Crystal Display - A method for manufacturing the pixel structure of a liquid crystal display is provided. In comparison to using seven masks in the conventional lithographic processes for the pixel structure, only four masks are required in the manufacturing method of the present invention. Therefore, the cost of manufacturing is reduced. Furthermore, the unnecessary multilayer structures on the display area can be removed in the manufacturing processes, and thus, enhance the transmittance thereof. | 2009-03-05 |
20090061572 | NONPLANAR SEMICONDUCTOR DEVICE WITH PARTIALLY OR FULLY WRAPPED AROUND GATE ELECTRODE AND METHODS OF FABRICATION - A nonplanar semiconductor device and its method of fabrication is described. The nonplanar semiconductor device includes a semiconductor body having a top surface opposite a bottom surface formed above an insulating substrate wherein the semiconductor body has a pair laterally opposite sidewalls. A gate dielectric is formed on the top surface of the semiconductor body on the laterally opposite sidewalls of the semiconductor body and on at least a portion of the bottom surface of semiconductor body. A gate electrode is formed on the gate dielectric, on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of semiconductor body and beneath the gate dielectric on the bottom surface of the semiconductor body. A pair source/drain regions are formed in the semiconductor body on opposite sides of the gate electrode. | 2009-03-05 |
20090061573 | Methods for manufacturing thin film transistor and display device - The present invention provides a method for manufacturing a highly reliable semiconductor device with a small amount of leakage current. In a method for manufacturing a thin film transistor, etching is conducted using a resist mask to form a back channel portion in the thin film transistor, the resist mask is removed, a part of the back channel is etched to remove etching residue and the like left over the back channel portion, whereby leakage current caused by the residue and the like can be reduced. The etching step of the back channel portion can be conducted by dry etching using non-bias. | 2009-03-05 |
20090061574 | Semiconductor Device and Method of Manufacturing The Semiconductor Device - In a semiconductor device, a first interlayer insulating layer made of an inorganic material and formed on inverse stagger type TFTs, a second interlayer insulating layer made of an organic material and formed on the first interlayer insulating layer, and a pixel electrode formed in contact with the second interlayer insulating layer are disposed on a substrate, and an input terminal portion that is electrically connected to a wiring of another substrate is provided on an end portion of the substrate. The input terminal portion includes a first layer made of the same material as that of the gate electrode and a second layer made of the same material as that of the pixel electrode. With this structure, the number of photomasks used in the photolithography method can be reduced to 5. | 2009-03-05 |
20090061575 | Display device and fabrication method thereof - The present invention provides a display device which forms thin film transistor circuits differing in characteristics from each other on a substrate in mixture and a fabrication method of the display device. On a glass substrate having a background layer which is formed by stacking an SiN film and an SiO | 2009-03-05 |
20090061576 | MANUFACTURING METHOD FOR COMPOUND SEMICONDUCTOR DEVICE AND ETCHING SOLUTION - After an n-type AlGaN barrier layer ( | 2009-03-05 |
20090061577 | METHOD OF PRODUCING PRODUCT INCLUDING SILICON WIRES - A product including a plurality of wires, in which longitudinal directions of the wires are arranged in one direction so that each one of the wires is positioned end to end to one another, and a method of producing the same are disclosed. The longitudinal directions of the plurality of wires each covered with a polymer are arranged in one direction in a solvent, and the plurality of the wires whose longitudinal directions are arranged in one direction is fixed by using the polymer. | 2009-03-05 |
20090061578 | Method of Manufacturing a Semiconductor Microstructure - A method of manufacturing a semiconductor microstructure comprises: forming a standard CMOS wafer with at least one micro-electro-mechanical structure on a top surface of a silicon substrate, forming at least one sacrificial layer and one resist layer sequentially on the top surface of the CMOS wafer; forming an etching resist layer on a lower rear surface of the silicon substrate, etching the lower rear surface of the silicon base by deep reactive ion etching or wet etching to form a space corresponding to the micro-electro-mechanical structure, and etching the CMOS wafer and the sacrificial layer, respectively, to cause suspension of the micro-electro-mechanical structure. Such arrangements effectively prevent the occurrence of undercut, reduce the exposure and possibility of damage of the micro-electro-mechanical structure, and effectively save the package cost. | 2009-03-05 |
20090061579 | LAYOUT METHOD OF SEMICONDUCTOR DEVICE WITH JUNCTION DIODE FOR PREVENTING DAMAGE DUE TO PLASMA CHARGE - Provided is a layout method of junction diodes for preventing damage caused by plasma charge. The layout method includes operations of forming an active layer so as to form a plurality of active regions in a unit layout pattern; forming a gate layer so as to form a plurality of gate regions on the active regions; forming a first conductive type doping region in at least one of the plurality of active regions within a well layer where a second conductive type well region is formed so as to form a first conductive type active region; forming a second conductive type doping region in at least one of the plurality of active regions outside of the second conductive type well region so as to form a second conductive type active region; and forming a second conductive type doping region connected with the gate regions so as to form a junction diode in at least one active region between the first and second conductive type active regions. | 2009-03-05 |
20090061580 | METHOD OF FORMING FINFET DEVICE - The invention discloses a method of forming a finFET device. A hard mask layer is formed on an active area of a semiconductor substrate. A portion of the hard mask layer is etched to form a recess. A conformal gate defining layer is deposited on the recess and a tilt angle ion implantation process is performed. A part of the gate defining layer is removed to define a fin pattern. The fin pattern is subsequently transferred to the hard mask layer. The patterned hard mask layer having the fin pattern is utilized as an etching mask, and the semiconductor substrate is etched to form a fin structure. | 2009-03-05 |
20090061581 | METHOD FOR MANUFACTURING TRENCH ISOLATION STRUCTURE AND NON-VOLATILE MEMORY - A method for manufacturing a non-volatile memory is provided. An isolation structure is formed in a trench formed in a substrate. A portion of the isolation structure is removed to form a recess. A first dielectric layer and a first conductive layer are formed sequentially on the substrate. Bar-shaped cap layers are formed on the substrate. The first conductive layer not covered by the bar-shaped cap layers is removed to form first gate structures. A second dielectric layer is formed on the sidewalls of the first gate structures. A third dielectric layer is formed on the substrate between the first gate structures. A second conductive layer is formed on the third dielectric layer. The bar-shaped cap layers and a portion of the first conductive layer are removed to form second gate structures. A doped region is formed in the substrate at two sides of each of the second gate structures. | 2009-03-05 |
20090061582 | MANUFACTURING METHOD OF NON-VOLATILE MEMORY - A manufacturing method of a non-volatile memory includes first providing a substrate for defining multiple pairs of active regions; forming a control gate in one of each pair of the active regions of the substrate; sequentially forming a gate oxide layer, a conductor layer, and a patterned mask layer on the substrate, wherein the patterned mask layer exposes a portion of the conductor layer; forming a first dielectric layer on the exposed portion of the conductor layer; removing the patterned mask layer; removing the conductor layer without covering the first dielectric layer, and using the remained conductor layer as the floating gate; forming a second dielectric layer on sidewalls of the floating gate; forming an erase gate above the floating gate and correspondingly above the control gate, and forming a source region and a drain region in the other one of each pair of the active regions | 2009-03-05 |
20090061583 | METHOD FOR PREPARING DYNAMIC RANDOM ACCESS MEMORY STRUCTURE - A method for preparing a dynamic random access memory structure, comprising steps of forming a bottom conductive region in a substrate, removing a predetermined portion of the substrate to form a plurality of pillars having a bottom end lower than a bottom surface of the bottom conductive region, forming a first oxide layer on the substrate and below the bottom conductive region in the pillar, forming a conductive block between two adjacent pillars to electrically connect the two bottom conductive regions in the two adjacent pillars, forming a second oxide layer covering the conductive block, forming a gate oxide layer on a sidewall of the pillar, forming a gate structure on a surface of the gate oxide layer; and forming an upper conductive region on a top portion of the pillar. | 2009-03-05 |
20090061584 | Semiconductor Process for Trench Power MOSFET - The present invention provides a semiconductor process for a trench power MOSFET. The semiconductor process includes providing a substrate, forming an EPI wafer on the surface, performing trench dry etching, performing HTP hard mask oxide deposition and channel self- align implant, performing boron (B) implant and completing the P-body region through a thermal process, performing arsenic (As) implant and completing the n+ source region through a thermal process, and depositing BPSG ILD, front side metal Al, and backside metal Ti/Ni/Ag. | 2009-03-05 |
20090061585 | High-voltage vertical transistor with a multi-gradient drain doping profile - A high-voltage transistor includes first and second trenches that define a mesa in a semiconductor substrate. First and second field plate members are respectively disposed in the first and second trenches, with each of the first and second field plate members being separated from the mesa by a dielectric layer. The mesa includes a plurality of sections, each section having a substantially constant doping concentration gradient, the gradient of one section being at least 10% greater than the gradient of another section. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. | 2009-03-05 |
20090061586 | Strained Channel Transistor - A semiconductor device, such as a PMOS or an NMOS transistor, having a stressed channel region is provided. The semiconductor device is formed by recessing the source/drain regions after forming a gate stack. The substrate is removed under the gate stack. Thereafter, an epitaxial layer is formed under the gate stack and in the source/drain regions. The epitaxial layer may be doped in the source/drain regions. In an embodiment, a lower portion of the epitaxial layer and the epitaxial layer under the gate stack may be doped with a conductivity type opposite of the conductivity type of the source/drain regions. In another embodiment of the present invention, a lower portion of the epitaxial layer is left undoped. | 2009-03-05 |
20090061587 | METHOD FOR FABRICATING CAPACITOR IN SEMICONDUCTOR DEVICE - A method for fabricating a capacitor includes providing a substrate having a capacitor region is employed, forming a first Ru | 2009-03-05 |
20090061588 | METHOD FOR FABRICATING DYNAMIC RANDOM ACCESS MEMORY - A method for fabricating a dynamic random access memory is provided. A substrate having two trench capacitors therein is provided, an isolation structure protruding from a surface of the substrate is formed on each trench capacitor, a spacer is formed on the substrate at two sides of each of the isolation structures, and a block layer is formed between each spacer and each isolation structure and between each spacer and the substrate. A trench is formed in the substrate between the trench capacitors, and partial of the trench is located under partial of the spacers and partial of the block layer. The spacers, the block layer, and partial of the isolation structures above the trench are removed. A gate structure protruding from the surface of the substrate is formed in the trench. A doped region is formed in the substrate at each of two sides of the gate structure. | 2009-03-05 |
20090061589 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING CYLINDER-TYPE CAPACITOR STRUCTURE - A method of manufacturing a semiconductor device includes forming an inter-layer insulating film; arranging a plurality of grooves in a surface layer of the inter-layer insulating film; forming embedded insulating films which are embedded in the grooves; arranging a plurality of holes in the inter-layer insulating film and between the embedded insulating films, in a manner such that each hole between the embedded insulating films partially overlaps therewith; forming lower electrodes, each of which has a bottom and a side face, and covers the bottom and side faces of the corresponding hole; forming a capacitance insulating film which covers the lower electrodes; and forming an upper electrode which further covers the capacitance insulating film. | 2009-03-05 |
20090061590 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device capable of eliminating additional processes for forming an alignment key, thereby shortening the manufacturing process and lowering the manufacturing costs. The method includes forming an insulating layer including wiring regions and an alignment key region over a substrate; forming a first trench and a second trench on the wiring regions and alignment key region of the insulating layer, respectively; laminating a metal layer over the insulating layer including the first trench and second trench, the metal layer completely filling the first trench and partially filling in the second trench and having a height difference between the wiring region and alignment key region; forming a damascene metal wiring in the first trench and forming an alignment mark layer in the second trench by polishing the metal layer; and forming an MIM capacitor over the entire surface of the insulating layer including the metal wiring and alignment mark layer using the alignment mark layer as an alignment key. Since it is not necessary to perform a process for repeatedly forming the alignment key during manufacturing an MIM capacitor, a process for aligning the serial masks is not necessary. Therefore, the manufacturing process can be simplified and the manufacturing cost can be reduced. | 2009-03-05 |
20090061591 | METHOD FOR MANUFACTURING SOI SUBSTRATE - A hydrogen ion-implanted layer is formed on the surface side of a first substrate which is a single-crystal silicon substrate. At least one of the surface of a second substrate, which is a transparent insulating substrate, and the surface of the first substrate is subjected to surface activation treatment, and the two substrates are bonded together. The bonded substrate composed of the single-crystal Si substrate and the transparent insulating substrate thus obtained is mounted on a susceptor and is placed under an infrared lamp. Light having a wave number range including an Si—H bond absorption band is irradiated at the bonded substrate for a predetermined length of time to break the Si—H bonds localized within a “microbubble layer” in the hydrogen ion-implanted layer, thereby separating a silicon thin film layer. | 2009-03-05 |