09th week of 2021 patent applcation highlights part 72 |
Patent application number | Title | Published |
20210066216 | PHYSICALLY OBFUSCATED CIRCUIT | 2021-03-04 |
20210066217 | PACKAGED INTEGRATED CIRCUIT HAVING STACKED DIE AND METHOD FOR MAKING | 2021-03-04 |
20210066218 | STACKED STRUCTURE, PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | 2021-03-04 |
20210066219 | SEMICONDUCTOR PACKAGE FOR HIGH-SPEED DATA TRANSMISSION AND MANUFACTURING METHOD THEREOF | 2021-03-04 |
20210066220 | TEXTURED BOND PADS | 2021-03-04 |
20210066221 | METAL LAYER PATTERNING FOR MINIMIZING MECHANICAL STRESS IN INTEGRATED CIRCUIT PACKAGES | 2021-03-04 |
20210066222 | BONDING STRUCTURE AND METHOD OF FORMING SAME | 2021-03-04 |
20210066223 | INTERCONNECT STRUCTURE, SEMICONDUCTOR STRUCTURE INCLUDING INTERCONNECT STRUCTURE AND METHOD FOR FORMING THE SAME | 2021-03-04 |
20210066224 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2021-03-04 |
20210066225 | BOND PAD STRUCTURE WITH REDUCED STEP HEIGHT AND INCREASED ELECTRICAL ISOLATION | 2021-03-04 |
20210066226 | ELECTRICAL DEVICES, SEMICONDUCTOR PACKAGES AND METHODS OF FORMING THE SAME | 2021-03-04 |
20210066227 | IC PACKAGE DESIGN AND METHODOLOGY TO COMPENSATE FOR DIE-SUBSTRATE CTE MISMATCH AT REFLOW TEMPERATURES | 2021-03-04 |
20210066228 | PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | 2021-03-04 |
20210066229 | INTERCONNECT FOR ELECTRONIC DEVICE | 2021-03-04 |
20210066230 | CHIP PACKAGE STRUCTURE | 2021-03-04 |
20210066231 | INTEGRATED CIRCUIT DEVICE HAVING REDISTRIBUTION PATTERN | 2021-03-04 |
20210066232 | PACKAGE SUBSTRATE WITH HIGH-DENSITY INTERCONNECT LAYER HAVING PILLAR AND VIA CONNECTIONS FOR FAN OUT SCALING | 2021-03-04 |
20210066233 | CHEMICAL MECHANICAL POLISHING FOR HYBRID BONDING | 2021-03-04 |
20210066234 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2021-03-04 |
20210066235 | SEMICONDUCTOR DEVICE | 2021-03-04 |
20210066236 | SEMICONDUCTOR APPARATUS | 2021-03-04 |
20210066237 | HIGH-FREQUENCY MODULE | 2021-03-04 |
20210066238 | ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF AND MANUFACTURING METHOD OF DRIVER IC | 2021-03-04 |
20210066239 | PACKAGED SEMICONDUCTOR DEVICES WITH UNIFORM SOLDER JOINTS | 2021-03-04 |
20210066240 | CHIP WITH MAGNETIC INTERCONNECT ALIGNMENT | 2021-03-04 |
20210066241 | MANUFACTURING METHOD OF SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR APPARATUS | 2021-03-04 |
20210066242 | Bonding Passive Devices on Active Device Dies to Form 3D Packages | 2021-03-04 |
20210066243 | MICRO LED DISPLAY AND METHOD FOR MANUFACTURING THE SAME | 2021-03-04 |
20210066244 | SEMICONDUCTOR PACKAGE | 2021-03-04 |
20210066245 | SEMICONDUCTOR PACKAGE | 2021-03-04 |
20210066246 | METHODS AND APPARATUS FOR INTEGRATED GANG BONDING AND ENCAPSULATION OF STACKED MICROELECTRONIC DEVICES | 2021-03-04 |
20210066247 | STACKED DIE PACKAGE INCLUDING WIRE BONDING AND DIRECT CHIP ATTACHMENT, AND RELATED METHODS, DEVICES AND APPARATUSES | 2021-03-04 |
20210066248 | PACKAGE AND MANUFACTURING METHOD THEREOF | 2021-03-04 |
20210066249 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2021-03-04 |
20210066250 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES | 2021-03-04 |
20210066251 | SEMICONDUCTOR CHIP STACK STRUCTURE, SEMICONDUCTOR PACKAGE, AND METHOD OF MANUFACTURING THE SAME | 2021-03-04 |
20210066252 | STACKED DIE STRUCTURE AND METHOD OF FABRICATING THE SAME | 2021-03-04 |
20210066253 | SEMICONDUCTOR PACKAGE | 2021-03-04 |
20210066254 | DIE STACK STRUCTURE AND MANUFACTURING METHOD THEREOF | 2021-03-04 |
20210066255 | THREE-DIMENSIONAL STACKING STRUCTURE AND MANUFACTURING METHOD THEREOF | 2021-03-04 |
20210066256 | STRAY INDUCTANCE REDUCTION IN PACKAGED SEMICONDUCTOR DEVICES | 2021-03-04 |
20210066257 | ELECTRONIC DEVICE PACKAGE STRUCTURE | 2021-03-04 |
20210066258 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2021-03-04 |
20210066259 | TRANSPARENT DISPLAY PANEL AND TRANSPARENT DISPLAY | 2021-03-04 |
20210066260 | LIGHT-EMITTING PACKAGE AND DISPLAY DEVICE INCLUDING THE SAME | 2021-03-04 |
20210066261 | LIGHT EMITTING DEVICE, AND METHOD FOR MANUFACTURING LIGHT EMITTING DEVICE | 2021-03-04 |
20210066262 | LIGHT-EMITTING ASSEMBLY | 2021-03-04 |
20210066263 | SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF | 2021-03-04 |
20210066264 | SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME | 2021-03-04 |
20210066265 | TUNABLE CAPACITOR ARRANGEMENTS IN INTEGRATED CIRCUIT PACKAGE SUBSTRATES | 2021-03-04 |
20210066266 | STRETCHABLE DISPLAY DEVICE | 2021-03-04 |
20210066267 | Array Substrate And Fabrication Method Thereof, And Electronic Apparatus | 2021-03-04 |
20210066268 | MASK TRANSFER METHOD (AND RELATED APPARATUS) FOR A BUMPING PROCESS | 2021-03-04 |
20210066269 | SEMICONDCUTOR PACKAGES | 2021-03-04 |
20210066270 | LIGHT-EMITTING DIODE DEVICE WITH DRIVING MECHANISM | 2021-03-04 |
20210066271 | ELECTRONIC DEVICE COMPRISING OPTICAL ELECTRONIC COMPONENTS AND MANUFACTURING METHOD | 2021-03-04 |
20210066272 | Integrated Assemblies Comprising Sense-Amplifier-Circuitry and Wordline-Driver-Circuitry Under Memory Cells of a Memory Array | 2021-03-04 |
20210066273 | LASER ABLATION-BASED SURFACE PROPERTY MODIFICATION AND CONTAMINATION REMOVAL | 2021-03-04 |
20210066274 | SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF | 2021-03-04 |
20210066275 | SEMICONDUCTOR MEMORY DEVICE | 2021-03-04 |
20210066276 | INTEGRATED CIRCUIT DEVICE | 2021-03-04 |
20210066277 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE | 2021-03-04 |
20210066278 | NON-VOLATILE MEMORY DEVICE | 2021-03-04 |
20210066279 | SEMICONDCUTOR PACKAGES | 2021-03-04 |
20210066280 | MEMORY DEVICE | 2021-03-04 |
20210066281 | MEMORY DEVICE | 2021-03-04 |
20210066282 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE | 2021-03-04 |
20210066283 | SEMICONDUCTOR DEVICE AND LAYOUT DESIGN METHOD | 2021-03-04 |
20210066284 | ESD PROTECTION DEVICE WITH LOW TRIGGER VOLTAGE | 2021-03-04 |
20210066285 | Electronic Device Including a Protection Circuit | 2021-03-04 |
20210066286 | ELECTROSTATIC DISCHARGE PROTECTION APPARATUS | 2021-03-04 |
20210066287 | NOVEL ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT | 2021-03-04 |
20210066288 | BIPOLAR SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SUCH A SEMICONDUCTOR DEVICE | 2021-03-04 |
20210066289 | SEMICONDUCTOR DEVICE | 2021-03-04 |
20210066290 | Fin Structure and Method of Forming Same Through Two-Step Etching Processes | 2021-03-04 |
20210066291 | TRANSISTORS WITH VARYING WIDTH NANOSHEET | 2021-03-04 |
20210066292 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2021-03-04 |
20210066293 | GROUP III-NITRIDE (III-N) DEVICES WITH REDUCED CONTACT RESISTANCE AND THEIR METHODS OF FABRICATION | 2021-03-04 |
20210066294 | Uniform Gate Width for Nanostructure Devices | 2021-03-04 |
20210066295 | SEMICONDUCTOR DEVICE | 2021-03-04 |
20210066296 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2021-03-04 |
20210066297 | SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STORAGE DEVICE | 2021-03-04 |
20210066298 | MEMORY DEVICE HAVING 2-TRANSISTOR MEMORY CELL AND ACCESS LINE PLATE | 2021-03-04 |
20210066299 | FEEDBACK 1T DRAM DEVICE HAVING LOCALIZED PARTIAL INSULATING LAYERS | 2021-03-04 |
20210066300 | MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SHARED CHANNEL REGION | 2021-03-04 |
20210066301 | MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND A COMMON PLATE | 2021-03-04 |
20210066302 | MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SHIELD STRUCTURES | 2021-03-04 |
20210066303 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | 2021-03-04 |
20210066304 | DRAM DEVICE INCLUDING AN AIR GAP AND A SEALING LAYER | 2021-03-04 |
20210066305 | SEMICONDUCTOR AND MANUFACTURING METHOD OF THE SAME | 2021-03-04 |
20210066306 | ARRAY OF CAPACITORS, AN ARRAY OF MEMORY CELLS, A METHOD OF FORMING AN ARRAY OF CAPACITORS, AND A METHOD OF FORMING AN ARRAY OF MEMORY CELLS | 2021-03-04 |
20210066307 | SEMICONDUCTOR STRUCTURE FORMATION | 2021-03-04 |
20210066308 | METHOD FOR FABRICATING AND SEMICONDUCTOR DEVICE HAVING THE SECOND BIT LINE CONTACT HIGHER THAN THE TOP SURFACE OF THE FIRST BIT LINE | 2021-03-04 |
20210066309 | METHODS AND APPARATUS FOR SMOOTHING DYNAMIC RANDOM ACCESS MEMORY BIT LINE METAL | 2021-03-04 |
20210066310 | Cell Manufacturing | 2021-03-04 |
20210066311 | FinFET SRAM Having Discontinuous PMOS Fin Lines | 2021-03-04 |
20210066312 | MEMORY DEVICE AND MANUFACTURING METHOD | 2021-03-04 |
20210066313 | SEMICONDUCTOR MEMORY DEVICE HAVING THREE-DIMENSIONAL STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | 2021-03-04 |
20210066314 | 3D MEMORY ARRAY HAVING SELECT LINES | 2021-03-04 |
20210066315 | SEMICONDUCTOR MEMORY DEVICE | 2021-03-04 |